arch/powerpc/kernel/setup_32.c

   1 /*
   2  * Common prep/pmac/chrp boot and setup code.
   3  */
   4
   5 #include <linux/module.h>
   6 #include <linux/string.h>
   7 #include <linux/sched.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/reboot.h>
  11 #include <linux/delay.h>
  12 #include <linux/initrd.h>
  13 #include <linux/tty.h>
  14 #include <linux/bootmem.h>
  15 #include <linux/seq_file.h>
  16 #include <linux/root_dev.h>
  17 #include <linux/cpu.h>
  18 #include <linux/console.h>
  19 #include <linux/memblock.h>
  20
  21 #include <asm/io.h>
  22 #include <asm/prom.h>
  23 #include <asm/processor.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/setup.h>
  26 #include <asm/smp.h>
  27 #include <asm/elf.h>
  28 #include <asm/cputable.h>
  29 #include <asm/bootx.h>
  30 #include <asm/btext.h>
  31 #include <asm/machdep.h>
  32 #include <asm/uaccess.h>
  33 #include <asm/system.h>
  34 #include <asm/pmac_feature.h>
  35 #include <asm/sections.h>
  36 #include <asm/nvram.h>
  37 #include <asm/xmon.h>
  38 #include <asm/time.h>
  39 #include <asm/serial.h>
  40 #include <asm/udbg.h>
  41 #include <asm/mmu_context.h>
  42
  43 #include "setup.h"
  44
  45 #define DBG(fmt...)
  46
  47 extern void bootx_init(unsigned long r4, unsigned long phys);
  48
  49 int boot_cpuid = -1;
  50 EXPORT_SYMBOL_GPL(boot_cpuid);
  51 int boot_cpuid_phys;
  52
  53 int smp_hw_index[NR_CPUS];
  54
  55 unsigned long ISA_DMA_THRESHOLD;
  56 unsigned int DMA_MODE_READ;
  57 unsigned int DMA_MODE_WRITE;
  58
  59 #ifdef CONFIG_VGA_CONSOLE
  60 unsigned long vgacon_remap_base;
  61 EXPORT_SYMBOL(vgacon_remap_base);
  62 #endif
  63
  64 /*
  65  * These are used in binfmt_elf.c to put aux entries on the stack
  66  * for each elf executable being started.
  67  */
  68 int dcache_bsize;
  69 int icache_bsize;
  70 int ucache_bsize;
  71
  72 /*
  73  * We're called here very early in the boot.  We determine the machine
  74  * type and call the appropriate low-level setup functions.
  75  *  -- Cort <cort@fsmlabs.com>
  76  *
  77  * Note that the kernel may be running at an address which is different
  78  * from the address that it was linked at, so we must use RELOC/PTRRELOC
  79  * to access static data (including strings).  -- paulus
  80  */
  81 notrace unsigned long __init early_init(unsigned long dt_ptr)
  82 {
  83         unsigned long offset = reloc_offset();
  84         struct cpu_spec *spec;
  85
  86         /* First zero the BSS -- use memset_io, some platforms don't have
  87          * caches on yet */
  88         memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
  89                         __bss_stop - __bss_start);
  90
  91         /*
  92          * Identify the CPU type and fix up code sections
  93          * that depend on which cpu we have.
  94          */
  95         spec = identify_cpu(offset, mfspr(SPRN_PVR));
  96
  97         do_feature_fixups(spec->cpu_features,
  98                           PTRRELOC(&__start___ftr_fixup),
  99                           PTRRELOC(&__stop___ftr_fixup));
 100
 101         do_feature_fixups(spec->mmu_features,
 102                           PTRRELOC(&__start___mmu_ftr_fixup),
 103                           PTRRELOC(&__stop___mmu_ftr_fixup));
 104
 105         do_lwsync_fixups(spec->cpu_features,
 106                          PTRRELOC(&__start___lwsync_fixup),
 107                          PTRRELOC(&__stop___lwsync_fixup));
 108
 109         return KERNELBASE + offset;
 110 }
 111
 112
 113 /*
 114  * Find out what kind of machine we're on and save any data we need
 115  * from the early boot process (devtree is copied on pmac by prom_init()).
 116  * This is called very early on the boot process, after a minimal
 117  * MMU environment has been set up but before MMU_init is called.
 118  */
 119 notrace void __init machine_init(unsigned long dt_ptr)
 120 {
 121         lockdep_init();
 122
 123         /* Enable early debugging if any specified (see udbg.h) */
 124         udbg_early_init();
 125
 126         /* Do some early initialization based on the flat device tree */
 127         early_init_devtree(__va(dt_ptr));
 128
 129         probe_machine();
 130
 131         setup_kdump_trampoline();
 132
 133 #ifdef CONFIG_6xx
 134         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 135             cpu_has_feature(CPU_FTR_CAN_NAP))
 136                 ppc_md.power_save = ppc6xx_idle;
 137 #endif
 138
 139 #ifdef CONFIG_E500
 140         if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
 141             cpu_has_feature(CPU_FTR_CAN_NAP))
 142                 ppc_md.power_save = e500_idle;
 143 #endif
 144         if (ppc_md.progress)
 145                 ppc_md.progress("id mach(): done", 0x200);
 146 }
 147
 148 #ifdef CONFIG_BOOKE_WDT
 149 /* Checks wdt=x and wdt_period=xx command-line option */
 150 notrace int __init early_parse_wdt(char *p)
 151 {
 152         if (p && strncmp(p, "0", 1) != 0)
 153                booke_wdt_enabled = 1;
 154
 155         return 0;
 156 }
 157 early_param("wdt", early_parse_wdt);
 158
 159 int __init early_parse_wdt_period (char *p)
 160 {
 161         if (p)
 162                 booke_wdt_period = simple_strtoul(p, NULL, 0);
 163
 164         return 0;
 165 }
 166 early_param("wdt_period", early_parse_wdt_period);
 167 #endif  /* CONFIG_BOOKE_WDT */
 168
 169 /* Checks "l2cr=xxxx" command-line option */
 170 int __init ppc_setup_l2cr(char *str)
 171 {
 172         if (cpu_has_feature(CPU_FTR_L2CR)) {
 173                 unsigned long val = simple_strtoul(str, NULL, 0);
 174                 printk(KERN_INFO "l2cr set to %lx\n", val);
 175                 _set_L2CR(0);           /* force invalidate by disable cache */
 176                 _set_L2CR(val);         /* and enable it */
 177         }
 178         return 1;
 179 }
 180 __setup("l2cr=", ppc_setup_l2cr);
 181
 182 /* Checks "l3cr=xxxx" command-line option */
 183 int __init ppc_setup_l3cr(char *str)
 184 {
 185         if (cpu_has_feature(CPU_FTR_L3CR)) {
 186                 unsigned long val = simple_strtoul(str, NULL, 0);
 187                 printk(KERN_INFO "l3cr set to %lx\n", val);
 188                 _set_L3CR(val);         /* and enable it */
 189         }
 190         return 1;
 191 }
 192 __setup("l3cr=", ppc_setup_l3cr);
 193
 194 #ifdef CONFIG_GENERIC_NVRAM
 195
 196 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
 197 unsigned char nvram_read_byte(int addr)
 198 {
 199         if (ppc_md.nvram_read_val)
 200                 return ppc_md.nvram_read_val(addr);
 201         return 0xff;
 202 }
 203 EXPORT_SYMBOL(nvram_read_byte);
 204
 205 void nvram_write_byte(unsigned char val, int addr)
 206 {
 207         if (ppc_md.nvram_write_val)
 208                 ppc_md.nvram_write_val(addr, val);
 209 }
 210 EXPORT_SYMBOL(nvram_write_byte);
 211
 212 ssize_t nvram_get_size(void)
 213 {
 214         if (ppc_md.nvram_size)
 215                 return ppc_md.nvram_size();
 216         return -1;
 217 }
 218 EXPORT_SYMBOL(nvram_get_size);
 219
 220 void nvram_sync(void)
 221 {
 222         if (ppc_md.nvram_sync)
 223                 ppc_md.nvram_sync();
 224 }
 225 EXPORT_SYMBOL(nvram_sync);
 226
 227 #endif /* CONFIG_NVRAM */
 228
 229 int __init ppc_init(void)
 230 {
 231         /* clear the progress line */
 232         if (ppc_md.progress)
 233                 ppc_md.progress("             ", 0xffff);
 234
 235         /* call platform init */
 236         if (ppc_md.init != NULL) {
 237                 ppc_md.init();
 238         }
 239         return 0;
 240 }
 241
 242 arch_initcall(ppc_init);
 243
 244 static void __init irqstack_early_init(void)
 245 {
 246         unsigned int i;
 247
 248         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 249          * as the memblock is limited to lowmem by default */
 250         for_each_possible_cpu(i) {
 251                 softirq_ctx[i] = (struct thread_info *)
 252                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 253                 hardirq_ctx[i] = (struct thread_info *)
 254                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 255         }
 256 }
 257
 258 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
 259 static void __init exc_lvl_early_init(void)
 260 {
 261         unsigned int i, hw_cpu;
 262
 263         /* interrupt stacks must be in lowmem, we get that for free on ppc32
 264          * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
 265         for_each_possible_cpu(i) {
 266                 hw_cpu = get_hard_smp_processor_id(i);
 267                 critirq_ctx[hw_cpu] = (struct thread_info *)
 268                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 269 #ifdef CONFIG_BOOKE
 270                 dbgirq_ctx[hw_cpu] = (struct thread_info *)
 271                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 272                 mcheckirq_ctx[hw_cpu] = (struct thread_info *)
 273                         __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
 274 #endif
 275         }
 276 }
 277 #else
 278 #define exc_lvl_early_init()
 279 #endif
 280
 281 /* Warning, IO base is not yet inited */
 282 void __init setup_arch(char **cmdline_p)
 283 {
 284         *cmdline_p = cmd_line;
 285
 286         /* so udelay does something sensible, assume <= 1000 bogomips */
 287         loops_per_jiffy = 500000000 / HZ;
 288
 289         unflatten_device_tree();
 290         check_for_initrd();
 291
 292         if (ppc_md.init_early)
 293                 ppc_md.init_early();
 294
 295         find_legacy_serial_ports();
 296
 297         smp_setup_cpu_maps();
 298
 299         /* Register early console */
 300         register_early_udbg_console();
 301
 302         xmon_setup();
 303
 304         /*
 305          * Set cache line size based on type of cpu as a default.
 306          * Systems with OF can look in the properties on the cpu node(s)
 307          * for a possibly more accurate value.
 308          */
 309         dcache_bsize = cur_cpu_spec->dcache_bsize;
 310         icache_bsize = cur_cpu_spec->icache_bsize;
 311         ucache_bsize = 0;
 312         if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
 313                 ucache_bsize = icache_bsize = dcache_bsize;
 314
 315         /* reboot on panic */
 316         panic_timeout = 180;
 317
 318         if (ppc_md.panic)
 319                 setup_panic();
 320
 321         init_mm.start_code = (unsigned long)_stext;
 322         init_mm.end_code = (unsigned long) _etext;
 323         init_mm.end_data = (unsigned long) _edata;
 324         init_mm.brk = klimit;
 325
 326         exc_lvl_early_init();
 327
 328         irqstack_early_init();
 329
 330         /* set up the bootmem stuff with available memory */
 331         do_init_bootmem();
 332         if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
 333
 334 #ifdef CONFIG_DUMMY_CONSOLE
 335         conswitchp = &dummy_con;
 336 #endif
 337
 338         if (ppc_md.setup_arch)
 339                 ppc_md.setup_arch();
 340         if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
 341
 342         paging_init();
 343
 344         /* Initialize the MMU context management stuff */
 345         mmu_context_init();
 346
 347 }