2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
46 qtd_fill (struct ehci_qtd
*qtd
, dma_addr_t buf
, size_t len
,
47 int token
, int maxpacket
)
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd
->hw_buf
[0] = cpu_to_le32 ((u32
)addr
);
54 qtd
->hw_buf_hi
[0] = cpu_to_le32 ((u32
)(addr
>> 32));
55 count
= 0x1000 - (buf
& 0x0fff); /* rest of that page */
56 if (likely (len
< count
)) /* ... iff needed */
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i
= 1; count
< len
&& i
< 5; i
++) {
65 qtd
->hw_buf
[i
] = cpu_to_le32 ((u32
)addr
);
66 qtd
->hw_buf_hi
[i
] = cpu_to_le32 ((u32
)(addr
>> 32));
68 if ((count
+ 0x1000) < len
)
74 /* short packets may only terminate transfers */
76 count
-= (count
% maxpacket
);
78 qtd
->hw_token
= cpu_to_le32 ((count
<< 16) | token
);
84 /*-------------------------------------------------------------------------*/
87 qh_update (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
, struct ehci_qtd
*qtd
)
89 /* writes to an active overlay are unsafe */
90 BUG_ON(qh
->qh_state
!= QH_STATE_IDLE
);
92 qh
->hw_qtd_next
= QTD_NEXT (qtd
->qtd_dma
);
93 qh
->hw_alt_next
= EHCI_LIST_END
;
95 /* Except for control endpoints, we make hardware maintain data
96 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
97 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
100 if (!(qh
->hw_info1
& cpu_to_le32(1 << 14))) {
101 unsigned is_out
, epnum
;
103 is_out
= !(qtd
->hw_token
& cpu_to_le32(1 << 8));
104 epnum
= (le32_to_cpup(&qh
->hw_info1
) >> 8) & 0x0f;
105 if (unlikely (!usb_gettoggle (qh
->dev
, epnum
, is_out
))) {
106 qh
->hw_token
&= ~__constant_cpu_to_le32 (QTD_TOGGLE
);
107 usb_settoggle (qh
->dev
, epnum
, is_out
, 1);
111 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
113 qh
->hw_token
&= __constant_cpu_to_le32 (QTD_TOGGLE
| QTD_STS_PING
);
116 /* if it weren't for a common silicon quirk (writing the dummy into the qh
117 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
118 * recovery (including urb dequeue) would need software changes to a QH...
121 qh_refresh (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
123 struct ehci_qtd
*qtd
;
125 if (list_empty (&qh
->qtd_list
))
128 qtd
= list_entry (qh
->qtd_list
.next
,
129 struct ehci_qtd
, qtd_list
);
130 /* first qtd may already be partially processed */
131 if (cpu_to_le32 (qtd
->qtd_dma
) == qh
->hw_current
)
136 qh_update (ehci
, qh
, qtd
);
139 /*-------------------------------------------------------------------------*/
141 static void qtd_copy_status (
142 struct ehci_hcd
*ehci
,
148 /* count IN/OUT bytes, not SETUP (even short packets) */
149 if (likely (QTD_PID (token
) != 2))
150 urb
->actual_length
+= length
- QTD_LENGTH (token
);
152 /* don't modify error codes */
153 if (unlikely (urb
->status
!= -EINPROGRESS
))
156 /* force cleanup after short read; not always an error */
157 if (unlikely (IS_SHORT_READ (token
)))
158 urb
->status
= -EREMOTEIO
;
160 /* serious "can't proceed" faults reported by the hardware */
161 if (token
& QTD_STS_HALT
) {
162 if (token
& QTD_STS_BABBLE
) {
163 /* FIXME "must" disable babbling device's port too */
164 urb
->status
= -EOVERFLOW
;
165 } else if (token
& QTD_STS_MMF
) {
166 /* fs/ls interrupt xfer missed the complete-split */
167 urb
->status
= -EPROTO
;
168 } else if (token
& QTD_STS_DBE
) {
169 urb
->status
= (QTD_PID (token
) == 1) /* IN ? */
170 ? -ENOSR
/* hc couldn't read data */
171 : -ECOMM
; /* hc couldn't write data */
172 } else if (token
& QTD_STS_XACT
) {
173 /* timeout, bad crc, wrong PID, etc; retried */
174 if (QTD_CERR (token
))
175 urb
->status
= -EPIPE
;
177 ehci_dbg (ehci
, "devpath %s ep%d%s 3strikes\n",
179 usb_pipeendpoint (urb
->pipe
),
180 usb_pipein (urb
->pipe
) ? "in" : "out");
181 urb
->status
= -EPROTO
;
183 /* CERR nonzero + no errors + halt --> stall */
184 } else if (QTD_CERR (token
))
185 urb
->status
= -EPIPE
;
187 urb
->status
= -EPROTO
;
190 "dev%d ep%d%s qtd token %08x --> status %d\n",
191 usb_pipedevice (urb
->pipe
),
192 usb_pipeendpoint (urb
->pipe
),
193 usb_pipein (urb
->pipe
) ? "in" : "out",
196 /* if async CSPLIT failed, try cleaning out the TT buffer */
197 if (urb
->status
!= -EPIPE
198 && urb
->dev
->tt
&& !usb_pipeint (urb
->pipe
)
199 && ((token
& QTD_STS_MMF
) != 0
200 || QTD_CERR(token
) == 0)
201 && (!ehci_is_TDI(ehci
)
202 || urb
->dev
->tt
->hub
!=
203 ehci_to_hcd(ehci
)->self
.root_hub
)) {
205 struct usb_device
*tt
= urb
->dev
->tt
->hub
;
207 "clear tt buffer port %d, a%d ep%d t%08x\n",
208 urb
->dev
->ttport
, urb
->dev
->devnum
,
209 usb_pipeendpoint (urb
->pipe
), token
);
211 usb_hub_tt_clear_buffer (urb
->dev
, urb
->pipe
);
217 ehci_urb_done (struct ehci_hcd
*ehci
, struct urb
*urb
, struct pt_regs
*regs
)
218 __releases(ehci
->lock
)
219 __acquires(ehci
->lock
)
221 if (likely (urb
->hcpriv
!= NULL
)) {
222 struct ehci_qh
*qh
= (struct ehci_qh
*) urb
->hcpriv
;
224 /* S-mask in a QH means it's an interrupt urb */
225 if ((qh
->hw_info2
& __constant_cpu_to_le32 (QH_SMASK
)) != 0) {
227 /* ... update hc-wide periodic stats (for usbfs) */
228 ehci_to_hcd(ehci
)->self
.bandwidth_int_reqs
--;
233 spin_lock (&urb
->lock
);
235 switch (urb
->status
) {
236 case -EINPROGRESS
: /* success */
239 COUNT (ehci
->stats
.complete
);
241 case -EREMOTEIO
: /* fault or normal */
242 if (!(urb
->transfer_flags
& URB_SHORT_NOT_OK
))
244 COUNT (ehci
->stats
.complete
);
246 case -ECONNRESET
: /* canceled */
248 COUNT (ehci
->stats
.unlink
);
251 spin_unlock (&urb
->lock
);
253 #ifdef EHCI_URB_TRACE
255 "%s %s urb %p ep%d%s status %d len %d/%d\n",
256 __FUNCTION__
, urb
->dev
->devpath
, urb
,
257 usb_pipeendpoint (urb
->pipe
),
258 usb_pipein (urb
->pipe
) ? "in" : "out",
260 urb
->actual_length
, urb
->transfer_buffer_length
);
263 /* complete() can reenter this HCD */
264 spin_unlock (&ehci
->lock
);
265 usb_hcd_giveback_urb (ehci_to_hcd(ehci
), urb
, regs
);
266 spin_lock (&ehci
->lock
);
269 static void start_unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
270 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
272 static void intr_deschedule (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
273 static int qh_schedule (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
276 * Process and free completed qtds for a qh, returning URBs to drivers.
277 * Chases up to qh->hw_current. Returns number of completions called,
278 * indicating how much "real" work we did.
280 #define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
282 qh_completions (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
, struct pt_regs
*regs
)
284 struct ehci_qtd
*last
= NULL
, *end
= qh
->dummy
;
285 struct list_head
*entry
, *tmp
;
291 if (unlikely (list_empty (&qh
->qtd_list
)))
294 /* completions (or tasks on other cpus) must never clobber HALT
295 * till we've gone through and cleaned everything up, even when
296 * they add urbs to this qh's queue or mark them for unlinking.
298 * NOTE: unlinking expects to be done in queue order.
300 state
= qh
->qh_state
;
301 qh
->qh_state
= QH_STATE_COMPLETING
;
302 stopped
= (state
== QH_STATE_IDLE
);
304 /* remove de-activated QTDs from front of queue.
305 * after faults (including short reads), cleanup this urb
306 * then let the queue advance.
307 * if queue is stopped, handles unlinks.
309 list_for_each_safe (entry
, tmp
, &qh
->qtd_list
) {
310 struct ehci_qtd
*qtd
;
314 qtd
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
317 /* clean up any state from previous QTD ...*/
319 if (likely (last
->urb
!= urb
)) {
320 ehci_urb_done (ehci
, last
->urb
, regs
);
323 ehci_qtd_free (ehci
, last
);
327 /* ignore urbs submitted during completions we reported */
331 /* hardware copies qtd out of qh overlay */
333 token
= le32_to_cpu (qtd
->hw_token
);
335 /* always clean up qtds the hc de-activated */
336 if ((token
& QTD_STS_ACTIVE
) == 0) {
338 if ((token
& QTD_STS_HALT
) != 0) {
341 /* magic dummy for some short reads; qh won't advance.
342 * that silicon quirk can kick in with this dummy too.
344 } else if (IS_SHORT_READ (token
)
345 && !(qtd
->hw_alt_next
& EHCI_LIST_END
)) {
350 /* stop scanning when we reach qtds the hc is using */
351 } else if (likely (!stopped
352 && HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))) {
358 if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
)))
359 urb
->status
= -ESHUTDOWN
;
361 /* ignore active urbs unless some previous qtd
362 * for the urb faulted (including short read) or
363 * its urb was canceled. we may patch qh or qtds.
365 if (likely (urb
->status
== -EINPROGRESS
))
368 /* issue status after short control reads */
369 if (unlikely (do_status
!= 0)
370 && QTD_PID (token
) == 0 /* OUT */) {
375 /* token in overlay may be most current */
376 if (state
== QH_STATE_IDLE
377 && cpu_to_le32 (qtd
->qtd_dma
)
379 token
= le32_to_cpu (qh
->hw_token
);
381 /* force halt for unlinked or blocked qh, so we'll
382 * patch the qh later and so that completions can't
383 * activate it while we "know" it's stopped.
385 if ((HALT_BIT
& qh
->hw_token
) == 0) {
387 qh
->hw_token
|= HALT_BIT
;
392 /* remove it from the queue */
393 spin_lock (&urb
->lock
);
394 qtd_copy_status (ehci
, urb
, qtd
->length
, token
);
395 do_status
= (urb
->status
== -EREMOTEIO
)
396 && usb_pipecontrol (urb
->pipe
);
397 spin_unlock (&urb
->lock
);
399 if (stopped
&& qtd
->qtd_list
.prev
!= &qh
->qtd_list
) {
400 last
= list_entry (qtd
->qtd_list
.prev
,
401 struct ehci_qtd
, qtd_list
);
402 last
->hw_next
= qtd
->hw_next
;
404 list_del (&qtd
->qtd_list
);
408 /* last urb's completion might still need calling */
409 if (likely (last
!= NULL
)) {
410 ehci_urb_done (ehci
, last
->urb
, regs
);
412 ehci_qtd_free (ehci
, last
);
415 /* restore original state; caller must unlink or relink */
416 qh
->qh_state
= state
;
418 /* be sure the hardware's done with the qh before refreshing
419 * it after fault cleanup, or recovering from silicon wrongly
420 * overlaying the dummy qtd (which reduces DMA chatter).
422 if (stopped
!= 0 || qh
->hw_qtd_next
== EHCI_LIST_END
) {
425 qh_refresh(ehci
, qh
);
427 case QH_STATE_LINKED
:
428 /* should be rare for periodic transfers,
429 * except maybe high bandwidth ...
431 if ((__constant_cpu_to_le32 (QH_SMASK
)
432 & qh
->hw_info2
) != 0) {
433 intr_deschedule (ehci
, qh
);
434 (void) qh_schedule (ehci
, qh
);
436 unlink_async (ehci
, qh
);
438 /* otherwise, unlink already started */
445 /*-------------------------------------------------------------------------*/
447 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
448 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
449 // ... and packet size, for any kind of endpoint descriptor
450 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
453 * reverse of qh_urb_transaction: free a list of TDs.
454 * used for cleanup after errors, before HC sees an URB's TDs.
456 static void qtd_list_free (
457 struct ehci_hcd
*ehci
,
459 struct list_head
*qtd_list
461 struct list_head
*entry
, *temp
;
463 list_for_each_safe (entry
, temp
, qtd_list
) {
464 struct ehci_qtd
*qtd
;
466 qtd
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
467 list_del (&qtd
->qtd_list
);
468 ehci_qtd_free (ehci
, qtd
);
473 * create a list of filled qtds for this URB; won't link into qh.
475 static struct list_head
*
477 struct ehci_hcd
*ehci
,
479 struct list_head
*head
,
482 struct ehci_qtd
*qtd
, *qtd_prev
;
489 * URBs map to sequences of QTDs: one logical transaction
491 qtd
= ehci_qtd_alloc (ehci
, flags
);
494 list_add_tail (&qtd
->qtd_list
, head
);
497 token
= QTD_STS_ACTIVE
;
498 token
|= (EHCI_TUNE_CERR
<< 10);
499 /* for split transactions, SplitXState initialized to zero */
501 len
= urb
->transfer_buffer_length
;
502 is_input
= usb_pipein (urb
->pipe
);
503 if (usb_pipecontrol (urb
->pipe
)) {
505 qtd_fill (qtd
, urb
->setup_dma
, sizeof (struct usb_ctrlrequest
),
506 token
| (2 /* "setup" */ << 8), 8);
508 /* ... and always at least one more pid */
511 qtd
= ehci_qtd_alloc (ehci
, flags
);
515 qtd_prev
->hw_next
= QTD_NEXT (qtd
->qtd_dma
);
516 list_add_tail (&qtd
->qtd_list
, head
);
518 /* for zero length DATA stages, STATUS is always IN */
520 token
|= (1 /* "in" */ << 8);
524 * data transfer stage: buffer setup
526 buf
= urb
->transfer_dma
;
529 token
|= (1 /* "in" */ << 8);
530 /* else it's already initted to "out" pid (0 << 8) */
532 maxpacket
= max_packet(usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
));
535 * buffer gets wrapped in one or more qtds;
536 * last one may be "short" (including zero len)
537 * and may serve as a control status ack
542 this_qtd_len
= qtd_fill (qtd
, buf
, len
, token
, maxpacket
);
546 qtd
->hw_alt_next
= ehci
->async
->hw_alt_next
;
548 /* qh makes control packets use qtd toggle; maybe switch it */
549 if ((maxpacket
& (this_qtd_len
+ (maxpacket
- 1))) == 0)
552 if (likely (len
<= 0))
556 qtd
= ehci_qtd_alloc (ehci
, flags
);
560 qtd_prev
->hw_next
= QTD_NEXT (qtd
->qtd_dma
);
561 list_add_tail (&qtd
->qtd_list
, head
);
564 /* unless the bulk/interrupt caller wants a chance to clean
565 * up after short reads, hc should advance qh past this urb
567 if (likely ((urb
->transfer_flags
& URB_SHORT_NOT_OK
) == 0
568 || usb_pipecontrol (urb
->pipe
)))
569 qtd
->hw_alt_next
= EHCI_LIST_END
;
572 * control requests may need a terminating data "status" ack;
573 * bulk ones may need a terminating short packet (zero length).
575 if (likely (urb
->transfer_buffer_length
!= 0)) {
578 if (usb_pipecontrol (urb
->pipe
)) {
580 token
^= 0x0100; /* "in" <--> "out" */
581 token
|= QTD_TOGGLE
; /* force DATA1 */
582 } else if (usb_pipebulk (urb
->pipe
)
583 && (urb
->transfer_flags
& URB_ZERO_PACKET
)
584 && !(urb
->transfer_buffer_length
% maxpacket
)) {
589 qtd
= ehci_qtd_alloc (ehci
, flags
);
593 qtd_prev
->hw_next
= QTD_NEXT (qtd
->qtd_dma
);
594 list_add_tail (&qtd
->qtd_list
, head
);
596 /* never any data in such packets */
597 qtd_fill (qtd
, 0, 0, token
, 0);
601 /* by default, enable interrupt on urb completion */
602 if (likely (!(urb
->transfer_flags
& URB_NO_INTERRUPT
)))
603 qtd
->hw_token
|= __constant_cpu_to_le32 (QTD_IOC
);
607 qtd_list_free (ehci
, urb
, head
);
611 /*-------------------------------------------------------------------------*/
613 // Would be best to create all qh's from config descriptors,
614 // when each interface/altsetting is established. Unlink
615 // any previous qh and cancel its urbs first; endpoints are
616 // implicitly reset then (data toggle too).
617 // That'd mean updating how usbcore talks to HCDs. (2.7?)
621 * Each QH holds a qtd list; a QH is used for everything except iso.
623 * For interrupt urbs, the scheduler must set the microframe scheduling
624 * mask(s) each time the QH gets scheduled. For highspeed, that's
625 * just one microframe in the s-mask. For split interrupt transactions
626 * there are additional complications: c-mask, maybe FSTNs.
628 static struct ehci_qh
*
630 struct ehci_hcd
*ehci
,
634 struct ehci_qh
*qh
= ehci_qh_alloc (ehci
, flags
);
635 u32 info1
= 0, info2
= 0;
643 * init endpoint/device data for this QH
645 info1
|= usb_pipeendpoint (urb
->pipe
) << 8;
646 info1
|= usb_pipedevice (urb
->pipe
) << 0;
648 is_input
= usb_pipein (urb
->pipe
);
649 type
= usb_pipetype (urb
->pipe
);
650 maxp
= usb_maxpacket (urb
->dev
, urb
->pipe
, !is_input
);
652 /* Compute interrupt scheduling parameters just once, and save.
653 * - allowing for high bandwidth, how many nsec/uframe are used?
654 * - split transactions need a second CSPLIT uframe; same question
655 * - splits also need a schedule gap (for full/low speed I/O)
656 * - qh has a polling interval
658 * For control/bulk requests, the HC or TT handles these.
660 if (type
== PIPE_INTERRUPT
) {
661 qh
->usecs
= NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH
, is_input
, 0,
662 hb_mult (maxp
) * max_packet (maxp
)));
663 qh
->start
= NO_FRAME
;
665 if (urb
->dev
->speed
== USB_SPEED_HIGH
) {
669 qh
->period
= urb
->interval
>> 3;
670 if (qh
->period
== 0 && urb
->interval
!= 1) {
671 /* NOTE interval 2 or 4 uframes could work.
672 * But interval 1 scheduling is simpler, and
673 * includes high bandwidth.
675 dbg ("intr period %d uframes, NYET!",
680 struct usb_tt
*tt
= urb
->dev
->tt
;
683 /* gap is f(FS/LS transfer times) */
684 qh
->gap_uf
= 1 + usb_calc_bus_time (urb
->dev
->speed
,
685 is_input
, 0, maxp
) / (125 * 1000);
687 /* FIXME this just approximates SPLIT/CSPLIT times */
688 if (is_input
) { // SPLIT, gap, CSPLIT+DATA
689 qh
->c_usecs
= qh
->usecs
+ HS_USECS (0);
690 qh
->usecs
= HS_USECS (1);
691 } else { // SPLIT+DATA, gap, CSPLIT
692 qh
->usecs
+= HS_USECS (1);
693 qh
->c_usecs
= HS_USECS (0);
696 think_time
= tt
? tt
->think_time
: 0;
697 qh
->tt_usecs
= NS_TO_US (think_time
+
698 usb_calc_bus_time (urb
->dev
->speed
,
699 is_input
, 0, max_packet (maxp
)));
700 qh
->period
= urb
->interval
;
704 /* support for tt scheduling, and access to toggles */
705 qh
->dev
= usb_get_dev (urb
->dev
);
708 switch (urb
->dev
->speed
) {
710 info1
|= (1 << 12); /* EPS "low" */
714 /* EPS 0 means "full" */
715 if (type
!= PIPE_INTERRUPT
)
716 info1
|= (EHCI_TUNE_RL_TT
<< 28);
717 if (type
== PIPE_CONTROL
) {
718 info1
|= (1 << 27); /* for TT */
719 info1
|= 1 << 14; /* toggle from qtd */
723 info2
|= (EHCI_TUNE_MULT_TT
<< 30);
724 info2
|= urb
->dev
->ttport
<< 23;
726 /* set the address of the TT; for TDI's integrated
727 * root hub tt, leave it zeroed.
729 if (!ehci_is_TDI(ehci
)
730 || urb
->dev
->tt
->hub
!=
731 ehci_to_hcd(ehci
)->self
.root_hub
)
732 info2
|= urb
->dev
->tt
->hub
->devnum
<< 16;
734 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
738 case USB_SPEED_HIGH
: /* no TT involved */
739 info1
|= (2 << 12); /* EPS "high" */
740 if (type
== PIPE_CONTROL
) {
741 info1
|= (EHCI_TUNE_RL_HS
<< 28);
742 info1
|= 64 << 16; /* usb2 fixed maxpacket */
743 info1
|= 1 << 14; /* toggle from qtd */
744 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
745 } else if (type
== PIPE_BULK
) {
746 info1
|= (EHCI_TUNE_RL_HS
<< 28);
747 info1
|= 512 << 16; /* usb2 fixed maxpacket */
748 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
749 } else { /* PIPE_INTERRUPT */
750 info1
|= max_packet (maxp
) << 16;
751 info2
|= hb_mult (maxp
) << 30;
755 dbg ("bogus dev %p speed %d", urb
->dev
, urb
->dev
->speed
);
761 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
763 /* init as live, toggle clear, advance to dummy */
764 qh
->qh_state
= QH_STATE_IDLE
;
765 qh
->hw_info1
= cpu_to_le32 (info1
);
766 qh
->hw_info2
= cpu_to_le32 (info2
);
767 usb_settoggle (urb
->dev
, usb_pipeendpoint (urb
->pipe
), !is_input
, 1);
768 qh_refresh (ehci
, qh
);
772 /*-------------------------------------------------------------------------*/
774 /* move qh (and its qtds) onto async queue; maybe enable queue. */
776 static void qh_link_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
778 __le32 dma
= QH_NEXT (qh
->qh_dma
);
779 struct ehci_qh
*head
;
781 /* (re)start the async schedule? */
783 timer_action_done (ehci
, TIMER_ASYNC_OFF
);
784 if (!head
->qh_next
.qh
) {
785 u32 cmd
= readl (&ehci
->regs
->command
);
787 if (!(cmd
& CMD_ASE
)) {
788 /* in case a clear of CMD_ASE didn't take yet */
789 (void) handshake (&ehci
->regs
->status
, STS_ASS
, 0, 150);
790 cmd
|= CMD_ASE
| CMD_RUN
;
791 writel (cmd
, &ehci
->regs
->command
);
792 ehci_to_hcd(ehci
)->state
= HC_STATE_RUNNING
;
793 /* posted write need not be known to HC yet ... */
797 /* clear halt and/or toggle; and maybe recover from silicon quirk */
798 if (qh
->qh_state
== QH_STATE_IDLE
)
799 qh_refresh (ehci
, qh
);
801 /* splice right after start */
802 qh
->qh_next
= head
->qh_next
;
803 qh
->hw_next
= head
->hw_next
;
806 head
->qh_next
.qh
= qh
;
809 qh
->qh_state
= QH_STATE_LINKED
;
810 /* qtd completions reported later by interrupt */
813 /*-------------------------------------------------------------------------*/
815 #define QH_ADDR_MASK __constant_cpu_to_le32(0x7f)
818 * For control/bulk/interrupt, return QH with these TDs appended.
819 * Allocates and initializes the QH if necessary.
820 * Returns null if it can't allocate a QH it needs to.
821 * If the QH has TDs (urbs) already, that's great.
823 static struct ehci_qh
*qh_append_tds (
824 struct ehci_hcd
*ehci
,
826 struct list_head
*qtd_list
,
831 struct ehci_qh
*qh
= NULL
;
833 qh
= (struct ehci_qh
*) *ptr
;
834 if (unlikely (qh
== NULL
)) {
835 /* can't sleep here, we have ehci->lock... */
836 qh
= qh_make (ehci
, urb
, GFP_ATOMIC
);
839 if (likely (qh
!= NULL
)) {
840 struct ehci_qtd
*qtd
;
842 if (unlikely (list_empty (qtd_list
)))
845 qtd
= list_entry (qtd_list
->next
, struct ehci_qtd
,
848 /* control qh may need patching ... */
849 if (unlikely (epnum
== 0)) {
851 /* usb_reset_device() briefly reverts to address 0 */
852 if (usb_pipedevice (urb
->pipe
) == 0)
853 qh
->hw_info1
&= ~QH_ADDR_MASK
;
856 /* just one way to queue requests: swap with the dummy qtd.
857 * only hc or qh_refresh() ever modify the overlay.
859 if (likely (qtd
!= NULL
)) {
860 struct ehci_qtd
*dummy
;
864 /* to avoid racing the HC, use the dummy td instead of
865 * the first td of our list (becomes new dummy). both
866 * tds stay deactivated until we're done, when the
867 * HC is allowed to fetch the old dummy (4.10.2).
869 token
= qtd
->hw_token
;
870 qtd
->hw_token
= HALT_BIT
;
874 dma
= dummy
->qtd_dma
;
876 dummy
->qtd_dma
= dma
;
878 list_del (&qtd
->qtd_list
);
879 list_add (&dummy
->qtd_list
, qtd_list
);
880 __list_splice (qtd_list
, qh
->qtd_list
.prev
);
882 ehci_qtd_init (qtd
, qtd
->qtd_dma
);
885 /* hc must see the new dummy at list end */
887 qtd
= list_entry (qh
->qtd_list
.prev
,
888 struct ehci_qtd
, qtd_list
);
889 qtd
->hw_next
= QTD_NEXT (dma
);
891 /* let the hc process these next qtds */
893 dummy
->hw_token
= token
;
895 urb
->hcpriv
= qh_get (qh
);
901 /*-------------------------------------------------------------------------*/
905 struct ehci_hcd
*ehci
,
906 struct usb_host_endpoint
*ep
,
908 struct list_head
*qtd_list
,
911 struct ehci_qtd
*qtd
;
914 struct ehci_qh
*qh
= NULL
;
917 qtd
= list_entry (qtd_list
->next
, struct ehci_qtd
, qtd_list
);
918 epnum
= ep
->desc
.bEndpointAddress
;
920 #ifdef EHCI_URB_TRACE
922 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
923 __FUNCTION__
, urb
->dev
->devpath
, urb
,
924 epnum
& 0x0f, (epnum
& USB_DIR_IN
) ? "in" : "out",
925 urb
->transfer_buffer_length
,
929 spin_lock_irqsave (&ehci
->lock
, flags
);
930 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE
,
931 &ehci_to_hcd(ehci
)->flags
))) {
936 qh
= qh_append_tds (ehci
, urb
, qtd_list
, epnum
, &ep
->hcpriv
);
937 if (unlikely(qh
== NULL
)) {
942 /* Control/bulk operations through TTs don't need scheduling,
943 * the HC and TT handle it when the TT has a buffer ready.
945 if (likely (qh
->qh_state
== QH_STATE_IDLE
))
946 qh_link_async (ehci
, qh_get (qh
));
948 spin_unlock_irqrestore (&ehci
->lock
, flags
);
949 if (unlikely (qh
== NULL
))
950 qtd_list_free (ehci
, urb
, qtd_list
);
954 /*-------------------------------------------------------------------------*/
956 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
958 static void end_unlink_async (struct ehci_hcd
*ehci
, struct pt_regs
*regs
)
960 struct ehci_qh
*qh
= ehci
->reclaim
;
961 struct ehci_qh
*next
;
963 timer_action_done (ehci
, TIMER_IAA_WATCHDOG
);
965 // qh->hw_next = cpu_to_le32 (qh->qh_dma);
966 qh
->qh_state
= QH_STATE_IDLE
;
967 qh
->qh_next
.qh
= NULL
;
968 qh_put (qh
); // refcount from reclaim
970 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
972 ehci
->reclaim
= next
;
973 ehci
->reclaim_ready
= 0;
976 qh_completions (ehci
, qh
, regs
);
978 if (!list_empty (&qh
->qtd_list
)
979 && HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
980 qh_link_async (ehci
, qh
);
982 qh_put (qh
); // refcount from async list
984 /* it's not free to turn the async schedule on/off; leave it
985 * active but idle for a while once it empties.
987 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
)
988 && ehci
->async
->qh_next
.qh
== NULL
)
989 timer_action (ehci
, TIMER_ASYNC_OFF
);
993 ehci
->reclaim
= NULL
;
994 start_unlink_async (ehci
, next
);
998 /* makes sure the async qh will become idle */
999 /* caller must own ehci->lock */
1001 static void start_unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
1003 int cmd
= readl (&ehci
->regs
->command
);
1004 struct ehci_qh
*prev
;
1007 assert_spin_locked(&ehci
->lock
);
1009 || (qh
->qh_state
!= QH_STATE_LINKED
1010 && qh
->qh_state
!= QH_STATE_UNLINK_WAIT
)
1015 /* stop async schedule right now? */
1016 if (unlikely (qh
== ehci
->async
)) {
1017 /* can't get here without STS_ASS set */
1018 if (ehci_to_hcd(ehci
)->state
!= HC_STATE_HALT
) {
1019 writel (cmd
& ~CMD_ASE
, &ehci
->regs
->command
);
1021 // handshake later, if we need to
1023 timer_action_done (ehci
, TIMER_ASYNC_OFF
);
1027 qh
->qh_state
= QH_STATE_UNLINK
;
1028 ehci
->reclaim
= qh
= qh_get (qh
);
1031 while (prev
->qh_next
.qh
!= qh
)
1032 prev
= prev
->qh_next
.qh
;
1034 prev
->hw_next
= qh
->hw_next
;
1035 prev
->qh_next
= qh
->qh_next
;
1038 if (unlikely (ehci_to_hcd(ehci
)->state
== HC_STATE_HALT
)) {
1039 /* if (unlikely (qh->reclaim != 0))
1040 * this will recurse, probably not much
1042 end_unlink_async (ehci
, NULL
);
1046 ehci
->reclaim_ready
= 0;
1048 writel (cmd
, &ehci
->regs
->command
);
1049 (void) readl (&ehci
->regs
->command
);
1050 timer_action (ehci
, TIMER_IAA_WATCHDOG
);
1053 /*-------------------------------------------------------------------------*/
1056 scan_async (struct ehci_hcd
*ehci
, struct pt_regs
*regs
)
1059 enum ehci_timer_action action
= TIMER_IO_WATCHDOG
;
1061 if (!++(ehci
->stamp
))
1063 timer_action_done (ehci
, TIMER_ASYNC_SHRINK
);
1065 qh
= ehci
->async
->qh_next
.qh
;
1066 if (likely (qh
!= NULL
)) {
1068 /* clean any finished work for this qh */
1069 if (!list_empty (&qh
->qtd_list
)
1070 && qh
->stamp
!= ehci
->stamp
) {
1073 /* unlinks could happen here; completion
1074 * reporting drops the lock. rescan using
1075 * the latest schedule, but don't rescan
1076 * qhs we already finished (no looping).
1079 qh
->stamp
= ehci
->stamp
;
1080 temp
= qh_completions (ehci
, qh
, regs
);
1087 /* unlink idle entries, reducing HC PCI usage as well
1088 * as HCD schedule-scanning costs. delay for any qh
1089 * we just scanned, there's a not-unusual case that it
1090 * doesn't stay idle for long.
1091 * (plus, avoids some kind of re-activation race.)
1093 if (list_empty (&qh
->qtd_list
)) {
1094 if (qh
->stamp
== ehci
->stamp
)
1095 action
= TIMER_ASYNC_SHRINK
;
1096 else if (!ehci
->reclaim
1097 && qh
->qh_state
== QH_STATE_LINKED
)
1098 start_unlink_async (ehci
, qh
);
1101 qh
= qh
->qh_next
.qh
;
1104 if (action
== TIMER_ASYNC_SHRINK
)
1105 timer_action (ehci
, TIMER_ASYNC_SHRINK
);