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[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / drivers / net / wan / lmc / lmc_main.c
blob15e545f66cd736822392b1ba12141d9e2595a816
1 /*
2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
3 * All rights reserved. www.lanmedia.com
4 *
5 * This code is written by:
6 * Andrew Stanley-Jones (asj@cban.com)
7 * Rob Braun (bbraun@vix.com),
8 * Michael Graff (explorer@vix.com) and
9 * Matt Thomas (matt@3am-software.com).
10 *
11 * With Help By:
12 * David Boggs
13 * Ron Crane
14 * Alan Cox
15 *
16 * This software may be used and distributed according to the terms
17 * of the GNU General Public License version 2, incorporated herein by reference.
18 *
19 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
20 *
21 * To control link specific options lmcctl is required.
22 * It can be obtained from ftp.lanmedia.com.
23 *
24 * Linux driver notes:
25 * Linux uses the device struct lmc_private to pass private information
26 * arround.
27 *
28 * The initialization portion of this driver (the lmc_reset() and the
29 * lmc_dec_reset() functions, as well as the led controls and the
30 * lmc_initcsrs() functions.
31 *
32 * The watchdog function runs every second and checks to see if
33 * we still have link, and that the timing source is what we expected
34 * it to be. If link is lost, the interface is marked down, and
35 * we no longer can transmit.
36 *
37 */
38
39 /* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */
40
41 #include <linux/kernel.h>
42 #include <linux/module.h>
43 #include <linux/string.h>
44 #include <linux/timer.h>
45 #include <linux/ptrace.h>
46 #include <linux/errno.h>
47 #include <linux/ioport.h>
48 #include <linux/slab.h>
49 #include <linux/interrupt.h>
50 #include <linux/pci.h>
51 #include <linux/delay.h>
52 #include <linux/init.h>
53 #include <linux/in.h>
54 #include <linux/if_arp.h>
55 #include <linux/netdevice.h>
56 #include <linux/etherdevice.h>
57 #include <linux/skbuff.h>
58 #include <linux/inet.h>
59 #include <linux/bitops.h>
60
61 #include <net/syncppp.h>
62
63 #include <asm/processor.h> /* Processor type for cache alignment. */
64 #include <asm/io.h>
65 #include <asm/dma.h>
66 #include <asm/uaccess.h>
67 //#include <asm/spinlock.h>
68
69 #define DRIVER_MAJOR_VERSION 1
70 #define DRIVER_MINOR_VERSION 34
71 #define DRIVER_SUB_VERSION 0
72
73 #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
74
75 #include "lmc.h"
76 #include "lmc_var.h"
77 #include "lmc_ioctl.h"
78 #include "lmc_debug.h"
79 #include "lmc_proto.h"
80
81 static int lmc_first_load = 0;
82
83 static int LMC_PKT_BUF_SZ = 1542;
84
85 static struct pci_device_id lmc_pci_tbl[] = {
86 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
87 PCI_VENDOR_ID_LMC, PCI_ANY_ID },
88 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
89 PCI_ANY_ID, PCI_VENDOR_ID_LMC },
90 { 0 }
91 };
92
93 MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
94 MODULE_LICENSE("GPL");
95
96
97 static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
98 static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
99 static int lmc_rx (struct net_device *dev);
100 static int lmc_open(struct net_device *dev);
101 static int lmc_close(struct net_device *dev);
102 static struct net_device_stats *lmc_get_stats(struct net_device *dev);
103 static irqreturn_t lmc_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
104 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
105 static void lmc_softreset(lmc_softc_t * const);
106 static void lmc_running_reset(struct net_device *dev);
107 static int lmc_ifdown(struct net_device * const);
108 static void lmc_watchdog(unsigned long data);
109 static void lmc_reset(lmc_softc_t * const sc);
110 static void lmc_dec_reset(lmc_softc_t * const sc);
111 static void lmc_driver_timeout(struct net_device *dev);
112
113 /*
114 * linux reserves 16 device specific IOCTLs. We call them
115 * LMCIOC* to control various bits of our world.
116 */
117 int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
118 {
119 lmc_softc_t *sc;
120 lmc_ctl_t ctl;
121 int ret;
122 u_int16_t regVal;
123 unsigned long flags;
124
125 struct sppp *sp;
126
127 ret = -EOPNOTSUPP;
128
129 sc = dev->priv;
130
131 lmc_trace(dev, "lmc_ioctl in");
132
133 /*
134 * Most functions mess with the structure
135 * Disable interrupts while we do the polling
136 */
137 spin_lock_irqsave(&sc->lmc_lock, flags);
138
139 switch (cmd) {
140 /*
141 * Return current driver state. Since we keep this up
142 * To date internally, just copy this out to the user.
143 */
144 case LMCIOCGINFO: /*fold01*/
145 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof (lmc_ctl_t)))
146 return -EFAULT;
147 ret = 0;
148 break;
149
150 case LMCIOCSINFO: /*fold01*/
151 sp = &((struct ppp_device *) dev)->sppp;
152 if (!capable(CAP_NET_ADMIN)) {
153 ret = -EPERM;
154 break;
155 }
156
157 if(dev->flags & IFF_UP){
158 ret = -EBUSY;
159 break;
160 }
161
162 if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
163 return -EFAULT;
164
165 sc->lmc_media->set_status (sc, &ctl);
166
167 if(ctl.crc_length != sc->ictl.crc_length) {
168 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
169 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
170 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
171 else
172 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
173 }
174
175 if (ctl.keepalive_onoff == LMC_CTL_OFF)
176 sp->pp_flags &= ~PP_KEEPALIVE; /* Turn off */
177 else
178 sp->pp_flags |= PP_KEEPALIVE; /* Turn on */
179
180 ret = 0;
181 break;
182
183 case LMCIOCIFTYPE: /*fold01*/
184 {
185 u_int16_t old_type = sc->if_type;
186 u_int16_t new_type;
187
188 if (!capable(CAP_NET_ADMIN)) {
189 ret = -EPERM;
190 break;
191 }
192
193 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t)))
194 return -EFAULT;
195
196
197 if (new_type == old_type)
198 {
199 ret = 0 ;
200 break; /* no change */
201 }
202
203 lmc_proto_close(sc);
204 lmc_proto_detach(sc);
205
206 sc->if_type = new_type;
207 // lmc_proto_init(sc);
208 lmc_proto_attach(sc);
209 lmc_proto_open(sc);
210
211 ret = 0 ;
212 break ;
213 }
214
215 case LMCIOCGETXINFO: /*fold01*/
216 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
217
218 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
219 sc->lmc_xinfo.PciSlotNumber = 0;
220 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
221 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
222 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
223 sc->lmc_xinfo.XilinxRevisionNumber =
224 lmc_mii_readreg (sc, 0, 3) & 0xf;
225 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
226 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
227 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
228
229 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
230
231 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
232 sizeof (struct lmc_xinfo)))
233 return -EFAULT;
234 ret = 0;
235
236 break;
237
238 case LMCIOCGETLMCSTATS: /*fold01*/
239 if (sc->lmc_cardtype == LMC_CARDTYPE_T1){
240 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB);
241 sc->stats.framingBitErrorCount +=
242 lmc_mii_readreg (sc, 0, 18) & 0xff;
243 lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB);
244 sc->stats.framingBitErrorCount +=
245 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
246 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB);
247 sc->stats.lineCodeViolationCount +=
248 lmc_mii_readreg (sc, 0, 18) & 0xff;
249 lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB);
250 sc->stats.lineCodeViolationCount +=
251 (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
252 lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR);
253 regVal = lmc_mii_readreg (sc, 0, 18) & 0xff;
254
255 sc->stats.lossOfFrameCount +=
256 (regVal & T1FRAMER_LOF_MASK) >> 4;
257 sc->stats.changeOfFrameAlignmentCount +=
258 (regVal & T1FRAMER_COFA_MASK) >> 2;
259 sc->stats.severelyErroredFrameCount +=
260 regVal & T1FRAMER_SEF_MASK;
261 }
262
263 if (copy_to_user(ifr->ifr_data, &sc->stats,
264 sizeof (struct lmc_statistics)))
265 return -EFAULT;
266
267 ret = 0;
268 break;
269
270 case LMCIOCCLEARLMCSTATS: /*fold01*/
271 if (!capable(CAP_NET_ADMIN)){
272 ret = -EPERM;
273 break;
274 }
275
276 memset (&sc->stats, 0, sizeof (struct lmc_statistics));
277 sc->stats.check = STATCHECK;
278 sc->stats.version_size = (DRIVER_VERSION << 16) +
279 sizeof (struct lmc_statistics);
280 sc->stats.lmc_cardtype = sc->lmc_cardtype;
281 ret = 0;
282 break;
283
284 case LMCIOCSETCIRCUIT: /*fold01*/
285 if (!capable(CAP_NET_ADMIN)){
286 ret = -EPERM;
287 break;
288 }
289
290 if(dev->flags & IFF_UP){
291 ret = -EBUSY;
292 break;
293 }
294
295 if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
296 return -EFAULT;
297 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
298 sc->ictl.circuit_type = ctl.circuit_type;
299 ret = 0;
300
301 break;
302
303 case LMCIOCRESET: /*fold01*/
304 if (!capable(CAP_NET_ADMIN)){
305 ret = -EPERM;
306 break;
307 }
308
309 /* Reset driver and bring back to current state */
310 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
311 lmc_running_reset (dev);
312 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
313
314 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
315
316 ret = 0;
317 break;
318
319 #ifdef DEBUG
320 case LMCIOCDUMPEVENTLOG:
321 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof (u32)))
322 return -EFAULT;
323 if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf)))
324 return -EFAULT;
325
326 ret = 0;
327 break;
328 #endif /* end ifdef _DBG_EVENTLOG */
329 case LMCIOCT1CONTROL: /*fold01*/
330 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
331 ret = -EOPNOTSUPP;
332 break;
333 }
334 break;
335 case LMCIOCXILINX: /*fold01*/
336 {
337 struct lmc_xilinx_control xc; /*fold02*/
338
339 if (!capable(CAP_NET_ADMIN)){
340 ret = -EPERM;
341 break;
342 }
343
344 /*
345 * Stop the xwitter whlie we restart the hardware
346 */
347 netif_stop_queue(dev);
348
349 if (copy_from_user(&xc, ifr->ifr_data, sizeof (struct lmc_xilinx_control)))
350 return -EFAULT;
351 switch(xc.command){
352 case lmc_xilinx_reset: /*fold02*/
353 {
354 u16 mii;
355 mii = lmc_mii_readreg (sc, 0, 16);
356
357 /*
358 * Make all of them 0 and make input
359 */
360 lmc_gpio_mkinput(sc, 0xff);
361
362 /*
363 * make the reset output
364 */
365 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
366
367 /*
368 * RESET low to force configuration. This also forces
369 * the transmitter clock to be internal, but we expect to reset
370 * that later anyway.
371 */
372
373 sc->lmc_gpio &= ~LMC_GEP_RESET;
374 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
375
376
377 /*
378 * hold for more than 10 microseconds
379 */
380 udelay(50);
381
382 sc->lmc_gpio |= LMC_GEP_RESET;
383 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
384
385
386 /*
387 * stop driving Xilinx-related signals
388 */
389 lmc_gpio_mkinput(sc, 0xff);
390
391 /* Reset the frammer hardware */
392 sc->lmc_media->set_link_status (sc, 1);
393 sc->lmc_media->set_status (sc, NULL);
394 // lmc_softreset(sc);
395
396 {
397 int i;
398 for(i = 0; i < 5; i++){
399 lmc_led_on(sc, LMC_DS3_LED0);
400 mdelay(100);
401 lmc_led_off(sc, LMC_DS3_LED0);
402 lmc_led_on(sc, LMC_DS3_LED1);
403 mdelay(100);
404 lmc_led_off(sc, LMC_DS3_LED1);
405 lmc_led_on(sc, LMC_DS3_LED3);
406 mdelay(100);
407 lmc_led_off(sc, LMC_DS3_LED3);
408 lmc_led_on(sc, LMC_DS3_LED2);
409 mdelay(100);
410 lmc_led_off(sc, LMC_DS3_LED2);
411 }
412 }
413
414
415
416 ret = 0x0;
417
418 }
419
420 break;
421 case lmc_xilinx_load_prom: /*fold02*/
422 {
423 u16 mii;
424 int timeout = 500000;
425 mii = lmc_mii_readreg (sc, 0, 16);
426
427 /*
428 * Make all of them 0 and make input
429 */
430 lmc_gpio_mkinput(sc, 0xff);
431
432 /*
433 * make the reset output
434 */
435 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
436
437 /*
438 * RESET low to force configuration. This also forces
439 * the transmitter clock to be internal, but we expect to reset
440 * that later anyway.
441 */
442
443 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
444 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
445
446
447 /*
448 * hold for more than 10 microseconds
449 */
450 udelay(50);
451
452 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
453 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
454
455 /*
456 * busy wait for the chip to reset
457 */
458 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
459 (timeout-- > 0))
460 ;
461
462
463 /*
464 * stop driving Xilinx-related signals
465 */
466 lmc_gpio_mkinput(sc, 0xff);
467
468 ret = 0x0;
469
470
471 break;
472
473 }
474
475 case lmc_xilinx_load: /*fold02*/
476 {
477 char *data;
478 int pos;
479 int timeout = 500000;
480
481 if(xc.data == 0x0){
482 ret = -EINVAL;
483 break;
484 }
485
486 data = kmalloc(xc.len, GFP_KERNEL);
487 if(data == 0x0){
488 printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
489 ret = -ENOMEM;
490 break;
491 }
492
493 if(copy_from_user(data, xc.data, xc.len))
494 {
495 kfree(data);
496 ret = -ENOMEM;
497 break;
498 }
499
500 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
501
502 lmc_gpio_mkinput(sc, 0xff);
503
504 /*
505 * Clear the Xilinx and start prgramming from the DEC
506 */
507
508 /*
509 * Set ouput as:
510 * Reset: 0 (active)
511 * DP: 0 (active)
512 * Mode: 1
513 *
514 */
515 sc->lmc_gpio = 0x00;
516 sc->lmc_gpio &= ~LMC_GEP_DP;
517 sc->lmc_gpio &= ~LMC_GEP_RESET;
518 sc->lmc_gpio |= LMC_GEP_MODE;
519 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
520
521 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
522
523 /*
524 * Wait at least 10 us 20 to be safe
525 */
526 udelay(50);
527
528 /*
529 * Clear reset and activate programming lines
530 * Reset: Input
531 * DP: Input
532 * Clock: Output
533 * Data: Output
534 * Mode: Output
535 */
536 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
537
538 /*
539 * Set LOAD, DATA, Clock to 1
540 */
541 sc->lmc_gpio = 0x00;
542 sc->lmc_gpio |= LMC_GEP_MODE;
543 sc->lmc_gpio |= LMC_GEP_DATA;
544 sc->lmc_gpio |= LMC_GEP_CLK;
545 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
546
547 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
548
549 /*
550 * busy wait for the chip to reset
551 */
552 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
553 (timeout-- > 0))
554 ;
555
556 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
557
558 for(pos = 0; pos < xc.len; pos++){
559 switch(data[pos]){
560 case 0:
561 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
562 break;
563 case 1:
564 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
565 break;
566 default:
567 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
568 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
569 }
570 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
571 sc->lmc_gpio |= LMC_GEP_MODE;
572 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
573 udelay(1);
574
575 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
576 sc->lmc_gpio |= LMC_GEP_MODE;
577 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
578 udelay(1);
579 }
580 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
581 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
582 }
583 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
584 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
585 }
586 else {
587 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
588 }
589
590 lmc_gpio_mkinput(sc, 0xff);
591
592 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
593 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
594
595 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
596 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
597
598 kfree(data);
599
600 ret = 0;
601
602 break;
603 }
604 default: /*fold02*/
605 ret = -EBADE;
606 break;
607 }
608
609 netif_wake_queue(dev);
610 sc->lmc_txfull = 0;
611
612 }
613 break;
614 default: /*fold01*/
615 /* If we don't know what to do, give the protocol a shot. */
616 ret = lmc_proto_ioctl (sc, ifr, cmd);
617 break;
618 }
619
620 spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/
621
622 lmc_trace(dev, "lmc_ioctl out");
623
624 return ret;
625 }
626
627
628 /* the watchdog process that cruises around */
629 static void lmc_watchdog (unsigned long data) /*fold00*/
630 {
631 struct net_device *dev = (struct net_device *) data;
632 lmc_softc_t *sc;
633 int link_status;
634 u_int32_t ticks;
635 unsigned long flags;
636
637 sc = dev->priv;
638
639 lmc_trace(dev, "lmc_watchdog in");
640
641 spin_lock_irqsave(&sc->lmc_lock, flags);
642
643 if(sc->check != 0xBEAFCAFE){
644 printk("LMC: Corrupt net_device stuct, breaking out\n");
645 spin_unlock_irqrestore(&sc->lmc_lock, flags);
646 return;
647 }
648
649
650 /* Make sure the tx jabber and rx watchdog are off,
651 * and the transmit and receive processes are running.
652 */
653
654 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
655 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
656 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
657
658 if (sc->lmc_ok == 0)
659 goto kick_timer;
660
661 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
662
663 /* --- begin time out check -----------------------------------
664 * check for a transmit interrupt timeout
665 * Has the packet xmt vs xmt serviced threshold been exceeded */
666 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
667 sc->stats.tx_packets > sc->lasttx_packets &&
668 sc->tx_TimeoutInd == 0)
669 {
670
671 /* wait for the watchdog to come around again */
672 sc->tx_TimeoutInd = 1;
673 }
674 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
675 sc->stats.tx_packets > sc->lasttx_packets &&
676 sc->tx_TimeoutInd)
677 {
678
679 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
680
681 sc->tx_TimeoutDisplay = 1;
682 sc->stats.tx_TimeoutCnt++;
683
684 /* DEC chip is stuck, hit it with a RESET!!!! */
685 lmc_running_reset (dev);
686
687
688 /* look at receive & transmit process state to make sure they are running */
689 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
690
691 /* look at: DSR - 02 for Reg 16
692 * CTS - 08
693 * DCD - 10
694 * RI - 20
695 * for Reg 17
696 */
697 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
698
699 /* reset the transmit timeout detection flag */
700 sc->tx_TimeoutInd = 0;
701 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
702 sc->lasttx_packets = sc->stats.tx_packets;
703 }
704 else
705 {
706 sc->tx_TimeoutInd = 0;
707 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
708 sc->lasttx_packets = sc->stats.tx_packets;
709 }
710
711 /* --- end time out check ----------------------------------- */
712
713
714 link_status = sc->lmc_media->get_link_status (sc);
715
716 /*
717 * hardware level link lost, but the interface is marked as up.
718 * Mark it as down.
719 */
720 if ((link_status == 0) && (sc->last_link_status != 0)) {
721 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
722 sc->last_link_status = 0;
723 /* lmc_reset (sc); Why reset??? The link can go down ok */
724
725 /* Inform the world that link has been lost */
726 dev->flags &= ~IFF_RUNNING;
727 }
728
729 /*
730 * hardware link is up, but the interface is marked as down.
731 * Bring it back up again.
732 */
733 if (link_status != 0 && sc->last_link_status == 0) {
734 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
735 sc->last_link_status = 1;
736 /* lmc_reset (sc); Again why reset??? */
737
738 /* Inform the world that link protocol is back up. */
739 dev->flags |= IFF_RUNNING;
740
741 /* Now we have to tell the syncppp that we had an outage
742 * and that it should deal. Calling sppp_reopen here
743 * should do the trick, but we may have to call sppp_close
744 * when the link goes down, and call sppp_open here.
745 * Subject to more testing.
746 * --bbraun
747 */
748
749 lmc_proto_reopen(sc);
750
751 }
752
753 /* Call media specific watchdog functions */
754 sc->lmc_media->watchdog(sc);
755
756 /*
757 * Poke the transmitter to make sure it
758 * never stops, even if we run out of mem
759 */
760 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
761
762 /*
763 * Check for code that failed
764 * and try and fix it as appropriate
765 */
766 if(sc->failed_ring == 1){
767 /*
768 * Failed to setup the recv/xmit rin
769 * Try again
770 */
771 sc->failed_ring = 0;
772 lmc_softreset(sc);
773 }
774 if(sc->failed_recv_alloc == 1){
775 /*
776 * We failed to alloc mem in the
777 * interrupt handler, go through the rings
778 * and rebuild them
779 */
780 sc->failed_recv_alloc = 0;
781 lmc_softreset(sc);
782 }
783
784
785 /*
786 * remember the timer value
787 */
788 kick_timer:
789
790 ticks = LMC_CSR_READ (sc, csr_gp_timer);
791 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
792 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
793
794 /*
795 * restart this timer.
796 */
797 sc->timer.expires = jiffies + (HZ);
798 add_timer (&sc->timer);
799
800 spin_unlock_irqrestore(&sc->lmc_lock, flags);
801
802 lmc_trace(dev, "lmc_watchdog out");
803
804 }
805
806 static void lmc_setup(struct net_device * const dev) /*fold00*/
807 {
808 lmc_trace(dev, "lmc_setup in");
809
810 dev->type = ARPHRD_HDLC;
811 dev->hard_start_xmit = lmc_start_xmit;
812 dev->open = lmc_open;
813 dev->stop = lmc_close;
814 dev->get_stats = lmc_get_stats;
815 dev->do_ioctl = lmc_ioctl;
816 dev->tx_timeout = lmc_driver_timeout;
817 dev->watchdog_timeo = (HZ); /* 1 second */
818
819 lmc_trace(dev, "lmc_setup out");
820 }
821
822
823 static int __devinit lmc_init_one(struct pci_dev *pdev,
824 const struct pci_device_id *ent)
825 {
826 struct net_device *dev;
827 lmc_softc_t *sc;
828 u16 subdevice;
829 u_int16_t AdapModelNum;
830 int err = -ENOMEM;
831 static int cards_found;
832 #ifndef GCOM
833 /* We name by type not by vendor */
834 static const char lmcname[] = "hdlc%d";
835 #else
836 /*
837 * GCOM uses LMC vendor name so that clients can know which card
838 * to attach to.
839 */
840 static const char lmcname[] = "lmc%d";
841 #endif
842
843
844 /*
845 * Allocate our own device structure
846 */
847 dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup);
848 if (!dev) {
849 printk (KERN_ERR "lmc:alloc_netdev for device failed\n");
850 goto out1;
851 }
852
853 lmc_trace(dev, "lmc_init_one in");
854
855 err = pci_enable_device(pdev);
856 if (err) {
857 printk(KERN_ERR "lmc: pci enable failed:%d\n", err);
858 goto out2;
859 }
860
861 if (pci_request_regions(pdev, "lmc")) {
862 printk(KERN_ERR "lmc: pci_request_region failed\n");
863 err = -EIO;
864 goto out3;
865 }
866
867 pci_set_drvdata(pdev, dev);
868
869 if(lmc_first_load == 0){
870 printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n",
871 DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION);
872 lmc_first_load = 1;
873 }
874
875 sc = dev->priv;
876 sc->lmc_device = dev;
877 sc->name = dev->name;
878
879 /* Initialize the sppp layer */
880 /* An ioctl can cause a subsequent detach for raw frame interface */
881 sc->if_type = LMC_PPP;
882 sc->check = 0xBEAFCAFE;
883 dev->base_addr = pci_resource_start(pdev, 0);
884 dev->irq = pdev->irq;
885
886 SET_MODULE_OWNER(dev);
887 SET_NETDEV_DEV(dev, &pdev->dev);
888
889 /*
890 * This will get the protocol layer ready and do any 1 time init's
891 * Must have a valid sc and dev structure
892 */
893 lmc_proto_init(sc);
894
895 lmc_proto_attach(sc);
896
897 /*
898 * Why were we changing this???
899 dev->tx_queue_len = 100;
900 */
901
902 /* Init the spin lock so can call it latter */
903
904 spin_lock_init(&sc->lmc_lock);
905 pci_set_master(pdev);
906
907 printk ("%s: detected at %lx, irq %d\n", dev->name,
908 dev->base_addr, dev->irq);
909
910 if (register_netdev (dev) != 0) {
911 printk (KERN_ERR "%s: register_netdev failed.\n", dev->name);
912 goto out4;
913 }
914
915 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
916 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
917
918 /*
919 *
920 * Check either the subvendor or the subdevice, some systems reverse
921 * the setting in the bois, seems to be version and arch dependent?
922 * Fix the error, exchange the two values
923 */
924 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
925 subdevice = pdev->subsystem_vendor;
926
927 switch (subdevice) {
928 case PCI_DEVICE_ID_LMC_HSSI:
929 printk ("%s: LMC HSSI\n", dev->name);
930 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
931 sc->lmc_media = &lmc_hssi_media;
932 break;
933 case PCI_DEVICE_ID_LMC_DS3:
934 printk ("%s: LMC DS3\n", dev->name);
935 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
936 sc->lmc_media = &lmc_ds3_media;
937 break;
938 case PCI_DEVICE_ID_LMC_SSI:
939 printk ("%s: LMC SSI\n", dev->name);
940 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
941 sc->lmc_media = &lmc_ssi_media;
942 break;
943 case PCI_DEVICE_ID_LMC_T1:
944 printk ("%s: LMC T1\n", dev->name);
945 sc->lmc_cardtype = LMC_CARDTYPE_T1;
946 sc->lmc_media = &lmc_t1_media;
947 break;
948 default:
949 printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
950 break;
951 }
952
953 lmc_initcsrs (sc, dev->base_addr, 8);
954
955 lmc_gpio_mkinput (sc, 0xff);
956 sc->lmc_gpio = 0; /* drive no signals yet */
957
958 sc->lmc_media->defaults (sc);
959
960 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
961
962 /* verify that the PCI Sub System ID matches the Adapter Model number
963 * from the MII register
964 */
965 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
966
967 if ((AdapModelNum == LMC_ADAP_T1
968 && subdevice == PCI_DEVICE_ID_LMC_T1) || /* detect LMC1200 */
969 (AdapModelNum == LMC_ADAP_SSI
970 && subdevice == PCI_DEVICE_ID_LMC_SSI) || /* detect LMC1000 */
971 (AdapModelNum == LMC_ADAP_DS3
972 && subdevice == PCI_DEVICE_ID_LMC_DS3) || /* detect LMC5245 */
973 (AdapModelNum == LMC_ADAP_HSSI
974 && subdevice == PCI_DEVICE_ID_LMC_HSSI))
975 { /* detect LMC5200 */
976
977 }
978 else {
979 printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n",
980 dev->name, AdapModelNum, subdevice);
981 // return (NULL);
982 }
983 /*
984 * reset clock
985 */
986 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
987
988 sc->board_idx = cards_found++;
989 sc->stats.check = STATCHECK;
990 sc->stats.version_size = (DRIVER_VERSION << 16) +
991 sizeof (struct lmc_statistics);
992 sc->stats.lmc_cardtype = sc->lmc_cardtype;
993
994 sc->lmc_ok = 0;
995 sc->last_link_status = 0;
996
997 lmc_trace(dev, "lmc_init_one out");
998 return 0;
999
1000 out4:
1001 lmc_proto_detach(sc);
1002 out3:
1003 if (pdev) {
1004 pci_release_regions(pdev);
1005 pci_set_drvdata(pdev, NULL);
1006 }
1007 out2:
1008 free_netdev(dev);
1009 out1:
1010 return err;
1011 }
1012
1013 /*
1014 * Called from pci when removing module.
1015 */
1016 static void __devexit lmc_remove_one (struct pci_dev *pdev)
1017 {
1018 struct net_device *dev = pci_get_drvdata(pdev);
1019
1020 if (dev) {
1021 lmc_softc_t *sc = dev->priv;
1022
1023 printk("%s: removing...\n", dev->name);
1024 lmc_proto_detach(sc);
1025 unregister_netdev(dev);
1026 free_netdev(dev);
1027 pci_release_regions(pdev);
1028 pci_disable_device(pdev);
1029 pci_set_drvdata(pdev, NULL);
1030 }
1031 }
1032
1033 /* After this is called, packets can be sent.
1034 * Does not initialize the addresses
1035 */
1036 static int lmc_open (struct net_device *dev) /*fold00*/
1037 {
1038 lmc_softc_t *sc = dev->priv;
1039
1040 lmc_trace(dev, "lmc_open in");
1041
1042 lmc_led_on(sc, LMC_DS3_LED0);
1043
1044 lmc_dec_reset (sc);
1045 lmc_reset (sc);
1046
1047 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1048 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1049 lmc_mii_readreg (sc, 0, 16),
1050 lmc_mii_readreg (sc, 0, 17));
1051
1052
1053 if (sc->lmc_ok){
1054 lmc_trace(dev, "lmc_open lmc_ok out");
1055 return (0);
1056 }
1057
1058 lmc_softreset (sc);
1059
1060 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1061 if (request_irq (dev->irq, &lmc_interrupt, SA_SHIRQ, dev->name, dev)){
1062 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1063 lmc_trace(dev, "lmc_open irq failed out");
1064 return -EAGAIN;
1065 }
1066 sc->got_irq = 1;
1067
1068 /* Assert Terminal Active */
1069 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1070 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1071
1072 /*
1073 * reset to last state.
1074 */
1075 sc->lmc_media->set_status (sc, NULL);
1076
1077 /* setup default bits to be used in tulip_desc_t transmit descriptor
1078 * -baz */
1079 sc->TxDescriptControlInit = (
1080 LMC_TDES_INTERRUPT_ON_COMPLETION
1081 | LMC_TDES_FIRST_SEGMENT
1082 | LMC_TDES_LAST_SEGMENT
1083 | LMC_TDES_SECOND_ADDR_CHAINED
1084 | LMC_TDES_DISABLE_PADDING
1085 );
1086
1087 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1088 /* disable 32 bit CRC generated by ASIC */
1089 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1090 }
1091 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1092 /* Acknoledge the Terminal Active and light LEDs */
1093
1094 /* dev->flags |= IFF_UP; */
1095
1096 lmc_proto_open(sc);
1097
1098 dev->do_ioctl = lmc_ioctl;
1099
1100
1101 netif_start_queue(dev);
1102
1103 sc->stats.tx_tbusy0++ ;
1104
1105 /*
1106 * select what interrupts we want to get
1107 */
1108 sc->lmc_intrmask = 0;
1109 /* Should be using the default interrupt mask defined in the .h file. */
1110 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1111 | TULIP_STS_RXINTR
1112 | TULIP_STS_TXINTR
1113 | TULIP_STS_ABNRMLINTR
1114 | TULIP_STS_SYSERROR
1115 | TULIP_STS_TXSTOPPED
1116 | TULIP_STS_TXUNDERFLOW
1117 | TULIP_STS_RXSTOPPED
1118 | TULIP_STS_RXNOBUF
1119 );
1120 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1121
1122 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1123 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1124 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1125
1126 sc->lmc_ok = 1; /* Run watchdog */
1127
1128 /*
1129 * Set the if up now - pfb
1130 */
1131
1132 sc->last_link_status = 1;
1133
1134 /*
1135 * Setup a timer for the watchdog on probe, and start it running.
1136 * Since lmc_ok == 0, it will be a NOP for now.
1137 */
1138 init_timer (&sc->timer);
1139 sc->timer.expires = jiffies + HZ;
1140 sc->timer.data = (unsigned long) dev;
1141 sc->timer.function = &lmc_watchdog;
1142 add_timer (&sc->timer);
1143
1144 lmc_trace(dev, "lmc_open out");
1145
1146 return (0);
1147 }
1148
1149 /* Total reset to compensate for the AdTran DSU doing bad things
1150 * under heavy load
1151 */
1152
1153 static void lmc_running_reset (struct net_device *dev) /*fold00*/
1154 {
1155
1156 lmc_softc_t *sc = (lmc_softc_t *) dev->priv;
1157
1158 lmc_trace(dev, "lmc_runnig_reset in");
1159
1160 /* stop interrupts */
1161 /* Clear the interrupt mask */
1162 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1163
1164 lmc_dec_reset (sc);
1165 lmc_reset (sc);
1166 lmc_softreset (sc);
1167 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1168 sc->lmc_media->set_link_status (sc, 1);
1169 sc->lmc_media->set_status (sc, NULL);
1170
1171 //dev->flags |= IFF_RUNNING;
1172
1173 netif_wake_queue(dev);
1174
1175 sc->lmc_txfull = 0;
1176 sc->stats.tx_tbusy0++ ;
1177
1178 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1179 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1180
1181 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1182 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1183
1184 lmc_trace(dev, "lmc_runnin_reset_out");
1185 }
1186
1187
1188 /* This is what is called when you ifconfig down a device.
1189 * This disables the timer for the watchdog and keepalives,
1190 * and disables the irq for dev.
1191 */
1192 static int lmc_close (struct net_device *dev) /*fold00*/
1193 {
1194 /* not calling release_region() as we should */
1195 lmc_softc_t *sc;
1196
1197 lmc_trace(dev, "lmc_close in");
1198
1199 sc = dev->priv;
1200 sc->lmc_ok = 0;
1201 sc->lmc_media->set_link_status (sc, 0);
1202 del_timer (&sc->timer);
1203 lmc_proto_close(sc);
1204 lmc_ifdown (dev);
1205
1206 lmc_trace(dev, "lmc_close out");
1207
1208 return 0;
1209 }
1210
1211 /* Ends the transfer of packets */
1212 /* When the interface goes down, this is called */
1213 static int lmc_ifdown (struct net_device *dev) /*fold00*/
1214 {
1215 lmc_softc_t *sc = dev->priv;
1216 u32 csr6;
1217 int i;
1218
1219 lmc_trace(dev, "lmc_ifdown in");
1220
1221 /* Don't let anything else go on right now */
1222 // dev->start = 0;
1223 netif_stop_queue(dev);
1224 sc->stats.tx_tbusy1++ ;
1225
1226 /* stop interrupts */
1227 /* Clear the interrupt mask */
1228 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1229
1230 /* Stop Tx and Rx on the chip */
1231 csr6 = LMC_CSR_READ (sc, csr_command);
1232 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
1233 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
1234 LMC_CSR_WRITE (sc, csr_command, csr6);
1235
1236 dev->flags &= ~IFF_RUNNING;
1237
1238 sc->stats.rx_missed_errors +=
1239 LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
1240
1241 /* release the interrupt */
1242 if(sc->got_irq == 1){
1243 free_irq (dev->irq, dev);
1244 sc->got_irq = 0;
1245 }
1246
1247 /* free skbuffs in the Rx queue */
1248 for (i = 0; i < LMC_RXDESCS; i++)
1249 {
1250 struct sk_buff *skb = sc->lmc_rxq[i];
1251 sc->lmc_rxq[i] = NULL;
1252 sc->lmc_rxring[i].status = 0;
1253 sc->lmc_rxring[i].length = 0;
1254 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1255 if (skb != NULL)
1256 dev_kfree_skb(skb);
1257 sc->lmc_rxq[i] = NULL;
1258 }
1259
1260 for (i = 0; i < LMC_TXDESCS; i++)
1261 {
1262 if (sc->lmc_txq[i] != NULL)
1263 dev_kfree_skb(sc->lmc_txq[i]);
1264 sc->lmc_txq[i] = NULL;
1265 }
1266
1267 lmc_led_off (sc, LMC_MII16_LED_ALL);
1268
1269 netif_wake_queue(dev);
1270 sc->stats.tx_tbusy0++ ;
1271
1272 lmc_trace(dev, "lmc_ifdown out");
1273
1274 return 0;
1275 }
1276
1277 /* Interrupt handling routine. This will take an incoming packet, or clean
1278 * up after a trasmit.
1279 */
1280 static irqreturn_t lmc_interrupt (int irq, void *dev_instance, struct pt_regs *regs) /*fold00*/
1281 {
1282 struct net_device *dev = (struct net_device *) dev_instance;
1283 lmc_softc_t *sc;
1284 u32 csr;
1285 int i;
1286 s32 stat;
1287 unsigned int badtx;
1288 u32 firstcsr;
1289 int max_work = LMC_RXDESCS;
1290 int handled = 0;
1291
1292 lmc_trace(dev, "lmc_interrupt in");
1293
1294 sc = dev->priv;
1295
1296 spin_lock(&sc->lmc_lock);
1297
1298 /*
1299 * Read the csr to find what interrupts we have (if any)
1300 */
1301 csr = LMC_CSR_READ (sc, csr_status);
1302
1303 /*
1304 * Make sure this is our interrupt
1305 */
1306 if ( ! (csr & sc->lmc_intrmask)) {
1307 goto lmc_int_fail_out;
1308 }
1309
1310 firstcsr = csr;
1311
1312 /* always go through this loop at least once */
1313 while (csr & sc->lmc_intrmask) {
1314 handled = 1;
1315
1316 /*
1317 * Clear interrupt bits, we handle all case below
1318 */
1319 LMC_CSR_WRITE (sc, csr_status, csr);
1320
1321 /*
1322 * One of
1323 * - Transmit process timed out CSR5<1>
1324 * - Transmit jabber timeout CSR5<3>
1325 * - Transmit underflow CSR5<5>
1326 * - Transmit Receiver buffer unavailable CSR5<7>
1327 * - Receive process stopped CSR5<8>
1328 * - Receive watchdog timeout CSR5<9>
1329 * - Early transmit interrupt CSR5<10>
1330 *
1331 * Is this really right? Should we do a running reset for jabber?
1332 * (being a WAN card and all)
1333 */
1334 if (csr & TULIP_STS_ABNRMLINTR){
1335 lmc_running_reset (dev);
1336 break;
1337 }
1338
1339 if (csr & TULIP_STS_RXINTR){
1340 lmc_trace(dev, "rx interrupt");
1341 lmc_rx (dev);
1342
1343 }
1344 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1345
1346 int n_compl = 0 ;
1347 /* reset the transmit timeout detection flag -baz */
1348 sc->stats.tx_NoCompleteCnt = 0;
1349
1350 badtx = sc->lmc_taint_tx;
1351 i = badtx % LMC_TXDESCS;
1352
1353 while ((badtx < sc->lmc_next_tx)) {
1354 stat = sc->lmc_txring[i].status;
1355
1356 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1357 sc->lmc_txring[i].length);
1358 /*
1359 * If bit 31 is 1 the tulip owns it break out of the loop
1360 */
1361 if (stat & 0x80000000)
1362 break;
1363
1364 n_compl++ ; /* i.e., have an empty slot in ring */
1365 /*
1366 * If we have no skbuff or have cleared it
1367 * Already continue to the next buffer
1368 */
1369 if (sc->lmc_txq[i] == NULL)
1370 continue;
1371
1372 /*
1373 * Check the total error summary to look for any errors
1374 */
1375 if (stat & 0x8000) {
1376 sc->stats.tx_errors++;
1377 if (stat & 0x4104)
1378 sc->stats.tx_aborted_errors++;
1379 if (stat & 0x0C00)
1380 sc->stats.tx_carrier_errors++;
1381 if (stat & 0x0200)
1382 sc->stats.tx_window_errors++;
1383 if (stat & 0x0002)
1384 sc->stats.tx_fifo_errors++;
1385 }
1386 else {
1387
1388 sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1389
1390 sc->stats.tx_packets++;
1391 }
1392
1393 // dev_kfree_skb(sc->lmc_txq[i]);
1394 dev_kfree_skb_irq(sc->lmc_txq[i]);
1395 sc->lmc_txq[i] = NULL;
1396
1397 badtx++;
1398 i = badtx % LMC_TXDESCS;
1399 }
1400
1401 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1402 {
1403 printk ("%s: out of sync pointer\n", dev->name);
1404 badtx += LMC_TXDESCS;
1405 }
1406 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1407 sc->lmc_txfull = 0;
1408 netif_wake_queue(dev);
1409 sc->stats.tx_tbusy0++ ;
1410
1411
1412 #ifdef DEBUG
1413 sc->stats.dirtyTx = badtx;
1414 sc->stats.lmc_next_tx = sc->lmc_next_tx;
1415 sc->stats.lmc_txfull = sc->lmc_txfull;
1416 #endif
1417 sc->lmc_taint_tx = badtx;
1418
1419 /*
1420 * Why was there a break here???
1421 */
1422 } /* end handle transmit interrupt */
1423
1424 if (csr & TULIP_STS_SYSERROR) {
1425 u32 error;
1426 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1427 error = csr>>23 & 0x7;
1428 switch(error){
1429 case 0x000:
1430 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1431 break;
1432 case 0x001:
1433 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1434 break;
1435 case 0x010:
1436 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1437 break;
1438 default:
1439 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1440 }
1441 lmc_dec_reset (sc);
1442 lmc_reset (sc);
1443 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1444 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1445 lmc_mii_readreg (sc, 0, 16),
1446 lmc_mii_readreg (sc, 0, 17));
1447
1448 }
1449
1450
1451 if(max_work-- <= 0)
1452 break;
1453
1454 /*
1455 * Get current csr status to make sure
1456 * we've cleared all interrupts
1457 */
1458 csr = LMC_CSR_READ (sc, csr_status);
1459 } /* end interrupt loop */
1460 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1461
1462 lmc_int_fail_out:
1463
1464 spin_unlock(&sc->lmc_lock);
1465
1466 lmc_trace(dev, "lmc_interrupt out");
1467 return IRQ_RETVAL(handled);
1468 }
1469
1470 static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/
1471 {
1472 lmc_softc_t *sc;
1473 u32 flag;
1474 int entry;
1475 int ret = 0;
1476 unsigned long flags;
1477
1478 lmc_trace(dev, "lmc_start_xmit in");
1479
1480 sc = dev->priv;
1481
1482 spin_lock_irqsave(&sc->lmc_lock, flags);
1483
1484 /* normal path, tbusy known to be zero */
1485
1486 entry = sc->lmc_next_tx % LMC_TXDESCS;
1487
1488 sc->lmc_txq[entry] = skb;
1489 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1490
1491 LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1492
1493 #ifndef GCOM
1494 /* If the queue is less than half full, don't interrupt */
1495 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1496 {
1497 /* Do not interrupt on completion of this packet */
1498 flag = 0x60000000;
1499 netif_wake_queue(dev);
1500 }
1501 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1502 {
1503 /* This generates an interrupt on completion of this packet */
1504 flag = 0xe0000000;
1505 netif_wake_queue(dev);
1506 }
1507 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1508 {
1509 /* Do not interrupt on completion of this packet */
1510 flag = 0x60000000;
1511 netif_wake_queue(dev);
1512 }
1513 else
1514 {
1515 /* This generates an interrupt on completion of this packet */
1516 flag = 0xe0000000;
1517 sc->lmc_txfull = 1;
1518 netif_stop_queue(dev);
1519 }
1520 #else
1521 flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1522
1523 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1524 { /* ring full, go busy */
1525 sc->lmc_txfull = 1;
1526 netif_stop_queue(dev);
1527 sc->stats.tx_tbusy1++ ;
1528 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1529 }
1530 #endif
1531
1532
1533 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
1534 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
1535
1536 /* don't pad small packets either */
1537 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1538 sc->TxDescriptControlInit;
1539
1540 /* set the transmit timeout flag to be checked in
1541 * the watchdog timer handler. -baz
1542 */
1543
1544 sc->stats.tx_NoCompleteCnt++;
1545 sc->lmc_next_tx++;
1546
1547 /* give ownership to the chip */
1548 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1549 sc->lmc_txring[entry].status = 0x80000000;
1550
1551 /* send now! */
1552 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1553
1554 dev->trans_start = jiffies;
1555
1556 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1557
1558 lmc_trace(dev, "lmc_start_xmit_out");
1559 return ret;
1560 }
1561
1562
1563 static int lmc_rx (struct net_device *dev) /*fold00*/
1564 {
1565 lmc_softc_t *sc;
1566 int i;
1567 int rx_work_limit = LMC_RXDESCS;
1568 unsigned int next_rx;
1569 int rxIntLoopCnt; /* debug -baz */
1570 int localLengthErrCnt = 0;
1571 long stat;
1572 struct sk_buff *skb, *nsb;
1573 u16 len;
1574
1575 lmc_trace(dev, "lmc_rx in");
1576
1577 sc = dev->priv;
1578
1579 lmc_led_on(sc, LMC_DS3_LED3);
1580
1581 rxIntLoopCnt = 0; /* debug -baz */
1582
1583 i = sc->lmc_next_rx % LMC_RXDESCS;
1584 next_rx = sc->lmc_next_rx;
1585
1586 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1587 {
1588 rxIntLoopCnt++; /* debug -baz */
1589 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1590 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
1591 if ((stat & 0x0000ffff) != 0x7fff) {
1592 /* Oversized frame */
1593 sc->stats.rx_length_errors++;
1594 goto skip_packet;
1595 }
1596 }
1597
1598 if(stat & 0x00000008){ /* Catch a dribbling bit error */
1599 sc->stats.rx_errors++;
1600 sc->stats.rx_frame_errors++;
1601 goto skip_packet;
1602 }
1603
1604
1605 if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */
1606 sc->stats.rx_errors++;
1607 sc->stats.rx_crc_errors++;
1608 goto skip_packet;
1609 }
1610
1611
1612 if (len > LMC_PKT_BUF_SZ){
1613 sc->stats.rx_length_errors++;
1614 localLengthErrCnt++;
1615 goto skip_packet;
1616 }
1617
1618 if (len < sc->lmc_crcSize + 2) {
1619 sc->stats.rx_length_errors++;
1620 sc->stats.rx_SmallPktCnt++;
1621 localLengthErrCnt++;
1622 goto skip_packet;
1623 }
1624
1625 if(stat & 0x00004000){
1626 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1627 }
1628
1629 len -= sc->lmc_crcSize;
1630
1631 skb = sc->lmc_rxq[i];
1632
1633 /*
1634 * We ran out of memory at some point
1635 * just allocate an skb buff and continue.
1636 */
1637
1638 if(skb == 0x0){
1639 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1640 if (nsb) {
1641 sc->lmc_rxq[i] = nsb;
1642 nsb->dev = dev;
1643 sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
1644 }
1645 sc->failed_recv_alloc = 1;
1646 goto skip_packet;
1647 }
1648
1649 dev->last_rx = jiffies;
1650 sc->stats.rx_packets++;
1651 sc->stats.rx_bytes += len;
1652
1653 LMC_CONSOLE_LOG("recv", skb->data, len);
1654
1655 /*
1656 * I'm not sure of the sanity of this
1657 * Packets could be arriving at a constant
1658 * 44.210mbits/sec and we're going to copy
1659 * them into a new buffer??
1660 */
1661
1662 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1663 /*
1664 * If it's a large packet don't copy it just hand it up
1665 */
1666 give_it_anyways:
1667
1668 sc->lmc_rxq[i] = NULL;
1669 sc->lmc_rxring[i].buffer1 = 0x0;
1670
1671 skb_put (skb, len);
1672 skb->protocol = lmc_proto_type(sc, skb);
1673 skb->protocol = htons(ETH_P_WAN_PPP);
1674 skb->mac.raw = skb->data;
1675 // skb->nh.raw = skb->data;
1676 skb->dev = dev;
1677 lmc_proto_netif(sc, skb);
1678
1679 /*
1680 * This skb will be destroyed by the upper layers, make a new one
1681 */
1682 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1683 if (nsb) {
1684 sc->lmc_rxq[i] = nsb;
1685 nsb->dev = dev;
1686 sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
1687 /* Transferred to 21140 below */
1688 }
1689 else {
1690 /*
1691 * We've run out of memory, stop trying to allocate
1692 * memory and exit the interrupt handler
1693 *
1694 * The chip may run out of receivers and stop
1695 * in which care we'll try to allocate the buffer
1696 * again. (once a second)
1697 */
1698 sc->stats.rx_BuffAllocErr++;
1699 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1700 sc->failed_recv_alloc = 1;
1701 goto skip_out_of_mem;
1702 }
1703 }
1704 else {
1705 nsb = dev_alloc_skb(len);
1706 if(!nsb) {
1707 goto give_it_anyways;
1708 }
1709 memcpy(skb_put(nsb, len), skb->data, len);
1710
1711 nsb->protocol = lmc_proto_type(sc, skb);
1712 nsb->mac.raw = nsb->data;
1713 // nsb->nh.raw = nsb->data;
1714 nsb->dev = dev;
1715 lmc_proto_netif(sc, nsb);
1716 }
1717
1718 skip_packet:
1719 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1720 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1721
1722 sc->lmc_next_rx++;
1723 i = sc->lmc_next_rx % LMC_RXDESCS;
1724 rx_work_limit--;
1725 if (rx_work_limit < 0)
1726 break;
1727 }
1728
1729 /* detect condition for LMC1000 where DSU cable attaches and fills
1730 * descriptors with bogus packets
1731 *
1732 if (localLengthErrCnt > LMC_RXDESCS - 3) {
1733 sc->stats.rx_BadPktSurgeCnt++;
1734 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE,
1735 localLengthErrCnt,
1736 sc->stats.rx_BadPktSurgeCnt);
1737 } */
1738
1739 /* save max count of receive descriptors serviced */
1740 if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) {
1741 sc->stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1742 }
1743
1744 #ifdef DEBUG
1745 if (rxIntLoopCnt == 0)
1746 {
1747 for (i = 0; i < LMC_RXDESCS; i++)
1748 {
1749 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1750 != DESC_OWNED_BY_DC21X4)
1751 {
1752 rxIntLoopCnt++;
1753 }
1754 }
1755 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1756 }
1757 #endif
1758
1759
1760 lmc_led_off(sc, LMC_DS3_LED3);
1761
1762 skip_out_of_mem:
1763
1764 lmc_trace(dev, "lmc_rx out");
1765
1766 return 0;
1767 }
1768
1769 static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/
1770 {
1771 lmc_softc_t *sc = dev->priv;
1772 unsigned long flags;
1773
1774 lmc_trace(dev, "lmc_get_stats in");
1775
1776
1777 spin_lock_irqsave(&sc->lmc_lock, flags);
1778
1779 sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
1780
1781 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1782
1783 lmc_trace(dev, "lmc_get_stats out");
1784
1785 return (struct net_device_stats *) &sc->stats;
1786 }
1787
1788 static struct pci_driver lmc_driver = {
1789 .name = "lmc",
1790 .id_table = lmc_pci_tbl,
1791 .probe = lmc_init_one,
1792 .remove = __devexit_p(lmc_remove_one),
1793 };
1794
1795 static int __init init_lmc(void)
1796 {
1797 return pci_module_init(&lmc_driver);
1798 }
1799
1800 static void __exit exit_lmc(void)
1801 {
1802 pci_unregister_driver(&lmc_driver);
1803 }
1804
1805 module_init(init_lmc);
1806 module_exit(exit_lmc);
1807
1808 unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1809 {
1810 int i;
1811 int command = (0xf6 << 10) | (devaddr << 5) | regno;
1812 int retval = 0;
1813
1814 lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1815
1816 LMC_MII_SYNC (sc);
1817
1818 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1819
1820 for (i = 15; i >= 0; i--)
1821 {
1822 int dataval = (command & (1 << i)) ? 0x20000 : 0;
1823
1824 LMC_CSR_WRITE (sc, csr_9, dataval);
1825 lmc_delay ();
1826 /* __SLOW_DOWN_IO; */
1827 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1828 lmc_delay ();
1829 /* __SLOW_DOWN_IO; */
1830 }
1831
1832 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1833
1834 for (i = 19; i > 0; i--)
1835 {
1836 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1837 lmc_delay ();
1838 /* __SLOW_DOWN_IO; */
1839 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1840 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1841 lmc_delay ();
1842 /* __SLOW_DOWN_IO; */
1843 }
1844
1845 lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1846
1847 return (retval >> 1) & 0xffff;
1848 }
1849
1850 void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1851 {
1852 int i = 32;
1853 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1854
1855 lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1856
1857 LMC_MII_SYNC (sc);
1858
1859 i = 31;
1860 while (i >= 0)
1861 {
1862 int datav;
1863
1864 if (command & (1 << i))
1865 datav = 0x20000;
1866 else
1867 datav = 0x00000;
1868
1869 LMC_CSR_WRITE (sc, csr_9, datav);
1870 lmc_delay ();
1871 /* __SLOW_DOWN_IO; */
1872 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1873 lmc_delay ();
1874 /* __SLOW_DOWN_IO; */
1875 i--;
1876 }
1877
1878 i = 2;
1879 while (i > 0)
1880 {
1881 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1882 lmc_delay ();
1883 /* __SLOW_DOWN_IO; */
1884 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1885 lmc_delay ();
1886 /* __SLOW_DOWN_IO; */
1887 i--;
1888 }
1889
1890 lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1891 }
1892
1893 static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1894 {
1895 int i;
1896
1897 lmc_trace(sc->lmc_device, "lmc_softreset in");
1898
1899 /* Initialize the receive rings and buffers. */
1900 sc->lmc_txfull = 0;
1901 sc->lmc_next_rx = 0;
1902 sc->lmc_next_tx = 0;
1903 sc->lmc_taint_rx = 0;
1904 sc->lmc_taint_tx = 0;
1905
1906 /*
1907 * Setup each one of the receiver buffers
1908 * allocate an skbuff for each one, setup the descriptor table
1909 * and point each buffer at the next one
1910 */
1911
1912 for (i = 0; i < LMC_RXDESCS; i++)
1913 {
1914 struct sk_buff *skb;
1915
1916 if (sc->lmc_rxq[i] == NULL)
1917 {
1918 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1919 if(skb == NULL){
1920 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1921 sc->failed_ring = 1;
1922 break;
1923 }
1924 else{
1925 sc->lmc_rxq[i] = skb;
1926 }
1927 }
1928 else
1929 {
1930 skb = sc->lmc_rxq[i];
1931 }
1932
1933 skb->dev = sc->lmc_device;
1934
1935 /* owned by 21140 */
1936 sc->lmc_rxring[i].status = 0x80000000;
1937
1938 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1939 sc->lmc_rxring[i].length = skb->end - skb->data;
1940
1941 /* use to be tail which is dumb since you're thinking why write
1942 * to the end of the packj,et but since there's nothing there tail == data
1943 */
1944 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1945
1946 /* This is fair since the structure is static and we have the next address */
1947 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1948
1949 }
1950
1951 /*
1952 * Sets end of ring
1953 */
1954 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1955 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */
1956 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1957
1958
1959 /* Initialize the transmit rings and buffers */
1960 for (i = 0; i < LMC_TXDESCS; i++)
1961 {
1962 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1963 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
1964 sc->stats.tx_dropped++; /* We just dropped a packet */
1965 }
1966 sc->lmc_txq[i] = NULL;
1967 sc->lmc_txring[i].status = 0x00000000;
1968 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1969 }
1970 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1971 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1972
1973 lmc_trace(sc->lmc_device, "lmc_softreset out");
1974 }
1975
1976 void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
1977 {
1978 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1979 sc->lmc_gpio_io &= ~bits;
1980 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1981 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1982 }
1983
1984 void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
1985 {
1986 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1987 sc->lmc_gpio_io |= bits;
1988 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1989 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1990 }
1991
1992 void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
1993 {
1994 lmc_trace(sc->lmc_device, "lmc_led_on in");
1995 if((~sc->lmc_miireg16) & led){ /* Already on! */
1996 lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1997 return;
1998 }
1999
2000 sc->lmc_miireg16 &= ~led;
2001 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2002 lmc_trace(sc->lmc_device, "lmc_led_on out");
2003 }
2004
2005 void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
2006 {
2007 lmc_trace(sc->lmc_device, "lmc_led_off in");
2008 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
2009 lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
2010 return;
2011 }
2012
2013 sc->lmc_miireg16 |= led;
2014 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2015 lmc_trace(sc->lmc_device, "lmc_led_off out");
2016 }
2017
2018 static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
2019 {
2020 lmc_trace(sc->lmc_device, "lmc_reset in");
2021 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
2022 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2023
2024 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
2025 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
2026
2027 /*
2028 * make some of the GPIO pins be outputs
2029 */
2030 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
2031
2032 /*
2033 * RESET low to force state reset. This also forces
2034 * the transmitter clock to be internal, but we expect to reset
2035 * that later anyway.
2036 */
2037 sc->lmc_gpio &= ~(LMC_GEP_RESET);
2038 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
2039
2040 /*
2041 * hold for more than 10 microseconds
2042 */
2043 udelay(50);
2044
2045 /*
2046 * stop driving Xilinx-related signals
2047 */
2048 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
2049
2050 /*
2051 * Call media specific init routine
2052 */
2053 sc->lmc_media->init(sc);
2054
2055 sc->stats.resetCount++;
2056 lmc_trace(sc->lmc_device, "lmc_reset out");
2057 }
2058
2059 static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
2060 {
2061 u_int32_t val;
2062 lmc_trace(sc->lmc_device, "lmc_dec_reset in");
2063
2064 /*
2065 * disable all interrupts
2066 */
2067 sc->lmc_intrmask = 0;
2068 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
2069
2070 /*
2071 * Reset the chip with a software reset command.
2072 * Wait 10 microseconds (actually 50 PCI cycles but at
2073 * 33MHz that comes to two microseconds but wait a
2074 * bit longer anyways)
2075 */
2076 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
2077 udelay(25);
2078 #ifdef __sparc__
2079 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
2080 sc->lmc_busmode = 0x00100000;
2081 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2082 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2083 #endif
2084 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2085
2086 /*
2087 * We want:
2088 * no ethernet address in frames we write
2089 * disable padding (txdesc, padding disable)
2090 * ignore runt frames (rdes0 bit 15)
2091 * no receiver watchdog or transmitter jabber timer
2092 * (csr15 bit 0,14 == 1)
2093 * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2094 */
2095
2096 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2097 | TULIP_CMD_FULLDUPLEX
2098 | TULIP_CMD_PASSBADPKT
2099 | TULIP_CMD_NOHEARTBEAT
2100 | TULIP_CMD_PORTSELECT
2101 | TULIP_CMD_RECEIVEALL
2102 | TULIP_CMD_MUSTBEONE
2103 );
2104 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2105 | TULIP_CMD_THRESHOLDCTL
2106 | TULIP_CMD_STOREFWD
2107 | TULIP_CMD_TXTHRSHLDCTL
2108 );
2109
2110 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2111
2112 /*
2113 * disable receiver watchdog and transmit jabber
2114 */
2115 val = LMC_CSR_READ(sc, csr_sia_general);
2116 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2117 LMC_CSR_WRITE(sc, csr_sia_general, val);
2118
2119 lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2120 }
2121
2122 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2123 size_t csr_size)
2124 {
2125 lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2126 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
2127 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
2128 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
2129 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
2130 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
2131 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
2132 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
2133 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
2134 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
2135 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
2136 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
2137 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
2138 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
2139 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
2140 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
2141 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
2142 lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2143 }
2144
2145 static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
2146 lmc_softc_t *sc;
2147 u32 csr6;
2148 unsigned long flags;
2149
2150 lmc_trace(dev, "lmc_driver_timeout in");
2151
2152 sc = dev->priv;
2153
2154 spin_lock_irqsave(&sc->lmc_lock, flags);
2155
2156 printk("%s: Xmitter busy|\n", dev->name);
2157
2158 sc->stats.tx_tbusy_calls++ ;
2159 if (jiffies - dev->trans_start < TX_TIMEOUT) {
2160 goto bug_out;
2161 }
2162
2163 /*
2164 * Chip seems to have locked up
2165 * Reset it
2166 * This whips out all our decriptor
2167 * table and starts from scartch
2168 */
2169
2170 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2171 LMC_CSR_READ (sc, csr_status),
2172 sc->stats.tx_ProcTimeout);
2173
2174 lmc_running_reset (dev);
2175
2176 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2177 LMC_EVENT_LOG(LMC_EVENT_RESET2,
2178 lmc_mii_readreg (sc, 0, 16),
2179 lmc_mii_readreg (sc, 0, 17));
2180
2181 /* restart the tx processes */
2182 csr6 = LMC_CSR_READ (sc, csr_command);
2183 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2184 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2185
2186 /* immediate transmit */
2187 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2188
2189 sc->stats.tx_errors++;
2190 sc->stats.tx_ProcTimeout++; /* -baz */
2191
2192 dev->trans_start = jiffies;
2193
2194 bug_out:
2195
2196 spin_unlock_irqrestore(&sc->lmc_lock, flags);
2197
2198 lmc_trace(dev, "lmc_driver_timout out");
2199
2200
2201 }
Verdex Pro support