2 * bfin_dma_5xx.c - Blackfin DMA implementation
4 * Copyright 2004-2008 Analog Devices Inc.
5 * Licensed under the GPL-2 or later.
8 #include <linux/errno.h>
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/param.h>
13 #include <linux/proc_fs.h>
14 #include <linux/sched.h>
15 #include <linux/seq_file.h>
16 #include <linux/spinlock.h>
18 #include <asm/blackfin.h>
19 #include <asm/cacheflush.h>
21 #include <asm/uaccess.h>
23 struct dma_channel dma_ch
[MAX_DMA_CHANNELS
];
24 EXPORT_SYMBOL(dma_ch
);
26 static int __init
blackfin_dma_init(void)
30 printk(KERN_INFO
"Blackfin DMA Controller\n");
32 for (i
= 0; i
< MAX_DMA_CHANNELS
; i
++) {
33 dma_ch
[i
].chan_status
= DMA_CHANNEL_FREE
;
34 dma_ch
[i
].regs
= dma_io_base_addr
[i
];
35 mutex_init(&(dma_ch
[i
].dmalock
));
37 /* Mark MEMDMA Channel 0 as requested since we're using it internally */
38 request_dma(CH_MEM_STREAM0_DEST
, "Blackfin dma_memcpy");
39 request_dma(CH_MEM_STREAM0_SRC
, "Blackfin dma_memcpy");
41 #if defined(CONFIG_DEB_DMA_URGENT)
42 bfin_write_EBIU_DDRQUE(bfin_read_EBIU_DDRQUE()
43 | DEB1_URGENT
| DEB2_URGENT
| DEB3_URGENT
);
48 arch_initcall(blackfin_dma_init
);
51 static int proc_dma_show(struct seq_file
*m
, void *v
)
55 for (i
= 0; i
< MAX_DMA_CHANNELS
; ++i
)
56 if (dma_ch
[i
].chan_status
!= DMA_CHANNEL_FREE
)
57 seq_printf(m
, "%2d: %s\n", i
, dma_ch
[i
].device_id
);
62 static int proc_dma_open(struct inode
*inode
, struct file
*file
)
64 return single_open(file
, proc_dma_show
, NULL
);
67 static const struct file_operations proc_dma_operations
= {
68 .open
= proc_dma_open
,
71 .release
= single_release
,
74 static int __init
proc_dma_init(void)
76 return proc_create("dma", 0, NULL
, &proc_dma_operations
) != NULL
;
78 late_initcall(proc_dma_init
);
82 * request_dma - request a DMA channel
84 * Request the specific DMA channel from the system if it's available.
86 int request_dma(unsigned int channel
, const char *device_id
)
88 pr_debug("request_dma() : BEGIN \n");
90 if (device_id
== NULL
)
91 printk(KERN_WARNING
"request_dma(%u): no device_id given\n", channel
);
93 #if defined(CONFIG_BF561) && ANOMALY_05000182
94 if (channel
>= CH_IMEM_STREAM0_DEST
&& channel
<= CH_IMEM_STREAM1_DEST
) {
95 if (get_cclk() > 500000000) {
97 "Request IMDMA failed due to ANOMALY 05000182\n");
103 mutex_lock(&(dma_ch
[channel
].dmalock
));
105 if ((dma_ch
[channel
].chan_status
== DMA_CHANNEL_REQUESTED
)
106 || (dma_ch
[channel
].chan_status
== DMA_CHANNEL_ENABLED
)) {
107 mutex_unlock(&(dma_ch
[channel
].dmalock
));
108 pr_debug("DMA CHANNEL IN USE \n");
111 dma_ch
[channel
].chan_status
= DMA_CHANNEL_REQUESTED
;
112 pr_debug("DMA CHANNEL IS ALLOCATED \n");
115 mutex_unlock(&(dma_ch
[channel
].dmalock
));
118 if (channel
>= CH_UART2_RX
&& channel
<= CH_UART3_TX
) {
119 unsigned int per_map
;
120 per_map
= dma_ch
[channel
].regs
->peripheral_map
& 0xFFF;
121 if (strncmp(device_id
, "BFIN_UART", 9) == 0)
122 dma_ch
[channel
].regs
->peripheral_map
= per_map
|
123 ((channel
- CH_UART2_RX
+ 0xC)<<12);
125 dma_ch
[channel
].regs
->peripheral_map
= per_map
|
126 ((channel
- CH_UART2_RX
+ 0x6)<<12);
130 dma_ch
[channel
].device_id
= device_id
;
131 dma_ch
[channel
].irq
= 0;
133 /* This is to be enabled by putting a restriction -
134 * you have to request DMA, before doing any operations on
137 pr_debug("request_dma() : END \n");
140 EXPORT_SYMBOL(request_dma
);
142 int set_dma_callback(unsigned int channel
, irq_handler_t callback
, void *data
)
144 BUG_ON(!(dma_ch
[channel
].chan_status
!= DMA_CHANNEL_FREE
145 && channel
< MAX_DMA_CHANNELS
));
147 if (callback
!= NULL
) {
149 unsigned int irq
= channel2irq(channel
);
151 ret
= request_irq(irq
, callback
, IRQF_DISABLED
,
152 dma_ch
[channel
].device_id
, data
);
156 dma_ch
[channel
].irq
= irq
;
157 dma_ch
[channel
].data
= data
;
161 EXPORT_SYMBOL(set_dma_callback
);
164 * clear_dma_buffer - clear DMA fifos for specified channel
166 * Set the Buffer Clear bit in the Configuration register of specific DMA
167 * channel. This will stop the descriptor based DMA operation.
169 static void clear_dma_buffer(unsigned int channel
)
171 dma_ch
[channel
].regs
->cfg
|= RESTART
;
173 dma_ch
[channel
].regs
->cfg
&= ~RESTART
;
176 void free_dma(unsigned int channel
)
178 pr_debug("freedma() : BEGIN \n");
179 BUG_ON(!(dma_ch
[channel
].chan_status
!= DMA_CHANNEL_FREE
180 && channel
< MAX_DMA_CHANNELS
));
183 disable_dma(channel
);
184 clear_dma_buffer(channel
);
186 if (dma_ch
[channel
].irq
)
187 free_irq(dma_ch
[channel
].irq
, dma_ch
[channel
].data
);
189 /* Clear the DMA Variable in the Channel */
190 mutex_lock(&(dma_ch
[channel
].dmalock
));
191 dma_ch
[channel
].chan_status
= DMA_CHANNEL_FREE
;
192 mutex_unlock(&(dma_ch
[channel
].dmalock
));
194 pr_debug("freedma() : END \n");
196 EXPORT_SYMBOL(free_dma
);
199 # ifndef MAX_DMA_SUSPEND_CHANNELS
200 # define MAX_DMA_SUSPEND_CHANNELS MAX_DMA_CHANNELS
202 int blackfin_dma_suspend(void)
206 for (i
= 0; i
< MAX_DMA_SUSPEND_CHANNELS
; ++i
) {
207 if (dma_ch
[i
].chan_status
== DMA_CHANNEL_ENABLED
) {
208 printk(KERN_ERR
"DMA Channel %d failed to suspend\n", i
);
212 dma_ch
[i
].saved_peripheral_map
= dma_ch
[i
].regs
->peripheral_map
;
218 void blackfin_dma_resume(void)
221 for (i
= 0; i
< MAX_DMA_SUSPEND_CHANNELS
; ++i
)
222 dma_ch
[i
].regs
->peripheral_map
= dma_ch
[i
].saved_peripheral_map
;
227 * blackfin_dma_early_init - minimal DMA init
229 * Setup a few DMA registers so we can safely do DMA transfers early on in
230 * the kernel booting process. Really this just means using dma_memcpy().
232 void __init
blackfin_dma_early_init(void)
234 bfin_write_MDMA_S0_CONFIG(0);
238 * __dma_memcpy - program the MDMA registers
240 * Actually program MDMA0 and wait for the transfer to finish. Disable IRQs
241 * while programming registers so that everything is fully configured. Wait
242 * for DMA to finish with IRQs enabled. If interrupted, the initial DMA_DONE
243 * check will make sure we don't clobber any existing transfer.
245 static void __dma_memcpy(u32 daddr
, s16 dmod
, u32 saddr
, s16 smod
, size_t cnt
, u32 conf
)
247 static DEFINE_SPINLOCK(mdma_lock
);
250 spin_lock_irqsave(&mdma_lock
, flags
);
252 /* Force a sync in case a previous config reset on this channel
253 * occurred. This is needed so subsequent writes to DMA registers
254 * are not spuriously lost/corrupted. Do it under irq lock and
255 * without the anomaly version (because we are atomic already).
257 __builtin_bfin_ssync();
259 if (bfin_read_MDMA_S0_CONFIG())
260 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE
))
264 /* For larger bit sizes, we've already divided down cnt so it
265 * is no longer a multiple of 64k. So we have to break down
266 * the limit here so it is a multiple of the incoming size.
267 * There is no limitation here in terms of total size other
268 * than the hardware though as the bits lost in the shift are
269 * made up by MODIFY (== we can hit the whole address space).
270 * X: (2^(16 - 0)) * 1 == (2^(16 - 1)) * 2 == (2^(16 - 2)) * 4
272 u32 shift
= abs(dmod
) >> 1;
273 size_t ycnt
= cnt
>> (16 - shift
);
274 cnt
= 1 << (16 - shift
);
275 bfin_write_MDMA_D0_Y_COUNT(ycnt
);
276 bfin_write_MDMA_S0_Y_COUNT(ycnt
);
277 bfin_write_MDMA_D0_Y_MODIFY(dmod
);
278 bfin_write_MDMA_S0_Y_MODIFY(smod
);
281 bfin_write_MDMA_D0_START_ADDR(daddr
);
282 bfin_write_MDMA_D0_X_COUNT(cnt
);
283 bfin_write_MDMA_D0_X_MODIFY(dmod
);
284 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE
| DMA_ERR
);
286 bfin_write_MDMA_S0_START_ADDR(saddr
);
287 bfin_write_MDMA_S0_X_COUNT(cnt
);
288 bfin_write_MDMA_S0_X_MODIFY(smod
);
289 bfin_write_MDMA_S0_IRQ_STATUS(DMA_DONE
| DMA_ERR
);
291 bfin_write_MDMA_S0_CONFIG(DMAEN
| conf
);
292 bfin_write_MDMA_D0_CONFIG(WNR
| DI_EN
| DMAEN
| conf
);
294 spin_unlock_irqrestore(&mdma_lock
, flags
);
298 while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE
))
299 if (bfin_read_MDMA_S0_CONFIG())
304 bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE
| DMA_ERR
);
306 bfin_write_MDMA_S0_CONFIG(0);
307 bfin_write_MDMA_D0_CONFIG(0);
311 * _dma_memcpy - translate C memcpy settings into MDMA settings
313 * Handle all the high level steps before we touch the MDMA registers. So
314 * handle direction, tweaking of sizes, and formatting of addresses.
316 static void *_dma_memcpy(void *pdst
, const void *psrc
, size_t size
)
320 unsigned long dst
= (unsigned long)pdst
;
321 unsigned long src
= (unsigned long)psrc
;
326 if (dst
% 4 == 0 && src
% 4 == 0 && size
% 4 == 0) {
329 } else if (dst
% 2 == 0 && src
% 2 == 0 && size
% 2 == 0) {
337 /* If the two memory regions have a chance of overlapping, make
338 * sure the memcpy still works as expected. Do this by having the
339 * copy run backwards instead.
352 __dma_memcpy(dst
, mod
, src
, mod
, size
, conf
);
358 * dma_memcpy - DMA memcpy under mutex lock
360 * Do not check arguments before starting the DMA memcpy. Break the transfer
361 * up into two pieces. The first transfer is in multiples of 64k and the
362 * second transfer is the piece smaller than 64k.
364 void *dma_memcpy(void *pdst
, const void *psrc
, size_t size
)
366 unsigned long dst
= (unsigned long)pdst
;
367 unsigned long src
= (unsigned long)psrc
;
370 if (bfin_addr_dcachable(src
))
371 blackfin_dcache_flush_range(src
, src
+ size
);
373 if (bfin_addr_dcachable(dst
))
374 blackfin_dcache_invalidate_range(dst
, dst
+ size
);
376 bulk
= size
& ~0xffff;
379 _dma_memcpy(pdst
, psrc
, bulk
);
380 _dma_memcpy(pdst
+ bulk
, psrc
+ bulk
, rest
);
383 EXPORT_SYMBOL(dma_memcpy
);
386 * safe_dma_memcpy - DMA memcpy w/argument checking
388 * Verify arguments are safe before heading to dma_memcpy().
390 void *safe_dma_memcpy(void *dst
, const void *src
, size_t size
)
392 if (!access_ok(VERIFY_WRITE
, dst
, size
))
394 if (!access_ok(VERIFY_READ
, src
, size
))
396 return dma_memcpy(dst
, src
, size
);
398 EXPORT_SYMBOL(safe_dma_memcpy
);
400 static void _dma_out(unsigned long addr
, unsigned long buf
, unsigned short len
,
401 u16 size
, u16 dma_size
)
403 blackfin_dcache_flush_range(buf
, buf
+ len
* size
);
404 __dma_memcpy(addr
, 0, buf
, size
, len
, dma_size
);
407 static void _dma_in(unsigned long addr
, unsigned long buf
, unsigned short len
,
408 u16 size
, u16 dma_size
)
410 blackfin_dcache_invalidate_range(buf
, buf
+ len
* size
);
411 __dma_memcpy(buf
, size
, addr
, 0, len
, dma_size
);
414 #define MAKE_DMA_IO(io, bwl, isize, dmasize, cnst) \
415 void dma_##io##s##bwl(unsigned long addr, cnst void *buf, unsigned short len) \
417 _dma_##io(addr, (unsigned long)buf, len, isize, WDSIZE_##dmasize); \
419 EXPORT_SYMBOL(dma_##io##s##bwl)
420 MAKE_DMA_IO(out
, b
, 1, 8, const);
421 MAKE_DMA_IO(in
, b
, 1, 8, );
422 MAKE_DMA_IO(out
, w
, 2, 16, const);
423 MAKE_DMA_IO(in
, w
, 2, 16, );
424 MAKE_DMA_IO(out
, l
, 4, 32, const);
425 MAKE_DMA_IO(in
, l
, 4, 32, );