Linux 3.12.39
[linux/fpc-iii.git] / drivers / mtd / devices / mtd_dataflash.c
blob0e8cbfeba11e42a85da4a843cd7f212263eb9448
1 /*
2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
30 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31 * each chip, which may be used for double buffered I/O; but this driver
32 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
34 * Sometimes DataFlash is packaged in MMC-format cards, although the
35 * MMC stack can't (yet?) distinguish between MMC and DataFlash
36 * protocols during enumeration.
39 /* reads can bypass the buffers */
40 #define OP_READ_CONTINUOUS 0xE8
41 #define OP_READ_PAGE 0xD2
43 /* group B requests can run even while status reports "busy" */
44 #define OP_READ_STATUS 0xD7 /* group B */
46 /* move data between host and buffer */
47 #define OP_READ_BUFFER1 0xD4 /* group B */
48 #define OP_READ_BUFFER2 0xD6 /* group B */
49 #define OP_WRITE_BUFFER1 0x84 /* group B */
50 #define OP_WRITE_BUFFER2 0x87 /* group B */
52 /* erasing flash */
53 #define OP_ERASE_PAGE 0x81
54 #define OP_ERASE_BLOCK 0x50
56 /* move data between buffer and flash */
57 #define OP_TRANSFER_BUF1 0x53
58 #define OP_TRANSFER_BUF2 0x55
59 #define OP_MREAD_BUFFER1 0xD4
60 #define OP_MREAD_BUFFER2 0xD6
61 #define OP_MWERASE_BUFFER1 0x83
62 #define OP_MWERASE_BUFFER2 0x86
63 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
66 /* write to buffer, then write-erase to flash */
67 #define OP_PROGRAM_VIA_BUF1 0x82
68 #define OP_PROGRAM_VIA_BUF2 0x85
70 /* compare buffer to flash */
71 #define OP_COMPARE_BUF1 0x60
72 #define OP_COMPARE_BUF2 0x61
74 /* read flash to buffer, then write-erase to flash */
75 #define OP_REWRITE_VIA_BUF1 0x58
76 #define OP_REWRITE_VIA_BUF2 0x59
78 /* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
81 #define OP_READ_ID 0x9F
82 #define OP_READ_SECURITY 0x77
83 #define OP_WRITE_SECURITY_REVC 0x9A
84 #define OP_WRITE_SECURITY 0x9B /* revision D */
87 struct dataflash {
88 uint8_t command[4];
89 char name[24];
91 unsigned partitioned:1;
93 unsigned short page_offset; /* offset in flash address */
94 unsigned int page_size; /* of bytes per page */
96 struct mutex lock;
97 struct spi_device *spi;
99 struct mtd_info mtd;
102 #ifdef CONFIG_OF
103 static const struct of_device_id dataflash_dt_ids[] = {
104 { .compatible = "atmel,at45", },
105 { .compatible = "atmel,dataflash", },
106 { /* sentinel */ }
108 #endif
110 /* ......................................................................... */
113 * Return the status of the DataFlash device.
115 static inline int dataflash_status(struct spi_device *spi)
117 /* NOTE: at45db321c over 25 MHz wants to write
118 * a dummy byte after the opcode...
120 return spi_w8r8(spi, OP_READ_STATUS);
124 * Poll the DataFlash device until it is READY.
125 * This usually takes 5-20 msec or so; more for sector erase.
127 static int dataflash_waitready(struct spi_device *spi)
129 int status;
131 for (;;) {
132 status = dataflash_status(spi);
133 if (status < 0) {
134 pr_debug("%s: status %d?\n",
135 dev_name(&spi->dev), status);
136 status = 0;
139 if (status & (1 << 7)) /* RDY/nBSY */
140 return status;
142 msleep(3);
146 /* ......................................................................... */
149 * Erase pages of flash.
151 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
153 struct dataflash *priv = mtd->priv;
154 struct spi_device *spi = priv->spi;
155 struct spi_transfer x = { .tx_dma = 0, };
156 struct spi_message msg;
157 unsigned blocksize = priv->page_size << 3;
158 uint8_t *command;
159 uint32_t rem;
161 pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
162 dev_name(&spi->dev), (long long)instr->addr,
163 (long long)instr->len);
165 div_u64_rem(instr->len, priv->page_size, &rem);
166 if (rem)
167 return -EINVAL;
168 div_u64_rem(instr->addr, priv->page_size, &rem);
169 if (rem)
170 return -EINVAL;
172 spi_message_init(&msg);
174 x.tx_buf = command = priv->command;
175 x.len = 4;
176 spi_message_add_tail(&x, &msg);
178 mutex_lock(&priv->lock);
179 while (instr->len > 0) {
180 unsigned int pageaddr;
181 int status;
182 int do_block;
184 /* Calculate flash page address; use block erase (for speed) if
185 * we're at a block boundary and need to erase the whole block.
187 pageaddr = div_u64(instr->addr, priv->page_size);
188 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
189 pageaddr = pageaddr << priv->page_offset;
191 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
192 command[1] = (uint8_t)(pageaddr >> 16);
193 command[2] = (uint8_t)(pageaddr >> 8);
194 command[3] = 0;
196 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
197 do_block ? "block" : "page",
198 command[0], command[1], command[2], command[3],
199 pageaddr);
201 status = spi_sync(spi, &msg);
202 (void) dataflash_waitready(spi);
204 if (status < 0) {
205 printk(KERN_ERR "%s: erase %x, err %d\n",
206 dev_name(&spi->dev), pageaddr, status);
207 /* REVISIT: can retry instr->retries times; or
208 * giveup and instr->fail_addr = instr->addr;
210 continue;
213 if (do_block) {
214 instr->addr += blocksize;
215 instr->len -= blocksize;
216 } else {
217 instr->addr += priv->page_size;
218 instr->len -= priv->page_size;
221 mutex_unlock(&priv->lock);
223 /* Inform MTD subsystem that erase is complete */
224 instr->state = MTD_ERASE_DONE;
225 mtd_erase_callback(instr);
227 return 0;
231 * Read from the DataFlash device.
232 * from : Start offset in flash device
233 * len : Amount to read
234 * retlen : About of data actually read
235 * buf : Buffer containing the data
237 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
238 size_t *retlen, u_char *buf)
240 struct dataflash *priv = mtd->priv;
241 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
242 struct spi_message msg;
243 unsigned int addr;
244 uint8_t *command;
245 int status;
247 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
248 (unsigned)from, (unsigned)(from + len));
250 /* Calculate flash page/byte address */
251 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
252 + ((unsigned)from % priv->page_size);
254 command = priv->command;
256 pr_debug("READ: (%x) %x %x %x\n",
257 command[0], command[1], command[2], command[3]);
259 spi_message_init(&msg);
261 x[0].tx_buf = command;
262 x[0].len = 8;
263 spi_message_add_tail(&x[0], &msg);
265 x[1].rx_buf = buf;
266 x[1].len = len;
267 spi_message_add_tail(&x[1], &msg);
269 mutex_lock(&priv->lock);
271 /* Continuous read, max clock = f(car) which may be less than
272 * the peak rate available. Some chips support commands with
273 * fewer "don't care" bytes. Both buffers stay unchanged.
275 command[0] = OP_READ_CONTINUOUS;
276 command[1] = (uint8_t)(addr >> 16);
277 command[2] = (uint8_t)(addr >> 8);
278 command[3] = (uint8_t)(addr >> 0);
279 /* plus 4 "don't care" bytes */
281 status = spi_sync(priv->spi, &msg);
282 mutex_unlock(&priv->lock);
284 if (status >= 0) {
285 *retlen = msg.actual_length - 8;
286 status = 0;
287 } else
288 pr_debug("%s: read %x..%x --> %d\n",
289 dev_name(&priv->spi->dev),
290 (unsigned)from, (unsigned)(from + len),
291 status);
292 return status;
296 * Write to the DataFlash device.
297 * to : Start offset in flash device
298 * len : Amount to write
299 * retlen : Amount of data actually written
300 * buf : Buffer containing the data
302 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
303 size_t * retlen, const u_char * buf)
305 struct dataflash *priv = mtd->priv;
306 struct spi_device *spi = priv->spi;
307 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
308 struct spi_message msg;
309 unsigned int pageaddr, addr, offset, writelen;
310 size_t remaining = len;
311 u_char *writebuf = (u_char *) buf;
312 int status = -EINVAL;
313 uint8_t *command;
315 pr_debug("%s: write 0x%x..0x%x\n",
316 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
318 spi_message_init(&msg);
320 x[0].tx_buf = command = priv->command;
321 x[0].len = 4;
322 spi_message_add_tail(&x[0], &msg);
324 pageaddr = ((unsigned)to / priv->page_size);
325 offset = ((unsigned)to % priv->page_size);
326 if (offset + len > priv->page_size)
327 writelen = priv->page_size - offset;
328 else
329 writelen = len;
331 mutex_lock(&priv->lock);
332 while (remaining > 0) {
333 pr_debug("write @ %i:%i len=%i\n",
334 pageaddr, offset, writelen);
336 /* REVISIT:
337 * (a) each page in a sector must be rewritten at least
338 * once every 10K sibling erase/program operations.
339 * (b) for pages that are already erased, we could
340 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
341 * (c) WRITE to buffer could be done while waiting for
342 * a previous MWRITE/MWERASE to complete ...
343 * (d) error handling here seems to be mostly missing.
345 * Two persistent bits per page, plus a per-sector counter,
346 * could support (a) and (b) ... we might consider using
347 * the second half of sector zero, which is just one block,
348 * to track that state. (On AT91, that sector should also
349 * support boot-from-DataFlash.)
352 addr = pageaddr << priv->page_offset;
354 /* (1) Maybe transfer partial page to Buffer1 */
355 if (writelen != priv->page_size) {
356 command[0] = OP_TRANSFER_BUF1;
357 command[1] = (addr & 0x00FF0000) >> 16;
358 command[2] = (addr & 0x0000FF00) >> 8;
359 command[3] = 0;
361 pr_debug("TRANSFER: (%x) %x %x %x\n",
362 command[0], command[1], command[2], command[3]);
364 status = spi_sync(spi, &msg);
365 if (status < 0)
366 pr_debug("%s: xfer %u -> %d\n",
367 dev_name(&spi->dev), addr, status);
369 (void) dataflash_waitready(priv->spi);
372 /* (2) Program full page via Buffer1 */
373 addr += offset;
374 command[0] = OP_PROGRAM_VIA_BUF1;
375 command[1] = (addr & 0x00FF0000) >> 16;
376 command[2] = (addr & 0x0000FF00) >> 8;
377 command[3] = (addr & 0x000000FF);
379 pr_debug("PROGRAM: (%x) %x %x %x\n",
380 command[0], command[1], command[2], command[3]);
382 x[1].tx_buf = writebuf;
383 x[1].len = writelen;
384 spi_message_add_tail(x + 1, &msg);
385 status = spi_sync(spi, &msg);
386 spi_transfer_del(x + 1);
387 if (status < 0)
388 pr_debug("%s: pgm %u/%u -> %d\n",
389 dev_name(&spi->dev), addr, writelen, status);
391 (void) dataflash_waitready(priv->spi);
394 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
396 /* (3) Compare to Buffer1 */
397 addr = pageaddr << priv->page_offset;
398 command[0] = OP_COMPARE_BUF1;
399 command[1] = (addr & 0x00FF0000) >> 16;
400 command[2] = (addr & 0x0000FF00) >> 8;
401 command[3] = 0;
403 pr_debug("COMPARE: (%x) %x %x %x\n",
404 command[0], command[1], command[2], command[3]);
406 status = spi_sync(spi, &msg);
407 if (status < 0)
408 pr_debug("%s: compare %u -> %d\n",
409 dev_name(&spi->dev), addr, status);
411 status = dataflash_waitready(priv->spi);
413 /* Check result of the compare operation */
414 if (status & (1 << 6)) {
415 printk(KERN_ERR "%s: compare page %u, err %d\n",
416 dev_name(&spi->dev), pageaddr, status);
417 remaining = 0;
418 status = -EIO;
419 break;
420 } else
421 status = 0;
423 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
425 remaining = remaining - writelen;
426 pageaddr++;
427 offset = 0;
428 writebuf += writelen;
429 *retlen += writelen;
431 if (remaining > priv->page_size)
432 writelen = priv->page_size;
433 else
434 writelen = remaining;
436 mutex_unlock(&priv->lock);
438 return status;
441 /* ......................................................................... */
443 #ifdef CONFIG_MTD_DATAFLASH_OTP
445 static int dataflash_get_otp_info(struct mtd_info *mtd,
446 struct otp_info *info, size_t len)
448 /* Report both blocks as identical: bytes 0..64, locked.
449 * Unless the user block changed from all-ones, we can't
450 * tell whether it's still writable; so we assume it isn't.
452 info->start = 0;
453 info->length = 64;
454 info->locked = 1;
455 return sizeof(*info);
458 static ssize_t otp_read(struct spi_device *spi, unsigned base,
459 uint8_t *buf, loff_t off, size_t len)
461 struct spi_message m;
462 size_t l;
463 uint8_t *scratch;
464 struct spi_transfer t;
465 int status;
467 if (off > 64)
468 return -EINVAL;
470 if ((off + len) > 64)
471 len = 64 - off;
473 spi_message_init(&m);
475 l = 4 + base + off + len;
476 scratch = kzalloc(l, GFP_KERNEL);
477 if (!scratch)
478 return -ENOMEM;
480 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
481 * IN: ignore 4 bytes, data bytes 0..N (max 127)
483 scratch[0] = OP_READ_SECURITY;
485 memset(&t, 0, sizeof t);
486 t.tx_buf = scratch;
487 t.rx_buf = scratch;
488 t.len = l;
489 spi_message_add_tail(&t, &m);
491 dataflash_waitready(spi);
493 status = spi_sync(spi, &m);
494 if (status >= 0) {
495 memcpy(buf, scratch + 4 + base + off, len);
496 status = len;
499 kfree(scratch);
500 return status;
503 static int dataflash_read_fact_otp(struct mtd_info *mtd,
504 loff_t from, size_t len, size_t *retlen, u_char *buf)
506 struct dataflash *priv = mtd->priv;
507 int status;
509 /* 64 bytes, from 0..63 ... start at 64 on-chip */
510 mutex_lock(&priv->lock);
511 status = otp_read(priv->spi, 64, buf, from, len);
512 mutex_unlock(&priv->lock);
514 if (status < 0)
515 return status;
516 *retlen = status;
517 return 0;
520 static int dataflash_read_user_otp(struct mtd_info *mtd,
521 loff_t from, size_t len, size_t *retlen, u_char *buf)
523 struct dataflash *priv = mtd->priv;
524 int status;
526 /* 64 bytes, from 0..63 ... start at 0 on-chip */
527 mutex_lock(&priv->lock);
528 status = otp_read(priv->spi, 0, buf, from, len);
529 mutex_unlock(&priv->lock);
531 if (status < 0)
532 return status;
533 *retlen = status;
534 return 0;
537 static int dataflash_write_user_otp(struct mtd_info *mtd,
538 loff_t from, size_t len, size_t *retlen, u_char *buf)
540 struct spi_message m;
541 const size_t l = 4 + 64;
542 uint8_t *scratch;
543 struct spi_transfer t;
544 struct dataflash *priv = mtd->priv;
545 int status;
547 if (len > 64)
548 return -EINVAL;
550 /* Strictly speaking, we *could* truncate the write ... but
551 * let's not do that for the only write that's ever possible.
553 if ((from + len) > 64)
554 return -EINVAL;
556 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
557 * IN: ignore all
559 scratch = kzalloc(l, GFP_KERNEL);
560 if (!scratch)
561 return -ENOMEM;
562 scratch[0] = OP_WRITE_SECURITY;
563 memcpy(scratch + 4 + from, buf, len);
565 spi_message_init(&m);
567 memset(&t, 0, sizeof t);
568 t.tx_buf = scratch;
569 t.len = l;
570 spi_message_add_tail(&t, &m);
572 /* Write the OTP bits, if they've not yet been written.
573 * This modifies SRAM buffer1.
575 mutex_lock(&priv->lock);
576 dataflash_waitready(priv->spi);
577 status = spi_sync(priv->spi, &m);
578 mutex_unlock(&priv->lock);
580 kfree(scratch);
582 if (status >= 0) {
583 status = 0;
584 *retlen = len;
586 return status;
589 static char *otp_setup(struct mtd_info *device, char revision)
591 device->_get_fact_prot_info = dataflash_get_otp_info;
592 device->_read_fact_prot_reg = dataflash_read_fact_otp;
593 device->_get_user_prot_info = dataflash_get_otp_info;
594 device->_read_user_prot_reg = dataflash_read_user_otp;
596 /* rev c parts (at45db321c and at45db1281 only!) use a
597 * different write procedure; not (yet?) implemented.
599 if (revision > 'c')
600 device->_write_user_prot_reg = dataflash_write_user_otp;
602 return ", OTP";
605 #else
607 static char *otp_setup(struct mtd_info *device, char revision)
609 return " (OTP)";
612 #endif
614 /* ......................................................................... */
617 * Register DataFlash device with MTD subsystem.
619 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
620 int pagesize, int pageoffset, char revision)
622 struct dataflash *priv;
623 struct mtd_info *device;
624 struct mtd_part_parser_data ppdata;
625 struct flash_platform_data *pdata = dev_get_platdata(&spi->dev);
626 char *otp_tag = "";
627 int err = 0;
629 priv = kzalloc(sizeof *priv, GFP_KERNEL);
630 if (!priv)
631 return -ENOMEM;
633 mutex_init(&priv->lock);
634 priv->spi = spi;
635 priv->page_size = pagesize;
636 priv->page_offset = pageoffset;
638 /* name must be usable with cmdlinepart */
639 sprintf(priv->name, "spi%d.%d-%s",
640 spi->master->bus_num, spi->chip_select,
641 name);
643 device = &priv->mtd;
644 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
645 device->size = nr_pages * pagesize;
646 device->erasesize = pagesize;
647 device->writesize = pagesize;
648 device->owner = THIS_MODULE;
649 device->type = MTD_DATAFLASH;
650 device->flags = MTD_WRITEABLE;
651 device->_erase = dataflash_erase;
652 device->_read = dataflash_read;
653 device->_write = dataflash_write;
654 device->priv = priv;
656 device->dev.parent = &spi->dev;
658 if (revision >= 'c')
659 otp_tag = otp_setup(device, revision);
661 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
662 name, (long long)((device->size + 1023) >> 10),
663 pagesize, otp_tag);
664 spi_set_drvdata(spi, priv);
666 ppdata.of_node = spi->dev.of_node;
667 err = mtd_device_parse_register(device, NULL, &ppdata,
668 pdata ? pdata->parts : NULL,
669 pdata ? pdata->nr_parts : 0);
671 if (!err)
672 return 0;
674 spi_set_drvdata(spi, NULL);
675 kfree(priv);
676 return err;
679 static inline int add_dataflash(struct spi_device *spi, char *name,
680 int nr_pages, int pagesize, int pageoffset)
682 return add_dataflash_otp(spi, name, nr_pages, pagesize,
683 pageoffset, 0);
686 struct flash_info {
687 char *name;
689 /* JEDEC id has a high byte of zero plus three data bytes:
690 * the manufacturer id, then a two byte device id.
692 uint32_t jedec_id;
694 /* The size listed here is what works with OP_ERASE_PAGE. */
695 unsigned nr_pages;
696 uint16_t pagesize;
697 uint16_t pageoffset;
699 uint16_t flags;
700 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
701 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
704 static struct flash_info dataflash_data[] = {
707 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
708 * one with IS_POW2PS and the other without. The entry with the
709 * non-2^N byte page size can't name exact chip revisions without
710 * losing backwards compatibility for cmdlinepart.
712 * These newer chips also support 128-byte security registers (with
713 * 64 bytes one-time-programmable) and software write-protection.
715 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
716 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
718 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
719 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
721 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
722 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
724 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
725 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
727 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
728 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
730 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
732 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
733 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
735 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
736 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
739 static struct flash_info *jedec_probe(struct spi_device *spi)
741 int tmp;
742 uint8_t code = OP_READ_ID;
743 uint8_t id[3];
744 uint32_t jedec;
745 struct flash_info *info;
746 int status;
748 /* JEDEC also defines an optional "extended device information"
749 * string for after vendor-specific data, after the three bytes
750 * we use here. Supporting some chips might require using it.
752 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
753 * That's not an error; only rev C and newer chips handle it, and
754 * only Atmel sells these chips.
756 tmp = spi_write_then_read(spi, &code, 1, id, 3);
757 if (tmp < 0) {
758 pr_debug("%s: error %d reading JEDEC ID\n",
759 dev_name(&spi->dev), tmp);
760 return ERR_PTR(tmp);
762 if (id[0] != 0x1f)
763 return NULL;
765 jedec = id[0];
766 jedec = jedec << 8;
767 jedec |= id[1];
768 jedec = jedec << 8;
769 jedec |= id[2];
771 for (tmp = 0, info = dataflash_data;
772 tmp < ARRAY_SIZE(dataflash_data);
773 tmp++, info++) {
774 if (info->jedec_id == jedec) {
775 pr_debug("%s: OTP, sector protect%s\n",
776 dev_name(&spi->dev),
777 (info->flags & SUP_POW2PS)
778 ? ", binary pagesize" : ""
780 if (info->flags & SUP_POW2PS) {
781 status = dataflash_status(spi);
782 if (status < 0) {
783 pr_debug("%s: status error %d\n",
784 dev_name(&spi->dev), status);
785 return ERR_PTR(status);
787 if (status & 0x1) {
788 if (info->flags & IS_POW2PS)
789 return info;
790 } else {
791 if (!(info->flags & IS_POW2PS))
792 return info;
794 } else
795 return info;
800 * Treat other chips as errors ... we won't know the right page
801 * size (it might be binary) even when we can tell which density
802 * class is involved (legacy chip id scheme).
804 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
805 return ERR_PTR(-ENODEV);
809 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
810 * or else the ID code embedded in the status bits:
812 * Device Density ID code #Pages PageSize Offset
813 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
814 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
815 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
816 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
817 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
818 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
819 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
820 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
822 static int dataflash_probe(struct spi_device *spi)
824 int status;
825 struct flash_info *info;
828 * Try to detect dataflash by JEDEC ID.
829 * If it succeeds we know we have either a C or D part.
830 * D will support power of 2 pagesize option.
831 * Both support the security register, though with different
832 * write procedures.
834 info = jedec_probe(spi);
835 if (IS_ERR(info))
836 return PTR_ERR(info);
837 if (info != NULL)
838 return add_dataflash_otp(spi, info->name, info->nr_pages,
839 info->pagesize, info->pageoffset,
840 (info->flags & SUP_POW2PS) ? 'd' : 'c');
843 * Older chips support only legacy commands, identifing
844 * capacity using bits in the status byte.
846 status = dataflash_status(spi);
847 if (status <= 0 || status == 0xff) {
848 pr_debug("%s: status error %d\n",
849 dev_name(&spi->dev), status);
850 if (status == 0 || status == 0xff)
851 status = -ENODEV;
852 return status;
855 /* if there's a device there, assume it's dataflash.
856 * board setup should have set spi->max_speed_max to
857 * match f(car) for continuous reads, mode 0 or 3.
859 switch (status & 0x3c) {
860 case 0x0c: /* 0 0 1 1 x x */
861 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
862 break;
863 case 0x14: /* 0 1 0 1 x x */
864 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
865 break;
866 case 0x1c: /* 0 1 1 1 x x */
867 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
868 break;
869 case 0x24: /* 1 0 0 1 x x */
870 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
871 break;
872 case 0x2c: /* 1 0 1 1 x x */
873 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
874 break;
875 case 0x34: /* 1 1 0 1 x x */
876 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
877 break;
878 case 0x38: /* 1 1 1 x x x */
879 case 0x3c:
880 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
881 break;
882 /* obsolete AT45DB1282 not (yet?) supported */
883 default:
884 pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev),
885 status & 0x3c);
886 status = -ENODEV;
889 if (status < 0)
890 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
891 status);
893 return status;
896 static int dataflash_remove(struct spi_device *spi)
898 struct dataflash *flash = spi_get_drvdata(spi);
899 int status;
901 pr_debug("%s: remove\n", dev_name(&spi->dev));
903 status = mtd_device_unregister(&flash->mtd);
904 if (status == 0) {
905 spi_set_drvdata(spi, NULL);
906 kfree(flash);
908 return status;
911 static struct spi_driver dataflash_driver = {
912 .driver = {
913 .name = "mtd_dataflash",
914 .owner = THIS_MODULE,
915 .of_match_table = of_match_ptr(dataflash_dt_ids),
918 .probe = dataflash_probe,
919 .remove = dataflash_remove,
921 /* FIXME: investigate suspend and resume... */
924 module_spi_driver(dataflash_driver);
926 MODULE_LICENSE("GPL");
927 MODULE_AUTHOR("Andrew Victor, David Brownell");
928 MODULE_DESCRIPTION("MTD DataFlash driver");
929 MODULE_ALIAS("spi:mtd_dataflash");