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arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / powerpc / kvm / book3s_hv.c
blob2cefd071b84835000367aa2778db69784bdd163c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
5 *
6 * Authors:
7 * Paul Mackerras <paulus@au1.ibm.com>
8 * Alexander Graf <agraf@suse.de>
9 * Kevin Wolf <mail@kevin-wolf.de>
10 *
11 * Description: KVM functions specific to running on Book 3S
12 * processors in hypervisor mode (specifically POWER7 and later).
13 *
14 * This file is derived from arch/powerpc/kvm/book3s.c,
15 * by Alexander Graf <agraf@suse.de>.
16 */
17
18 #include <linux/kvm_host.h>
19 #include <linux/kernel.h>
20 #include <linux/err.h>
21 #include <linux/slab.h>
22 #include <linux/preempt.h>
23 #include <linux/sched/signal.h>
24 #include <linux/sched/stat.h>
25 #include <linux/delay.h>
26 #include <linux/export.h>
27 #include <linux/fs.h>
28 #include <linux/anon_inodes.h>
29 #include <linux/cpu.h>
30 #include <linux/cpumask.h>
31 #include <linux/spinlock.h>
32 #include <linux/page-flags.h>
33 #include <linux/srcu.h>
34 #include <linux/miscdevice.h>
35 #include <linux/debugfs.h>
36 #include <linux/gfp.h>
37 #include <linux/vmalloc.h>
38 #include <linux/highmem.h>
39 #include <linux/hugetlb.h>
40 #include <linux/kvm_irqfd.h>
41 #include <linux/irqbypass.h>
42 #include <linux/module.h>
43 #include <linux/compiler.h>
44 #include <linux/of.h>
45
46 #include <asm/ftrace.h>
47 #include <asm/reg.h>
48 #include <asm/ppc-opcode.h>
49 #include <asm/asm-prototypes.h>
50 #include <asm/archrandom.h>
51 #include <asm/debug.h>
52 #include <asm/disassemble.h>
53 #include <asm/cputable.h>
54 #include <asm/cacheflush.h>
55 #include <linux/uaccess.h>
56 #include <asm/io.h>
57 #include <asm/kvm_ppc.h>
58 #include <asm/kvm_book3s.h>
59 #include <asm/mmu_context.h>
60 #include <asm/lppaca.h>
61 #include <asm/processor.h>
62 #include <asm/cputhreads.h>
63 #include <asm/page.h>
64 #include <asm/hvcall.h>
65 #include <asm/switch_to.h>
66 #include <asm/smp.h>
67 #include <asm/dbell.h>
68 #include <asm/hmi.h>
69 #include <asm/pnv-pci.h>
70 #include <asm/mmu.h>
71 #include <asm/opal.h>
72 #include <asm/xics.h>
73 #include <asm/xive.h>
74 #include <asm/hw_breakpoint.h>
75 #include <asm/kvm_host.h>
76 #include <asm/kvm_book3s_uvmem.h>
77 #include <asm/ultravisor.h>
78
79 #include "book3s.h"
80
81 #define CREATE_TRACE_POINTS
82 #include "trace_hv.h"
83
84 /* #define EXIT_DEBUG */
85 /* #define EXIT_DEBUG_SIMPLE */
86 /* #define EXIT_DEBUG_INT */
87
88 /* Used to indicate that a guest page fault needs to be handled */
89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1)
90 /* Used to indicate that a guest passthrough interrupt needs to be handled */
91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2)
92
93 /* Used as a "null" value for timebase values */
94 #define TB_NIL (~(u64)0)
95
96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
97
98 static int dynamic_mt_modes = 6;
99 module_param(dynamic_mt_modes, int, 0644);
100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
101 static int target_smt_mode;
102 module_param(target_smt_mode, int, 0644);
103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
104
105 static bool indep_threads_mode = true;
106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
108
109 static bool one_vm_per_core;
110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR);
111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)");
112
113 #ifdef CONFIG_KVM_XICS
114 static struct kernel_param_ops module_param_ops = {
115 .set = param_set_int,
116 .get = param_get_int,
117 };
118
119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
121
122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
124 #endif
125
126 /* If set, guests are allowed to create and control nested guests */
127 static bool nested = true;
128 module_param(nested, bool, S_IRUGO | S_IWUSR);
129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)");
130
131 static inline bool nesting_enabled(struct kvm *kvm)
132 {
133 return kvm->arch.nested_enable && kvm_is_radix(kvm);
134 }
135
136 /* If set, the threads on each CPU core have to be in the same MMU mode */
137 static bool no_mixing_hpt_and_radix;
138
139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
140
141 /*
142 * RWMR values for POWER8. These control the rate at which PURR
143 * and SPURR count and should be set according to the number of
144 * online threads in the vcore being run.
145 */
146 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL
147 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL
148 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL
149 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL
150 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL
151 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL
152 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL
153 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL
154
155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = {
156 RWMR_RPA_P8_1THREAD,
157 RWMR_RPA_P8_1THREAD,
158 RWMR_RPA_P8_2THREAD,
159 RWMR_RPA_P8_3THREAD,
160 RWMR_RPA_P8_4THREAD,
161 RWMR_RPA_P8_5THREAD,
162 RWMR_RPA_P8_6THREAD,
163 RWMR_RPA_P8_7THREAD,
164 RWMR_RPA_P8_8THREAD,
165 };
166
167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
168 int *ip)
169 {
170 int i = *ip;
171 struct kvm_vcpu *vcpu;
172
173 while (++i < MAX_SMT_THREADS) {
174 vcpu = READ_ONCE(vc->runnable_threads[i]);
175 if (vcpu) {
176 *ip = i;
177 return vcpu;
178 }
179 }
180 return NULL;
181 }
182
183 /* Used to traverse the list of runnable threads for a given vcore */
184 #define for_each_runnable_thread(i, vcpu, vc) \
185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
186
187 static bool kvmppc_ipi_thread(int cpu)
188 {
189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
190
191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */
192 if (kvmhv_on_pseries())
193 return false;
194
195 /* On POWER9 we can use msgsnd to IPI any cpu */
196 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
197 msg |= get_hard_smp_processor_id(cpu);
198 smp_mb();
199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
200 return true;
201 }
202
203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */
204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
205 preempt_disable();
206 if (cpu_first_thread_sibling(cpu) ==
207 cpu_first_thread_sibling(smp_processor_id())) {
208 msg |= cpu_thread_in_core(cpu);
209 smp_mb();
210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
211 preempt_enable();
212 return true;
213 }
214 preempt_enable();
215 }
216
217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
218 if (cpu >= 0 && cpu < nr_cpu_ids) {
219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) {
220 xics_wake_cpu(cpu);
221 return true;
222 }
223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
224 return true;
225 }
226 #endif
227
228 return false;
229 }
230
231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
232 {
233 int cpu;
234 struct swait_queue_head *wqp;
235
236 wqp = kvm_arch_vcpu_wq(vcpu);
237 if (swq_has_sleeper(wqp)) {
238 swake_up_one(wqp);
239 ++vcpu->stat.halt_wakeup;
240 }
241
242 cpu = READ_ONCE(vcpu->arch.thread_cpu);
243 if (cpu >= 0 && kvmppc_ipi_thread(cpu))
244 return;
245
246 /* CPU points to the first thread of the core */
247 cpu = vcpu->cpu;
248 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
249 smp_send_reschedule(cpu);
250 }
251
252 /*
253 * We use the vcpu_load/put functions to measure stolen time.
254 * Stolen time is counted as time when either the vcpu is able to
255 * run as part of a virtual core, but the task running the vcore
256 * is preempted or sleeping, or when the vcpu needs something done
257 * in the kernel by the task running the vcpu, but that task is
258 * preempted or sleeping. Those two things have to be counted
259 * separately, since one of the vcpu tasks will take on the job
260 * of running the core, and the other vcpu tasks in the vcore will
261 * sleep waiting for it to do that, but that sleep shouldn't count
262 * as stolen time.
263 *
264 * Hence we accumulate stolen time when the vcpu can run as part of
265 * a vcore using vc->stolen_tb, and the stolen time when the vcpu
266 * needs its task to do other things in the kernel (for example,
267 * service a page fault) in busy_stolen. We don't accumulate
268 * stolen time for a vcore when it is inactive, or for a vcpu
269 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of
270 * a misnomer; it means that the vcpu task is not executing in
271 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
272 * the kernel. We don't have any way of dividing up that time
273 * between time that the vcpu is genuinely stopped, time that
274 * the task is actively working on behalf of the vcpu, and time
275 * that the task is preempted, so we don't count any of it as
276 * stolen.
277 *
278 * Updates to busy_stolen are protected by arch.tbacct_lock;
279 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
280 * lock. The stolen times are measured in units of timebase ticks.
281 * (Note that the != TB_NIL checks below are purely defensive;
282 * they should never fail.)
283 */
284
285 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
286 {
287 unsigned long flags;
288
289 spin_lock_irqsave(&vc->stoltb_lock, flags);
290 vc->preempt_tb = mftb();
291 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
292 }
293
294 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
295 {
296 unsigned long flags;
297
298 spin_lock_irqsave(&vc->stoltb_lock, flags);
299 if (vc->preempt_tb != TB_NIL) {
300 vc->stolen_tb += mftb() - vc->preempt_tb;
301 vc->preempt_tb = TB_NIL;
302 }
303 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
304 }
305
306 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
307 {
308 struct kvmppc_vcore *vc = vcpu->arch.vcore;
309 unsigned long flags;
310
311 /*
312 * We can test vc->runner without taking the vcore lock,
313 * because only this task ever sets vc->runner to this
314 * vcpu, and once it is set to this vcpu, only this task
315 * ever sets it to NULL.
316 */
317 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
318 kvmppc_core_end_stolen(vc);
319
320 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
321 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
322 vcpu->arch.busy_preempt != TB_NIL) {
323 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
324 vcpu->arch.busy_preempt = TB_NIL;
325 }
326 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
327 }
328
329 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
330 {
331 struct kvmppc_vcore *vc = vcpu->arch.vcore;
332 unsigned long flags;
333
334 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
335 kvmppc_core_start_stolen(vc);
336
337 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
338 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
339 vcpu->arch.busy_preempt = mftb();
340 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
341 }
342
343 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
344 {
345 vcpu->arch.pvr = pvr;
346 }
347
348 /* Dummy value used in computing PCR value below */
349 #define PCR_ARCH_300 (PCR_ARCH_207 << 1)
350
351 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
352 {
353 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
354 struct kvmppc_vcore *vc = vcpu->arch.vcore;
355
356 /* We can (emulate) our own architecture version and anything older */
357 if (cpu_has_feature(CPU_FTR_ARCH_300))
358 host_pcr_bit = PCR_ARCH_300;
359 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
360 host_pcr_bit = PCR_ARCH_207;
361 else if (cpu_has_feature(CPU_FTR_ARCH_206))
362 host_pcr_bit = PCR_ARCH_206;
363 else
364 host_pcr_bit = PCR_ARCH_205;
365
366 /* Determine lowest PCR bit needed to run guest in given PVR level */
367 guest_pcr_bit = host_pcr_bit;
368 if (arch_compat) {
369 switch (arch_compat) {
370 case PVR_ARCH_205:
371 guest_pcr_bit = PCR_ARCH_205;
372 break;
373 case PVR_ARCH_206:
374 case PVR_ARCH_206p:
375 guest_pcr_bit = PCR_ARCH_206;
376 break;
377 case PVR_ARCH_207:
378 guest_pcr_bit = PCR_ARCH_207;
379 break;
380 case PVR_ARCH_300:
381 guest_pcr_bit = PCR_ARCH_300;
382 break;
383 default:
384 return -EINVAL;
385 }
386 }
387
388 /* Check requested PCR bits don't exceed our capabilities */
389 if (guest_pcr_bit > host_pcr_bit)
390 return -EINVAL;
391
392 spin_lock(&vc->lock);
393 vc->arch_compat = arch_compat;
394 /*
395 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit
396 * Also set all reserved PCR bits
397 */
398 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK;
399 spin_unlock(&vc->lock);
400
401 return 0;
402 }
403
404 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
405 {
406 int r;
407
408 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
409 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
410 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
411 for (r = 0; r < 16; ++r)
412 pr_err("r%2d = %.16lx r%d = %.16lx\n",
413 r, kvmppc_get_gpr(vcpu, r),
414 r+16, kvmppc_get_gpr(vcpu, r+16));
415 pr_err("ctr = %.16lx lr = %.16lx\n",
416 vcpu->arch.regs.ctr, vcpu->arch.regs.link);
417 pr_err("srr0 = %.16llx srr1 = %.16llx\n",
418 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
419 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
420 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
421 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
422 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
423 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n",
424 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
425 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
426 pr_err("fault dar = %.16lx dsisr = %.8x\n",
427 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
428 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
429 for (r = 0; r < vcpu->arch.slb_max; ++r)
430 pr_err(" ESID = %.16llx VSID = %.16llx\n",
431 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
432 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
433 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
434 vcpu->arch.last_inst);
435 }
436
437 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
438 {
439 return kvm_get_vcpu_by_id(kvm, id);
440 }
441
442 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
443 {
444 vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
445 vpa->yield_count = cpu_to_be32(1);
446 }
447
448 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
449 unsigned long addr, unsigned long len)
450 {
451 /* check address is cacheline aligned */
452 if (addr & (L1_CACHE_BYTES - 1))
453 return -EINVAL;
454 spin_lock(&vcpu->arch.vpa_update_lock);
455 if (v->next_gpa != addr || v->len != len) {
456 v->next_gpa = addr;
457 v->len = addr ? len : 0;
458 v->update_pending = 1;
459 }
460 spin_unlock(&vcpu->arch.vpa_update_lock);
461 return 0;
462 }
463
464 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */
465 struct reg_vpa {
466 u32 dummy;
467 union {
468 __be16 hword;
469 __be32 word;
470 } length;
471 };
472
473 static int vpa_is_registered(struct kvmppc_vpa *vpap)
474 {
475 if (vpap->update_pending)
476 return vpap->next_gpa != 0;
477 return vpap->pinned_addr != NULL;
478 }
479
480 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
481 unsigned long flags,
482 unsigned long vcpuid, unsigned long vpa)
483 {
484 struct kvm *kvm = vcpu->kvm;
485 unsigned long len, nb;
486 void *va;
487 struct kvm_vcpu *tvcpu;
488 int err;
489 int subfunc;
490 struct kvmppc_vpa *vpap;
491
492 tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
493 if (!tvcpu)
494 return H_PARAMETER;
495
496 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
497 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
498 subfunc == H_VPA_REG_SLB) {
499 /* Registering new area - address must be cache-line aligned */
500 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
501 return H_PARAMETER;
502
503 /* convert logical addr to kernel addr and read length */
504 va = kvmppc_pin_guest_page(kvm, vpa, &nb);
505 if (va == NULL)
506 return H_PARAMETER;
507 if (subfunc == H_VPA_REG_VPA)
508 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
509 else
510 len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
511 kvmppc_unpin_guest_page(kvm, va, vpa, false);
512
513 /* Check length */
514 if (len > nb || len < sizeof(struct reg_vpa))
515 return H_PARAMETER;
516 } else {
517 vpa = 0;
518 len = 0;
519 }
520
521 err = H_PARAMETER;
522 vpap = NULL;
523 spin_lock(&tvcpu->arch.vpa_update_lock);
524
525 switch (subfunc) {
526 case H_VPA_REG_VPA: /* register VPA */
527 /*
528 * The size of our lppaca is 1kB because of the way we align
529 * it for the guest to avoid crossing a 4kB boundary. We only
530 * use 640 bytes of the structure though, so we should accept
531 * clients that set a size of 640.
532 */
533 BUILD_BUG_ON(sizeof(struct lppaca) != 640);
534 if (len < sizeof(struct lppaca))
535 break;
536 vpap = &tvcpu->arch.vpa;
537 err = 0;
538 break;
539
540 case H_VPA_REG_DTL: /* register DTL */
541 if (len < sizeof(struct dtl_entry))
542 break;
543 len -= len % sizeof(struct dtl_entry);
544
545 /* Check that they have previously registered a VPA */
546 err = H_RESOURCE;
547 if (!vpa_is_registered(&tvcpu->arch.vpa))
548 break;
549
550 vpap = &tvcpu->arch.dtl;
551 err = 0;
552 break;
553
554 case H_VPA_REG_SLB: /* register SLB shadow buffer */
555 /* Check that they have previously registered a VPA */
556 err = H_RESOURCE;
557 if (!vpa_is_registered(&tvcpu->arch.vpa))
558 break;
559
560 vpap = &tvcpu->arch.slb_shadow;
561 err = 0;
562 break;
563
564 case H_VPA_DEREG_VPA: /* deregister VPA */
565 /* Check they don't still have a DTL or SLB buf registered */
566 err = H_RESOURCE;
567 if (vpa_is_registered(&tvcpu->arch.dtl) ||
568 vpa_is_registered(&tvcpu->arch.slb_shadow))
569 break;
570
571 vpap = &tvcpu->arch.vpa;
572 err = 0;
573 break;
574
575 case H_VPA_DEREG_DTL: /* deregister DTL */
576 vpap = &tvcpu->arch.dtl;
577 err = 0;
578 break;
579
580 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */
581 vpap = &tvcpu->arch.slb_shadow;
582 err = 0;
583 break;
584 }
585
586 if (vpap) {
587 vpap->next_gpa = vpa;
588 vpap->len = len;
589 vpap->update_pending = 1;
590 }
591
592 spin_unlock(&tvcpu->arch.vpa_update_lock);
593
594 return err;
595 }
596
597 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
598 {
599 struct kvm *kvm = vcpu->kvm;
600 void *va;
601 unsigned long nb;
602 unsigned long gpa;
603
604 /*
605 * We need to pin the page pointed to by vpap->next_gpa,
606 * but we can't call kvmppc_pin_guest_page under the lock
607 * as it does get_user_pages() and down_read(). So we
608 * have to drop the lock, pin the page, then get the lock
609 * again and check that a new area didn't get registered
610 * in the meantime.
611 */
612 for (;;) {
613 gpa = vpap->next_gpa;
614 spin_unlock(&vcpu->arch.vpa_update_lock);
615 va = NULL;
616 nb = 0;
617 if (gpa)
618 va = kvmppc_pin_guest_page(kvm, gpa, &nb);
619 spin_lock(&vcpu->arch.vpa_update_lock);
620 if (gpa == vpap->next_gpa)
621 break;
622 /* sigh... unpin that one and try again */
623 if (va)
624 kvmppc_unpin_guest_page(kvm, va, gpa, false);
625 }
626
627 vpap->update_pending = 0;
628 if (va && nb < vpap->len) {
629 /*
630 * If it's now too short, it must be that userspace
631 * has changed the mappings underlying guest memory,
632 * so unregister the region.
633 */
634 kvmppc_unpin_guest_page(kvm, va, gpa, false);
635 va = NULL;
636 }
637 if (vpap->pinned_addr)
638 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
639 vpap->dirty);
640 vpap->gpa = gpa;
641 vpap->pinned_addr = va;
642 vpap->dirty = false;
643 if (va)
644 vpap->pinned_end = va + vpap->len;
645 }
646
647 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
648 {
649 if (!(vcpu->arch.vpa.update_pending ||
650 vcpu->arch.slb_shadow.update_pending ||
651 vcpu->arch.dtl.update_pending))
652 return;
653
654 spin_lock(&vcpu->arch.vpa_update_lock);
655 if (vcpu->arch.vpa.update_pending) {
656 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
657 if (vcpu->arch.vpa.pinned_addr)
658 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
659 }
660 if (vcpu->arch.dtl.update_pending) {
661 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
662 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
663 vcpu->arch.dtl_index = 0;
664 }
665 if (vcpu->arch.slb_shadow.update_pending)
666 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
667 spin_unlock(&vcpu->arch.vpa_update_lock);
668 }
669
670 /*
671 * Return the accumulated stolen time for the vcore up until `now'.
672 * The caller should hold the vcore lock.
673 */
674 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
675 {
676 u64 p;
677 unsigned long flags;
678
679 spin_lock_irqsave(&vc->stoltb_lock, flags);
680 p = vc->stolen_tb;
681 if (vc->vcore_state != VCORE_INACTIVE &&
682 vc->preempt_tb != TB_NIL)
683 p += now - vc->preempt_tb;
684 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
685 return p;
686 }
687
688 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
689 struct kvmppc_vcore *vc)
690 {
691 struct dtl_entry *dt;
692 struct lppaca *vpa;
693 unsigned long stolen;
694 unsigned long core_stolen;
695 u64 now;
696 unsigned long flags;
697
698 dt = vcpu->arch.dtl_ptr;
699 vpa = vcpu->arch.vpa.pinned_addr;
700 now = mftb();
701 core_stolen = vcore_stolen_time(vc, now);
702 stolen = core_stolen - vcpu->arch.stolen_logged;
703 vcpu->arch.stolen_logged = core_stolen;
704 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
705 stolen += vcpu->arch.busy_stolen;
706 vcpu->arch.busy_stolen = 0;
707 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
708 if (!dt || !vpa)
709 return;
710 memset(dt, 0, sizeof(struct dtl_entry));
711 dt->dispatch_reason = 7;
712 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
713 dt->timebase = cpu_to_be64(now + vc->tb_offset);
714 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
715 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
716 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
717 ++dt;
718 if (dt == vcpu->arch.dtl.pinned_end)
719 dt = vcpu->arch.dtl.pinned_addr;
720 vcpu->arch.dtl_ptr = dt;
721 /* order writing *dt vs. writing vpa->dtl_idx */
722 smp_wmb();
723 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
724 vcpu->arch.dtl.dirty = true;
725 }
726
727 /* See if there is a doorbell interrupt pending for a vcpu */
728 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
729 {
730 int thr;
731 struct kvmppc_vcore *vc;
732
733 if (vcpu->arch.doorbell_request)
734 return true;
735 /*
736 * Ensure that the read of vcore->dpdes comes after the read
737 * of vcpu->doorbell_request. This barrier matches the
738 * smp_wmb() in kvmppc_guest_entry_inject().
739 */
740 smp_rmb();
741 vc = vcpu->arch.vcore;
742 thr = vcpu->vcpu_id - vc->first_vcpuid;
743 return !!(vc->dpdes & (1 << thr));
744 }
745
746 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
747 {
748 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
749 return true;
750 if ((!vcpu->arch.vcore->arch_compat) &&
751 cpu_has_feature(CPU_FTR_ARCH_207S))
752 return true;
753 return false;
754 }
755
756 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
757 unsigned long resource, unsigned long value1,
758 unsigned long value2)
759 {
760 switch (resource) {
761 case H_SET_MODE_RESOURCE_SET_CIABR:
762 if (!kvmppc_power8_compatible(vcpu))
763 return H_P2;
764 if (value2)
765 return H_P4;
766 if (mflags)
767 return H_UNSUPPORTED_FLAG_START;
768 /* Guests can't breakpoint the hypervisor */
769 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
770 return H_P3;
771 vcpu->arch.ciabr = value1;
772 return H_SUCCESS;
773 case H_SET_MODE_RESOURCE_SET_DAWR:
774 if (!kvmppc_power8_compatible(vcpu))
775 return H_P2;
776 if (!ppc_breakpoint_available())
777 return H_P2;
778 if (mflags)
779 return H_UNSUPPORTED_FLAG_START;
780 if (value2 & DABRX_HYP)
781 return H_P4;
782 vcpu->arch.dawr = value1;
783 vcpu->arch.dawrx = value2;
784 return H_SUCCESS;
785 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE:
786 /* KVM does not support mflags=2 (AIL=2) */
787 if (mflags != 0 && mflags != 3)
788 return H_UNSUPPORTED_FLAG_START;
789 return H_TOO_HARD;
790 default:
791 return H_TOO_HARD;
792 }
793 }
794
795 /* Copy guest memory in place - must reside within a single memslot */
796 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from,
797 unsigned long len)
798 {
799 struct kvm_memory_slot *to_memslot = NULL;
800 struct kvm_memory_slot *from_memslot = NULL;
801 unsigned long to_addr, from_addr;
802 int r;
803
804 /* Get HPA for from address */
805 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT);
806 if (!from_memslot)
807 return -EFAULT;
808 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages)
809 << PAGE_SHIFT))
810 return -EINVAL;
811 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT);
812 if (kvm_is_error_hva(from_addr))
813 return -EFAULT;
814 from_addr |= (from & (PAGE_SIZE - 1));
815
816 /* Get HPA for to address */
817 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT);
818 if (!to_memslot)
819 return -EFAULT;
820 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages)
821 << PAGE_SHIFT))
822 return -EINVAL;
823 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT);
824 if (kvm_is_error_hva(to_addr))
825 return -EFAULT;
826 to_addr |= (to & (PAGE_SIZE - 1));
827
828 /* Perform copy */
829 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr,
830 len);
831 if (r)
832 return -EFAULT;
833 mark_page_dirty(kvm, to >> PAGE_SHIFT);
834 return 0;
835 }
836
837 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags,
838 unsigned long dest, unsigned long src)
839 {
840 u64 pg_sz = SZ_4K; /* 4K page size */
841 u64 pg_mask = SZ_4K - 1;
842 int ret;
843
844 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */
845 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE |
846 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED))
847 return H_PARAMETER;
848
849 /* dest (and src if copy_page flag set) must be page aligned */
850 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask)))
851 return H_PARAMETER;
852
853 /* zero and/or copy the page as determined by the flags */
854 if (flags & H_COPY_PAGE) {
855 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz);
856 if (ret < 0)
857 return H_PARAMETER;
858 } else if (flags & H_ZERO_PAGE) {
859 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz);
860 if (ret < 0)
861 return H_PARAMETER;
862 }
863
864 /* We can ignore the remaining flags */
865
866 return H_SUCCESS;
867 }
868
869 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
870 {
871 struct kvmppc_vcore *vcore = target->arch.vcore;
872
873 /*
874 * We expect to have been called by the real mode handler
875 * (kvmppc_rm_h_confer()) which would have directly returned
876 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
877 * have useful work to do and should not confer) so we don't
878 * recheck that here.
879 */
880
881 spin_lock(&vcore->lock);
882 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
883 vcore->vcore_state != VCORE_INACTIVE &&
884 vcore->runner)
885 target = vcore->runner;
886 spin_unlock(&vcore->lock);
887
888 return kvm_vcpu_yield_to(target);
889 }
890
891 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
892 {
893 int yield_count = 0;
894 struct lppaca *lppaca;
895
896 spin_lock(&vcpu->arch.vpa_update_lock);
897 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
898 if (lppaca)
899 yield_count = be32_to_cpu(lppaca->yield_count);
900 spin_unlock(&vcpu->arch.vpa_update_lock);
901 return yield_count;
902 }
903
904 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
905 {
906 unsigned long req = kvmppc_get_gpr(vcpu, 3);
907 unsigned long target, ret = H_SUCCESS;
908 int yield_count;
909 struct kvm_vcpu *tvcpu;
910 int idx, rc;
911
912 if (req <= MAX_HCALL_OPCODE &&
913 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
914 return RESUME_HOST;
915
916 switch (req) {
917 case H_CEDE:
918 break;
919 case H_PROD:
920 target = kvmppc_get_gpr(vcpu, 4);
921 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
922 if (!tvcpu) {
923 ret = H_PARAMETER;
924 break;
925 }
926 tvcpu->arch.prodded = 1;
927 smp_mb();
928 if (tvcpu->arch.ceded)
929 kvmppc_fast_vcpu_kick_hv(tvcpu);
930 break;
931 case H_CONFER:
932 target = kvmppc_get_gpr(vcpu, 4);
933 if (target == -1)
934 break;
935 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
936 if (!tvcpu) {
937 ret = H_PARAMETER;
938 break;
939 }
940 yield_count = kvmppc_get_gpr(vcpu, 5);
941 if (kvmppc_get_yield_count(tvcpu) != yield_count)
942 break;
943 kvm_arch_vcpu_yield_to(tvcpu);
944 break;
945 case H_REGISTER_VPA:
946 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
947 kvmppc_get_gpr(vcpu, 5),
948 kvmppc_get_gpr(vcpu, 6));
949 break;
950 case H_RTAS:
951 if (list_empty(&vcpu->kvm->arch.rtas_tokens))
952 return RESUME_HOST;
953
954 idx = srcu_read_lock(&vcpu->kvm->srcu);
955 rc = kvmppc_rtas_hcall(vcpu);
956 srcu_read_unlock(&vcpu->kvm->srcu, idx);
957
958 if (rc == -ENOENT)
959 return RESUME_HOST;
960 else if (rc == 0)
961 break;
962
963 /* Send the error out to userspace via KVM_RUN */
964 return rc;
965 case H_LOGICAL_CI_LOAD:
966 ret = kvmppc_h_logical_ci_load(vcpu);
967 if (ret == H_TOO_HARD)
968 return RESUME_HOST;
969 break;
970 case H_LOGICAL_CI_STORE:
971 ret = kvmppc_h_logical_ci_store(vcpu);
972 if (ret == H_TOO_HARD)
973 return RESUME_HOST;
974 break;
975 case H_SET_MODE:
976 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
977 kvmppc_get_gpr(vcpu, 5),
978 kvmppc_get_gpr(vcpu, 6),
979 kvmppc_get_gpr(vcpu, 7));
980 if (ret == H_TOO_HARD)
981 return RESUME_HOST;
982 break;
983 case H_XIRR:
984 case H_CPPR:
985 case H_EOI:
986 case H_IPI:
987 case H_IPOLL:
988 case H_XIRR_X:
989 if (kvmppc_xics_enabled(vcpu)) {
990 if (xics_on_xive()) {
991 ret = H_NOT_AVAILABLE;
992 return RESUME_GUEST;
993 }
994 ret = kvmppc_xics_hcall(vcpu, req);
995 break;
996 }
997 return RESUME_HOST;
998 case H_SET_DABR:
999 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4));
1000 break;
1001 case H_SET_XDABR:
1002 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4),
1003 kvmppc_get_gpr(vcpu, 5));
1004 break;
1005 #ifdef CONFIG_SPAPR_TCE_IOMMU
1006 case H_GET_TCE:
1007 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
1008 kvmppc_get_gpr(vcpu, 5));
1009 if (ret == H_TOO_HARD)
1010 return RESUME_HOST;
1011 break;
1012 case H_PUT_TCE:
1013 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
1014 kvmppc_get_gpr(vcpu, 5),
1015 kvmppc_get_gpr(vcpu, 6));
1016 if (ret == H_TOO_HARD)
1017 return RESUME_HOST;
1018 break;
1019 case H_PUT_TCE_INDIRECT:
1020 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
1021 kvmppc_get_gpr(vcpu, 5),
1022 kvmppc_get_gpr(vcpu, 6),
1023 kvmppc_get_gpr(vcpu, 7));
1024 if (ret == H_TOO_HARD)
1025 return RESUME_HOST;
1026 break;
1027 case H_STUFF_TCE:
1028 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
1029 kvmppc_get_gpr(vcpu, 5),
1030 kvmppc_get_gpr(vcpu, 6),
1031 kvmppc_get_gpr(vcpu, 7));
1032 if (ret == H_TOO_HARD)
1033 return RESUME_HOST;
1034 break;
1035 #endif
1036 case H_RANDOM:
1037 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4]))
1038 ret = H_HARDWARE;
1039 break;
1040
1041 case H_SET_PARTITION_TABLE:
1042 ret = H_FUNCTION;
1043 if (nesting_enabled(vcpu->kvm))
1044 ret = kvmhv_set_partition_table(vcpu);
1045 break;
1046 case H_ENTER_NESTED:
1047 ret = H_FUNCTION;
1048 if (!nesting_enabled(vcpu->kvm))
1049 break;
1050 ret = kvmhv_enter_nested_guest(vcpu);
1051 if (ret == H_INTERRUPT) {
1052 kvmppc_set_gpr(vcpu, 3, 0);
1053 vcpu->arch.hcall_needed = 0;
1054 return -EINTR;
1055 } else if (ret == H_TOO_HARD) {
1056 kvmppc_set_gpr(vcpu, 3, 0);
1057 vcpu->arch.hcall_needed = 0;
1058 return RESUME_HOST;
1059 }
1060 break;
1061 case H_TLB_INVALIDATE:
1062 ret = H_FUNCTION;
1063 if (nesting_enabled(vcpu->kvm))
1064 ret = kvmhv_do_nested_tlbie(vcpu);
1065 break;
1066 case H_COPY_TOFROM_GUEST:
1067 ret = H_FUNCTION;
1068 if (nesting_enabled(vcpu->kvm))
1069 ret = kvmhv_copy_tofrom_guest_nested(vcpu);
1070 break;
1071 case H_PAGE_INIT:
1072 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4),
1073 kvmppc_get_gpr(vcpu, 5),
1074 kvmppc_get_gpr(vcpu, 6));
1075 break;
1076 case H_SVM_PAGE_IN:
1077 ret = kvmppc_h_svm_page_in(vcpu->kvm,
1078 kvmppc_get_gpr(vcpu, 4),
1079 kvmppc_get_gpr(vcpu, 5),
1080 kvmppc_get_gpr(vcpu, 6));
1081 break;
1082 case H_SVM_PAGE_OUT:
1083 ret = kvmppc_h_svm_page_out(vcpu->kvm,
1084 kvmppc_get_gpr(vcpu, 4),
1085 kvmppc_get_gpr(vcpu, 5),
1086 kvmppc_get_gpr(vcpu, 6));
1087 break;
1088 case H_SVM_INIT_START:
1089 ret = kvmppc_h_svm_init_start(vcpu->kvm);
1090 break;
1091 case H_SVM_INIT_DONE:
1092 ret = kvmppc_h_svm_init_done(vcpu->kvm);
1093 break;
1094 case H_SVM_INIT_ABORT:
1095 ret = kvmppc_h_svm_init_abort(vcpu->kvm);
1096 break;
1097
1098 default:
1099 return RESUME_HOST;
1100 }
1101 kvmppc_set_gpr(vcpu, 3, ret);
1102 vcpu->arch.hcall_needed = 0;
1103 return RESUME_GUEST;
1104 }
1105
1106 /*
1107 * Handle H_CEDE in the nested virtualization case where we haven't
1108 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S.
1109 * This has to be done early, not in kvmppc_pseries_do_hcall(), so
1110 * that the cede logic in kvmppc_run_single_vcpu() works properly.
1111 */
1112 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu)
1113 {
1114 vcpu->arch.shregs.msr |= MSR_EE;
1115 vcpu->arch.ceded = 1;
1116 smp_mb();
1117 if (vcpu->arch.prodded) {
1118 vcpu->arch.prodded = 0;
1119 smp_mb();
1120 vcpu->arch.ceded = 0;
1121 }
1122 }
1123
1124 static int kvmppc_hcall_impl_hv(unsigned long cmd)
1125 {
1126 switch (cmd) {
1127 case H_CEDE:
1128 case H_PROD:
1129 case H_CONFER:
1130 case H_REGISTER_VPA:
1131 case H_SET_MODE:
1132 case H_LOGICAL_CI_LOAD:
1133 case H_LOGICAL_CI_STORE:
1134 #ifdef CONFIG_KVM_XICS
1135 case H_XIRR:
1136 case H_CPPR:
1137 case H_EOI:
1138 case H_IPI:
1139 case H_IPOLL:
1140 case H_XIRR_X:
1141 #endif
1142 case H_PAGE_INIT:
1143 return 1;
1144 }
1145
1146 /* See if it's in the real-mode table */
1147 return kvmppc_hcall_impl_hv_realmode(cmd);
1148 }
1149
1150 static int kvmppc_emulate_debug_inst(struct kvm_run *run,
1151 struct kvm_vcpu *vcpu)
1152 {
1153 u32 last_inst;
1154
1155 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
1156 EMULATE_DONE) {
1157 /*
1158 * Fetch failed, so return to guest and
1159 * try executing it again.
1160 */
1161 return RESUME_GUEST;
1162 }
1163
1164 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
1165 run->exit_reason = KVM_EXIT_DEBUG;
1166 run->debug.arch.address = kvmppc_get_pc(vcpu);
1167 return RESUME_HOST;
1168 } else {
1169 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1170 return RESUME_GUEST;
1171 }
1172 }
1173
1174 static void do_nothing(void *x)
1175 {
1176 }
1177
1178 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
1179 {
1180 int thr, cpu, pcpu, nthreads;
1181 struct kvm_vcpu *v;
1182 unsigned long dpdes;
1183
1184 nthreads = vcpu->kvm->arch.emul_smt_mode;
1185 dpdes = 0;
1186 cpu = vcpu->vcpu_id & ~(nthreads - 1);
1187 for (thr = 0; thr < nthreads; ++thr, ++cpu) {
1188 v = kvmppc_find_vcpu(vcpu->kvm, cpu);
1189 if (!v)
1190 continue;
1191 /*
1192 * If the vcpu is currently running on a physical cpu thread,
1193 * interrupt it in order to pull it out of the guest briefly,
1194 * which will update its vcore->dpdes value.
1195 */
1196 pcpu = READ_ONCE(v->cpu);
1197 if (pcpu >= 0)
1198 smp_call_function_single(pcpu, do_nothing, NULL, 1);
1199 if (kvmppc_doorbell_pending(v))
1200 dpdes |= 1 << thr;
1201 }
1202 return dpdes;
1203 }
1204
1205 /*
1206 * On POWER9, emulate doorbell-related instructions in order to
1207 * give the guest the illusion of running on a multi-threaded core.
1208 * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1209 * and mfspr DPDES.
1210 */
1211 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1212 {
1213 u32 inst, rb, thr;
1214 unsigned long arg;
1215 struct kvm *kvm = vcpu->kvm;
1216 struct kvm_vcpu *tvcpu;
1217
1218 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1219 return RESUME_GUEST;
1220 if (get_op(inst) != 31)
1221 return EMULATE_FAIL;
1222 rb = get_rb(inst);
1223 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1224 switch (get_xop(inst)) {
1225 case OP_31_XOP_MSGSNDP:
1226 arg = kvmppc_get_gpr(vcpu, rb);
1227 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1228 break;
1229 arg &= 0x3f;
1230 if (arg >= kvm->arch.emul_smt_mode)
1231 break;
1232 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1233 if (!tvcpu)
1234 break;
1235 if (!tvcpu->arch.doorbell_request) {
1236 tvcpu->arch.doorbell_request = 1;
1237 kvmppc_fast_vcpu_kick_hv(tvcpu);
1238 }
1239 break;
1240 case OP_31_XOP_MSGCLRP:
1241 arg = kvmppc_get_gpr(vcpu, rb);
1242 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1243 break;
1244 vcpu->arch.vcore->dpdes = 0;
1245 vcpu->arch.doorbell_request = 0;
1246 break;
1247 case OP_31_XOP_MFSPR:
1248 switch (get_sprn(inst)) {
1249 case SPRN_TIR:
1250 arg = thr;
1251 break;
1252 case SPRN_DPDES:
1253 arg = kvmppc_read_dpdes(vcpu);
1254 break;
1255 default:
1256 return EMULATE_FAIL;
1257 }
1258 kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1259 break;
1260 default:
1261 return EMULATE_FAIL;
1262 }
1263 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1264 return RESUME_GUEST;
1265 }
1266
1267 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1268 struct task_struct *tsk)
1269 {
1270 int r = RESUME_HOST;
1271
1272 vcpu->stat.sum_exits++;
1273
1274 /*
1275 * This can happen if an interrupt occurs in the last stages
1276 * of guest entry or the first stages of guest exit (i.e. after
1277 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1278 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1279 * That can happen due to a bug, or due to a machine check
1280 * occurring at just the wrong time.
1281 */
1282 if (vcpu->arch.shregs.msr & MSR_HV) {
1283 printk(KERN_EMERG "KVM trap in HV mode!\n");
1284 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1285 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1286 vcpu->arch.shregs.msr);
1287 kvmppc_dump_regs(vcpu);
1288 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1289 run->hw.hardware_exit_reason = vcpu->arch.trap;
1290 return RESUME_HOST;
1291 }
1292 run->exit_reason = KVM_EXIT_UNKNOWN;
1293 run->ready_for_interrupt_injection = 1;
1294 switch (vcpu->arch.trap) {
1295 /* We're good on these - the host merely wanted to get our attention */
1296 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1297 vcpu->stat.dec_exits++;
1298 r = RESUME_GUEST;
1299 break;
1300 case BOOK3S_INTERRUPT_EXTERNAL:
1301 case BOOK3S_INTERRUPT_H_DOORBELL:
1302 case BOOK3S_INTERRUPT_H_VIRT:
1303 vcpu->stat.ext_intr_exits++;
1304 r = RESUME_GUEST;
1305 break;
1306 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1307 case BOOK3S_INTERRUPT_HMI:
1308 case BOOK3S_INTERRUPT_PERFMON:
1309 case BOOK3S_INTERRUPT_SYSTEM_RESET:
1310 r = RESUME_GUEST;
1311 break;
1312 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1313 /* Print the MCE event to host console. */
1314 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true);
1315
1316 /*
1317 * If the guest can do FWNMI, exit to userspace so it can
1318 * deliver a FWNMI to the guest.
1319 * Otherwise we synthesize a machine check for the guest
1320 * so that it knows that the machine check occurred.
1321 */
1322 if (!vcpu->kvm->arch.fwnmi_enabled) {
1323 ulong flags = vcpu->arch.shregs.msr & 0x083c0000;
1324 kvmppc_core_queue_machine_check(vcpu, flags);
1325 r = RESUME_GUEST;
1326 break;
1327 }
1328
1329 /* Exit to guest with KVM_EXIT_NMI as exit reason */
1330 run->exit_reason = KVM_EXIT_NMI;
1331 run->hw.hardware_exit_reason = vcpu->arch.trap;
1332 /* Clear out the old NMI status from run->flags */
1333 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1334 /* Now set the NMI status */
1335 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1336 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1337 else
1338 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1339
1340 r = RESUME_HOST;
1341 break;
1342 case BOOK3S_INTERRUPT_PROGRAM:
1343 {
1344 ulong flags;
1345 /*
1346 * Normally program interrupts are delivered directly
1347 * to the guest by the hardware, but we can get here
1348 * as a result of a hypervisor emulation interrupt
1349 * (e40) getting turned into a 700 by BML RTAS.
1350 */
1351 flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1352 kvmppc_core_queue_program(vcpu, flags);
1353 r = RESUME_GUEST;
1354 break;
1355 }
1356 case BOOK3S_INTERRUPT_SYSCALL:
1357 {
1358 /* hcall - punt to userspace */
1359 int i;
1360
1361 /* hypercall with MSR_PR has already been handled in rmode,
1362 * and never reaches here.
1363 */
1364
1365 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1366 for (i = 0; i < 9; ++i)
1367 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1368 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1369 vcpu->arch.hcall_needed = 1;
1370 r = RESUME_HOST;
1371 break;
1372 }
1373 /*
1374 * We get these next two if the guest accesses a page which it thinks
1375 * it has mapped but which is not actually present, either because
1376 * it is for an emulated I/O device or because the corresonding
1377 * host page has been paged out. Any other HDSI/HISI interrupts
1378 * have been handled already.
1379 */
1380 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1381 r = RESUME_PAGE_FAULT;
1382 break;
1383 case BOOK3S_INTERRUPT_H_INST_STORAGE:
1384 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1385 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr &
1386 DSISR_SRR1_MATCH_64S;
1387 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1388 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1389 r = RESUME_PAGE_FAULT;
1390 break;
1391 /*
1392 * This occurs if the guest executes an illegal instruction.
1393 * If the guest debug is disabled, generate a program interrupt
1394 * to the guest. If guest debug is enabled, we need to check
1395 * whether the instruction is a software breakpoint instruction.
1396 * Accordingly return to Guest or Host.
1397 */
1398 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1399 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1400 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1401 swab32(vcpu->arch.emul_inst) :
1402 vcpu->arch.emul_inst;
1403 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
1404 r = kvmppc_emulate_debug_inst(run, vcpu);
1405 } else {
1406 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1407 r = RESUME_GUEST;
1408 }
1409 break;
1410 /*
1411 * This occurs if the guest (kernel or userspace), does something that
1412 * is prohibited by HFSCR.
1413 * On POWER9, this could be a doorbell instruction that we need
1414 * to emulate.
1415 * Otherwise, we just generate a program interrupt to the guest.
1416 */
1417 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
1418 r = EMULATE_FAIL;
1419 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
1420 cpu_has_feature(CPU_FTR_ARCH_300))
1421 r = kvmppc_emulate_doorbell_instr(vcpu);
1422 if (r == EMULATE_FAIL) {
1423 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1424 r = RESUME_GUEST;
1425 }
1426 break;
1427
1428 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1429 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1430 /*
1431 * This occurs for various TM-related instructions that
1432 * we need to emulate on POWER9 DD2.2. We have already
1433 * handled the cases where the guest was in real-suspend
1434 * mode and was transitioning to transactional state.
1435 */
1436 r = kvmhv_p9_tm_emulation(vcpu);
1437 break;
1438 #endif
1439
1440 case BOOK3S_INTERRUPT_HV_RM_HARD:
1441 r = RESUME_PASSTHROUGH;
1442 break;
1443 default:
1444 kvmppc_dump_regs(vcpu);
1445 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1446 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1447 vcpu->arch.shregs.msr);
1448 run->hw.hardware_exit_reason = vcpu->arch.trap;
1449 r = RESUME_HOST;
1450 break;
1451 }
1452
1453 return r;
1454 }
1455
1456 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1457 {
1458 int r;
1459 int srcu_idx;
1460
1461 vcpu->stat.sum_exits++;
1462
1463 /*
1464 * This can happen if an interrupt occurs in the last stages
1465 * of guest entry or the first stages of guest exit (i.e. after
1466 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1467 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1468 * That can happen due to a bug, or due to a machine check
1469 * occurring at just the wrong time.
1470 */
1471 if (vcpu->arch.shregs.msr & MSR_HV) {
1472 pr_emerg("KVM trap in HV mode while nested!\n");
1473 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1474 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1475 vcpu->arch.shregs.msr);
1476 kvmppc_dump_regs(vcpu);
1477 return RESUME_HOST;
1478 }
1479 switch (vcpu->arch.trap) {
1480 /* We're good on these - the host merely wanted to get our attention */
1481 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1482 vcpu->stat.dec_exits++;
1483 r = RESUME_GUEST;
1484 break;
1485 case BOOK3S_INTERRUPT_EXTERNAL:
1486 vcpu->stat.ext_intr_exits++;
1487 r = RESUME_HOST;
1488 break;
1489 case BOOK3S_INTERRUPT_H_DOORBELL:
1490 case BOOK3S_INTERRUPT_H_VIRT:
1491 vcpu->stat.ext_intr_exits++;
1492 r = RESUME_GUEST;
1493 break;
1494 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1495 case BOOK3S_INTERRUPT_HMI:
1496 case BOOK3S_INTERRUPT_PERFMON:
1497 case BOOK3S_INTERRUPT_SYSTEM_RESET:
1498 r = RESUME_GUEST;
1499 break;
1500 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1501 /* Pass the machine check to the L1 guest */
1502 r = RESUME_HOST;
1503 /* Print the MCE event to host console. */
1504 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true);
1505 break;
1506 /*
1507 * We get these next two if the guest accesses a page which it thinks
1508 * it has mapped but which is not actually present, either because
1509 * it is for an emulated I/O device or because the corresonding
1510 * host page has been paged out.
1511 */
1512 case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1513 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1514 r = kvmhv_nested_page_fault(run, vcpu);
1515 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1516 break;
1517 case BOOK3S_INTERRUPT_H_INST_STORAGE:
1518 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1519 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) &
1520 DSISR_SRR1_MATCH_64S;
1521 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1522 vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1523 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1524 r = kvmhv_nested_page_fault(run, vcpu);
1525 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1526 break;
1527
1528 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1529 case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1530 /*
1531 * This occurs for various TM-related instructions that
1532 * we need to emulate on POWER9 DD2.2. We have already
1533 * handled the cases where the guest was in real-suspend
1534 * mode and was transitioning to transactional state.
1535 */
1536 r = kvmhv_p9_tm_emulation(vcpu);
1537 break;
1538 #endif
1539
1540 case BOOK3S_INTERRUPT_HV_RM_HARD:
1541 vcpu->arch.trap = 0;
1542 r = RESUME_GUEST;
1543 if (!xics_on_xive())
1544 kvmppc_xics_rm_complete(vcpu, 0);
1545 break;
1546 default:
1547 r = RESUME_HOST;
1548 break;
1549 }
1550
1551 return r;
1552 }
1553
1554 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1555 struct kvm_sregs *sregs)
1556 {
1557 int i;
1558
1559 memset(sregs, 0, sizeof(struct kvm_sregs));
1560 sregs->pvr = vcpu->arch.pvr;
1561 for (i = 0; i < vcpu->arch.slb_max; i++) {
1562 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1563 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1564 }
1565
1566 return 0;
1567 }
1568
1569 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1570 struct kvm_sregs *sregs)
1571 {
1572 int i, j;
1573
1574 /* Only accept the same PVR as the host's, since we can't spoof it */
1575 if (sregs->pvr != vcpu->arch.pvr)
1576 return -EINVAL;
1577
1578 j = 0;
1579 for (i = 0; i < vcpu->arch.slb_nr; i++) {
1580 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1581 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1582 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1583 ++j;
1584 }
1585 }
1586 vcpu->arch.slb_max = j;
1587
1588 return 0;
1589 }
1590
1591 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1592 bool preserve_top32)
1593 {
1594 struct kvm *kvm = vcpu->kvm;
1595 struct kvmppc_vcore *vc = vcpu->arch.vcore;
1596 u64 mask;
1597
1598 spin_lock(&vc->lock);
1599 /*
1600 * If ILE (interrupt little-endian) has changed, update the
1601 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1602 */
1603 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
1604 struct kvm_vcpu *vcpu;
1605 int i;
1606
1607 kvm_for_each_vcpu(i, vcpu, kvm) {
1608 if (vcpu->arch.vcore != vc)
1609 continue;
1610 if (new_lpcr & LPCR_ILE)
1611 vcpu->arch.intr_msr |= MSR_LE;
1612 else
1613 vcpu->arch.intr_msr &= ~MSR_LE;
1614 }
1615 }
1616
1617 /*
1618 * Userspace can only modify DPFD (default prefetch depth),
1619 * ILE (interrupt little-endian) and TC (translation control).
1620 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
1621 */
1622 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
1623 if (cpu_has_feature(CPU_FTR_ARCH_207S))
1624 mask |= LPCR_AIL;
1625 /*
1626 * On POWER9, allow userspace to enable large decrementer for the
1627 * guest, whether or not the host has it enabled.
1628 */
1629 if (cpu_has_feature(CPU_FTR_ARCH_300))
1630 mask |= LPCR_LD;
1631
1632 /* Broken 32-bit version of LPCR must not clear top bits */
1633 if (preserve_top32)
1634 mask &= 0xFFFFFFFF;
1635 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1636 spin_unlock(&vc->lock);
1637 }
1638
1639 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1640 union kvmppc_one_reg *val)
1641 {
1642 int r = 0;
1643 long int i;
1644
1645 switch (id) {
1646 case KVM_REG_PPC_DEBUG_INST:
1647 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1648 break;
1649 case KVM_REG_PPC_HIOR:
1650 *val = get_reg_val(id, 0);
1651 break;
1652 case KVM_REG_PPC_DABR:
1653 *val = get_reg_val(id, vcpu->arch.dabr);
1654 break;
1655 case KVM_REG_PPC_DABRX:
1656 *val = get_reg_val(id, vcpu->arch.dabrx);
1657 break;
1658 case KVM_REG_PPC_DSCR:
1659 *val = get_reg_val(id, vcpu->arch.dscr);
1660 break;
1661 case KVM_REG_PPC_PURR:
1662 *val = get_reg_val(id, vcpu->arch.purr);
1663 break;
1664 case KVM_REG_PPC_SPURR:
1665 *val = get_reg_val(id, vcpu->arch.spurr);
1666 break;
1667 case KVM_REG_PPC_AMR:
1668 *val = get_reg_val(id, vcpu->arch.amr);
1669 break;
1670 case KVM_REG_PPC_UAMOR:
1671 *val = get_reg_val(id, vcpu->arch.uamor);
1672 break;
1673 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1674 i = id - KVM_REG_PPC_MMCR0;
1675 *val = get_reg_val(id, vcpu->arch.mmcr[i]);
1676 break;
1677 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1678 i = id - KVM_REG_PPC_PMC1;
1679 *val = get_reg_val(id, vcpu->arch.pmc[i]);
1680 break;
1681 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1682 i = id - KVM_REG_PPC_SPMC1;
1683 *val = get_reg_val(id, vcpu->arch.spmc[i]);
1684 break;
1685 case KVM_REG_PPC_SIAR:
1686 *val = get_reg_val(id, vcpu->arch.siar);
1687 break;
1688 case KVM_REG_PPC_SDAR:
1689 *val = get_reg_val(id, vcpu->arch.sdar);
1690 break;
1691 case KVM_REG_PPC_SIER:
1692 *val = get_reg_val(id, vcpu->arch.sier);
1693 break;
1694 case KVM_REG_PPC_IAMR:
1695 *val = get_reg_val(id, vcpu->arch.iamr);
1696 break;
1697 case KVM_REG_PPC_PSPB:
1698 *val = get_reg_val(id, vcpu->arch.pspb);
1699 break;
1700 case KVM_REG_PPC_DPDES:
1701 /*
1702 * On POWER9, where we are emulating msgsndp etc.,
1703 * we return 1 bit for each vcpu, which can come from
1704 * either vcore->dpdes or doorbell_request.
1705 * On POWER8, doorbell_request is 0.
1706 */
1707 *val = get_reg_val(id, vcpu->arch.vcore->dpdes |
1708 vcpu->arch.doorbell_request);
1709 break;
1710 case KVM_REG_PPC_VTB:
1711 *val = get_reg_val(id, vcpu->arch.vcore->vtb);
1712 break;
1713 case KVM_REG_PPC_DAWR:
1714 *val = get_reg_val(id, vcpu->arch.dawr);
1715 break;
1716 case KVM_REG_PPC_DAWRX:
1717 *val = get_reg_val(id, vcpu->arch.dawrx);
1718 break;
1719 case KVM_REG_PPC_CIABR:
1720 *val = get_reg_val(id, vcpu->arch.ciabr);
1721 break;
1722 case KVM_REG_PPC_CSIGR:
1723 *val = get_reg_val(id, vcpu->arch.csigr);
1724 break;
1725 case KVM_REG_PPC_TACR:
1726 *val = get_reg_val(id, vcpu->arch.tacr);
1727 break;
1728 case KVM_REG_PPC_TCSCR:
1729 *val = get_reg_val(id, vcpu->arch.tcscr);
1730 break;
1731 case KVM_REG_PPC_PID:
1732 *val = get_reg_val(id, vcpu->arch.pid);
1733 break;
1734 case KVM_REG_PPC_ACOP:
1735 *val = get_reg_val(id, vcpu->arch.acop);
1736 break;
1737 case KVM_REG_PPC_WORT:
1738 *val = get_reg_val(id, vcpu->arch.wort);
1739 break;
1740 case KVM_REG_PPC_TIDR:
1741 *val = get_reg_val(id, vcpu->arch.tid);
1742 break;
1743 case KVM_REG_PPC_PSSCR:
1744 *val = get_reg_val(id, vcpu->arch.psscr);
1745 break;
1746 case KVM_REG_PPC_VPA_ADDR:
1747 spin_lock(&vcpu->arch.vpa_update_lock);
1748 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1749 spin_unlock(&vcpu->arch.vpa_update_lock);
1750 break;
1751 case KVM_REG_PPC_VPA_SLB:
1752 spin_lock(&vcpu->arch.vpa_update_lock);
1753 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1754 val->vpaval.length = vcpu->arch.slb_shadow.len;
1755 spin_unlock(&vcpu->arch.vpa_update_lock);
1756 break;
1757 case KVM_REG_PPC_VPA_DTL:
1758 spin_lock(&vcpu->arch.vpa_update_lock);
1759 val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1760 val->vpaval.length = vcpu->arch.dtl.len;
1761 spin_unlock(&vcpu->arch.vpa_update_lock);
1762 break;
1763 case KVM_REG_PPC_TB_OFFSET:
1764 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1765 break;
1766 case KVM_REG_PPC_LPCR:
1767 case KVM_REG_PPC_LPCR_64:
1768 *val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1769 break;
1770 case KVM_REG_PPC_PPR:
1771 *val = get_reg_val(id, vcpu->arch.ppr);
1772 break;
1773 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1774 case KVM_REG_PPC_TFHAR:
1775 *val = get_reg_val(id, vcpu->arch.tfhar);
1776 break;
1777 case KVM_REG_PPC_TFIAR:
1778 *val = get_reg_val(id, vcpu->arch.tfiar);
1779 break;
1780 case KVM_REG_PPC_TEXASR:
1781 *val = get_reg_val(id, vcpu->arch.texasr);
1782 break;
1783 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1784 i = id - KVM_REG_PPC_TM_GPR0;
1785 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1786 break;
1787 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1788 {
1789 int j;
1790 i = id - KVM_REG_PPC_TM_VSR0;
1791 if (i < 32)
1792 for (j = 0; j < TS_FPRWIDTH; j++)
1793 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1794 else {
1795 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1796 val->vval = vcpu->arch.vr_tm.vr[i-32];
1797 else
1798 r = -ENXIO;
1799 }
1800 break;
1801 }
1802 case KVM_REG_PPC_TM_CR:
1803 *val = get_reg_val(id, vcpu->arch.cr_tm);
1804 break;
1805 case KVM_REG_PPC_TM_XER:
1806 *val = get_reg_val(id, vcpu->arch.xer_tm);
1807 break;
1808 case KVM_REG_PPC_TM_LR:
1809 *val = get_reg_val(id, vcpu->arch.lr_tm);
1810 break;
1811 case KVM_REG_PPC_TM_CTR:
1812 *val = get_reg_val(id, vcpu->arch.ctr_tm);
1813 break;
1814 case KVM_REG_PPC_TM_FPSCR:
1815 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1816 break;
1817 case KVM_REG_PPC_TM_AMR:
1818 *val = get_reg_val(id, vcpu->arch.amr_tm);
1819 break;
1820 case KVM_REG_PPC_TM_PPR:
1821 *val = get_reg_val(id, vcpu->arch.ppr_tm);
1822 break;
1823 case KVM_REG_PPC_TM_VRSAVE:
1824 *val = get_reg_val(id, vcpu->arch.vrsave_tm);
1825 break;
1826 case KVM_REG_PPC_TM_VSCR:
1827 if (cpu_has_feature(CPU_FTR_ALTIVEC))
1828 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1829 else
1830 r = -ENXIO;
1831 break;
1832 case KVM_REG_PPC_TM_DSCR:
1833 *val = get_reg_val(id, vcpu->arch.dscr_tm);
1834 break;
1835 case KVM_REG_PPC_TM_TAR:
1836 *val = get_reg_val(id, vcpu->arch.tar_tm);
1837 break;
1838 #endif
1839 case KVM_REG_PPC_ARCH_COMPAT:
1840 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1841 break;
1842 case KVM_REG_PPC_DEC_EXPIRY:
1843 *val = get_reg_val(id, vcpu->arch.dec_expires +
1844 vcpu->arch.vcore->tb_offset);
1845 break;
1846 case KVM_REG_PPC_ONLINE:
1847 *val = get_reg_val(id, vcpu->arch.online);
1848 break;
1849 case KVM_REG_PPC_PTCR:
1850 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr);
1851 break;
1852 default:
1853 r = -EINVAL;
1854 break;
1855 }
1856
1857 return r;
1858 }
1859
1860 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1861 union kvmppc_one_reg *val)
1862 {
1863 int r = 0;
1864 long int i;
1865 unsigned long addr, len;
1866
1867 switch (id) {
1868 case KVM_REG_PPC_HIOR:
1869 /* Only allow this to be set to zero */
1870 if (set_reg_val(id, *val))
1871 r = -EINVAL;
1872 break;
1873 case KVM_REG_PPC_DABR:
1874 vcpu->arch.dabr = set_reg_val(id, *val);
1875 break;
1876 case KVM_REG_PPC_DABRX:
1877 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1878 break;
1879 case KVM_REG_PPC_DSCR:
1880 vcpu->arch.dscr = set_reg_val(id, *val);
1881 break;
1882 case KVM_REG_PPC_PURR:
1883 vcpu->arch.purr = set_reg_val(id, *val);
1884 break;
1885 case KVM_REG_PPC_SPURR:
1886 vcpu->arch.spurr = set_reg_val(id, *val);
1887 break;
1888 case KVM_REG_PPC_AMR:
1889 vcpu->arch.amr = set_reg_val(id, *val);
1890 break;
1891 case KVM_REG_PPC_UAMOR:
1892 vcpu->arch.uamor = set_reg_val(id, *val);
1893 break;
1894 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1895 i = id - KVM_REG_PPC_MMCR0;
1896 vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1897 break;
1898 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1899 i = id - KVM_REG_PPC_PMC1;
1900 vcpu->arch.pmc[i] = set_reg_val(id, *val);
1901 break;
1902 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1903 i = id - KVM_REG_PPC_SPMC1;
1904 vcpu->arch.spmc[i] = set_reg_val(id, *val);
1905 break;
1906 case KVM_REG_PPC_SIAR:
1907 vcpu->arch.siar = set_reg_val(id, *val);
1908 break;
1909 case KVM_REG_PPC_SDAR:
1910 vcpu->arch.sdar = set_reg_val(id, *val);
1911 break;
1912 case KVM_REG_PPC_SIER:
1913 vcpu->arch.sier = set_reg_val(id, *val);
1914 break;
1915 case KVM_REG_PPC_IAMR:
1916 vcpu->arch.iamr = set_reg_val(id, *val);
1917 break;
1918 case KVM_REG_PPC_PSPB:
1919 vcpu->arch.pspb = set_reg_val(id, *val);
1920 break;
1921 case KVM_REG_PPC_DPDES:
1922 vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1923 break;
1924 case KVM_REG_PPC_VTB:
1925 vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1926 break;
1927 case KVM_REG_PPC_DAWR:
1928 vcpu->arch.dawr = set_reg_val(id, *val);
1929 break;
1930 case KVM_REG_PPC_DAWRX:
1931 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1932 break;
1933 case KVM_REG_PPC_CIABR:
1934 vcpu->arch.ciabr = set_reg_val(id, *val);
1935 /* Don't allow setting breakpoints in hypervisor code */
1936 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1937 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1938 break;
1939 case KVM_REG_PPC_CSIGR:
1940 vcpu->arch.csigr = set_reg_val(id, *val);
1941 break;
1942 case KVM_REG_PPC_TACR:
1943 vcpu->arch.tacr = set_reg_val(id, *val);
1944 break;
1945 case KVM_REG_PPC_TCSCR:
1946 vcpu->arch.tcscr = set_reg_val(id, *val);
1947 break;
1948 case KVM_REG_PPC_PID:
1949 vcpu->arch.pid = set_reg_val(id, *val);
1950 break;
1951 case KVM_REG_PPC_ACOP:
1952 vcpu->arch.acop = set_reg_val(id, *val);
1953 break;
1954 case KVM_REG_PPC_WORT:
1955 vcpu->arch.wort = set_reg_val(id, *val);
1956 break;
1957 case KVM_REG_PPC_TIDR:
1958 vcpu->arch.tid = set_reg_val(id, *val);
1959 break;
1960 case KVM_REG_PPC_PSSCR:
1961 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1962 break;
1963 case KVM_REG_PPC_VPA_ADDR:
1964 addr = set_reg_val(id, *val);
1965 r = -EINVAL;
1966 if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1967 vcpu->arch.dtl.next_gpa))
1968 break;
1969 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1970 break;
1971 case KVM_REG_PPC_VPA_SLB:
1972 addr = val->vpaval.addr;
1973 len = val->vpaval.length;
1974 r = -EINVAL;
1975 if (addr && !vcpu->arch.vpa.next_gpa)
1976 break;
1977 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1978 break;
1979 case KVM_REG_PPC_VPA_DTL:
1980 addr = val->vpaval.addr;
1981 len = val->vpaval.length;
1982 r = -EINVAL;
1983 if (addr && (len < sizeof(struct dtl_entry) ||
1984 !vcpu->arch.vpa.next_gpa))
1985 break;
1986 len -= len % sizeof(struct dtl_entry);
1987 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1988 break;
1989 case KVM_REG_PPC_TB_OFFSET:
1990 /* round up to multiple of 2^24 */
1991 vcpu->arch.vcore->tb_offset =
1992 ALIGN(set_reg_val(id, *val), 1UL << 24);
1993 break;
1994 case KVM_REG_PPC_LPCR:
1995 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1996 break;
1997 case KVM_REG_PPC_LPCR_64:
1998 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
1999 break;
2000 case KVM_REG_PPC_PPR:
2001 vcpu->arch.ppr = set_reg_val(id, *val);
2002 break;
2003 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2004 case KVM_REG_PPC_TFHAR:
2005 vcpu->arch.tfhar = set_reg_val(id, *val);
2006 break;
2007 case KVM_REG_PPC_TFIAR:
2008 vcpu->arch.tfiar = set_reg_val(id, *val);
2009 break;
2010 case KVM_REG_PPC_TEXASR:
2011 vcpu->arch.texasr = set_reg_val(id, *val);
2012 break;
2013 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
2014 i = id - KVM_REG_PPC_TM_GPR0;
2015 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
2016 break;
2017 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
2018 {
2019 int j;
2020 i = id - KVM_REG_PPC_TM_VSR0;
2021 if (i < 32)
2022 for (j = 0; j < TS_FPRWIDTH; j++)
2023 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
2024 else
2025 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2026 vcpu->arch.vr_tm.vr[i-32] = val->vval;
2027 else
2028 r = -ENXIO;
2029 break;
2030 }
2031 case KVM_REG_PPC_TM_CR:
2032 vcpu->arch.cr_tm = set_reg_val(id, *val);
2033 break;
2034 case KVM_REG_PPC_TM_XER:
2035 vcpu->arch.xer_tm = set_reg_val(id, *val);
2036 break;
2037 case KVM_REG_PPC_TM_LR:
2038 vcpu->arch.lr_tm = set_reg_val(id, *val);
2039 break;
2040 case KVM_REG_PPC_TM_CTR:
2041 vcpu->arch.ctr_tm = set_reg_val(id, *val);
2042 break;
2043 case KVM_REG_PPC_TM_FPSCR:
2044 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
2045 break;
2046 case KVM_REG_PPC_TM_AMR:
2047 vcpu->arch.amr_tm = set_reg_val(id, *val);
2048 break;
2049 case KVM_REG_PPC_TM_PPR:
2050 vcpu->arch.ppr_tm = set_reg_val(id, *val);
2051 break;
2052 case KVM_REG_PPC_TM_VRSAVE:
2053 vcpu->arch.vrsave_tm = set_reg_val(id, *val);
2054 break;
2055 case KVM_REG_PPC_TM_VSCR:
2056 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2057 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
2058 else
2059 r = - ENXIO;
2060 break;
2061 case KVM_REG_PPC_TM_DSCR:
2062 vcpu->arch.dscr_tm = set_reg_val(id, *val);
2063 break;
2064 case KVM_REG_PPC_TM_TAR:
2065 vcpu->arch.tar_tm = set_reg_val(id, *val);
2066 break;
2067 #endif
2068 case KVM_REG_PPC_ARCH_COMPAT:
2069 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
2070 break;
2071 case KVM_REG_PPC_DEC_EXPIRY:
2072 vcpu->arch.dec_expires = set_reg_val(id, *val) -
2073 vcpu->arch.vcore->tb_offset;
2074 break;
2075 case KVM_REG_PPC_ONLINE:
2076 i = set_reg_val(id, *val);
2077 if (i && !vcpu->arch.online)
2078 atomic_inc(&vcpu->arch.vcore->online_count);
2079 else if (!i && vcpu->arch.online)
2080 atomic_dec(&vcpu->arch.vcore->online_count);
2081 vcpu->arch.online = i;
2082 break;
2083 case KVM_REG_PPC_PTCR:
2084 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val);
2085 break;
2086 default:
2087 r = -EINVAL;
2088 break;
2089 }
2090
2091 return r;
2092 }
2093
2094 /*
2095 * On POWER9, threads are independent and can be in different partitions.
2096 * Therefore we consider each thread to be a subcore.
2097 * There is a restriction that all threads have to be in the same
2098 * MMU mode (radix or HPT), unfortunately, but since we only support
2099 * HPT guests on a HPT host so far, that isn't an impediment yet.
2100 */
2101 static int threads_per_vcore(struct kvm *kvm)
2102 {
2103 if (kvm->arch.threads_indep)
2104 return 1;
2105 return threads_per_subcore;
2106 }
2107
2108 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id)
2109 {
2110 struct kvmppc_vcore *vcore;
2111
2112 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
2113
2114 if (vcore == NULL)
2115 return NULL;
2116
2117 spin_lock_init(&vcore->lock);
2118 spin_lock_init(&vcore->stoltb_lock);
2119 init_swait_queue_head(&vcore->wq);
2120 vcore->preempt_tb = TB_NIL;
2121 vcore->lpcr = kvm->arch.lpcr;
2122 vcore->first_vcpuid = id;
2123 vcore->kvm = kvm;
2124 INIT_LIST_HEAD(&vcore->preempt_list);
2125
2126 return vcore;
2127 }
2128
2129 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
2130 static struct debugfs_timings_element {
2131 const char *name;
2132 size_t offset;
2133 } timings[] = {
2134 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)},
2135 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)},
2136 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)},
2137 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)},
2138 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)},
2139 };
2140
2141 #define N_TIMINGS (ARRAY_SIZE(timings))
2142
2143 struct debugfs_timings_state {
2144 struct kvm_vcpu *vcpu;
2145 unsigned int buflen;
2146 char buf[N_TIMINGS * 100];
2147 };
2148
2149 static int debugfs_timings_open(struct inode *inode, struct file *file)
2150 {
2151 struct kvm_vcpu *vcpu = inode->i_private;
2152 struct debugfs_timings_state *p;
2153
2154 p = kzalloc(sizeof(*p), GFP_KERNEL);
2155 if (!p)
2156 return -ENOMEM;
2157
2158 kvm_get_kvm(vcpu->kvm);
2159 p->vcpu = vcpu;
2160 file->private_data = p;
2161
2162 return nonseekable_open(inode, file);
2163 }
2164
2165 static int debugfs_timings_release(struct inode *inode, struct file *file)
2166 {
2167 struct debugfs_timings_state *p = file->private_data;
2168
2169 kvm_put_kvm(p->vcpu->kvm);
2170 kfree(p);
2171 return 0;
2172 }
2173
2174 static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
2175 size_t len, loff_t *ppos)
2176 {
2177 struct debugfs_timings_state *p = file->private_data;
2178 struct kvm_vcpu *vcpu = p->vcpu;
2179 char *s, *buf_end;
2180 struct kvmhv_tb_accumulator tb;
2181 u64 count;
2182 loff_t pos;
2183 ssize_t n;
2184 int i, loops;
2185 bool ok;
2186
2187 if (!p->buflen) {
2188 s = p->buf;
2189 buf_end = s + sizeof(p->buf);
2190 for (i = 0; i < N_TIMINGS; ++i) {
2191 struct kvmhv_tb_accumulator *acc;
2192
2193 acc = (struct kvmhv_tb_accumulator *)
2194 ((unsigned long)vcpu + timings[i].offset);
2195 ok = false;
2196 for (loops = 0; loops < 1000; ++loops) {
2197 count = acc->seqcount;
2198 if (!(count & 1)) {
2199 smp_rmb();
2200 tb = *acc;
2201 smp_rmb();
2202 if (count == acc->seqcount) {
2203 ok = true;
2204 break;
2205 }
2206 }
2207 udelay(1);
2208 }
2209 if (!ok)
2210 snprintf(s, buf_end - s, "%s: stuck\n",
2211 timings[i].name);
2212 else
2213 snprintf(s, buf_end - s,
2214 "%s: %llu %llu %llu %llu\n",
2215 timings[i].name, count / 2,
2216 tb_to_ns(tb.tb_total),
2217 tb_to_ns(tb.tb_min),
2218 tb_to_ns(tb.tb_max));
2219 s += strlen(s);
2220 }
2221 p->buflen = s - p->buf;
2222 }
2223
2224 pos = *ppos;
2225 if (pos >= p->buflen)
2226 return 0;
2227 if (len > p->buflen - pos)
2228 len = p->buflen - pos;
2229 n = copy_to_user(buf, p->buf + pos, len);
2230 if (n) {
2231 if (n == len)
2232 return -EFAULT;
2233 len -= n;
2234 }
2235 *ppos = pos + len;
2236 return len;
2237 }
2238
2239 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
2240 size_t len, loff_t *ppos)
2241 {
2242 return -EACCES;
2243 }
2244
2245 static const struct file_operations debugfs_timings_ops = {
2246 .owner = THIS_MODULE,
2247 .open = debugfs_timings_open,
2248 .release = debugfs_timings_release,
2249 .read = debugfs_timings_read,
2250 .write = debugfs_timings_write,
2251 .llseek = generic_file_llseek,
2252 };
2253
2254 /* Create a debugfs directory for the vcpu */
2255 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2256 {
2257 char buf[16];
2258 struct kvm *kvm = vcpu->kvm;
2259
2260 snprintf(buf, sizeof(buf), "vcpu%u", id);
2261 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
2262 return;
2263 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
2264 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
2265 return;
2266 vcpu->arch.debugfs_timings =
2267 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
2268 vcpu, &debugfs_timings_ops);
2269 }
2270
2271 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2272 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2273 {
2274 }
2275 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2276
2277 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu)
2278 {
2279 int err;
2280 int core;
2281 struct kvmppc_vcore *vcore;
2282 struct kvm *kvm;
2283 unsigned int id;
2284
2285 kvm = vcpu->kvm;
2286 id = vcpu->vcpu_id;
2287
2288 vcpu->arch.shared = &vcpu->arch.shregs;
2289 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
2290 /*
2291 * The shared struct is never shared on HV,
2292 * so we can always use host endianness
2293 */
2294 #ifdef __BIG_ENDIAN__
2295 vcpu->arch.shared_big_endian = true;
2296 #else
2297 vcpu->arch.shared_big_endian = false;
2298 #endif
2299 #endif
2300 vcpu->arch.mmcr[0] = MMCR0_FC;
2301 vcpu->arch.ctrl = CTRL_RUNLATCH;
2302 /* default to host PVR, since we can't spoof it */
2303 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2304 spin_lock_init(&vcpu->arch.vpa_update_lock);
2305 spin_lock_init(&vcpu->arch.tbacct_lock);
2306 vcpu->arch.busy_preempt = TB_NIL;
2307 vcpu->arch.intr_msr = MSR_SF | MSR_ME;
2308
2309 /*
2310 * Set the default HFSCR for the guest from the host value.
2311 * This value is only used on POWER9.
2312 * On POWER9, we want to virtualize the doorbell facility, so we
2313 * don't set the HFSCR_MSGP bit, and that causes those instructions
2314 * to trap and then we emulate them.
2315 */
2316 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
2317 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
2318 if (cpu_has_feature(CPU_FTR_HVMODE)) {
2319 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
2320 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2321 vcpu->arch.hfscr |= HFSCR_TM;
2322 }
2323 if (cpu_has_feature(CPU_FTR_TM_COMP))
2324 vcpu->arch.hfscr |= HFSCR_TM;
2325
2326 kvmppc_mmu_book3s_hv_init(vcpu);
2327
2328 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
2329
2330 init_waitqueue_head(&vcpu->arch.cpu_run);
2331
2332 mutex_lock(&kvm->lock);
2333 vcore = NULL;
2334 err = -EINVAL;
2335 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
2336 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) {
2337 pr_devel("KVM: VCPU ID too high\n");
2338 core = KVM_MAX_VCORES;
2339 } else {
2340 BUG_ON(kvm->arch.smt_mode != 1);
2341 core = kvmppc_pack_vcpu_id(kvm, id);
2342 }
2343 } else {
2344 core = id / kvm->arch.smt_mode;
2345 }
2346 if (core < KVM_MAX_VCORES) {
2347 vcore = kvm->arch.vcores[core];
2348 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) {
2349 pr_devel("KVM: collision on id %u", id);
2350 vcore = NULL;
2351 } else if (!vcore) {
2352 /*
2353 * Take mmu_setup_lock for mutual exclusion
2354 * with kvmppc_update_lpcr().
2355 */
2356 err = -ENOMEM;
2357 vcore = kvmppc_vcore_create(kvm,
2358 id & ~(kvm->arch.smt_mode - 1));
2359 mutex_lock(&kvm->arch.mmu_setup_lock);
2360 kvm->arch.vcores[core] = vcore;
2361 kvm->arch.online_vcores++;
2362 mutex_unlock(&kvm->arch.mmu_setup_lock);
2363 }
2364 }
2365 mutex_unlock(&kvm->lock);
2366
2367 if (!vcore)
2368 return err;
2369
2370 spin_lock(&vcore->lock);
2371 ++vcore->num_threads;
2372 spin_unlock(&vcore->lock);
2373 vcpu->arch.vcore = vcore;
2374 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
2375 vcpu->arch.thread_cpu = -1;
2376 vcpu->arch.prev_cpu = -1;
2377
2378 vcpu->arch.cpu_type = KVM_CPU_3S_64;
2379 kvmppc_sanity_check(vcpu);
2380
2381 debugfs_vcpu_init(vcpu, id);
2382
2383 return 0;
2384 }
2385
2386 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2387 unsigned long flags)
2388 {
2389 int err;
2390 int esmt = 0;
2391
2392 if (flags)
2393 return -EINVAL;
2394 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2395 return -EINVAL;
2396 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2397 /*
2398 * On POWER8 (or POWER7), the threading mode is "strict",
2399 * so we pack smt_mode vcpus per vcore.
2400 */
2401 if (smt_mode > threads_per_subcore)
2402 return -EINVAL;
2403 } else {
2404 /*
2405 * On POWER9, the threading mode is "loose",
2406 * so each vcpu gets its own vcore.
2407 */
2408 esmt = smt_mode;
2409 smt_mode = 1;
2410 }
2411 mutex_lock(&kvm->lock);
2412 err = -EBUSY;
2413 if (!kvm->arch.online_vcores) {
2414 kvm->arch.smt_mode = smt_mode;
2415 kvm->arch.emul_smt_mode = esmt;
2416 err = 0;
2417 }
2418 mutex_unlock(&kvm->lock);
2419
2420 return err;
2421 }
2422
2423 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2424 {
2425 if (vpa->pinned_addr)
2426 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2427 vpa->dirty);
2428 }
2429
2430 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
2431 {
2432 spin_lock(&vcpu->arch.vpa_update_lock);
2433 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2434 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2435 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2436 spin_unlock(&vcpu->arch.vpa_update_lock);
2437 }
2438
2439 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2440 {
2441 /* Indicate we want to get back into the guest */
2442 return 1;
2443 }
2444
2445 static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
2446 {
2447 unsigned long dec_nsec, now;
2448
2449 now = get_tb();
2450 if (now > vcpu->arch.dec_expires) {
2451 /* decrementer has already gone negative */
2452 kvmppc_core_queue_dec(vcpu);
2453 kvmppc_core_prepare_to_enter(vcpu);
2454 return;
2455 }
2456 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now);
2457 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
2458 vcpu->arch.timer_running = 1;
2459 }
2460
2461 extern int __kvmppc_vcore_entry(void);
2462
2463 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2464 struct kvm_vcpu *vcpu)
2465 {
2466 u64 now;
2467
2468 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2469 return;
2470 spin_lock_irq(&vcpu->arch.tbacct_lock);
2471 now = mftb();
2472 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2473 vcpu->arch.stolen_logged;
2474 vcpu->arch.busy_preempt = now;
2475 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
2476 spin_unlock_irq(&vcpu->arch.tbacct_lock);
2477 --vc->n_runnable;
2478 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
2479 }
2480
2481 static int kvmppc_grab_hwthread(int cpu)
2482 {
2483 struct paca_struct *tpaca;
2484 long timeout = 10000;
2485
2486 tpaca = paca_ptrs[cpu];
2487
2488 /* Ensure the thread won't go into the kernel if it wakes */
2489 tpaca->kvm_hstate.kvm_vcpu = NULL;
2490 tpaca->kvm_hstate.kvm_vcore = NULL;
2491 tpaca->kvm_hstate.napping = 0;
2492 smp_wmb();
2493 tpaca->kvm_hstate.hwthread_req = 1;
2494
2495 /*
2496 * If the thread is already executing in the kernel (e.g. handling
2497 * a stray interrupt), wait for it to get back to nap mode.
2498 * The smp_mb() is to ensure that our setting of hwthread_req
2499 * is visible before we look at hwthread_state, so if this
2500 * races with the code at system_reset_pSeries and the thread
2501 * misses our setting of hwthread_req, we are sure to see its
2502 * setting of hwthread_state, and vice versa.
2503 */
2504 smp_mb();
2505 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2506 if (--timeout <= 0) {
2507 pr_err("KVM: couldn't grab cpu %d\n", cpu);
2508 return -EBUSY;
2509 }
2510 udelay(1);
2511 }
2512 return 0;
2513 }
2514
2515 static void kvmppc_release_hwthread(int cpu)
2516 {
2517 struct paca_struct *tpaca;
2518
2519 tpaca = paca_ptrs[cpu];
2520 tpaca->kvm_hstate.hwthread_req = 0;
2521 tpaca->kvm_hstate.kvm_vcpu = NULL;
2522 tpaca->kvm_hstate.kvm_vcore = NULL;
2523 tpaca->kvm_hstate.kvm_split_mode = NULL;
2524 }
2525
2526 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2527 {
2528 struct kvm_nested_guest *nested = vcpu->arch.nested;
2529 cpumask_t *cpu_in_guest;
2530 int i;
2531
2532 cpu = cpu_first_thread_sibling(cpu);
2533 if (nested) {
2534 cpumask_set_cpu(cpu, &nested->need_tlb_flush);
2535 cpu_in_guest = &nested->cpu_in_guest;
2536 } else {
2537 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2538 cpu_in_guest = &kvm->arch.cpu_in_guest;
2539 }
2540 /*
2541 * Make sure setting of bit in need_tlb_flush precedes
2542 * testing of cpu_in_guest bits. The matching barrier on
2543 * the other side is the first smp_mb() in kvmppc_run_core().
2544 */
2545 smp_mb();
2546 for (i = 0; i < threads_per_core; ++i)
2547 if (cpumask_test_cpu(cpu + i, cpu_in_guest))
2548 smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2549 }
2550
2551 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2552 {
2553 struct kvm_nested_guest *nested = vcpu->arch.nested;
2554 struct kvm *kvm = vcpu->kvm;
2555 int prev_cpu;
2556
2557 if (!cpu_has_feature(CPU_FTR_HVMODE))
2558 return;
2559
2560 if (nested)
2561 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id];
2562 else
2563 prev_cpu = vcpu->arch.prev_cpu;
2564
2565 /*
2566 * With radix, the guest can do TLB invalidations itself,
2567 * and it could choose to use the local form (tlbiel) if
2568 * it is invalidating a translation that has only ever been
2569 * used on one vcpu. However, that doesn't mean it has
2570 * only ever been used on one physical cpu, since vcpus
2571 * can move around between pcpus. To cope with this, when
2572 * a vcpu moves from one pcpu to another, we need to tell
2573 * any vcpus running on the same core as this vcpu previously
2574 * ran to flush the TLB. The TLB is shared between threads,
2575 * so we use a single bit in .need_tlb_flush for all 4 threads.
2576 */
2577 if (prev_cpu != pcpu) {
2578 if (prev_cpu >= 0 &&
2579 cpu_first_thread_sibling(prev_cpu) !=
2580 cpu_first_thread_sibling(pcpu))
2581 radix_flush_cpu(kvm, prev_cpu, vcpu);
2582 if (nested)
2583 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu;
2584 else
2585 vcpu->arch.prev_cpu = pcpu;
2586 }
2587 }
2588
2589 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
2590 {
2591 int cpu;
2592 struct paca_struct *tpaca;
2593 struct kvm *kvm = vc->kvm;
2594
2595 cpu = vc->pcpu;
2596 if (vcpu) {
2597 if (vcpu->arch.timer_running) {
2598 hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2599 vcpu->arch.timer_running = 0;
2600 }
2601 cpu += vcpu->arch.ptid;
2602 vcpu->cpu = vc->pcpu;
2603 vcpu->arch.thread_cpu = cpu;
2604 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
2605 }
2606 tpaca = paca_ptrs[cpu];
2607 tpaca->kvm_hstate.kvm_vcpu = vcpu;
2608 tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
2609 tpaca->kvm_hstate.fake_suspend = 0;
2610 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
2611 smp_wmb();
2612 tpaca->kvm_hstate.kvm_vcore = vc;
2613 if (cpu != smp_processor_id())
2614 kvmppc_ipi_thread(cpu);
2615 }
2616
2617 static void kvmppc_wait_for_nap(int n_threads)
2618 {
2619 int cpu = smp_processor_id();
2620 int i, loops;
2621
2622 if (n_threads <= 1)
2623 return;
2624 for (loops = 0; loops < 1000000; ++loops) {
2625 /*
2626 * Check if all threads are finished.
2627 * We set the vcore pointer when starting a thread
2628 * and the thread clears it when finished, so we look
2629 * for any threads that still have a non-NULL vcore ptr.
2630 */
2631 for (i = 1; i < n_threads; ++i)
2632 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2633 break;
2634 if (i == n_threads) {
2635 HMT_medium();
2636 return;
2637 }
2638 HMT_low();
2639 }
2640 HMT_medium();
2641 for (i = 1; i < n_threads; ++i)
2642 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2643 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
2644 }
2645
2646 /*
2647 * Check that we are on thread 0 and that any other threads in
2648 * this core are off-line. Then grab the threads so they can't
2649 * enter the kernel.
2650 */
2651 static int on_primary_thread(void)
2652 {
2653 int cpu = smp_processor_id();
2654 int thr;
2655
2656 /* Are we on a primary subcore? */
2657 if (cpu_thread_in_subcore(cpu))
2658 return 0;
2659
2660 thr = 0;
2661 while (++thr < threads_per_subcore)
2662 if (cpu_online(cpu + thr))
2663 return 0;
2664
2665 /* Grab all hw threads so they can't go into the kernel */
2666 for (thr = 1; thr < threads_per_subcore; ++thr) {
2667 if (kvmppc_grab_hwthread(cpu + thr)) {
2668 /* Couldn't grab one; let the others go */
2669 do {
2670 kvmppc_release_hwthread(cpu + thr);
2671 } while (--thr > 0);
2672 return 0;
2673 }
2674 }
2675 return 1;
2676 }
2677
2678 /*
2679 * A list of virtual cores for each physical CPU.
2680 * These are vcores that could run but their runner VCPU tasks are
2681 * (or may be) preempted.
2682 */
2683 struct preempted_vcore_list {
2684 struct list_head list;
2685 spinlock_t lock;
2686 };
2687
2688 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2689
2690 static void init_vcore_lists(void)
2691 {
2692 int cpu;
2693
2694 for_each_possible_cpu(cpu) {
2695 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2696 spin_lock_init(&lp->lock);
2697 INIT_LIST_HEAD(&lp->list);
2698 }
2699 }
2700
2701 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2702 {
2703 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2704
2705 vc->vcore_state = VCORE_PREEMPT;
2706 vc->pcpu = smp_processor_id();
2707 if (vc->num_threads < threads_per_vcore(vc->kvm)) {
2708 spin_lock(&lp->lock);
2709 list_add_tail(&vc->preempt_list, &lp->list);
2710 spin_unlock(&lp->lock);
2711 }
2712
2713 /* Start accumulating stolen time */
2714 kvmppc_core_start_stolen(vc);
2715 }
2716
2717 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2718 {
2719 struct preempted_vcore_list *lp;
2720
2721 kvmppc_core_end_stolen(vc);
2722 if (!list_empty(&vc->preempt_list)) {
2723 lp = &per_cpu(preempted_vcores, vc->pcpu);
2724 spin_lock(&lp->lock);
2725 list_del_init(&vc->preempt_list);
2726 spin_unlock(&lp->lock);
2727 }
2728 vc->vcore_state = VCORE_INACTIVE;
2729 }
2730
2731 /*
2732 * This stores information about the virtual cores currently
2733 * assigned to a physical core.
2734 */
2735 struct core_info {
2736 int n_subcores;
2737 int max_subcore_threads;
2738 int total_threads;
2739 int subcore_threads[MAX_SUBCORES];
2740 struct kvmppc_vcore *vc[MAX_SUBCORES];
2741 };
2742
2743 /*
2744 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
2745 * respectively in 2-way micro-threading (split-core) mode on POWER8.
2746 */
2747 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2748
2749 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2750 {
2751 memset(cip, 0, sizeof(*cip));
2752 cip->n_subcores = 1;
2753 cip->max_subcore_threads = vc->num_threads;
2754 cip->total_threads = vc->num_threads;
2755 cip->subcore_threads[0] = vc->num_threads;
2756 cip->vc[0] = vc;
2757 }
2758
2759 static bool subcore_config_ok(int n_subcores, int n_threads)
2760 {
2761 /*
2762 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2763 * split-core mode, with one thread per subcore.
2764 */
2765 if (cpu_has_feature(CPU_FTR_ARCH_300))
2766 return n_subcores <= 4 && n_threads == 1;
2767
2768 /* On POWER8, can only dynamically split if unsplit to begin with */
2769 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2770 return false;
2771 if (n_subcores > MAX_SUBCORES)
2772 return false;
2773 if (n_subcores > 1) {
2774 if (!(dynamic_mt_modes & 2))
2775 n_subcores = 4;
2776 if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2777 return false;
2778 }
2779
2780 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
2781 }
2782
2783 static void init_vcore_to_run(struct kvmppc_vcore *vc)
2784 {
2785 vc->entry_exit_map = 0;
2786 vc->in_guest = 0;
2787 vc->napping_threads = 0;
2788 vc->conferring_threads = 0;
2789 vc->tb_offset_applied = 0;
2790 }
2791
2792 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2793 {
2794 int n_threads = vc->num_threads;
2795 int sub;
2796
2797 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2798 return false;
2799
2800 /* In one_vm_per_core mode, require all vcores to be from the same vm */
2801 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm)
2802 return false;
2803
2804 /* Some POWER9 chips require all threads to be in the same MMU mode */
2805 if (no_mixing_hpt_and_radix &&
2806 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2807 return false;
2808
2809 if (n_threads < cip->max_subcore_threads)
2810 n_threads = cip->max_subcore_threads;
2811 if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
2812 return false;
2813 cip->max_subcore_threads = n_threads;
2814
2815 sub = cip->n_subcores;
2816 ++cip->n_subcores;
2817 cip->total_threads += vc->num_threads;
2818 cip->subcore_threads[sub] = vc->num_threads;
2819 cip->vc[sub] = vc;
2820 init_vcore_to_run(vc);
2821 list_del_init(&vc->preempt_list);
2822
2823 return true;
2824 }
2825
2826 /*
2827 * Work out whether it is possible to piggyback the execution of
2828 * vcore *pvc onto the execution of the other vcores described in *cip.
2829 */
2830 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2831 int target_threads)
2832 {
2833 if (cip->total_threads + pvc->num_threads > target_threads)
2834 return false;
2835
2836 return can_dynamic_split(pvc, cip);
2837 }
2838
2839 static void prepare_threads(struct kvmppc_vcore *vc)
2840 {
2841 int i;
2842 struct kvm_vcpu *vcpu;
2843
2844 for_each_runnable_thread(i, vcpu, vc) {
2845 if (signal_pending(vcpu->arch.run_task))
2846 vcpu->arch.ret = -EINTR;
2847 else if (vcpu->arch.vpa.update_pending ||
2848 vcpu->arch.slb_shadow.update_pending ||
2849 vcpu->arch.dtl.update_pending)
2850 vcpu->arch.ret = RESUME_GUEST;
2851 else
2852 continue;
2853 kvmppc_remove_runnable(vc, vcpu);
2854 wake_up(&vcpu->arch.cpu_run);
2855 }
2856 }
2857
2858 static void collect_piggybacks(struct core_info *cip, int target_threads)
2859 {
2860 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2861 struct kvmppc_vcore *pvc, *vcnext;
2862
2863 spin_lock(&lp->lock);
2864 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2865 if (!spin_trylock(&pvc->lock))
2866 continue;
2867 prepare_threads(pvc);
2868 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) {
2869 list_del_init(&pvc->preempt_list);
2870 if (pvc->runner == NULL) {
2871 pvc->vcore_state = VCORE_INACTIVE;
2872 kvmppc_core_end_stolen(pvc);
2873 }
2874 spin_unlock(&pvc->lock);
2875 continue;
2876 }
2877 if (!can_piggyback(pvc, cip, target_threads)) {
2878 spin_unlock(&pvc->lock);
2879 continue;
2880 }
2881 kvmppc_core_end_stolen(pvc);
2882 pvc->vcore_state = VCORE_PIGGYBACK;
2883 if (cip->total_threads >= target_threads)
2884 break;
2885 }
2886 spin_unlock(&lp->lock);
2887 }
2888
2889 static bool recheck_signals_and_mmu(struct core_info *cip)
2890 {
2891 int sub, i;
2892 struct kvm_vcpu *vcpu;
2893 struct kvmppc_vcore *vc;
2894
2895 for (sub = 0; sub < cip->n_subcores; ++sub) {
2896 vc = cip->vc[sub];
2897 if (!vc->kvm->arch.mmu_ready)
2898 return true;
2899 for_each_runnable_thread(i, vcpu, vc)
2900 if (signal_pending(vcpu->arch.run_task))
2901 return true;
2902 }
2903 return false;
2904 }
2905
2906 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
2907 {
2908 int still_running = 0, i;
2909 u64 now;
2910 long ret;
2911 struct kvm_vcpu *vcpu;
2912
2913 spin_lock(&vc->lock);
2914 now = get_tb();
2915 for_each_runnable_thread(i, vcpu, vc) {
2916 /*
2917 * It's safe to unlock the vcore in the loop here, because
2918 * for_each_runnable_thread() is safe against removal of
2919 * the vcpu, and the vcore state is VCORE_EXITING here,
2920 * so any vcpus becoming runnable will have their arch.trap
2921 * set to zero and can't actually run in the guest.
2922 */
2923 spin_unlock(&vc->lock);
2924 /* cancel pending dec exception if dec is positive */
2925 if (now < vcpu->arch.dec_expires &&
2926 kvmppc_core_pending_dec(vcpu))
2927 kvmppc_core_dequeue_dec(vcpu);
2928
2929 trace_kvm_guest_exit(vcpu);
2930
2931 ret = RESUME_GUEST;
2932 if (vcpu->arch.trap)
2933 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2934 vcpu->arch.run_task);
2935
2936 vcpu->arch.ret = ret;
2937 vcpu->arch.trap = 0;
2938
2939 spin_lock(&vc->lock);
2940 if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2941 if (vcpu->arch.pending_exceptions)
2942 kvmppc_core_prepare_to_enter(vcpu);
2943 if (vcpu->arch.ceded)
2944 kvmppc_set_timer(vcpu);
2945 else
2946 ++still_running;
2947 } else {
2948 kvmppc_remove_runnable(vc, vcpu);
2949 wake_up(&vcpu->arch.cpu_run);
2950 }
2951 }
2952 if (!is_master) {
2953 if (still_running > 0) {
2954 kvmppc_vcore_preempt(vc);
2955 } else if (vc->runner) {
2956 vc->vcore_state = VCORE_PREEMPT;
2957 kvmppc_core_start_stolen(vc);
2958 } else {
2959 vc->vcore_state = VCORE_INACTIVE;
2960 }
2961 if (vc->n_runnable > 0 && vc->runner == NULL) {
2962 /* make sure there's a candidate runner awake */
2963 i = -1;
2964 vcpu = next_runnable_thread(vc, &i);
2965 wake_up(&vcpu->arch.cpu_run);
2966 }
2967 }
2968 spin_unlock(&vc->lock);
2969 }
2970
2971 /*
2972 * Clear core from the list of active host cores as we are about to
2973 * enter the guest. Only do this if it is the primary thread of the
2974 * core (not if a subcore) that is entering the guest.
2975 */
2976 static inline int kvmppc_clear_host_core(unsigned int cpu)
2977 {
2978 int core;
2979
2980 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
2981 return 0;
2982 /*
2983 * Memory barrier can be omitted here as we will do a smp_wmb()
2984 * later in kvmppc_start_thread and we need ensure that state is
2985 * visible to other CPUs only after we enter guest.
2986 */
2987 core = cpu >> threads_shift;
2988 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
2989 return 0;
2990 }
2991
2992 /*
2993 * Advertise this core as an active host core since we exited the guest
2994 * Only need to do this if it is the primary thread of the core that is
2995 * exiting.
2996 */
2997 static inline int kvmppc_set_host_core(unsigned int cpu)
2998 {
2999 int core;
3000
3001 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
3002 return 0;
3003
3004 /*
3005 * Memory barrier can be omitted here because we do a spin_unlock
3006 * immediately after this which provides the memory barrier.
3007 */
3008 core = cpu >> threads_shift;
3009 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
3010 return 0;
3011 }
3012
3013 static void set_irq_happened(int trap)
3014 {
3015 switch (trap) {
3016 case BOOK3S_INTERRUPT_EXTERNAL:
3017 local_paca->irq_happened |= PACA_IRQ_EE;
3018 break;
3019 case BOOK3S_INTERRUPT_H_DOORBELL:
3020 local_paca->irq_happened |= PACA_IRQ_DBELL;
3021 break;
3022 case BOOK3S_INTERRUPT_HMI:
3023 local_paca->irq_happened |= PACA_IRQ_HMI;
3024 break;
3025 case BOOK3S_INTERRUPT_SYSTEM_RESET:
3026 replay_system_reset();
3027 break;
3028 }
3029 }
3030
3031 /*
3032 * Run a set of guest threads on a physical core.
3033 * Called with vc->lock held.
3034 */
3035 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
3036 {
3037 struct kvm_vcpu *vcpu;
3038 int i;
3039 int srcu_idx;
3040 struct core_info core_info;
3041 struct kvmppc_vcore *pvc;
3042 struct kvm_split_mode split_info, *sip;
3043 int split, subcore_size, active;
3044 int sub;
3045 bool thr0_done;
3046 unsigned long cmd_bit, stat_bit;
3047 int pcpu, thr;
3048 int target_threads;
3049 int controlled_threads;
3050 int trap;
3051 bool is_power8;
3052 bool hpt_on_radix;
3053
3054 /*
3055 * Remove from the list any threads that have a signal pending
3056 * or need a VPA update done
3057 */
3058 prepare_threads(vc);
3059
3060 /* if the runner is no longer runnable, let the caller pick a new one */
3061 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
3062 return;
3063
3064 /*
3065 * Initialize *vc.
3066 */
3067 init_vcore_to_run(vc);
3068 vc->preempt_tb = TB_NIL;
3069
3070 /*
3071 * Number of threads that we will be controlling: the same as
3072 * the number of threads per subcore, except on POWER9,
3073 * where it's 1 because the threads are (mostly) independent.
3074 */
3075 controlled_threads = threads_per_vcore(vc->kvm);
3076
3077 /*
3078 * Make sure we are running on primary threads, and that secondary
3079 * threads are offline. Also check if the number of threads in this
3080 * guest are greater than the current system threads per guest.
3081 * On POWER9, we need to be not in independent-threads mode if
3082 * this is a HPT guest on a radix host machine where the
3083 * CPU threads may not be in different MMU modes.
3084 */
3085 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
3086 !kvm_is_radix(vc->kvm);
3087 if (((controlled_threads > 1) &&
3088 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
3089 (hpt_on_radix && vc->kvm->arch.threads_indep)) {
3090 for_each_runnable_thread(i, vcpu, vc) {
3091 vcpu->arch.ret = -EBUSY;
3092 kvmppc_remove_runnable(vc, vcpu);
3093 wake_up(&vcpu->arch.cpu_run);
3094 }
3095 goto out;
3096 }
3097
3098 /*
3099 * See if we could run any other vcores on the physical core
3100 * along with this one.
3101 */
3102 init_core_info(&core_info, vc);
3103 pcpu = smp_processor_id();
3104 target_threads = controlled_threads;
3105 if (target_smt_mode && target_smt_mode < target_threads)
3106 target_threads = target_smt_mode;
3107 if (vc->num_threads < target_threads)
3108 collect_piggybacks(&core_info, target_threads);
3109
3110 /*
3111 * On radix, arrange for TLB flushing if necessary.
3112 * This has to be done before disabling interrupts since
3113 * it uses smp_call_function().
3114 */
3115 pcpu = smp_processor_id();
3116 if (kvm_is_radix(vc->kvm)) {
3117 for (sub = 0; sub < core_info.n_subcores; ++sub)
3118 for_each_runnable_thread(i, vcpu, core_info.vc[sub])
3119 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
3120 }
3121
3122 /*
3123 * Hard-disable interrupts, and check resched flag and signals.
3124 * If we need to reschedule or deliver a signal, clean up
3125 * and return without going into the guest(s).
3126 * If the mmu_ready flag has been cleared, don't go into the
3127 * guest because that means a HPT resize operation is in progress.
3128 */
3129 local_irq_disable();
3130 hard_irq_disable();
3131 if (lazy_irq_pending() || need_resched() ||
3132 recheck_signals_and_mmu(&core_info)) {
3133 local_irq_enable();
3134 vc->vcore_state = VCORE_INACTIVE;
3135 /* Unlock all except the primary vcore */
3136 for (sub = 1; sub < core_info.n_subcores; ++sub) {
3137 pvc = core_info.vc[sub];
3138 /* Put back on to the preempted vcores list */
3139 kvmppc_vcore_preempt(pvc);
3140 spin_unlock(&pvc->lock);
3141 }
3142 for (i = 0; i < controlled_threads; ++i)
3143 kvmppc_release_hwthread(pcpu + i);
3144 return;
3145 }
3146
3147 kvmppc_clear_host_core(pcpu);
3148
3149 /* Decide on micro-threading (split-core) mode */
3150 subcore_size = threads_per_subcore;
3151 cmd_bit = stat_bit = 0;
3152 split = core_info.n_subcores;
3153 sip = NULL;
3154 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
3155 && !cpu_has_feature(CPU_FTR_ARCH_300);
3156
3157 if (split > 1 || hpt_on_radix) {
3158 sip = &split_info;
3159 memset(&split_info, 0, sizeof(split_info));
3160 for (sub = 0; sub < core_info.n_subcores; ++sub)
3161 split_info.vc[sub] = core_info.vc[sub];
3162
3163 if (is_power8) {
3164 if (split == 2 && (dynamic_mt_modes & 2)) {
3165 cmd_bit = HID0_POWER8_1TO2LPAR;
3166 stat_bit = HID0_POWER8_2LPARMODE;
3167 } else {
3168 split = 4;
3169 cmd_bit = HID0_POWER8_1TO4LPAR;
3170 stat_bit = HID0_POWER8_4LPARMODE;
3171 }
3172 subcore_size = MAX_SMT_THREADS / split;
3173 split_info.rpr = mfspr(SPRN_RPR);
3174 split_info.pmmar = mfspr(SPRN_PMMAR);
3175 split_info.ldbar = mfspr(SPRN_LDBAR);
3176 split_info.subcore_size = subcore_size;
3177 } else {
3178 split_info.subcore_size = 1;
3179 if (hpt_on_radix) {
3180 /* Use the split_info for LPCR/LPIDR changes */
3181 split_info.lpcr_req = vc->lpcr;
3182 split_info.lpidr_req = vc->kvm->arch.lpid;
3183 split_info.host_lpcr = vc->kvm->arch.host_lpcr;
3184 split_info.do_set = 1;
3185 }
3186 }
3187
3188 /* order writes to split_info before kvm_split_mode pointer */
3189 smp_wmb();
3190 }
3191
3192 for (thr = 0; thr < controlled_threads; ++thr) {
3193 struct paca_struct *paca = paca_ptrs[pcpu + thr];
3194
3195 paca->kvm_hstate.tid = thr;
3196 paca->kvm_hstate.napping = 0;
3197 paca->kvm_hstate.kvm_split_mode = sip;
3198 }
3199
3200 /* Initiate micro-threading (split-core) on POWER8 if required */
3201 if (cmd_bit) {
3202 unsigned long hid0 = mfspr(SPRN_HID0);
3203
3204 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
3205 mb();
3206 mtspr(SPRN_HID0, hid0);
3207 isync();
3208 for (;;) {
3209 hid0 = mfspr(SPRN_HID0);
3210 if (hid0 & stat_bit)
3211 break;
3212 cpu_relax();
3213 }
3214 }
3215
3216 /*
3217 * On POWER8, set RWMR register.
3218 * Since it only affects PURR and SPURR, it doesn't affect
3219 * the host, so we don't save/restore the host value.
3220 */
3221 if (is_power8) {
3222 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD;
3223 int n_online = atomic_read(&vc->online_count);
3224
3225 /*
3226 * Use the 8-thread value if we're doing split-core
3227 * or if the vcore's online count looks bogus.
3228 */
3229 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS &&
3230 n_online >= 1 && n_online <= MAX_SMT_THREADS)
3231 rwmr_val = p8_rwmr_values[n_online];
3232 mtspr(SPRN_RWMR, rwmr_val);
3233 }
3234
3235 /* Start all the threads */
3236 active = 0;
3237 for (sub = 0; sub < core_info.n_subcores; ++sub) {
3238 thr = is_power8 ? subcore_thread_map[sub] : sub;
3239 thr0_done = false;
3240 active |= 1 << thr;
3241 pvc = core_info.vc[sub];
3242 pvc->pcpu = pcpu + thr;
3243 for_each_runnable_thread(i, vcpu, pvc) {
3244 kvmppc_start_thread(vcpu, pvc);
3245 kvmppc_create_dtl_entry(vcpu, pvc);
3246 trace_kvm_guest_enter(vcpu);
3247 if (!vcpu->arch.ptid)
3248 thr0_done = true;
3249 active |= 1 << (thr + vcpu->arch.ptid);
3250 }
3251 /*
3252 * We need to start the first thread of each subcore
3253 * even if it doesn't have a vcpu.
3254 */
3255 if (!thr0_done)
3256 kvmppc_start_thread(NULL, pvc);
3257 }
3258
3259 /*
3260 * Ensure that split_info.do_nap is set after setting
3261 * the vcore pointer in the PACA of the secondaries.
3262 */
3263 smp_mb();
3264
3265 /*
3266 * When doing micro-threading, poke the inactive threads as well.
3267 * This gets them to the nap instruction after kvm_do_nap,
3268 * which reduces the time taken to unsplit later.
3269 * For POWER9 HPT guest on radix host, we need all the secondary
3270 * threads woken up so they can do the LPCR/LPIDR change.
3271 */
3272 if (cmd_bit || hpt_on_radix) {
3273 split_info.do_nap = 1; /* ask secondaries to nap when done */
3274 for (thr = 1; thr < threads_per_subcore; ++thr)
3275 if (!(active & (1 << thr)))
3276 kvmppc_ipi_thread(pcpu + thr);
3277 }
3278
3279 vc->vcore_state = VCORE_RUNNING;
3280 preempt_disable();
3281
3282 trace_kvmppc_run_core(vc, 0);
3283
3284 for (sub = 0; sub < core_info.n_subcores; ++sub)
3285 spin_unlock(&core_info.vc[sub]->lock);
3286
3287 guest_enter_irqoff();
3288
3289 srcu_idx = srcu_read_lock(&vc->kvm->srcu);
3290
3291 this_cpu_disable_ftrace();
3292
3293 /*
3294 * Interrupts will be enabled once we get into the guest,
3295 * so tell lockdep that we're about to enable interrupts.
3296 */
3297 trace_hardirqs_on();
3298
3299 trap = __kvmppc_vcore_entry();
3300
3301 trace_hardirqs_off();
3302
3303 this_cpu_enable_ftrace();
3304
3305 srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
3306
3307 set_irq_happened(trap);
3308
3309 spin_lock(&vc->lock);
3310 /* prevent other vcpu threads from doing kvmppc_start_thread() now */
3311 vc->vcore_state = VCORE_EXITING;
3312
3313 /* wait for secondary threads to finish writing their state to memory */
3314 kvmppc_wait_for_nap(controlled_threads);
3315
3316 /* Return to whole-core mode if we split the core earlier */
3317 if (cmd_bit) {
3318 unsigned long hid0 = mfspr(SPRN_HID0);
3319 unsigned long loops = 0;
3320
3321 hid0 &= ~HID0_POWER8_DYNLPARDIS;
3322 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
3323 mb();
3324 mtspr(SPRN_HID0, hid0);
3325 isync();
3326 for (;;) {
3327 hid0 = mfspr(SPRN_HID0);
3328 if (!(hid0 & stat_bit))
3329 break;
3330 cpu_relax();
3331 ++loops;
3332 }
3333 } else if (hpt_on_radix) {
3334 /* Wait for all threads to have seen final sync */
3335 for (thr = 1; thr < controlled_threads; ++thr) {
3336 struct paca_struct *paca = paca_ptrs[pcpu + thr];
3337
3338 while (paca->kvm_hstate.kvm_split_mode) {
3339 HMT_low();
3340 barrier();
3341 }
3342 HMT_medium();
3343 }
3344 }
3345 split_info.do_nap = 0;
3346
3347 kvmppc_set_host_core(pcpu);
3348
3349 local_irq_enable();
3350 guest_exit();
3351
3352 /* Let secondaries go back to the offline loop */
3353 for (i = 0; i < controlled_threads; ++i) {
3354 kvmppc_release_hwthread(pcpu + i);
3355 if (sip && sip->napped[i])
3356 kvmppc_ipi_thread(pcpu + i);
3357 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
3358 }
3359
3360 spin_unlock(&vc->lock);
3361
3362 /* make sure updates to secondary vcpu structs are visible now */
3363 smp_mb();
3364
3365 preempt_enable();
3366
3367 for (sub = 0; sub < core_info.n_subcores; ++sub) {
3368 pvc = core_info.vc[sub];
3369 post_guest_process(pvc, pvc == vc);
3370 }
3371
3372 spin_lock(&vc->lock);
3373
3374 out:
3375 vc->vcore_state = VCORE_INACTIVE;
3376 trace_kvmppc_run_core(vc, 1);
3377 }
3378
3379 /*
3380 * Load up hypervisor-mode registers on P9.
3381 */
3382 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
3383 unsigned long lpcr)
3384 {
3385 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3386 s64 hdec;
3387 u64 tb, purr, spurr;
3388 int trap;
3389 unsigned long host_hfscr = mfspr(SPRN_HFSCR);
3390 unsigned long host_ciabr = mfspr(SPRN_CIABR);
3391 unsigned long host_dawr = mfspr(SPRN_DAWR);
3392 unsigned long host_dawrx = mfspr(SPRN_DAWRX);
3393 unsigned long host_psscr = mfspr(SPRN_PSSCR);
3394 unsigned long host_pidr = mfspr(SPRN_PID);
3395
3396 hdec = time_limit - mftb();
3397 if (hdec < 0)
3398 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3399 mtspr(SPRN_HDEC, hdec);
3400
3401 if (vc->tb_offset) {
3402 u64 new_tb = mftb() + vc->tb_offset;
3403 mtspr(SPRN_TBU40, new_tb);
3404 tb = mftb();
3405 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3406 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3407 vc->tb_offset_applied = vc->tb_offset;
3408 }
3409
3410 if (vc->pcr)
3411 mtspr(SPRN_PCR, vc->pcr | PCR_MASK);
3412 mtspr(SPRN_DPDES, vc->dpdes);
3413 mtspr(SPRN_VTB, vc->vtb);
3414
3415 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR);
3416 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR);
3417 mtspr(SPRN_PURR, vcpu->arch.purr);
3418 mtspr(SPRN_SPURR, vcpu->arch.spurr);
3419
3420 if (dawr_enabled()) {
3421 mtspr(SPRN_DAWR, vcpu->arch.dawr);
3422 mtspr(SPRN_DAWRX, vcpu->arch.dawrx);
3423 }
3424 mtspr(SPRN_CIABR, vcpu->arch.ciabr);
3425 mtspr(SPRN_IC, vcpu->arch.ic);
3426 mtspr(SPRN_PID, vcpu->arch.pid);
3427
3428 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC |
3429 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
3430
3431 mtspr(SPRN_HFSCR, vcpu->arch.hfscr);
3432
3433 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0);
3434 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1);
3435 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2);
3436 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3);
3437
3438 mtspr(SPRN_AMOR, ~0UL);
3439
3440 mtspr(SPRN_LPCR, lpcr);
3441 isync();
3442
3443 kvmppc_xive_push_vcpu(vcpu);
3444
3445 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0);
3446 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);
3447
3448 trap = __kvmhv_vcpu_entry_p9(vcpu);
3449
3450 /* Advance host PURR/SPURR by the amount used by guest */
3451 purr = mfspr(SPRN_PURR);
3452 spurr = mfspr(SPRN_SPURR);
3453 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr +
3454 purr - vcpu->arch.purr);
3455 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr +
3456 spurr - vcpu->arch.spurr);
3457 vcpu->arch.purr = purr;
3458 vcpu->arch.spurr = spurr;
3459
3460 vcpu->arch.ic = mfspr(SPRN_IC);
3461 vcpu->arch.pid = mfspr(SPRN_PID);
3462 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS;
3463
3464 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0);
3465 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1);
3466 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2);
3467 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3);
3468
3469 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */
3470 mtspr(SPRN_PSSCR, host_psscr |
3471 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
3472 mtspr(SPRN_HFSCR, host_hfscr);
3473 mtspr(SPRN_CIABR, host_ciabr);
3474 mtspr(SPRN_DAWR, host_dawr);
3475 mtspr(SPRN_DAWRX, host_dawrx);
3476 mtspr(SPRN_PID, host_pidr);
3477
3478 /*
3479 * Since this is radix, do a eieio; tlbsync; ptesync sequence in
3480 * case we interrupted the guest between a tlbie and a ptesync.
3481 */
3482 asm volatile("eieio; tlbsync; ptesync");
3483
3484 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */
3485 isync();
3486
3487 vc->dpdes = mfspr(SPRN_DPDES);
3488 vc->vtb = mfspr(SPRN_VTB);
3489 mtspr(SPRN_DPDES, 0);
3490 if (vc->pcr)
3491 mtspr(SPRN_PCR, PCR_MASK);
3492
3493 if (vc->tb_offset_applied) {
3494 u64 new_tb = mftb() - vc->tb_offset_applied;
3495 mtspr(SPRN_TBU40, new_tb);
3496 tb = mftb();
3497 if ((tb & 0xffffff) < (new_tb & 0xffffff))
3498 mtspr(SPRN_TBU40, new_tb + 0x1000000);
3499 vc->tb_offset_applied = 0;
3500 }
3501
3502 mtspr(SPRN_HDEC, 0x7fffffff);
3503 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr);
3504
3505 return trap;
3506 }
3507
3508 /*
3509 * Virtual-mode guest entry for POWER9 and later when the host and
3510 * guest are both using the radix MMU. The LPIDR has already been set.
3511 */
3512 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
3513 unsigned long lpcr)
3514 {
3515 struct kvmppc_vcore *vc = vcpu->arch.vcore;
3516 unsigned long host_dscr = mfspr(SPRN_DSCR);
3517 unsigned long host_tidr = mfspr(SPRN_TIDR);
3518 unsigned long host_iamr = mfspr(SPRN_IAMR);
3519 unsigned long host_amr = mfspr(SPRN_AMR);
3520 s64 dec;
3521 u64 tb;
3522 int trap, save_pmu;
3523
3524 dec = mfspr(SPRN_DEC);
3525 tb = mftb();
3526 if (dec < 512)
3527 return BOOK3S_INTERRUPT_HV_DECREMENTER;
3528 local_paca->kvm_hstate.dec_expires = dec + tb;
3529 if (local_paca->kvm_hstate.dec_expires < time_limit)
3530 time_limit = local_paca->kvm_hstate.dec_expires;
3531
3532 vcpu->arch.ceded = 0;
3533
3534 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */
3535
3536 kvmppc_subcore_enter_guest();
3537
3538 vc->entry_exit_map = 1;
3539 vc->in_guest = 1;
3540
3541 if (vcpu->arch.vpa.pinned_addr) {
3542 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3543 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3544 lp->yield_count = cpu_to_be32(yield_count);
3545 vcpu->arch.vpa.dirty = 1;
3546 }
3547
3548 if (cpu_has_feature(CPU_FTR_TM) ||
3549 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3550 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3551
3552 kvmhv_load_guest_pmu(vcpu);
3553
3554 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3555 load_fp_state(&vcpu->arch.fp);
3556 #ifdef CONFIG_ALTIVEC
3557 load_vr_state(&vcpu->arch.vr);
3558 #endif
3559 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
3560
3561 mtspr(SPRN_DSCR, vcpu->arch.dscr);
3562 mtspr(SPRN_IAMR, vcpu->arch.iamr);
3563 mtspr(SPRN_PSPB, vcpu->arch.pspb);
3564 mtspr(SPRN_FSCR, vcpu->arch.fscr);
3565 mtspr(SPRN_TAR, vcpu->arch.tar);
3566 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
3567 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
3568 mtspr(SPRN_BESCR, vcpu->arch.bescr);
3569 mtspr(SPRN_WORT, vcpu->arch.wort);
3570 mtspr(SPRN_TIDR, vcpu->arch.tid);
3571 mtspr(SPRN_DAR, vcpu->arch.shregs.dar);
3572 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr);
3573 mtspr(SPRN_AMR, vcpu->arch.amr);
3574 mtspr(SPRN_UAMOR, vcpu->arch.uamor);
3575
3576 if (!(vcpu->arch.ctrl & 1))
3577 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1);
3578
3579 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb());
3580
3581 if (kvmhv_on_pseries()) {
3582 /*
3583 * We need to save and restore the guest visible part of the
3584 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor
3585 * doesn't do this for us. Note only required if pseries since
3586 * this is done in kvmhv_load_hv_regs_and_go() below otherwise.
3587 */
3588 unsigned long host_psscr;
3589 /* call our hypervisor to load up HV regs and go */
3590 struct hv_guest_state hvregs;
3591
3592 host_psscr = mfspr(SPRN_PSSCR_PR);
3593 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr);
3594 kvmhv_save_hv_regs(vcpu, &hvregs);
3595 hvregs.lpcr = lpcr;
3596 vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
3597 hvregs.version = HV_GUEST_STATE_VERSION;
3598 if (vcpu->arch.nested) {
3599 hvregs.lpid = vcpu->arch.nested->shadow_lpid;
3600 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id;
3601 } else {
3602 hvregs.lpid = vcpu->kvm->arch.lpid;
3603 hvregs.vcpu_token = vcpu->vcpu_id;
3604 }
3605 hvregs.hdec_expiry = time_limit;
3606 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs),
3607 __pa(&vcpu->arch.regs));
3608 kvmhv_restore_hv_return_state(vcpu, &hvregs);
3609 vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
3610 vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
3611 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR);
3612 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR);
3613 mtspr(SPRN_PSSCR_PR, host_psscr);
3614
3615 /* H_CEDE has to be handled now, not later */
3616 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested &&
3617 kvmppc_get_gpr(vcpu, 3) == H_CEDE) {
3618 kvmppc_nested_cede(vcpu);
3619 trap = 0;
3620 }
3621 } else {
3622 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
3623 }
3624
3625 vcpu->arch.slb_max = 0;
3626 dec = mfspr(SPRN_DEC);
3627 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */
3628 dec = (s32) dec;
3629 tb = mftb();
3630 vcpu->arch.dec_expires = dec + tb;
3631 vcpu->cpu = -1;
3632 vcpu->arch.thread_cpu = -1;
3633 vcpu->arch.ctrl = mfspr(SPRN_CTRLF);
3634
3635 vcpu->arch.iamr = mfspr(SPRN_IAMR);
3636 vcpu->arch.pspb = mfspr(SPRN_PSPB);
3637 vcpu->arch.fscr = mfspr(SPRN_FSCR);
3638 vcpu->arch.tar = mfspr(SPRN_TAR);
3639 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
3640 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
3641 vcpu->arch.bescr = mfspr(SPRN_BESCR);
3642 vcpu->arch.wort = mfspr(SPRN_WORT);
3643 vcpu->arch.tid = mfspr(SPRN_TIDR);
3644 vcpu->arch.amr = mfspr(SPRN_AMR);
3645 vcpu->arch.uamor = mfspr(SPRN_UAMOR);
3646 vcpu->arch.dscr = mfspr(SPRN_DSCR);
3647
3648 mtspr(SPRN_PSPB, 0);
3649 mtspr(SPRN_WORT, 0);
3650 mtspr(SPRN_UAMOR, 0);
3651 mtspr(SPRN_DSCR, host_dscr);
3652 mtspr(SPRN_TIDR, host_tidr);
3653 mtspr(SPRN_IAMR, host_iamr);
3654 mtspr(SPRN_PSPB, 0);
3655
3656 if (host_amr != vcpu->arch.amr)
3657 mtspr(SPRN_AMR, host_amr);
3658
3659 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3660 store_fp_state(&vcpu->arch.fp);
3661 #ifdef CONFIG_ALTIVEC
3662 store_vr_state(&vcpu->arch.vr);
3663 #endif
3664 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
3665
3666 if (cpu_has_feature(CPU_FTR_TM) ||
3667 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3668 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3669
3670 save_pmu = 1;
3671 if (vcpu->arch.vpa.pinned_addr) {
3672 struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3673 u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3674 lp->yield_count = cpu_to_be32(yield_count);
3675 vcpu->arch.vpa.dirty = 1;
3676 save_pmu = lp->pmcregs_in_use;
3677 }
3678 /* Must save pmu if this guest is capable of running nested guests */
3679 save_pmu |= nesting_enabled(vcpu->kvm);
3680
3681 kvmhv_save_guest_pmu(vcpu, save_pmu);
3682
3683 vc->entry_exit_map = 0x101;
3684 vc->in_guest = 0;
3685
3686 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb());
3687 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso);
3688
3689 kvmhv_load_host_pmu();
3690
3691 kvmppc_subcore_exit_guest();
3692
3693 return trap;
3694 }
3695
3696 /*
3697 * Wait for some other vcpu thread to execute us, and
3698 * wake us up when we need to handle something in the host.
3699 */
3700 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3701 struct kvm_vcpu *vcpu, int wait_state)
3702 {
3703 DEFINE_WAIT(wait);
3704
3705 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
3706 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3707 spin_unlock(&vc->lock);
3708 schedule();
3709 spin_lock(&vc->lock);
3710 }
3711 finish_wait(&vcpu->arch.cpu_run, &wait);
3712 }
3713
3714 static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3715 {
3716 if (!halt_poll_ns_grow)
3717 return;
3718
3719 vc->halt_poll_ns *= halt_poll_ns_grow;
3720 if (vc->halt_poll_ns < halt_poll_ns_grow_start)
3721 vc->halt_poll_ns = halt_poll_ns_grow_start;
3722 }
3723
3724 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3725 {
3726 if (halt_poll_ns_shrink == 0)
3727 vc->halt_poll_ns = 0;
3728 else
3729 vc->halt_poll_ns /= halt_poll_ns_shrink;
3730 }
3731
3732 #ifdef CONFIG_KVM_XICS
3733 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3734 {
3735 if (!xics_on_xive())
3736 return false;
3737 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
3738 vcpu->arch.xive_saved_state.cppr;
3739 }
3740 #else
3741 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3742 {
3743 return false;
3744 }
3745 #endif /* CONFIG_KVM_XICS */
3746
3747 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3748 {
3749 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
3750 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
3751 return true;
3752
3753 return false;
3754 }
3755
3756 /*
3757 * Check to see if any of the runnable vcpus on the vcore have pending
3758 * exceptions or are no longer ceded
3759 */
3760 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3761 {
3762 struct kvm_vcpu *vcpu;
3763 int i;
3764
3765 for_each_runnable_thread(i, vcpu, vc) {
3766 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
3767 return 1;
3768 }
3769
3770 return 0;
3771 }
3772
3773 /*
3774 * All the vcpus in this vcore are idle, so wait for a decrementer
3775 * or external interrupt to one of the vcpus. vc->lock is held.
3776 */
3777 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3778 {
3779 ktime_t cur, start_poll, start_wait;
3780 int do_sleep = 1;
3781 u64 block_ns;
3782 DECLARE_SWAITQUEUE(wait);
3783
3784 /* Poll for pending exceptions and ceded state */
3785 cur = start_poll = ktime_get();
3786 if (vc->halt_poll_ns) {
3787 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3788 ++vc->runner->stat.halt_attempted_poll;
3789
3790 vc->vcore_state = VCORE_POLLING;
3791 spin_unlock(&vc->lock);
3792
3793 do {
3794 if (kvmppc_vcore_check_block(vc)) {
3795 do_sleep = 0;
3796 break;
3797 }
3798 cur = ktime_get();
3799 } while (single_task_running() && ktime_before(cur, stop));
3800
3801 spin_lock(&vc->lock);
3802 vc->vcore_state = VCORE_INACTIVE;
3803
3804 if (!do_sleep) {
3805 ++vc->runner->stat.halt_successful_poll;
3806 goto out;
3807 }
3808 }
3809
3810 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE);
3811
3812 if (kvmppc_vcore_check_block(vc)) {
3813 finish_swait(&vc->wq, &wait);
3814 do_sleep = 0;
3815 /* If we polled, count this as a successful poll */
3816 if (vc->halt_poll_ns)
3817 ++vc->runner->stat.halt_successful_poll;
3818 goto out;
3819 }
3820
3821 start_wait = ktime_get();
3822
3823 vc->vcore_state = VCORE_SLEEPING;
3824 trace_kvmppc_vcore_blocked(vc, 0);
3825 spin_unlock(&vc->lock);
3826 schedule();
3827 finish_swait(&vc->wq, &wait);
3828 spin_lock(&vc->lock);
3829 vc->vcore_state = VCORE_INACTIVE;
3830 trace_kvmppc_vcore_blocked(vc, 1);
3831 ++vc->runner->stat.halt_successful_wait;
3832
3833 cur = ktime_get();
3834
3835 out:
3836 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3837
3838 /* Attribute wait time */
3839 if (do_sleep) {
3840 vc->runner->stat.halt_wait_ns +=
3841 ktime_to_ns(cur) - ktime_to_ns(start_wait);
3842 /* Attribute failed poll time */
3843 if (vc->halt_poll_ns)
3844 vc->runner->stat.halt_poll_fail_ns +=
3845 ktime_to_ns(start_wait) -
3846 ktime_to_ns(start_poll);
3847 } else {
3848 /* Attribute successful poll time */
3849 if (vc->halt_poll_ns)
3850 vc->runner->stat.halt_poll_success_ns +=
3851 ktime_to_ns(cur) -
3852 ktime_to_ns(start_poll);
3853 }
3854
3855 /* Adjust poll time */
3856 if (halt_poll_ns) {
3857 if (block_ns <= vc->halt_poll_ns)
3858 ;
3859 /* We slept and blocked for longer than the max halt time */
3860 else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
3861 shrink_halt_poll_ns(vc);
3862 /* We slept and our poll time is too small */
3863 else if (vc->halt_poll_ns < halt_poll_ns &&
3864 block_ns < halt_poll_ns)
3865 grow_halt_poll_ns(vc);
3866 if (vc->halt_poll_ns > halt_poll_ns)
3867 vc->halt_poll_ns = halt_poll_ns;
3868 } else
3869 vc->halt_poll_ns = 0;
3870
3871 trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
3872 }
3873
3874 /*
3875 * This never fails for a radix guest, as none of the operations it does
3876 * for a radix guest can fail or have a way to report failure.
3877 * kvmhv_run_single_vcpu() relies on this fact.
3878 */
3879 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3880 {
3881 int r = 0;
3882 struct kvm *kvm = vcpu->kvm;
3883
3884 mutex_lock(&kvm->arch.mmu_setup_lock);
3885 if (!kvm->arch.mmu_ready) {
3886 if (!kvm_is_radix(kvm))
3887 r = kvmppc_hv_setup_htab_rma(vcpu);
3888 if (!r) {
3889 if (cpu_has_feature(CPU_FTR_ARCH_300))
3890 kvmppc_setup_partition_table(kvm);
3891 kvm->arch.mmu_ready = 1;
3892 }
3893 }
3894 mutex_unlock(&kvm->arch.mmu_setup_lock);
3895 return r;
3896 }
3897
3898 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3899 {
3900 int n_ceded, i, r;
3901 struct kvmppc_vcore *vc;
3902 struct kvm_vcpu *v;
3903
3904 trace_kvmppc_run_vcpu_enter(vcpu);
3905
3906 kvm_run->exit_reason = 0;
3907 vcpu->arch.ret = RESUME_GUEST;
3908 vcpu->arch.trap = 0;
3909 kvmppc_update_vpas(vcpu);
3910
3911 /*
3912 * Synchronize with other threads in this virtual core
3913 */
3914 vc = vcpu->arch.vcore;
3915 spin_lock(&vc->lock);
3916 vcpu->arch.ceded = 0;
3917 vcpu->arch.run_task = current;
3918 vcpu->arch.kvm_run = kvm_run;
3919 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
3920 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
3921 vcpu->arch.busy_preempt = TB_NIL;
3922 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
3923 ++vc->n_runnable;
3924
3925 /*
3926 * This happens the first time this is called for a vcpu.
3927 * If the vcore is already running, we may be able to start
3928 * this thread straight away and have it join in.
3929 */
3930 if (!signal_pending(current)) {
3931 if ((vc->vcore_state == VCORE_PIGGYBACK ||
3932 vc->vcore_state == VCORE_RUNNING) &&
3933 !VCORE_IS_EXITING(vc)) {
3934 kvmppc_create_dtl_entry(vcpu, vc);
3935 kvmppc_start_thread(vcpu, vc);
3936 trace_kvm_guest_enter(vcpu);
3937 } else if (vc->vcore_state == VCORE_SLEEPING) {
3938 swake_up_one(&vc->wq);
3939 }
3940
3941 }
3942
3943 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3944 !signal_pending(current)) {
3945 /* See if the MMU is ready to go */
3946 if (!vcpu->kvm->arch.mmu_ready) {
3947 spin_unlock(&vc->lock);
3948 r = kvmhv_setup_mmu(vcpu);
3949 spin_lock(&vc->lock);
3950 if (r) {
3951 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
3952 kvm_run->fail_entry.
3953 hardware_entry_failure_reason = 0;
3954 vcpu->arch.ret = r;
3955 break;
3956 }
3957 }
3958
3959 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3960 kvmppc_vcore_end_preempt(vc);
3961
3962 if (vc->vcore_state != VCORE_INACTIVE) {
3963 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
3964 continue;
3965 }
3966 for_each_runnable_thread(i, v, vc) {
3967 kvmppc_core_prepare_to_enter(v);
3968 if (signal_pending(v->arch.run_task)) {
3969 kvmppc_remove_runnable(vc, v);
3970 v->stat.signal_exits++;
3971 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3972 v->arch.ret = -EINTR;
3973 wake_up(&v->arch.cpu_run);
3974 }
3975 }
3976 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3977 break;
3978 n_ceded = 0;
3979 for_each_runnable_thread(i, v, vc) {
3980 if (!kvmppc_vcpu_woken(v))
3981 n_ceded += v->arch.ceded;
3982 else
3983 v->arch.ceded = 0;
3984 }
3985 vc->runner = vcpu;
3986 if (n_ceded == vc->n_runnable) {
3987 kvmppc_vcore_blocked(vc);
3988 } else if (need_resched()) {
3989 kvmppc_vcore_preempt(vc);
3990 /* Let something else run */
3991 cond_resched_lock(&vc->lock);
3992 if (vc->vcore_state == VCORE_PREEMPT)
3993 kvmppc_vcore_end_preempt(vc);
3994 } else {
3995 kvmppc_run_core(vc);
3996 }
3997 vc->runner = NULL;
3998 }
3999
4000 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
4001 (vc->vcore_state == VCORE_RUNNING ||
4002 vc->vcore_state == VCORE_EXITING ||
4003 vc->vcore_state == VCORE_PIGGYBACK))
4004 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
4005
4006 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
4007 kvmppc_vcore_end_preempt(vc);
4008
4009 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
4010 kvmppc_remove_runnable(vc, vcpu);
4011 vcpu->stat.signal_exits++;
4012 kvm_run->exit_reason = KVM_EXIT_INTR;
4013 vcpu->arch.ret = -EINTR;
4014 }
4015
4016 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
4017 /* Wake up some vcpu to run the core */
4018 i = -1;
4019 v = next_runnable_thread(vc, &i);
4020 wake_up(&v->arch.cpu_run);
4021 }
4022
4023 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
4024 spin_unlock(&vc->lock);
4025 return vcpu->arch.ret;
4026 }
4027
4028 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run,
4029 struct kvm_vcpu *vcpu, u64 time_limit,
4030 unsigned long lpcr)
4031 {
4032 int trap, r, pcpu;
4033 int srcu_idx, lpid;
4034 struct kvmppc_vcore *vc;
4035 struct kvm *kvm = vcpu->kvm;
4036 struct kvm_nested_guest *nested = vcpu->arch.nested;
4037
4038 trace_kvmppc_run_vcpu_enter(vcpu);
4039
4040 kvm_run->exit_reason = 0;
4041 vcpu->arch.ret = RESUME_GUEST;
4042 vcpu->arch.trap = 0;
4043
4044 vc = vcpu->arch.vcore;
4045 vcpu->arch.ceded = 0;
4046 vcpu->arch.run_task = current;
4047 vcpu->arch.kvm_run = kvm_run;
4048 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
4049 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
4050 vcpu->arch.busy_preempt = TB_NIL;
4051 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED;
4052 vc->runnable_threads[0] = vcpu;
4053 vc->n_runnable = 1;
4054 vc->runner = vcpu;
4055
4056 /* See if the MMU is ready to go */
4057 if (!kvm->arch.mmu_ready)
4058 kvmhv_setup_mmu(vcpu);
4059
4060 if (need_resched())
4061 cond_resched();
4062
4063 kvmppc_update_vpas(vcpu);
4064
4065 init_vcore_to_run(vc);
4066 vc->preempt_tb = TB_NIL;
4067
4068 preempt_disable();
4069 pcpu = smp_processor_id();
4070 vc->pcpu = pcpu;
4071 kvmppc_prepare_radix_vcpu(vcpu, pcpu);
4072
4073 local_irq_disable();
4074 hard_irq_disable();
4075 if (signal_pending(current))
4076 goto sigpend;
4077 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready)
4078 goto out;
4079
4080 if (!nested) {
4081 kvmppc_core_prepare_to_enter(vcpu);
4082 if (vcpu->arch.doorbell_request) {
4083 vc->dpdes = 1;
4084 smp_wmb();
4085 vcpu->arch.doorbell_request = 0;
4086 }
4087 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
4088 &vcpu->arch.pending_exceptions))
4089 lpcr |= LPCR_MER;
4090 } else if (vcpu->arch.pending_exceptions ||
4091 vcpu->arch.doorbell_request ||
4092 xive_interrupt_pending(vcpu)) {
4093 vcpu->arch.ret = RESUME_HOST;
4094 goto out;
4095 }
4096
4097 kvmppc_clear_host_core(pcpu);
4098
4099 local_paca->kvm_hstate.tid = 0;
4100 local_paca->kvm_hstate.napping = 0;
4101 local_paca->kvm_hstate.kvm_split_mode = NULL;
4102 kvmppc_start_thread(vcpu, vc);
4103 kvmppc_create_dtl_entry(vcpu, vc);
4104 trace_kvm_guest_enter(vcpu);
4105
4106 vc->vcore_state = VCORE_RUNNING;
4107 trace_kvmppc_run_core(vc, 0);
4108
4109 if (cpu_has_feature(CPU_FTR_HVMODE)) {
4110 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid;
4111 mtspr(SPRN_LPID, lpid);
4112 isync();
4113 kvmppc_check_need_tlb_flush(kvm, pcpu, nested);
4114 }
4115
4116 guest_enter_irqoff();
4117
4118 srcu_idx = srcu_read_lock(&kvm->srcu);
4119
4120 this_cpu_disable_ftrace();
4121
4122 /* Tell lockdep that we're about to enable interrupts */
4123 trace_hardirqs_on();
4124
4125 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr);
4126 vcpu->arch.trap = trap;
4127
4128 trace_hardirqs_off();
4129
4130 this_cpu_enable_ftrace();
4131
4132 srcu_read_unlock(&kvm->srcu, srcu_idx);
4133
4134 if (cpu_has_feature(CPU_FTR_HVMODE)) {
4135 mtspr(SPRN_LPID, kvm->arch.host_lpid);
4136 isync();
4137 }
4138
4139 set_irq_happened(trap);
4140
4141 kvmppc_set_host_core(pcpu);
4142
4143 local_irq_enable();
4144 guest_exit();
4145
4146 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest);
4147
4148 preempt_enable();
4149
4150 /*
4151 * cancel pending decrementer exception if DEC is now positive, or if
4152 * entering a nested guest in which case the decrementer is now owned
4153 * by L2 and the L1 decrementer is provided in hdec_expires
4154 */
4155 if (kvmppc_core_pending_dec(vcpu) &&
4156 ((get_tb() < vcpu->arch.dec_expires) ||
4157 (trap == BOOK3S_INTERRUPT_SYSCALL &&
4158 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED)))
4159 kvmppc_core_dequeue_dec(vcpu);
4160
4161 trace_kvm_guest_exit(vcpu);
4162 r = RESUME_GUEST;
4163 if (trap) {
4164 if (!nested)
4165 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current);
4166 else
4167 r = kvmppc_handle_nested_exit(kvm_run, vcpu);
4168 }
4169 vcpu->arch.ret = r;
4170
4171 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded &&
4172 !kvmppc_vcpu_woken(vcpu)) {
4173 kvmppc_set_timer(vcpu);
4174 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) {
4175 if (signal_pending(current)) {
4176 vcpu->stat.signal_exits++;
4177 kvm_run->exit_reason = KVM_EXIT_INTR;
4178 vcpu->arch.ret = -EINTR;
4179 break;
4180 }
4181 spin_lock(&vc->lock);
4182 kvmppc_vcore_blocked(vc);
4183 spin_unlock(&vc->lock);
4184 }
4185 }
4186 vcpu->arch.ceded = 0;
4187
4188 vc->vcore_state = VCORE_INACTIVE;
4189 trace_kvmppc_run_core(vc, 1);
4190
4191 done:
4192 kvmppc_remove_runnable(vc, vcpu);
4193 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
4194
4195 return vcpu->arch.ret;
4196
4197 sigpend:
4198 vcpu->stat.signal_exits++;
4199 kvm_run->exit_reason = KVM_EXIT_INTR;
4200 vcpu->arch.ret = -EINTR;
4201 out:
4202 local_irq_enable();
4203 preempt_enable();
4204 goto done;
4205 }
4206
4207 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
4208 {
4209 int r;
4210 int srcu_idx;
4211 unsigned long ebb_regs[3] = {}; /* shut up GCC */
4212 unsigned long user_tar = 0;
4213 unsigned int user_vrsave;
4214 struct kvm *kvm;
4215
4216 if (!vcpu->arch.sane) {
4217 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4218 return -EINVAL;
4219 }
4220
4221 /*
4222 * Don't allow entry with a suspended transaction, because
4223 * the guest entry/exit code will lose it.
4224 * If the guest has TM enabled, save away their TM-related SPRs
4225 * (they will get restored by the TM unavailable interrupt).
4226 */
4227 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
4228 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
4229 (current->thread.regs->msr & MSR_TM)) {
4230 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
4231 run->exit_reason = KVM_EXIT_FAIL_ENTRY;
4232 run->fail_entry.hardware_entry_failure_reason = 0;
4233 return -EINVAL;
4234 }
4235 /* Enable TM so we can read the TM SPRs */
4236 mtmsr(mfmsr() | MSR_TM);
4237 current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
4238 current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
4239 current->thread.tm_texasr = mfspr(SPRN_TEXASR);
4240 current->thread.regs->msr &= ~MSR_TM;
4241 }
4242 #endif
4243
4244 /*
4245 * Force online to 1 for the sake of old userspace which doesn't
4246 * set it.
4247 */
4248 if (!vcpu->arch.online) {
4249 atomic_inc(&vcpu->arch.vcore->online_count);
4250 vcpu->arch.online = 1;
4251 }
4252
4253 kvmppc_core_prepare_to_enter(vcpu);
4254
4255 /* No need to go into the guest when all we'll do is come back out */
4256 if (signal_pending(current)) {
4257 run->exit_reason = KVM_EXIT_INTR;
4258 return -EINTR;
4259 }
4260
4261 kvm = vcpu->kvm;
4262 atomic_inc(&kvm->arch.vcpus_running);
4263 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
4264 smp_mb();
4265
4266 flush_all_to_thread(current);
4267
4268 /* Save userspace EBB and other register values */
4269 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4270 ebb_regs[0] = mfspr(SPRN_EBBHR);
4271 ebb_regs[1] = mfspr(SPRN_EBBRR);
4272 ebb_regs[2] = mfspr(SPRN_BESCR);
4273 user_tar = mfspr(SPRN_TAR);
4274 }
4275 user_vrsave = mfspr(SPRN_VRSAVE);
4276
4277 vcpu->arch.wqp = &vcpu->arch.vcore->wq;
4278 vcpu->arch.pgdir = kvm->mm->pgd;
4279 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
4280
4281 do {
4282 /*
4283 * The early POWER9 chips that can't mix radix and HPT threads
4284 * on the same core also need the workaround for the problem
4285 * where the TLB would prefetch entries in the guest exit path
4286 * for radix guests using the guest PIDR value and LPID 0.
4287 * The workaround is in the old path (kvmppc_run_vcpu())
4288 * but not the new path (kvmhv_run_single_vcpu()).
4289 */
4290 if (kvm->arch.threads_indep && kvm_is_radix(kvm) &&
4291 !no_mixing_hpt_and_radix)
4292 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0,
4293 vcpu->arch.vcore->lpcr);
4294 else
4295 r = kvmppc_run_vcpu(run, vcpu);
4296
4297 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
4298 !(vcpu->arch.shregs.msr & MSR_PR)) {
4299 trace_kvm_hcall_enter(vcpu);
4300 r = kvmppc_pseries_do_hcall(vcpu);
4301 trace_kvm_hcall_exit(vcpu, r);
4302 kvmppc_core_prepare_to_enter(vcpu);
4303 } else if (r == RESUME_PAGE_FAULT) {
4304 srcu_idx = srcu_read_lock(&kvm->srcu);
4305 r = kvmppc_book3s_hv_page_fault(run, vcpu,
4306 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
4307 srcu_read_unlock(&kvm->srcu, srcu_idx);
4308 } else if (r == RESUME_PASSTHROUGH) {
4309 if (WARN_ON(xics_on_xive()))
4310 r = H_SUCCESS;
4311 else
4312 r = kvmppc_xics_rm_complete(vcpu, 0);
4313 }
4314 } while (is_kvmppc_resume_guest(r));
4315
4316 /* Restore userspace EBB and other register values */
4317 if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4318 mtspr(SPRN_EBBHR, ebb_regs[0]);
4319 mtspr(SPRN_EBBRR, ebb_regs[1]);
4320 mtspr(SPRN_BESCR, ebb_regs[2]);
4321 mtspr(SPRN_TAR, user_tar);
4322 mtspr(SPRN_FSCR, current->thread.fscr);
4323 }
4324 mtspr(SPRN_VRSAVE, user_vrsave);
4325
4326 vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
4327 atomic_dec(&kvm->arch.vcpus_running);
4328 return r;
4329 }
4330
4331 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
4332 int shift, int sllp)
4333 {
4334 (*sps)->page_shift = shift;
4335 (*sps)->slb_enc = sllp;
4336 (*sps)->enc[0].page_shift = shift;
4337 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
4338 /*
4339 * Add 16MB MPSS support (may get filtered out by userspace)
4340 */
4341 if (shift != 24) {
4342 int penc = kvmppc_pgsize_lp_encoding(shift, 24);
4343 if (penc != -1) {
4344 (*sps)->enc[1].page_shift = 24;
4345 (*sps)->enc[1].pte_enc = penc;
4346 }
4347 }
4348 (*sps)++;
4349 }
4350
4351 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
4352 struct kvm_ppc_smmu_info *info)
4353 {
4354 struct kvm_ppc_one_seg_page_size *sps;
4355
4356 /*
4357 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
4358 * POWER7 doesn't support keys for instruction accesses,
4359 * POWER8 and POWER9 do.
4360 */
4361 info->data_keys = 32;
4362 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
4363
4364 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
4365 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
4366 info->slb_size = 32;
4367
4368 /* We only support these sizes for now, and no muti-size segments */
4369 sps = &info->sps[0];
4370 kvmppc_add_seg_page_size(&sps, 12, 0);
4371 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
4372 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
4373
4374 /* If running as a nested hypervisor, we don't support HPT guests */
4375 if (kvmhv_on_pseries())
4376 info->flags |= KVM_PPC_NO_HASH;
4377
4378 return 0;
4379 }
4380
4381 /*
4382 * Get (and clear) the dirty memory log for a memory slot.
4383 */
4384 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
4385 struct kvm_dirty_log *log)
4386 {
4387 struct kvm_memslots *slots;
4388 struct kvm_memory_slot *memslot;
4389 int i, r;
4390 unsigned long n;
4391 unsigned long *buf, *p;
4392 struct kvm_vcpu *vcpu;
4393
4394 mutex_lock(&kvm->slots_lock);
4395
4396 r = -EINVAL;
4397 if (log->slot >= KVM_USER_MEM_SLOTS)
4398 goto out;
4399
4400 slots = kvm_memslots(kvm);
4401 memslot = id_to_memslot(slots, log->slot);
4402 r = -ENOENT;
4403 if (!memslot->dirty_bitmap)
4404 goto out;
4405
4406 /*
4407 * Use second half of bitmap area because both HPT and radix
4408 * accumulate bits in the first half.
4409 */
4410 n = kvm_dirty_bitmap_bytes(memslot);
4411 buf = memslot->dirty_bitmap + n / sizeof(long);
4412 memset(buf, 0, n);
4413
4414 if (kvm_is_radix(kvm))
4415 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
4416 else
4417 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
4418 if (r)
4419 goto out;
4420
4421 /*
4422 * We accumulate dirty bits in the first half of the
4423 * memslot's dirty_bitmap area, for when pages are paged
4424 * out or modified by the host directly. Pick up these
4425 * bits and add them to the map.
4426 */
4427 p = memslot->dirty_bitmap;
4428 for (i = 0; i < n / sizeof(long); ++i)
4429 buf[i] |= xchg(&p[i], 0);
4430
4431 /* Harvest dirty bits from VPA and DTL updates */
4432 /* Note: we never modify the SLB shadow buffer areas */
4433 kvm_for_each_vcpu(i, vcpu, kvm) {
4434 spin_lock(&vcpu->arch.vpa_update_lock);
4435 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
4436 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
4437 spin_unlock(&vcpu->arch.vpa_update_lock);
4438 }
4439
4440 r = -EFAULT;
4441 if (copy_to_user(log->dirty_bitmap, buf, n))
4442 goto out;
4443
4444 r = 0;
4445 out:
4446 mutex_unlock(&kvm->slots_lock);
4447 return r;
4448 }
4449
4450 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
4451 struct kvm_memory_slot *dont)
4452 {
4453 if (!dont || free->arch.rmap != dont->arch.rmap) {
4454 vfree(free->arch.rmap);
4455 free->arch.rmap = NULL;
4456 }
4457 }
4458
4459 static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
4460 unsigned long npages)
4461 {
4462 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap)));
4463 if (!slot->arch.rmap)
4464 return -ENOMEM;
4465
4466 return 0;
4467 }
4468
4469 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
4470 struct kvm_memory_slot *memslot,
4471 const struct kvm_userspace_memory_region *mem)
4472 {
4473 return 0;
4474 }
4475
4476 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
4477 const struct kvm_userspace_memory_region *mem,
4478 const struct kvm_memory_slot *old,
4479 const struct kvm_memory_slot *new,
4480 enum kvm_mr_change change)
4481 {
4482 unsigned long npages = mem->memory_size >> PAGE_SHIFT;
4483
4484 /*
4485 * If we are making a new memslot, it might make
4486 * some address that was previously cached as emulated
4487 * MMIO be no longer emulated MMIO, so invalidate
4488 * all the caches of emulated MMIO translations.
4489 */
4490 if (npages)
4491 atomic64_inc(&kvm->arch.mmio_update);
4492
4493 /*
4494 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels
4495 * have already called kvm_arch_flush_shadow_memslot() to
4496 * flush shadow mappings. For KVM_MR_CREATE we have no
4497 * previous mappings. So the only case to handle is
4498 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit
4499 * has been changed.
4500 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES
4501 * to get rid of any THP PTEs in the partition-scoped page tables
4502 * so we can track dirtiness at the page level; we flush when
4503 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to
4504 * using THP PTEs.
4505 */
4506 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) &&
4507 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES))
4508 kvmppc_radix_flush_memslot(kvm, old);
4509 /*
4510 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots.
4511 */
4512 if (!kvm->arch.secure_guest)
4513 return;
4514
4515 switch (change) {
4516 case KVM_MR_CREATE:
4517 if (kvmppc_uvmem_slot_init(kvm, new))
4518 return;
4519 uv_register_mem_slot(kvm->arch.lpid,
4520 new->base_gfn << PAGE_SHIFT,
4521 new->npages * PAGE_SIZE,
4522 0, new->id);
4523 break;
4524 case KVM_MR_DELETE:
4525 uv_unregister_mem_slot(kvm->arch.lpid, old->id);
4526 kvmppc_uvmem_slot_free(kvm, old);
4527 break;
4528 default:
4529 /* TODO: Handle KVM_MR_MOVE */
4530 break;
4531 }
4532 }
4533
4534 /*
4535 * Update LPCR values in kvm->arch and in vcores.
4536 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion
4537 * of kvm->arch.lpcr update).
4538 */
4539 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
4540 {
4541 long int i;
4542 u32 cores_done = 0;
4543
4544 if ((kvm->arch.lpcr & mask) == lpcr)
4545 return;
4546
4547 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
4548
4549 for (i = 0; i < KVM_MAX_VCORES; ++i) {
4550 struct kvmppc_vcore *vc = kvm->arch.vcores[i];
4551 if (!vc)
4552 continue;
4553 spin_lock(&vc->lock);
4554 vc->lpcr = (vc->lpcr & ~mask) | lpcr;
4555 spin_unlock(&vc->lock);
4556 if (++cores_done >= kvm->arch.online_vcores)
4557 break;
4558 }
4559 }
4560
4561 static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
4562 {
4563 return;
4564 }
4565
4566 void kvmppc_setup_partition_table(struct kvm *kvm)
4567 {
4568 unsigned long dw0, dw1;
4569
4570 if (!kvm_is_radix(kvm)) {
4571 /* PS field - page size for VRMA */
4572 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
4573 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
4574 /* HTABSIZE and HTABORG fields */
4575 dw0 |= kvm->arch.sdr1;
4576
4577 /* Second dword as set by userspace */
4578 dw1 = kvm->arch.process_table;
4579 } else {
4580 dw0 = PATB_HR | radix__get_tree_size() |
4581 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
4582 dw1 = PATB_GR | kvm->arch.process_table;
4583 }
4584 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1);
4585 }
4586
4587 /*
4588 * Set up HPT (hashed page table) and RMA (real-mode area).
4589 * Must be called with kvm->arch.mmu_setup_lock held.
4590 */
4591 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
4592 {
4593 int err = 0;
4594 struct kvm *kvm = vcpu->kvm;
4595 unsigned long hva;
4596 struct kvm_memory_slot *memslot;
4597 struct vm_area_struct *vma;
4598 unsigned long lpcr = 0, senc;
4599 unsigned long psize, porder;
4600 int srcu_idx;
4601
4602 /* Allocate hashed page table (if not done already) and reset it */
4603 if (!kvm->arch.hpt.virt) {
4604 int order = KVM_DEFAULT_HPT_ORDER;
4605 struct kvm_hpt_info info;
4606
4607 err = kvmppc_allocate_hpt(&info, order);
4608 /* If we get here, it means userspace didn't specify a
4609 * size explicitly. So, try successively smaller
4610 * sizes if the default failed. */
4611 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
4612 err = kvmppc_allocate_hpt(&info, order);
4613
4614 if (err < 0) {
4615 pr_err("KVM: Couldn't alloc HPT\n");
4616 goto out;
4617 }
4618
4619 kvmppc_set_hpt(kvm, &info);
4620 }
4621
4622 /* Look up the memslot for guest physical address 0 */
4623 srcu_idx = srcu_read_lock(&kvm->srcu);
4624 memslot = gfn_to_memslot(kvm, 0);
4625
4626 /* We must have some memory at 0 by now */
4627 err = -EINVAL;
4628 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
4629 goto out_srcu;
4630
4631 /* Look up the VMA for the start of this memory slot */
4632 hva = memslot->userspace_addr;
4633 down_read(&kvm->mm->mmap_sem);
4634 vma = find_vma(kvm->mm, hva);
4635 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
4636 goto up_out;
4637
4638 psize = vma_kernel_pagesize(vma);
4639
4640 up_read(&kvm->mm->mmap_sem);
4641
4642 /* We can handle 4k, 64k or 16M pages in the VRMA */
4643 if (psize >= 0x1000000)
4644 psize = 0x1000000;
4645 else if (psize >= 0x10000)
4646 psize = 0x10000;
4647 else
4648 psize = 0x1000;
4649 porder = __ilog2(psize);
4650
4651 senc = slb_pgsize_encoding(psize);
4652 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
4653 (VRMA_VSID << SLB_VSID_SHIFT_1T);
4654 /* Create HPTEs in the hash page table for the VRMA */
4655 kvmppc_map_vrma(vcpu, memslot, porder);
4656
4657 /* Update VRMASD field in the LPCR */
4658 if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
4659 /* the -4 is to account for senc values starting at 0x10 */
4660 lpcr = senc << (LPCR_VRMASD_SH - 4);
4661 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
4662 }
4663
4664 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
4665 smp_wmb();
4666 err = 0;
4667 out_srcu:
4668 srcu_read_unlock(&kvm->srcu, srcu_idx);
4669 out:
4670 return err;
4671
4672 up_out:
4673 up_read(&kvm->mm->mmap_sem);
4674 goto out_srcu;
4675 }
4676
4677 /*
4678 * Must be called with kvm->arch.mmu_setup_lock held and
4679 * mmu_ready = 0 and no vcpus running.
4680 */
4681 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
4682 {
4683 if (nesting_enabled(kvm))
4684 kvmhv_release_all_nested(kvm);
4685 kvmppc_rmap_reset(kvm);
4686 kvm->arch.process_table = 0;
4687 /* Mutual exclusion with kvm_unmap_hva_range etc. */
4688 spin_lock(&kvm->mmu_lock);
4689 kvm->arch.radix = 0;
4690 spin_unlock(&kvm->mmu_lock);
4691 kvmppc_free_radix(kvm);
4692 kvmppc_update_lpcr(kvm, LPCR_VPM1,
4693 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4694 return 0;
4695 }
4696
4697 /*
4698 * Must be called with kvm->arch.mmu_setup_lock held and
4699 * mmu_ready = 0 and no vcpus running.
4700 */
4701 int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
4702 {
4703 int err;
4704
4705 err = kvmppc_init_vm_radix(kvm);
4706 if (err)
4707 return err;
4708 kvmppc_rmap_reset(kvm);
4709 /* Mutual exclusion with kvm_unmap_hva_range etc. */
4710 spin_lock(&kvm->mmu_lock);
4711 kvm->arch.radix = 1;
4712 spin_unlock(&kvm->mmu_lock);
4713 kvmppc_free_hpt(&kvm->arch.hpt);
4714 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
4715 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4716 return 0;
4717 }
4718
4719 #ifdef CONFIG_KVM_XICS
4720 /*
4721 * Allocate a per-core structure for managing state about which cores are
4722 * running in the host versus the guest and for exchanging data between
4723 * real mode KVM and CPU running in the host.
4724 * This is only done for the first VM.
4725 * The allocated structure stays even if all VMs have stopped.
4726 * It is only freed when the kvm-hv module is unloaded.
4727 * It's OK for this routine to fail, we just don't support host
4728 * core operations like redirecting H_IPI wakeups.
4729 */
4730 void kvmppc_alloc_host_rm_ops(void)
4731 {
4732 struct kvmppc_host_rm_ops *ops;
4733 unsigned long l_ops;
4734 int cpu, core;
4735 int size;
4736
4737 /* Not the first time here ? */
4738 if (kvmppc_host_rm_ops_hv != NULL)
4739 return;
4740
4741 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
4742 if (!ops)
4743 return;
4744
4745 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
4746 ops->rm_core = kzalloc(size, GFP_KERNEL);
4747
4748 if (!ops->rm_core) {
4749 kfree(ops);
4750 return;
4751 }
4752
4753 cpus_read_lock();
4754
4755 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
4756 if (!cpu_online(cpu))
4757 continue;
4758
4759 core = cpu >> threads_shift;
4760 ops->rm_core[core].rm_state.in_host = 1;
4761 }
4762
4763 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
4764
4765 /*
4766 * Make the contents of the kvmppc_host_rm_ops structure visible
4767 * to other CPUs before we assign it to the global variable.
4768 * Do an atomic assignment (no locks used here), but if someone
4769 * beats us to it, just free our copy and return.
4770 */
4771 smp_wmb();
4772 l_ops = (unsigned long) ops;
4773
4774 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
4775 cpus_read_unlock();
4776 kfree(ops->rm_core);
4777 kfree(ops);
4778 return;
4779 }
4780
4781 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
4782 "ppc/kvm_book3s:prepare",
4783 kvmppc_set_host_core,
4784 kvmppc_clear_host_core);
4785 cpus_read_unlock();
4786 }
4787
4788 void kvmppc_free_host_rm_ops(void)
4789 {
4790 if (kvmppc_host_rm_ops_hv) {
4791 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
4792 kfree(kvmppc_host_rm_ops_hv->rm_core);
4793 kfree(kvmppc_host_rm_ops_hv);
4794 kvmppc_host_rm_ops_hv = NULL;
4795 }
4796 }
4797 #endif
4798
4799 static int kvmppc_core_init_vm_hv(struct kvm *kvm)
4800 {
4801 unsigned long lpcr, lpid;
4802 char buf[32];
4803 int ret;
4804
4805 mutex_init(&kvm->arch.uvmem_lock);
4806 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns);
4807 mutex_init(&kvm->arch.mmu_setup_lock);
4808
4809 /* Allocate the guest's logical partition ID */
4810
4811 lpid = kvmppc_alloc_lpid();
4812 if ((long)lpid < 0)
4813 return -ENOMEM;
4814 kvm->arch.lpid = lpid;
4815
4816 kvmppc_alloc_host_rm_ops();
4817
4818 kvmhv_vm_nested_init(kvm);
4819
4820 /*
4821 * Since we don't flush the TLB when tearing down a VM,
4822 * and this lpid might have previously been used,
4823 * make sure we flush on each core before running the new VM.
4824 * On POWER9, the tlbie in mmu_partition_table_set_entry()
4825 * does this flush for us.
4826 */
4827 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4828 cpumask_setall(&kvm->arch.need_tlb_flush);
4829
4830 /* Start out with the default set of hcalls enabled */
4831 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
4832 sizeof(kvm->arch.enabled_hcalls));
4833
4834 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4835 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
4836
4837 /* Init LPCR for virtual RMA mode */
4838 if (cpu_has_feature(CPU_FTR_HVMODE)) {
4839 kvm->arch.host_lpid = mfspr(SPRN_LPID);
4840 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
4841 lpcr &= LPCR_PECE | LPCR_LPES;
4842 } else {
4843 lpcr = 0;
4844 }
4845 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
4846 LPCR_VPM0 | LPCR_VPM1;
4847 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
4848 (VRMA_VSID << SLB_VSID_SHIFT_1T);
4849 /* On POWER8 turn on online bit to enable PURR/SPURR */
4850 if (cpu_has_feature(CPU_FTR_ARCH_207S))
4851 lpcr |= LPCR_ONL;
4852 /*
4853 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
4854 * Set HVICE bit to enable hypervisor virtualization interrupts.
4855 * Set HEIC to prevent OS interrupts to go to hypervisor (should
4856 * be unnecessary but better safe than sorry in case we re-enable
4857 * EE in HV mode with this LPCR still set)
4858 */
4859 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4860 lpcr &= ~LPCR_VPM0;
4861 lpcr |= LPCR_HVICE | LPCR_HEIC;
4862
4863 /*
4864 * If xive is enabled, we route 0x500 interrupts directly
4865 * to the guest.
4866 */
4867 if (xics_on_xive())
4868 lpcr |= LPCR_LPES;
4869 }
4870
4871 /*
4872 * If the host uses radix, the guest starts out as radix.
4873 */
4874 if (radix_enabled()) {
4875 kvm->arch.radix = 1;
4876 kvm->arch.mmu_ready = 1;
4877 lpcr &= ~LPCR_VPM1;
4878 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
4879 ret = kvmppc_init_vm_radix(kvm);
4880 if (ret) {
4881 kvmppc_free_lpid(kvm->arch.lpid);
4882 return ret;
4883 }
4884 kvmppc_setup_partition_table(kvm);
4885 }
4886
4887 kvm->arch.lpcr = lpcr;
4888
4889 /* Initialization for future HPT resizes */
4890 kvm->arch.resize_hpt = NULL;
4891
4892 /*
4893 * Work out how many sets the TLB has, for the use of
4894 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
4895 */
4896 if (radix_enabled())
4897 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */
4898 else if (cpu_has_feature(CPU_FTR_ARCH_300))
4899 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */
4900 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
4901 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */
4902 else
4903 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */
4904
4905 /*
4906 * Track that we now have a HV mode VM active. This blocks secondary
4907 * CPU threads from coming online.
4908 * On POWER9, we only need to do this if the "indep_threads_mode"
4909 * module parameter has been set to N.
4910 */
4911 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4912 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) {
4913 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n");
4914 kvm->arch.threads_indep = true;
4915 } else {
4916 kvm->arch.threads_indep = indep_threads_mode;
4917 }
4918 }
4919 if (!kvm->arch.threads_indep)
4920 kvm_hv_vm_activated();
4921
4922 /*
4923 * Initialize smt_mode depending on processor.
4924 * POWER8 and earlier have to use "strict" threading, where
4925 * all vCPUs in a vcore have to run on the same (sub)core,
4926 * whereas on POWER9 the threads can each run a different
4927 * guest.
4928 */
4929 if (!cpu_has_feature(CPU_FTR_ARCH_300))
4930 kvm->arch.smt_mode = threads_per_subcore;
4931 else
4932 kvm->arch.smt_mode = 1;
4933 kvm->arch.emul_smt_mode = 1;
4934
4935 /*
4936 * Create a debugfs directory for the VM
4937 */
4938 snprintf(buf, sizeof(buf), "vm%d", current->pid);
4939 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
4940 kvmppc_mmu_debugfs_init(kvm);
4941 if (radix_enabled())
4942 kvmhv_radix_debugfs_init(kvm);
4943
4944 return 0;
4945 }
4946
4947 static void kvmppc_free_vcores(struct kvm *kvm)
4948 {
4949 long int i;
4950
4951 for (i = 0; i < KVM_MAX_VCORES; ++i)
4952 kfree(kvm->arch.vcores[i]);
4953 kvm->arch.online_vcores = 0;
4954 }
4955
4956 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
4957 {
4958 debugfs_remove_recursive(kvm->arch.debugfs_dir);
4959
4960 if (!kvm->arch.threads_indep)
4961 kvm_hv_vm_deactivated();
4962
4963 kvmppc_free_vcores(kvm);
4964
4965
4966 if (kvm_is_radix(kvm))
4967 kvmppc_free_radix(kvm);
4968 else
4969 kvmppc_free_hpt(&kvm->arch.hpt);
4970
4971 /* Perform global invalidation and return lpid to the pool */
4972 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4973 if (nesting_enabled(kvm))
4974 kvmhv_release_all_nested(kvm);
4975 kvm->arch.process_table = 0;
4976 if (kvm->arch.secure_guest)
4977 uv_svm_terminate(kvm->arch.lpid);
4978 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0);
4979 }
4980
4981 kvmppc_free_lpid(kvm->arch.lpid);
4982
4983 kvmppc_free_pimap(kvm);
4984 }
4985
4986 /* We don't need to emulate any privileged instructions or dcbz */
4987 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
4988 unsigned int inst, int *advance)
4989 {
4990 return EMULATE_FAIL;
4991 }
4992
4993 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
4994 ulong spr_val)
4995 {
4996 return EMULATE_FAIL;
4997 }
4998
4999 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
5000 ulong *spr_val)
5001 {
5002 return EMULATE_FAIL;
5003 }
5004
5005 static int kvmppc_core_check_processor_compat_hv(void)
5006 {
5007 if (cpu_has_feature(CPU_FTR_HVMODE) &&
5008 cpu_has_feature(CPU_FTR_ARCH_206))
5009 return 0;
5010
5011 /* POWER9 in radix mode is capable of being a nested hypervisor. */
5012 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled())
5013 return 0;
5014
5015 return -EIO;
5016 }
5017
5018 #ifdef CONFIG_KVM_XICS
5019
5020 void kvmppc_free_pimap(struct kvm *kvm)
5021 {
5022 kfree(kvm->arch.pimap);
5023 }
5024
5025 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
5026 {
5027 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
5028 }
5029
5030 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
5031 {
5032 struct irq_desc *desc;
5033 struct kvmppc_irq_map *irq_map;
5034 struct kvmppc_passthru_irqmap *pimap;
5035 struct irq_chip *chip;
5036 int i, rc = 0;
5037
5038 if (!kvm_irq_bypass)
5039 return 1;
5040
5041 desc = irq_to_desc(host_irq);
5042 if (!desc)
5043 return -EIO;
5044
5045 mutex_lock(&kvm->lock);
5046
5047 pimap = kvm->arch.pimap;
5048 if (pimap == NULL) {
5049 /* First call, allocate structure to hold IRQ map */
5050 pimap = kvmppc_alloc_pimap();
5051 if (pimap == NULL) {
5052 mutex_unlock(&kvm->lock);
5053 return -ENOMEM;
5054 }
5055 kvm->arch.pimap = pimap;
5056 }
5057
5058 /*
5059 * For now, we only support interrupts for which the EOI operation
5060 * is an OPAL call followed by a write to XIRR, since that's
5061 * what our real-mode EOI code does, or a XIVE interrupt
5062 */
5063 chip = irq_data_get_irq_chip(&desc->irq_data);
5064 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
5065 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
5066 host_irq, guest_gsi);
5067 mutex_unlock(&kvm->lock);
5068 return -ENOENT;
5069 }
5070
5071 /*
5072 * See if we already have an entry for this guest IRQ number.
5073 * If it's mapped to a hardware IRQ number, that's an error,
5074 * otherwise re-use this entry.
5075 */
5076 for (i = 0; i < pimap->n_mapped; i++) {
5077 if (guest_gsi == pimap->mapped[i].v_hwirq) {
5078 if (pimap->mapped[i].r_hwirq) {
5079 mutex_unlock(&kvm->lock);
5080 return -EINVAL;
5081 }
5082 break;
5083 }
5084 }
5085
5086 if (i == KVMPPC_PIRQ_MAPPED) {
5087 mutex_unlock(&kvm->lock);
5088 return -EAGAIN; /* table is full */
5089 }
5090
5091 irq_map = &pimap->mapped[i];
5092
5093 irq_map->v_hwirq = guest_gsi;
5094 irq_map->desc = desc;
5095
5096 /*
5097 * Order the above two stores before the next to serialize with
5098 * the KVM real mode handler.
5099 */
5100 smp_wmb();
5101 irq_map->r_hwirq = desc->irq_data.hwirq;
5102
5103 if (i == pimap->n_mapped)
5104 pimap->n_mapped++;
5105
5106 if (xics_on_xive())
5107 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
5108 else
5109 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
5110 if (rc)
5111 irq_map->r_hwirq = 0;
5112
5113 mutex_unlock(&kvm->lock);
5114
5115 return 0;
5116 }
5117
5118 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
5119 {
5120 struct irq_desc *desc;
5121 struct kvmppc_passthru_irqmap *pimap;
5122 int i, rc = 0;
5123
5124 if (!kvm_irq_bypass)
5125 return 0;
5126
5127 desc = irq_to_desc(host_irq);
5128 if (!desc)
5129 return -EIO;
5130
5131 mutex_lock(&kvm->lock);
5132 if (!kvm->arch.pimap)
5133 goto unlock;
5134
5135 pimap = kvm->arch.pimap;
5136
5137 for (i = 0; i < pimap->n_mapped; i++) {
5138 if (guest_gsi == pimap->mapped[i].v_hwirq)
5139 break;
5140 }
5141
5142 if (i == pimap->n_mapped) {
5143 mutex_unlock(&kvm->lock);
5144 return -ENODEV;
5145 }
5146
5147 if (xics_on_xive())
5148 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
5149 else
5150 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5151
5152 /* invalidate the entry (what do do on error from the above ?) */
5153 pimap->mapped[i].r_hwirq = 0;
5154
5155 /*
5156 * We don't free this structure even when the count goes to
5157 * zero. The structure is freed when we destroy the VM.
5158 */
5159 unlock:
5160 mutex_unlock(&kvm->lock);
5161 return rc;
5162 }
5163
5164 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
5165 struct irq_bypass_producer *prod)
5166 {
5167 int ret = 0;
5168 struct kvm_kernel_irqfd *irqfd =
5169 container_of(cons, struct kvm_kernel_irqfd, consumer);
5170
5171 irqfd->producer = prod;
5172
5173 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5174 if (ret)
5175 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
5176 prod->irq, irqfd->gsi, ret);
5177
5178 return ret;
5179 }
5180
5181 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
5182 struct irq_bypass_producer *prod)
5183 {
5184 int ret;
5185 struct kvm_kernel_irqfd *irqfd =
5186 container_of(cons, struct kvm_kernel_irqfd, consumer);
5187
5188 irqfd->producer = NULL;
5189
5190 /*
5191 * When producer of consumer is unregistered, we change back to
5192 * default external interrupt handling mode - KVM real mode
5193 * will switch back to host.
5194 */
5195 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5196 if (ret)
5197 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
5198 prod->irq, irqfd->gsi, ret);
5199 }
5200 #endif
5201
5202 static long kvm_arch_vm_ioctl_hv(struct file *filp,
5203 unsigned int ioctl, unsigned long arg)
5204 {
5205 struct kvm *kvm __maybe_unused = filp->private_data;
5206 void __user *argp = (void __user *)arg;
5207 long r;
5208
5209 switch (ioctl) {
5210
5211 case KVM_PPC_ALLOCATE_HTAB: {
5212 u32 htab_order;
5213
5214 r = -EFAULT;
5215 if (get_user(htab_order, (u32 __user *)argp))
5216 break;
5217 r = kvmppc_alloc_reset_hpt(kvm, htab_order);
5218 if (r)
5219 break;
5220 r = 0;
5221 break;
5222 }
5223
5224 case KVM_PPC_GET_HTAB_FD: {
5225 struct kvm_get_htab_fd ghf;
5226
5227 r = -EFAULT;
5228 if (copy_from_user(&ghf, argp, sizeof(ghf)))
5229 break;
5230 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
5231 break;
5232 }
5233
5234 case KVM_PPC_RESIZE_HPT_PREPARE: {
5235 struct kvm_ppc_resize_hpt rhpt;
5236
5237 r = -EFAULT;
5238 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5239 break;
5240
5241 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
5242 break;
5243 }
5244
5245 case KVM_PPC_RESIZE_HPT_COMMIT: {
5246 struct kvm_ppc_resize_hpt rhpt;
5247
5248 r = -EFAULT;
5249 if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5250 break;
5251
5252 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
5253 break;
5254 }
5255
5256 default:
5257 r = -ENOTTY;
5258 }
5259
5260 return r;
5261 }
5262
5263 /*
5264 * List of hcall numbers to enable by default.
5265 * For compatibility with old userspace, we enable by default
5266 * all hcalls that were implemented before the hcall-enabling
5267 * facility was added. Note this list should not include H_RTAS.
5268 */
5269 static unsigned int default_hcall_list[] = {
5270 H_REMOVE,
5271 H_ENTER,
5272 H_READ,
5273 H_PROTECT,
5274 H_BULK_REMOVE,
5275 H_GET_TCE,
5276 H_PUT_TCE,
5277 H_SET_DABR,
5278 H_SET_XDABR,
5279 H_CEDE,
5280 H_PROD,
5281 H_CONFER,
5282 H_REGISTER_VPA,
5283 #ifdef CONFIG_KVM_XICS
5284 H_EOI,
5285 H_CPPR,
5286 H_IPI,
5287 H_IPOLL,
5288 H_XIRR,
5289 H_XIRR_X,
5290 #endif
5291 0
5292 };
5293
5294 static void init_default_hcalls(void)
5295 {
5296 int i;
5297 unsigned int hcall;
5298
5299 for (i = 0; default_hcall_list[i]; ++i) {
5300 hcall = default_hcall_list[i];
5301 WARN_ON(!kvmppc_hcall_impl_hv(hcall));
5302 __set_bit(hcall / 4, default_enabled_hcalls);
5303 }
5304 }
5305
5306 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
5307 {
5308 unsigned long lpcr;
5309 int radix;
5310 int err;
5311
5312 /* If not on a POWER9, reject it */
5313 if (!cpu_has_feature(CPU_FTR_ARCH_300))
5314 return -ENODEV;
5315
5316 /* If any unknown flags set, reject it */
5317 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
5318 return -EINVAL;
5319
5320 /* GR (guest radix) bit in process_table field must match */
5321 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
5322 if (!!(cfg->process_table & PATB_GR) != radix)
5323 return -EINVAL;
5324
5325 /* Process table size field must be reasonable, i.e. <= 24 */
5326 if ((cfg->process_table & PRTS_MASK) > 24)
5327 return -EINVAL;
5328
5329 /* We can change a guest to/from radix now, if the host is radix */
5330 if (radix && !radix_enabled())
5331 return -EINVAL;
5332
5333 /* If we're a nested hypervisor, we currently only support radix */
5334 if (kvmhv_on_pseries() && !radix)
5335 return -EINVAL;
5336
5337 mutex_lock(&kvm->arch.mmu_setup_lock);
5338 if (radix != kvm_is_radix(kvm)) {
5339 if (kvm->arch.mmu_ready) {
5340 kvm->arch.mmu_ready = 0;
5341 /* order mmu_ready vs. vcpus_running */
5342 smp_mb();
5343 if (atomic_read(&kvm->arch.vcpus_running)) {
5344 kvm->arch.mmu_ready = 1;
5345 err = -EBUSY;
5346 goto out_unlock;
5347 }
5348 }
5349 if (radix)
5350 err = kvmppc_switch_mmu_to_radix(kvm);
5351 else
5352 err = kvmppc_switch_mmu_to_hpt(kvm);
5353 if (err)
5354 goto out_unlock;
5355 }
5356
5357 kvm->arch.process_table = cfg->process_table;
5358 kvmppc_setup_partition_table(kvm);
5359
5360 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
5361 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
5362 err = 0;
5363
5364 out_unlock:
5365 mutex_unlock(&kvm->arch.mmu_setup_lock);
5366 return err;
5367 }
5368
5369 static int kvmhv_enable_nested(struct kvm *kvm)
5370 {
5371 if (!nested)
5372 return -EPERM;
5373 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix)
5374 return -ENODEV;
5375
5376 /* kvm == NULL means the caller is testing if the capability exists */
5377 if (kvm)
5378 kvm->arch.nested_enable = true;
5379 return 0;
5380 }
5381
5382 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr,
5383 int size)
5384 {
5385 int rc = -EINVAL;
5386
5387 if (kvmhv_vcpu_is_radix(vcpu)) {
5388 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size);
5389
5390 if (rc > 0)
5391 rc = -EINVAL;
5392 }
5393
5394 /* For now quadrants are the only way to access nested guest memory */
5395 if (rc && vcpu->arch.nested)
5396 rc = -EAGAIN;
5397
5398 return rc;
5399 }
5400
5401 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr,
5402 int size)
5403 {
5404 int rc = -EINVAL;
5405
5406 if (kvmhv_vcpu_is_radix(vcpu)) {
5407 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size);
5408
5409 if (rc > 0)
5410 rc = -EINVAL;
5411 }
5412
5413 /* For now quadrants are the only way to access nested guest memory */
5414 if (rc && vcpu->arch.nested)
5415 rc = -EAGAIN;
5416
5417 return rc;
5418 }
5419
5420 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa)
5421 {
5422 unpin_vpa(kvm, vpa);
5423 vpa->gpa = 0;
5424 vpa->pinned_addr = NULL;
5425 vpa->dirty = false;
5426 vpa->update_pending = 0;
5427 }
5428
5429 /*
5430 * IOCTL handler to turn off secure mode of guest
5431 *
5432 * - Release all device pages
5433 * - Issue ucall to terminate the guest on the UV side
5434 * - Unpin the VPA pages.
5435 * - Reinit the partition scoped page tables
5436 */
5437 static int kvmhv_svm_off(struct kvm *kvm)
5438 {
5439 struct kvm_vcpu *vcpu;
5440 int mmu_was_ready;
5441 int srcu_idx;
5442 int ret = 0;
5443 int i;
5444
5445 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START))
5446 return ret;
5447
5448 mutex_lock(&kvm->arch.mmu_setup_lock);
5449 mmu_was_ready = kvm->arch.mmu_ready;
5450 if (kvm->arch.mmu_ready) {
5451 kvm->arch.mmu_ready = 0;
5452 /* order mmu_ready vs. vcpus_running */
5453 smp_mb();
5454 if (atomic_read(&kvm->arch.vcpus_running)) {
5455 kvm->arch.mmu_ready = 1;
5456 ret = -EBUSY;
5457 goto out;
5458 }
5459 }
5460
5461 srcu_idx = srcu_read_lock(&kvm->srcu);
5462 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
5463 struct kvm_memory_slot *memslot;
5464 struct kvm_memslots *slots = __kvm_memslots(kvm, i);
5465
5466 if (!slots)
5467 continue;
5468
5469 kvm_for_each_memslot(memslot, slots) {
5470 kvmppc_uvmem_drop_pages(memslot, kvm, true);
5471 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id);
5472 }
5473 }
5474 srcu_read_unlock(&kvm->srcu, srcu_idx);
5475
5476 ret = uv_svm_terminate(kvm->arch.lpid);
5477 if (ret != U_SUCCESS) {
5478 ret = -EINVAL;
5479 goto out;
5480 }
5481
5482 /*
5483 * When secure guest is reset, all the guest pages are sent
5484 * to UV via UV_PAGE_IN before the non-boot vcpus get a
5485 * chance to run and unpin their VPA pages. Unpinning of all
5486 * VPA pages is done here explicitly so that VPA pages
5487 * can be migrated to the secure side.
5488 *
5489 * This is required to for the secure SMP guest to reboot
5490 * correctly.
5491 */
5492 kvm_for_each_vcpu(i, vcpu, kvm) {
5493 spin_lock(&vcpu->arch.vpa_update_lock);
5494 unpin_vpa_reset(kvm, &vcpu->arch.dtl);
5495 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow);
5496 unpin_vpa_reset(kvm, &vcpu->arch.vpa);
5497 spin_unlock(&vcpu->arch.vpa_update_lock);
5498 }
5499
5500 kvmppc_setup_partition_table(kvm);
5501 kvm->arch.secure_guest = 0;
5502 kvm->arch.mmu_ready = mmu_was_ready;
5503 out:
5504 mutex_unlock(&kvm->arch.mmu_setup_lock);
5505 return ret;
5506 }
5507
5508 static struct kvmppc_ops kvm_ops_hv = {
5509 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
5510 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
5511 .get_one_reg = kvmppc_get_one_reg_hv,
5512 .set_one_reg = kvmppc_set_one_reg_hv,
5513 .vcpu_load = kvmppc_core_vcpu_load_hv,
5514 .vcpu_put = kvmppc_core_vcpu_put_hv,
5515 .inject_interrupt = kvmppc_inject_interrupt_hv,
5516 .set_msr = kvmppc_set_msr_hv,
5517 .vcpu_run = kvmppc_vcpu_run_hv,
5518 .vcpu_create = kvmppc_core_vcpu_create_hv,
5519 .vcpu_free = kvmppc_core_vcpu_free_hv,
5520 .check_requests = kvmppc_core_check_requests_hv,
5521 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv,
5522 .flush_memslot = kvmppc_core_flush_memslot_hv,
5523 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
5524 .commit_memory_region = kvmppc_core_commit_memory_region_hv,
5525 .unmap_hva_range = kvm_unmap_hva_range_hv,
5526 .age_hva = kvm_age_hva_hv,
5527 .test_age_hva = kvm_test_age_hva_hv,
5528 .set_spte_hva = kvm_set_spte_hva_hv,
5529 .mmu_destroy = kvmppc_mmu_destroy_hv,
5530 .free_memslot = kvmppc_core_free_memslot_hv,
5531 .create_memslot = kvmppc_core_create_memslot_hv,
5532 .init_vm = kvmppc_core_init_vm_hv,
5533 .destroy_vm = kvmppc_core_destroy_vm_hv,
5534 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
5535 .emulate_op = kvmppc_core_emulate_op_hv,
5536 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
5537 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
5538 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
5539 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv,
5540 .hcall_implemented = kvmppc_hcall_impl_hv,
5541 #ifdef CONFIG_KVM_XICS
5542 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
5543 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
5544 #endif
5545 .configure_mmu = kvmhv_configure_mmu,
5546 .get_rmmu_info = kvmhv_get_rmmu_info,
5547 .set_smt_mode = kvmhv_set_smt_mode,
5548 .enable_nested = kvmhv_enable_nested,
5549 .load_from_eaddr = kvmhv_load_from_eaddr,
5550 .store_to_eaddr = kvmhv_store_to_eaddr,
5551 .svm_off = kvmhv_svm_off,
5552 };
5553
5554 static int kvm_init_subcore_bitmap(void)
5555 {
5556 int i, j;
5557 int nr_cores = cpu_nr_cores();
5558 struct sibling_subcore_state *sibling_subcore_state;
5559
5560 for (i = 0; i < nr_cores; i++) {
5561 int first_cpu = i * threads_per_core;
5562 int node = cpu_to_node(first_cpu);
5563
5564 /* Ignore if it is already allocated. */
5565 if (paca_ptrs[first_cpu]->sibling_subcore_state)
5566 continue;
5567
5568 sibling_subcore_state =
5569 kzalloc_node(sizeof(struct sibling_subcore_state),
5570 GFP_KERNEL, node);
5571 if (!sibling_subcore_state)
5572 return -ENOMEM;
5573
5574
5575 for (j = 0; j < threads_per_core; j++) {
5576 int cpu = first_cpu + j;
5577
5578 paca_ptrs[cpu]->sibling_subcore_state =
5579 sibling_subcore_state;
5580 }
5581 }
5582 return 0;
5583 }
5584
5585 static int kvmppc_radix_possible(void)
5586 {
5587 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
5588 }
5589
5590 static int kvmppc_book3s_init_hv(void)
5591 {
5592 int r;
5593
5594 if (!tlbie_capable) {
5595 pr_err("KVM-HV: Host does not support TLBIE\n");
5596 return -ENODEV;
5597 }
5598
5599 /*
5600 * FIXME!! Do we need to check on all cpus ?
5601 */
5602 r = kvmppc_core_check_processor_compat_hv();
5603 if (r < 0)
5604 return -ENODEV;
5605
5606 r = kvmhv_nested_init();
5607 if (r)
5608 return r;
5609
5610 r = kvm_init_subcore_bitmap();
5611 if (r)
5612 return r;
5613
5614 /*
5615 * We need a way of accessing the XICS interrupt controller,
5616 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or
5617 * indirectly, via OPAL.
5618 */
5619 #ifdef CONFIG_SMP
5620 if (!xics_on_xive() && !kvmhv_on_pseries() &&
5621 !local_paca->kvm_hstate.xics_phys) {
5622 struct device_node *np;
5623
5624 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
5625 if (!np) {
5626 pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
5627 return -ENODEV;
5628 }
5629 /* presence of intc confirmed - node can be dropped again */
5630 of_node_put(np);
5631 }
5632 #endif
5633
5634 kvm_ops_hv.owner = THIS_MODULE;
5635 kvmppc_hv_ops = &kvm_ops_hv;
5636
5637 init_default_hcalls();
5638
5639 init_vcore_lists();
5640
5641 r = kvmppc_mmu_hv_init();
5642 if (r)
5643 return r;
5644
5645 if (kvmppc_radix_possible())
5646 r = kvmppc_radix_init();
5647
5648 /*
5649 * POWER9 chips before version 2.02 can't have some threads in
5650 * HPT mode and some in radix mode on the same core.
5651 */
5652 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
5653 unsigned int pvr = mfspr(SPRN_PVR);
5654 if ((pvr >> 16) == PVR_POWER9 &&
5655 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
5656 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
5657 no_mixing_hpt_and_radix = true;
5658 }
5659
5660 r = kvmppc_uvmem_init();
5661 if (r < 0)
5662 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r);
5663
5664 return r;
5665 }
5666
5667 static void kvmppc_book3s_exit_hv(void)
5668 {
5669 kvmppc_uvmem_free();
5670 kvmppc_free_host_rm_ops();
5671 if (kvmppc_radix_possible())
5672 kvmppc_radix_exit();
5673 kvmppc_hv_ops = NULL;
5674 kvmhv_nested_exit();
5675 }
5676
5677 module_init(kvmppc_book3s_init_hv);
5678 module_exit(kvmppc_book3s_exit_hv);
5679 MODULE_LICENSE("GPL");
5680 MODULE_ALIAS_MISCDEV(KVM_MINOR);
5681 MODULE_ALIAS("devname:kvm");
Linux with added FPC-III support