2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/miscdevice.h>
18 #include <linux/major.h>
19 #include <linux/ioport.h>
20 #include <linux/fcntl.h>
21 #include <linux/init.h>
22 #include <linux/poll.h>
24 #include <linux/proc_fs.h>
25 #include <linux/spinlock.h>
26 #include <linux/sysctl.h>
27 #include <linux/wait.h>
28 #include <linux/bcd.h>
29 #include <linux/seq_file.h>
30 #include <linux/bitops.h>
31 #include <linux/compat.h>
32 #include <linux/clocksource.h>
33 #include <linux/uaccess.h>
34 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/hpet.h>
38 #include <asm/current.h>
40 #include <asm/div64.h>
43 * The High Precision Event Timer driver.
44 * This driver is closely modelled after the rtc.c driver.
45 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
47 #define HPET_USER_FREQ (64)
48 #define HPET_DRIFT (500)
50 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
53 /* WARNING -- don't get confused. These macros are never used
54 * to write the (single) counter, and rarely to read it.
55 * They're badly named; to fix, someday.
57 #if BITS_PER_LONG == 64
58 #define write_counter(V, MC) writeq(V, MC)
59 #define read_counter(MC) readq(MC)
61 #define write_counter(V, MC) writel(V, MC)
62 #define read_counter(MC) readl(MC)
65 static DEFINE_MUTEX(hpet_mutex
); /* replaces BKL */
66 static u32 hpet_nhpet
, hpet_max_freq
= HPET_USER_FREQ
;
68 /* This clocksource driver currently only works on ia64 */
70 static void __iomem
*hpet_mctr
;
72 static cycle_t
read_hpet(struct clocksource
*cs
)
74 return (cycle_t
)read_counter((void __iomem
*)hpet_mctr
);
77 static struct clocksource clocksource_hpet
= {
81 .mask
= CLOCKSOURCE_MASK(64),
82 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
84 static struct clocksource
*hpet_clocksource
;
87 /* A lock for concurrent access by app and isr hpet activity. */
88 static DEFINE_SPINLOCK(hpet_lock
);
90 #define HPET_DEV_NAME (7)
93 struct hpets
*hd_hpets
;
94 struct hpet __iomem
*hd_hpet
;
95 struct hpet_timer __iomem
*hd_timer
;
96 unsigned long hd_ireqfreq
;
97 unsigned long hd_irqdata
;
98 wait_queue_head_t hd_waitqueue
;
99 struct fasync_struct
*hd_async_queue
;
100 unsigned int hd_flags
;
102 unsigned int hd_hdwirq
;
103 char hd_name
[HPET_DEV_NAME
];
107 struct hpets
*hp_next
;
108 struct hpet __iomem
*hp_hpet
;
109 unsigned long hp_hpet_phys
;
110 struct clocksource
*hp_clocksource
;
111 unsigned long long hp_tick_freq
;
112 unsigned long hp_delta
;
113 unsigned int hp_ntimer
;
114 unsigned int hp_which
;
115 struct hpet_dev hp_dev
[1];
118 static struct hpets
*hpets
;
120 #define HPET_OPEN 0x0001
121 #define HPET_IE 0x0002 /* interrupt enabled */
122 #define HPET_PERIODIC 0x0004
123 #define HPET_SHARED_IRQ 0x0008
127 static inline unsigned long long readq(void __iomem
*addr
)
129 return readl(addr
) | (((unsigned long long)readl(addr
+ 4)) << 32LL);
134 static inline void writeq(unsigned long long v
, void __iomem
*addr
)
136 writel(v
& 0xffffffff, addr
);
137 writel(v
>> 32, addr
+ 4);
141 static irqreturn_t
hpet_interrupt(int irq
, void *data
)
143 struct hpet_dev
*devp
;
147 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
149 if ((devp
->hd_flags
& HPET_SHARED_IRQ
) &&
150 !(isr
& readl(&devp
->hd_hpet
->hpet_isr
)))
153 spin_lock(&hpet_lock
);
157 * For non-periodic timers, increment the accumulator.
158 * This has the effect of treating non-periodic like periodic.
160 if ((devp
->hd_flags
& (HPET_IE
| HPET_PERIODIC
)) == HPET_IE
) {
161 unsigned long m
, t
, mc
, base
, k
;
162 struct hpet __iomem
*hpet
= devp
->hd_hpet
;
163 struct hpets
*hpetp
= devp
->hd_hpets
;
165 t
= devp
->hd_ireqfreq
;
166 m
= read_counter(&devp
->hd_timer
->hpet_compare
);
167 mc
= read_counter(&hpet
->hpet_mc
);
168 /* The time for the next interrupt would logically be t + m,
169 * however, if we are very unlucky and the interrupt is delayed
170 * for longer than t then we will completely miss the next
171 * interrupt if we set t + m and an application will hang.
172 * Therefore we need to make a more complex computation assuming
173 * that there exists a k for which the following is true:
174 * k * t + base < mc + delta
175 * (k + 1) * t + base > mc + delta
176 * where t is the interval in hpet ticks for the given freq,
177 * base is the theoretical start value 0 < base < t,
178 * mc is the main counter value at the time of the interrupt,
179 * delta is the time it takes to write the a value to the
181 * k may then be computed as (mc - base + delta) / t .
184 k
= (mc
- base
+ hpetp
->hp_delta
) / t
;
185 write_counter(t
* (k
+ 1) + base
,
186 &devp
->hd_timer
->hpet_compare
);
189 if (devp
->hd_flags
& HPET_SHARED_IRQ
)
190 writel(isr
, &devp
->hd_hpet
->hpet_isr
);
191 spin_unlock(&hpet_lock
);
193 wake_up_interruptible(&devp
->hd_waitqueue
);
195 kill_fasync(&devp
->hd_async_queue
, SIGIO
, POLL_IN
);
200 static void hpet_timer_set_irq(struct hpet_dev
*devp
)
204 struct hpet_timer __iomem
*timer
;
206 spin_lock_irq(&hpet_lock
);
207 if (devp
->hd_hdwirq
) {
208 spin_unlock_irq(&hpet_lock
);
212 timer
= devp
->hd_timer
;
214 /* we prefer level triggered mode */
215 v
= readl(&timer
->hpet_config
);
216 if (!(v
& Tn_INT_TYPE_CNF_MASK
)) {
217 v
|= Tn_INT_TYPE_CNF_MASK
;
218 writel(v
, &timer
->hpet_config
);
220 spin_unlock_irq(&hpet_lock
);
222 v
= (readq(&timer
->hpet_config
) & Tn_INT_ROUTE_CAP_MASK
) >>
223 Tn_INT_ROUTE_CAP_SHIFT
;
226 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
227 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
229 if (acpi_irq_model
== ACPI_IRQ_MODEL_PIC
)
234 for_each_set_bit(irq
, &v
, HPET_MAX_IRQ
) {
235 if (irq
>= nr_irqs
) {
240 gsi
= acpi_register_gsi(NULL
, irq
, ACPI_LEVEL_SENSITIVE
,
245 /* FIXME: Setup interrupt source table */
248 if (irq
< HPET_MAX_IRQ
) {
249 spin_lock_irq(&hpet_lock
);
250 v
= readl(&timer
->hpet_config
);
251 v
|= irq
<< Tn_INT_ROUTE_CNF_SHIFT
;
252 writel(v
, &timer
->hpet_config
);
253 devp
->hd_hdwirq
= gsi
;
254 spin_unlock_irq(&hpet_lock
);
259 static int hpet_open(struct inode
*inode
, struct file
*file
)
261 struct hpet_dev
*devp
;
265 if (file
->f_mode
& FMODE_WRITE
)
268 mutex_lock(&hpet_mutex
);
269 spin_lock_irq(&hpet_lock
);
271 for (devp
= NULL
, hpetp
= hpets
; hpetp
&& !devp
; hpetp
= hpetp
->hp_next
)
272 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
273 if (hpetp
->hp_dev
[i
].hd_flags
& HPET_OPEN
)
276 devp
= &hpetp
->hp_dev
[i
];
281 spin_unlock_irq(&hpet_lock
);
282 mutex_unlock(&hpet_mutex
);
286 file
->private_data
= devp
;
287 devp
->hd_irqdata
= 0;
288 devp
->hd_flags
|= HPET_OPEN
;
289 spin_unlock_irq(&hpet_lock
);
290 mutex_unlock(&hpet_mutex
);
292 hpet_timer_set_irq(devp
);
298 hpet_read(struct file
*file
, char __user
*buf
, size_t count
, loff_t
* ppos
)
300 DECLARE_WAITQUEUE(wait
, current
);
303 struct hpet_dev
*devp
;
305 devp
= file
->private_data
;
306 if (!devp
->hd_ireqfreq
)
309 if (count
< sizeof(unsigned long))
312 add_wait_queue(&devp
->hd_waitqueue
, &wait
);
315 set_current_state(TASK_INTERRUPTIBLE
);
317 spin_lock_irq(&hpet_lock
);
318 data
= devp
->hd_irqdata
;
319 devp
->hd_irqdata
= 0;
320 spin_unlock_irq(&hpet_lock
);
324 else if (file
->f_flags
& O_NONBLOCK
) {
327 } else if (signal_pending(current
)) {
328 retval
= -ERESTARTSYS
;
334 retval
= put_user(data
, (unsigned long __user
*)buf
);
336 retval
= sizeof(unsigned long);
338 __set_current_state(TASK_RUNNING
);
339 remove_wait_queue(&devp
->hd_waitqueue
, &wait
);
344 static unsigned int hpet_poll(struct file
*file
, poll_table
* wait
)
347 struct hpet_dev
*devp
;
349 devp
= file
->private_data
;
351 if (!devp
->hd_ireqfreq
)
354 poll_wait(file
, &devp
->hd_waitqueue
, wait
);
356 spin_lock_irq(&hpet_lock
);
357 v
= devp
->hd_irqdata
;
358 spin_unlock_irq(&hpet_lock
);
361 return POLLIN
| POLLRDNORM
;
366 #ifdef CONFIG_HPET_MMAP
367 #ifdef CONFIG_HPET_MMAP_DEFAULT
368 static int hpet_mmap_enabled
= 1;
370 static int hpet_mmap_enabled
= 0;
373 static __init
int hpet_mmap_enable(char *str
)
375 get_option(&str
, &hpet_mmap_enabled
);
376 pr_info("HPET mmap %s\n", hpet_mmap_enabled
? "enabled" : "disabled");
379 __setup("hpet_mmap", hpet_mmap_enable
);
381 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
383 struct hpet_dev
*devp
;
386 if (!hpet_mmap_enabled
)
389 devp
= file
->private_data
;
390 addr
= devp
->hd_hpets
->hp_hpet_phys
;
392 if (addr
& (PAGE_SIZE
- 1))
395 vma
->vm_page_prot
= pgprot_noncached(vma
->vm_page_prot
);
396 return vm_iomap_memory(vma
, addr
, PAGE_SIZE
);
399 static int hpet_mmap(struct file
*file
, struct vm_area_struct
*vma
)
405 static int hpet_fasync(int fd
, struct file
*file
, int on
)
407 struct hpet_dev
*devp
;
409 devp
= file
->private_data
;
411 if (fasync_helper(fd
, file
, on
, &devp
->hd_async_queue
) >= 0)
417 static int hpet_release(struct inode
*inode
, struct file
*file
)
419 struct hpet_dev
*devp
;
420 struct hpet_timer __iomem
*timer
;
423 devp
= file
->private_data
;
424 timer
= devp
->hd_timer
;
426 spin_lock_irq(&hpet_lock
);
428 writeq((readq(&timer
->hpet_config
) & ~Tn_INT_ENB_CNF_MASK
),
429 &timer
->hpet_config
);
434 devp
->hd_ireqfreq
= 0;
436 if (devp
->hd_flags
& HPET_PERIODIC
437 && readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
440 v
= readq(&timer
->hpet_config
);
441 v
^= Tn_TYPE_CNF_MASK
;
442 writeq(v
, &timer
->hpet_config
);
445 devp
->hd_flags
&= ~(HPET_OPEN
| HPET_IE
| HPET_PERIODIC
);
446 spin_unlock_irq(&hpet_lock
);
451 file
->private_data
= NULL
;
455 static int hpet_ioctl_ieon(struct hpet_dev
*devp
)
457 struct hpet_timer __iomem
*timer
;
458 struct hpet __iomem
*hpet
;
461 unsigned long g
, v
, t
, m
;
462 unsigned long flags
, isr
;
464 timer
= devp
->hd_timer
;
465 hpet
= devp
->hd_hpet
;
466 hpetp
= devp
->hd_hpets
;
468 if (!devp
->hd_ireqfreq
)
471 spin_lock_irq(&hpet_lock
);
473 if (devp
->hd_flags
& HPET_IE
) {
474 spin_unlock_irq(&hpet_lock
);
478 devp
->hd_flags
|= HPET_IE
;
480 if (readl(&timer
->hpet_config
) & Tn_INT_TYPE_CNF_MASK
)
481 devp
->hd_flags
|= HPET_SHARED_IRQ
;
482 spin_unlock_irq(&hpet_lock
);
484 irq
= devp
->hd_hdwirq
;
487 unsigned long irq_flags
;
489 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
491 * To prevent the interrupt handler from seeing an
492 * unwanted interrupt status bit, program the timer
493 * so that it will not fire in the near future ...
495 writel(readl(&timer
->hpet_config
) & ~Tn_TYPE_CNF_MASK
,
496 &timer
->hpet_config
);
497 write_counter(read_counter(&hpet
->hpet_mc
),
498 &timer
->hpet_compare
);
499 /* ... and clear any left-over status. */
500 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
501 writel(isr
, &hpet
->hpet_isr
);
504 sprintf(devp
->hd_name
, "hpet%d", (int)(devp
- hpetp
->hp_dev
));
505 irq_flags
= devp
->hd_flags
& HPET_SHARED_IRQ
? IRQF_SHARED
: 0;
506 if (request_irq(irq
, hpet_interrupt
, irq_flags
,
507 devp
->hd_name
, (void *)devp
)) {
508 printk(KERN_ERR
"hpet: IRQ %d is not free\n", irq
);
514 spin_lock_irq(&hpet_lock
);
515 devp
->hd_flags
^= HPET_IE
;
516 spin_unlock_irq(&hpet_lock
);
521 t
= devp
->hd_ireqfreq
;
522 v
= readq(&timer
->hpet_config
);
524 /* 64-bit comparators are not yet supported through the ioctls,
525 * so force this into 32-bit mode if it supports both modes
527 g
= v
| Tn_32MODE_CNF_MASK
| Tn_INT_ENB_CNF_MASK
;
529 if (devp
->hd_flags
& HPET_PERIODIC
) {
530 g
|= Tn_TYPE_CNF_MASK
;
531 v
|= Tn_TYPE_CNF_MASK
| Tn_VAL_SET_CNF_MASK
;
532 writeq(v
, &timer
->hpet_config
);
533 local_irq_save(flags
);
536 * NOTE: First we modify the hidden accumulator
537 * register supported by periodic-capable comparators.
538 * We never want to modify the (single) counter; that
539 * would affect all the comparators. The value written
540 * is the counter value when the first interrupt is due.
542 m
= read_counter(&hpet
->hpet_mc
);
543 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
545 * Then we modify the comparator, indicating the period
546 * for subsequent interrupt.
548 write_counter(t
, &timer
->hpet_compare
);
550 local_irq_save(flags
);
551 m
= read_counter(&hpet
->hpet_mc
);
552 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
555 if (devp
->hd_flags
& HPET_SHARED_IRQ
) {
556 isr
= 1 << (devp
- devp
->hd_hpets
->hp_dev
);
557 writel(isr
, &hpet
->hpet_isr
);
559 writeq(g
, &timer
->hpet_config
);
560 local_irq_restore(flags
);
565 /* converts Hz to number of timer ticks */
566 static inline unsigned long hpet_time_div(struct hpets
*hpets
,
569 unsigned long long m
;
571 m
= hpets
->hp_tick_freq
+ (dis
>> 1);
573 return (unsigned long)m
;
577 hpet_ioctl_common(struct hpet_dev
*devp
, int cmd
, unsigned long arg
,
578 struct hpet_info
*info
)
580 struct hpet_timer __iomem
*timer
;
581 struct hpet __iomem
*hpet
;
592 timer
= devp
->hd_timer
;
593 hpet
= devp
->hd_hpet
;
594 hpetp
= devp
->hd_hpets
;
597 return hpet_ioctl_ieon(devp
);
606 if ((devp
->hd_flags
& HPET_IE
) == 0)
608 v
= readq(&timer
->hpet_config
);
609 v
&= ~Tn_INT_ENB_CNF_MASK
;
610 writeq(v
, &timer
->hpet_config
);
612 free_irq(devp
->hd_irq
, devp
);
615 devp
->hd_flags
^= HPET_IE
;
619 memset(info
, 0, sizeof(*info
));
620 if (devp
->hd_ireqfreq
)
622 hpet_time_div(hpetp
, devp
->hd_ireqfreq
);
624 readq(&timer
->hpet_config
) & Tn_PER_INT_CAP_MASK
;
625 info
->hi_hpet
= hpetp
->hp_which
;
626 info
->hi_timer
= devp
- hpetp
->hp_dev
;
630 v
= readq(&timer
->hpet_config
);
631 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
635 devp
->hd_flags
|= HPET_PERIODIC
;
638 v
= readq(&timer
->hpet_config
);
639 if ((v
& Tn_PER_INT_CAP_MASK
) == 0) {
643 if (devp
->hd_flags
& HPET_PERIODIC
&&
644 readq(&timer
->hpet_config
) & Tn_TYPE_CNF_MASK
) {
645 v
= readq(&timer
->hpet_config
);
646 v
^= Tn_TYPE_CNF_MASK
;
647 writeq(v
, &timer
->hpet_config
);
649 devp
->hd_flags
&= ~HPET_PERIODIC
;
652 if ((arg
> hpet_max_freq
) &&
653 !capable(CAP_SYS_RESOURCE
)) {
663 devp
->hd_ireqfreq
= hpet_time_div(hpetp
, arg
);
670 hpet_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
672 struct hpet_info info
;
675 mutex_lock(&hpet_mutex
);
676 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
677 mutex_unlock(&hpet_mutex
);
679 if ((cmd
== HPET_INFO
) && !err
&&
680 (copy_to_user((void __user
*)arg
, &info
, sizeof(info
))))
687 struct compat_hpet_info
{
688 compat_ulong_t hi_ireqfreq
; /* Hz */
689 compat_ulong_t hi_flags
; /* information */
690 unsigned short hi_hpet
;
691 unsigned short hi_timer
;
695 hpet_compat_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
697 struct hpet_info info
;
700 mutex_lock(&hpet_mutex
);
701 err
= hpet_ioctl_common(file
->private_data
, cmd
, arg
, &info
);
702 mutex_unlock(&hpet_mutex
);
704 if ((cmd
== HPET_INFO
) && !err
) {
705 struct compat_hpet_info __user
*u
= compat_ptr(arg
);
706 if (put_user(info
.hi_ireqfreq
, &u
->hi_ireqfreq
) ||
707 put_user(info
.hi_flags
, &u
->hi_flags
) ||
708 put_user(info
.hi_hpet
, &u
->hi_hpet
) ||
709 put_user(info
.hi_timer
, &u
->hi_timer
))
717 static const struct file_operations hpet_fops
= {
718 .owner
= THIS_MODULE
,
722 .unlocked_ioctl
= hpet_ioctl
,
724 .compat_ioctl
= hpet_compat_ioctl
,
727 .release
= hpet_release
,
728 .fasync
= hpet_fasync
,
732 static int hpet_is_known(struct hpet_data
*hdp
)
736 for (hpetp
= hpets
; hpetp
; hpetp
= hpetp
->hp_next
)
737 if (hpetp
->hp_hpet_phys
== hdp
->hd_phys_address
)
743 static struct ctl_table hpet_table
[] = {
745 .procname
= "max-user-freq",
746 .data
= &hpet_max_freq
,
747 .maxlen
= sizeof(int),
749 .proc_handler
= proc_dointvec
,
754 static struct ctl_table hpet_root
[] = {
764 static struct ctl_table dev_root
[] = {
774 static struct ctl_table_header
*sysctl_header
;
777 * Adjustment for when arming the timer with
778 * initial conditions. That is, main counter
779 * ticks expired before interrupts are enabled.
781 #define TICK_CALIBRATE (1000UL)
783 static unsigned long __hpet_calibrate(struct hpets
*hpetp
)
785 struct hpet_timer __iomem
*timer
= NULL
;
786 unsigned long t
, m
, count
, i
, flags
, start
;
787 struct hpet_dev
*devp
;
789 struct hpet __iomem
*hpet
;
791 for (j
= 0, devp
= hpetp
->hp_dev
; j
< hpetp
->hp_ntimer
; j
++, devp
++)
792 if ((devp
->hd_flags
& HPET_OPEN
) == 0) {
793 timer
= devp
->hd_timer
;
800 hpet
= hpetp
->hp_hpet
;
801 t
= read_counter(&timer
->hpet_compare
);
804 count
= hpet_time_div(hpetp
, TICK_CALIBRATE
);
806 local_irq_save(flags
);
808 start
= read_counter(&hpet
->hpet_mc
);
811 m
= read_counter(&hpet
->hpet_mc
);
812 write_counter(t
+ m
+ hpetp
->hp_delta
, &timer
->hpet_compare
);
813 } while (i
++, (m
- start
) < count
);
815 local_irq_restore(flags
);
817 return (m
- start
) / i
;
820 static unsigned long hpet_calibrate(struct hpets
*hpetp
)
822 unsigned long ret
= ~0UL;
826 * Try to calibrate until return value becomes stable small value.
827 * If SMI interruption occurs in calibration loop, the return value
828 * will be big. This avoids its impact.
831 tmp
= __hpet_calibrate(hpetp
);
840 int hpet_alloc(struct hpet_data
*hdp
)
843 struct hpet_dev
*devp
;
847 struct hpet __iomem
*hpet
;
848 static struct hpets
*last
;
849 unsigned long period
;
850 unsigned long long temp
;
854 * hpet_alloc can be called by platform dependent code.
855 * If platform dependent code has allocated the hpet that
856 * ACPI has also reported, then we catch it here.
858 if (hpet_is_known(hdp
)) {
859 printk(KERN_DEBUG
"%s: duplicate HPET ignored\n",
864 siz
= sizeof(struct hpets
) + ((hdp
->hd_nirqs
- 1) *
865 sizeof(struct hpet_dev
));
867 hpetp
= kzalloc(siz
, GFP_KERNEL
);
872 hpetp
->hp_which
= hpet_nhpet
++;
873 hpetp
->hp_hpet
= hdp
->hd_address
;
874 hpetp
->hp_hpet_phys
= hdp
->hd_phys_address
;
876 hpetp
->hp_ntimer
= hdp
->hd_nirqs
;
878 for (i
= 0; i
< hdp
->hd_nirqs
; i
++)
879 hpetp
->hp_dev
[i
].hd_hdwirq
= hdp
->hd_irq
[i
];
881 hpet
= hpetp
->hp_hpet
;
883 cap
= readq(&hpet
->hpet_cap
);
885 ntimer
= ((cap
& HPET_NUM_TIM_CAP_MASK
) >> HPET_NUM_TIM_CAP_SHIFT
) + 1;
887 if (hpetp
->hp_ntimer
!= ntimer
) {
888 printk(KERN_WARNING
"hpet: number irqs doesn't agree"
889 " with number of timers\n");
895 last
->hp_next
= hpetp
;
901 period
= (cap
& HPET_COUNTER_CLK_PERIOD_MASK
) >>
902 HPET_COUNTER_CLK_PERIOD_SHIFT
; /* fs, 10^-15 */
903 temp
= 1000000000000000uLL; /* 10^15 femtoseconds per second */
904 temp
+= period
>> 1; /* round */
905 do_div(temp
, period
);
906 hpetp
->hp_tick_freq
= temp
; /* ticks per second */
908 printk(KERN_INFO
"hpet%d: at MMIO 0x%lx, IRQ%s",
909 hpetp
->hp_which
, hdp
->hd_phys_address
,
910 hpetp
->hp_ntimer
> 1 ? "s" : "");
911 for (i
= 0; i
< hpetp
->hp_ntimer
; i
++)
912 printk(KERN_CONT
"%s %d", i
> 0 ? "," : "", hdp
->hd_irq
[i
]);
913 printk(KERN_CONT
"\n");
915 temp
= hpetp
->hp_tick_freq
;
916 remainder
= do_div(temp
, 1000000);
918 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
919 hpetp
->hp_which
, hpetp
->hp_ntimer
,
920 cap
& HPET_COUNTER_SIZE_MASK
? 64 : 32,
921 (unsigned) temp
, remainder
);
923 mcfg
= readq(&hpet
->hpet_config
);
924 if ((mcfg
& HPET_ENABLE_CNF_MASK
) == 0) {
925 write_counter(0L, &hpet
->hpet_mc
);
926 mcfg
|= HPET_ENABLE_CNF_MASK
;
927 writeq(mcfg
, &hpet
->hpet_config
);
930 for (i
= 0, devp
= hpetp
->hp_dev
; i
< hpetp
->hp_ntimer
; i
++, devp
++) {
931 struct hpet_timer __iomem
*timer
;
933 timer
= &hpet
->hpet_timers
[devp
- hpetp
->hp_dev
];
935 devp
->hd_hpets
= hpetp
;
936 devp
->hd_hpet
= hpet
;
937 devp
->hd_timer
= timer
;
940 * If the timer was reserved by platform code,
941 * then make timer unavailable for opens.
943 if (hdp
->hd_state
& (1 << i
)) {
944 devp
->hd_flags
= HPET_OPEN
;
948 init_waitqueue_head(&devp
->hd_waitqueue
);
951 hpetp
->hp_delta
= hpet_calibrate(hpetp
);
953 /* This clocksource driver currently only works on ia64 */
955 if (!hpet_clocksource
) {
956 hpet_mctr
= (void __iomem
*)&hpetp
->hp_hpet
->hpet_mc
;
957 clocksource_hpet
.archdata
.fsys_mmio
= hpet_mctr
;
958 clocksource_register_hz(&clocksource_hpet
, hpetp
->hp_tick_freq
);
959 hpetp
->hp_clocksource
= &clocksource_hpet
;
960 hpet_clocksource
= &clocksource_hpet
;
967 static acpi_status
hpet_resources(struct acpi_resource
*res
, void *data
)
969 struct hpet_data
*hdp
;
971 struct acpi_resource_address64 addr
;
975 status
= acpi_resource_to_address64(res
, &addr
);
977 if (ACPI_SUCCESS(status
)) {
978 hdp
->hd_phys_address
= addr
.address
.minimum
;
979 hdp
->hd_address
= ioremap(addr
.address
.minimum
, addr
.address
.address_length
);
981 if (hpet_is_known(hdp
)) {
982 iounmap(hdp
->hd_address
);
983 return AE_ALREADY_EXISTS
;
985 } else if (res
->type
== ACPI_RESOURCE_TYPE_FIXED_MEMORY32
) {
986 struct acpi_resource_fixed_memory32
*fixmem32
;
988 fixmem32
= &res
->data
.fixed_memory32
;
990 hdp
->hd_phys_address
= fixmem32
->address
;
991 hdp
->hd_address
= ioremap(fixmem32
->address
,
994 if (hpet_is_known(hdp
)) {
995 iounmap(hdp
->hd_address
);
996 return AE_ALREADY_EXISTS
;
998 } else if (res
->type
== ACPI_RESOURCE_TYPE_EXTENDED_IRQ
) {
999 struct acpi_resource_extended_irq
*irqp
;
1002 irqp
= &res
->data
.extended_irq
;
1004 for (i
= 0; i
< irqp
->interrupt_count
; i
++) {
1005 if (hdp
->hd_nirqs
>= HPET_MAX_TIMERS
)
1008 irq
= acpi_register_gsi(NULL
, irqp
->interrupts
[i
],
1009 irqp
->triggering
, irqp
->polarity
);
1013 hdp
->hd_irq
[hdp
->hd_nirqs
] = irq
;
1021 static int hpet_acpi_add(struct acpi_device
*device
)
1024 struct hpet_data data
;
1026 memset(&data
, 0, sizeof(data
));
1029 acpi_walk_resources(device
->handle
, METHOD_NAME__CRS
,
1030 hpet_resources
, &data
);
1032 if (ACPI_FAILURE(result
))
1035 if (!data
.hd_address
|| !data
.hd_nirqs
) {
1036 if (data
.hd_address
)
1037 iounmap(data
.hd_address
);
1038 printk("%s: no address or irqs in _CRS\n", __func__
);
1042 return hpet_alloc(&data
);
1045 static const struct acpi_device_id hpet_device_ids
[] = {
1050 static struct acpi_driver hpet_acpi_driver
= {
1052 .ids
= hpet_device_ids
,
1054 .add
= hpet_acpi_add
,
1058 static struct miscdevice hpet_misc
= { HPET_MINOR
, "hpet", &hpet_fops
};
1060 static int __init
hpet_init(void)
1064 result
= misc_register(&hpet_misc
);
1068 sysctl_header
= register_sysctl_table(dev_root
);
1070 result
= acpi_bus_register_driver(&hpet_acpi_driver
);
1073 unregister_sysctl_table(sysctl_header
);
1074 misc_deregister(&hpet_misc
);
1080 device_initcall(hpet_init
);
1083 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1084 MODULE_LICENSE("GPL");