drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.c

   1 /*
   2  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 /*
  24  * GK20A does not have dedicated video memory, and to accurately represent this
  25  * fact Nouveau will not create a RAM device for it. Therefore its instmem
  26  * implementation must be done directly on top of system memory, while
  27  * preserving coherency for read and write operations.
  28  *
  29  * Instmem can be allocated through two means:
  30  * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
  31  *    pages contiguous to the GPU. This is the preferred way.
  32  * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
  33  *    contiguous memory.
  34  *
  35  * In both cases CPU read and writes are performed by creating a write-combined
  36  * mapping. The GPU L2 cache must thus be flushed/invalidated when required. To
  37  * be conservative we do this every time we acquire or release an instobj, but
  38  * ideally L2 management should be handled at a higher level.
  39  *
  40  * To improve performance, CPU mappings are not removed upon instobj release.
  41  * Instead they are placed into a LRU list to be recycled when the mapped space
  42  * goes beyond a certain threshold. At the moment this limit is 1MB.
  43  */
  44 #include "priv.h"
  45
  46 #include <core/memory.h>
  47 #include <core/mm.h>
  48 #include <core/tegra.h>
  49 #include <subdev/fb.h>
  50 #include <subdev/ltc.h>
  51
  52 struct gk20a_instobj {
  53         struct nvkm_memory memory;
  54         struct nvkm_mem mem;
  55         struct gk20a_instmem *imem;
  56
  57         /* CPU mapping */
  58         u32 *vaddr;
  59         struct list_head vaddr_node;
  60 };
  61 #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory)
  62
  63 /*
  64  * Used for objects allocated using the DMA API
  65  */
  66 struct gk20a_instobj_dma {
  67         struct gk20a_instobj base;
  68
  69         u32 *cpuaddr;
  70         dma_addr_t handle;
  71         struct nvkm_mm_node r;
  72 };
  73 #define gk20a_instobj_dma(p) \
  74         container_of(gk20a_instobj(p), struct gk20a_instobj_dma, base)
  75
  76 /*
  77  * Used for objects flattened using the IOMMU API
  78  */
  79 struct gk20a_instobj_iommu {
  80         struct gk20a_instobj base;
  81
  82         /* will point to the higher half of pages */
  83         dma_addr_t *dma_addrs;
  84         /* array of base.mem->size pages (+ dma_addr_ts) */
  85         struct page *pages[];
  86 };
  87 #define gk20a_instobj_iommu(p) \
  88         container_of(gk20a_instobj(p), struct gk20a_instobj_iommu, base)
  89
  90 struct gk20a_instmem {
  91         struct nvkm_instmem base;
  92
  93         /* protects vaddr_* and gk20a_instobj::vaddr* */
  94         spinlock_t lock;
  95
  96         /* CPU mappings LRU */
  97         unsigned int vaddr_use;
  98         unsigned int vaddr_max;
  99         struct list_head vaddr_lru;
 100
 101         /* Only used if IOMMU if present */
 102         struct mutex *mm_mutex;
 103         struct nvkm_mm *mm;
 104         struct iommu_domain *domain;
 105         unsigned long iommu_pgshift;
 106         u16 iommu_bit;
 107
 108         /* Only used by DMA API */
 109         struct dma_attrs attrs;
 110
 111         void __iomem * (*cpu_map)(struct nvkm_memory *);
 112 };
 113 #define gk20a_instmem(p) container_of((p), struct gk20a_instmem, base)
 114
 115 static enum nvkm_memory_target
 116 gk20a_instobj_target(struct nvkm_memory *memory)
 117 {
 118         return NVKM_MEM_TARGET_HOST;
 119 }
 120
 121 static u64
 122 gk20a_instobj_addr(struct nvkm_memory *memory)
 123 {
 124         return gk20a_instobj(memory)->mem.offset;
 125 }
 126
 127 static u64
 128 gk20a_instobj_size(struct nvkm_memory *memory)
 129 {
 130         return (u64)gk20a_instobj(memory)->mem.size << 12;
 131 }
 132
 133 static void __iomem *
 134 gk20a_instobj_cpu_map_dma(struct nvkm_memory *memory)
 135 {
 136 #if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
 137         struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
 138         struct device *dev = node->base.imem->base.subdev.device->dev;
 139         int npages = nvkm_memory_size(memory) >> 12;
 140         struct page *pages[npages];
 141         int i;
 142
 143         /* we shouldn't see a gk20a on anything but arm/arm64 anyways */
 144         /* phys_to_page does not exist on all platforms... */
 145         pages[0] = pfn_to_page(dma_to_phys(dev, node->handle) >> PAGE_SHIFT);
 146         for (i = 1; i < npages; i++)
 147                 pages[i] = pages[0] + i;
 148
 149         return vmap(pages, npages, VM_MAP, pgprot_writecombine(PAGE_KERNEL));
 150 #else
 151         BUG();
 152         return NULL;
 153 #endif
 154 }
 155
 156 static void __iomem *
 157 gk20a_instobj_cpu_map_iommu(struct nvkm_memory *memory)
 158 {
 159         struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
 160         int npages = nvkm_memory_size(memory) >> 12;
 161
 162         return vmap(node->pages, npages, VM_MAP,
 163                     pgprot_writecombine(PAGE_KERNEL));
 164 }
 165
 166 /*
 167  * Must be called while holding gk20a_instmem_lock
 168  */
 169 static void
 170 gk20a_instmem_vaddr_gc(struct gk20a_instmem *imem, const u64 size)
 171 {
 172         while (imem->vaddr_use + size > imem->vaddr_max) {
 173                 struct gk20a_instobj *obj;
 174
 175                 /* no candidate that can be unmapped, abort... */
 176                 if (list_empty(&imem->vaddr_lru))
 177                         break;
 178
 179                 obj = list_first_entry(&imem->vaddr_lru, struct gk20a_instobj,
 180                                        vaddr_node);
 181                 list_del(&obj->vaddr_node);
 182                 vunmap(obj->vaddr);
 183                 obj->vaddr = NULL;
 184                 imem->vaddr_use -= nvkm_memory_size(&obj->memory);
 185                 nvkm_debug(&imem->base.subdev, "(GC) vaddr used: %x/%x\n",
 186                            imem->vaddr_use, imem->vaddr_max);
 187
 188         }
 189 }
 190
 191 static void __iomem *
 192 gk20a_instobj_acquire(struct nvkm_memory *memory)
 193 {
 194         struct gk20a_instobj *node = gk20a_instobj(memory);
 195         struct gk20a_instmem *imem = node->imem;
 196         struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
 197         const u64 size = nvkm_memory_size(memory);
 198         unsigned long flags;
 199
 200         nvkm_ltc_flush(ltc);
 201
 202         spin_lock_irqsave(&imem->lock, flags);
 203
 204         if (node->vaddr) {
 205                 /* remove us from the LRU list since we cannot be unmapped */
 206                 list_del(&node->vaddr_node);
 207
 208                 goto out;
 209         }
 210
 211         /* try to free some address space if we reached the limit */
 212         gk20a_instmem_vaddr_gc(imem, size);
 213
 214         node->vaddr = imem->cpu_map(memory);
 215
 216         if (!node->vaddr) {
 217                 nvkm_error(&imem->base.subdev, "cannot map instobj - "
 218                            "this is not going to end well...\n");
 219                 goto out;
 220         }
 221
 222         imem->vaddr_use += size;
 223         nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
 224                    imem->vaddr_use, imem->vaddr_max);
 225
 226 out:
 227         spin_unlock_irqrestore(&imem->lock, flags);
 228
 229         return node->vaddr;
 230 }
 231
 232 static void
 233 gk20a_instobj_release(struct nvkm_memory *memory)
 234 {
 235         struct gk20a_instobj *node = gk20a_instobj(memory);
 236         struct gk20a_instmem *imem = node->imem;
 237         struct nvkm_ltc *ltc = imem->base.subdev.device->ltc;
 238         unsigned long flags;
 239
 240         spin_lock_irqsave(&imem->lock, flags);
 241
 242         /* add ourselves to the LRU list so our CPU mapping can be freed */
 243         list_add_tail(&node->vaddr_node, &imem->vaddr_lru);
 244
 245         spin_unlock_irqrestore(&imem->lock, flags);
 246
 247         wmb();
 248         nvkm_ltc_invalidate(ltc);
 249 }
 250
 251 static u32
 252 gk20a_instobj_rd32(struct nvkm_memory *memory, u64 offset)
 253 {
 254         struct gk20a_instobj *node = gk20a_instobj(memory);
 255
 256         return node->vaddr[offset / 4];
 257 }
 258
 259 static void
 260 gk20a_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data)
 261 {
 262         struct gk20a_instobj *node = gk20a_instobj(memory);
 263
 264         node->vaddr[offset / 4] = data;
 265 }
 266
 267 static void
 268 gk20a_instobj_map(struct nvkm_memory *memory, struct nvkm_vma *vma, u64 offset)
 269 {
 270         struct gk20a_instobj *node = gk20a_instobj(memory);
 271
 272         nvkm_vm_map_at(vma, offset, &node->mem);
 273 }
 274
 275 /*
 276  * Clear the CPU mapping of an instobj if it exists
 277  */
 278 static void
 279 gk20a_instobj_dtor(struct gk20a_instobj *node)
 280 {
 281         struct gk20a_instmem *imem = node->imem;
 282         struct gk20a_instobj *obj;
 283         unsigned long flags;
 284
 285         spin_lock_irqsave(&imem->lock, flags);
 286
 287         if (!node->vaddr)
 288                 goto out;
 289
 290         list_for_each_entry(obj, &imem->vaddr_lru, vaddr_node) {
 291                 if (obj == node) {
 292                         list_del(&obj->vaddr_node);
 293                         break;
 294                 }
 295         }
 296         vunmap(node->vaddr);
 297         node->vaddr = NULL;
 298         imem->vaddr_use -= nvkm_memory_size(&node->memory);
 299         nvkm_debug(&imem->base.subdev, "vaddr used: %x/%x\n",
 300                    imem->vaddr_use, imem->vaddr_max);
 301
 302 out:
 303         spin_unlock_irqrestore(&imem->lock, flags);
 304 }
 305
 306 static void *
 307 gk20a_instobj_dtor_dma(struct nvkm_memory *memory)
 308 {
 309         struct gk20a_instobj_dma *node = gk20a_instobj_dma(memory);
 310         struct gk20a_instmem *imem = node->base.imem;
 311         struct device *dev = imem->base.subdev.device->dev;
 312
 313         gk20a_instobj_dtor(&node->base);
 314
 315         if (unlikely(!node->cpuaddr))
 316                 goto out;
 317
 318         dma_free_attrs(dev, node->base.mem.size << PAGE_SHIFT, node->cpuaddr,
 319                        node->handle, &imem->attrs);
 320
 321 out:
 322         return node;
 323 }
 324
 325 static void *
 326 gk20a_instobj_dtor_iommu(struct nvkm_memory *memory)
 327 {
 328         struct gk20a_instobj_iommu *node = gk20a_instobj_iommu(memory);
 329         struct gk20a_instmem *imem = node->base.imem;
 330         struct device *dev = imem->base.subdev.device->dev;
 331         struct nvkm_mm_node *r;
 332         int i;
 333
 334         gk20a_instobj_dtor(&node->base);
 335
 336         if (unlikely(list_empty(&node->base.mem.regions)))
 337                 goto out;
 338
 339         r = list_first_entry(&node->base.mem.regions, struct nvkm_mm_node,
 340                              rl_entry);
 341
 342         /* clear IOMMU bit to unmap pages */
 343         r->offset &= ~BIT(imem->iommu_bit - imem->iommu_pgshift);
 344
 345         /* Unmap pages from GPU address space and free them */
 346         for (i = 0; i < node->base.mem.size; i++) {
 347                 iommu_unmap(imem->domain,
 348                             (r->offset + i) << imem->iommu_pgshift, PAGE_SIZE);
 349                 dma_unmap_page(dev, node->dma_addrs[i], PAGE_SIZE,
 350                                DMA_BIDIRECTIONAL);
 351                 __free_page(node->pages[i]);
 352         }
 353
 354         /* Release area from GPU address space */
 355         mutex_lock(imem->mm_mutex);
 356         nvkm_mm_free(imem->mm, &r);
 357         mutex_unlock(imem->mm_mutex);
 358
 359 out:
 360         return node;
 361 }
 362
 363 static const struct nvkm_memory_func
 364 gk20a_instobj_func_dma = {
 365         .dtor = gk20a_instobj_dtor_dma,
 366         .target = gk20a_instobj_target,
 367         .addr = gk20a_instobj_addr,
 368         .size = gk20a_instobj_size,
 369         .acquire = gk20a_instobj_acquire,
 370         .release = gk20a_instobj_release,
 371         .rd32 = gk20a_instobj_rd32,
 372         .wr32 = gk20a_instobj_wr32,
 373         .map = gk20a_instobj_map,
 374 };
 375
 376 static const struct nvkm_memory_func
 377 gk20a_instobj_func_iommu = {
 378         .dtor = gk20a_instobj_dtor_iommu,
 379         .target = gk20a_instobj_target,
 380         .addr = gk20a_instobj_addr,
 381         .size = gk20a_instobj_size,
 382         .acquire = gk20a_instobj_acquire,
 383         .release = gk20a_instobj_release,
 384         .rd32 = gk20a_instobj_rd32,
 385         .wr32 = gk20a_instobj_wr32,
 386         .map = gk20a_instobj_map,
 387 };
 388
 389 static int
 390 gk20a_instobj_ctor_dma(struct gk20a_instmem *imem, u32 npages, u32 align,
 391                        struct gk20a_instobj **_node)
 392 {
 393         struct gk20a_instobj_dma *node;
 394         struct nvkm_subdev *subdev = &imem->base.subdev;
 395         struct device *dev = subdev->device->dev;
 396
 397         if (!(node = kzalloc(sizeof(*node), GFP_KERNEL)))
 398                 return -ENOMEM;
 399         *_node = &node->base;
 400
 401         nvkm_memory_ctor(&gk20a_instobj_func_dma, &node->base.memory);
 402
 403         node->cpuaddr = dma_alloc_attrs(dev, npages << PAGE_SHIFT,
 404                                         &node->handle, GFP_KERNEL,
 405                                         &imem->attrs);
 406         if (!node->cpuaddr) {
 407                 nvkm_error(subdev, "cannot allocate DMA memory\n");
 408                 return -ENOMEM;
 409         }
 410
 411         /* alignment check */
 412         if (unlikely(node->handle & (align - 1)))
 413                 nvkm_warn(subdev,
 414                           "memory not aligned as requested: %pad (0x%x)\n",
 415                           &node->handle, align);
 416
 417         /* present memory for being mapped using small pages */
 418         node->r.type = 12;
 419         node->r.offset = node->handle >> 12;
 420         node->r.length = (npages << PAGE_SHIFT) >> 12;
 421
 422         node->base.mem.offset = node->handle;
 423
 424         INIT_LIST_HEAD(&node->base.mem.regions);
 425         list_add_tail(&node->r.rl_entry, &node->base.mem.regions);
 426
 427         return 0;
 428 }
 429
 430 static int
 431 gk20a_instobj_ctor_iommu(struct gk20a_instmem *imem, u32 npages, u32 align,
 432                          struct gk20a_instobj **_node)
 433 {
 434         struct gk20a_instobj_iommu *node;
 435         struct nvkm_subdev *subdev = &imem->base.subdev;
 436         struct device *dev = subdev->device->dev;
 437         struct nvkm_mm_node *r;
 438         int ret;
 439         int i;
 440
 441         /*
 442          * despite their variable size, instmem allocations are small enough
 443          * (< 1 page) to be handled by kzalloc
 444          */
 445         if (!(node = kzalloc(sizeof(*node) + ((sizeof(node->pages[0]) +
 446                              sizeof(*node->dma_addrs)) * npages), GFP_KERNEL)))
 447                 return -ENOMEM;
 448         *_node = &node->base;
 449         node->dma_addrs = (void *)(node->pages + npages);
 450
 451         nvkm_memory_ctor(&gk20a_instobj_func_iommu, &node->base.memory);
 452
 453         /* Allocate backing memory */
 454         for (i = 0; i < npages; i++) {
 455                 struct page *p = alloc_page(GFP_KERNEL);
 456                 dma_addr_t dma_adr;
 457
 458                 if (p == NULL) {
 459                         ret = -ENOMEM;
 460                         goto free_pages;
 461                 }
 462                 node->pages[i] = p;
 463                 dma_adr = dma_map_page(dev, p, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);
 464                 if (dma_mapping_error(dev, dma_adr)) {
 465                         nvkm_error(subdev, "DMA mapping error!\n");
 466                         ret = -ENOMEM;
 467                         goto free_pages;
 468                 }
 469                 node->dma_addrs[i] = dma_adr;
 470         }
 471
 472         mutex_lock(imem->mm_mutex);
 473         /* Reserve area from GPU address space */
 474         ret = nvkm_mm_head(imem->mm, 0, 1, npages, npages,
 475                            align >> imem->iommu_pgshift, &r);
 476         mutex_unlock(imem->mm_mutex);
 477         if (ret) {
 478                 nvkm_error(subdev, "IOMMU space is full!\n");
 479                 goto free_pages;
 480         }
 481
 482         /* Map into GPU address space */
 483         for (i = 0; i < npages; i++) {
 484                 u32 offset = (r->offset + i) << imem->iommu_pgshift;
 485
 486                 ret = iommu_map(imem->domain, offset, node->dma_addrs[i],
 487                                 PAGE_SIZE, IOMMU_READ | IOMMU_WRITE);
 488                 if (ret < 0) {
 489                         nvkm_error(subdev, "IOMMU mapping failure: %d\n", ret);
 490
 491                         while (i-- > 0) {
 492                                 offset -= PAGE_SIZE;
 493                                 iommu_unmap(imem->domain, offset, PAGE_SIZE);
 494                         }
 495                         goto release_area;
 496                 }
 497         }
 498
 499         /* IOMMU bit tells that an address is to be resolved through the IOMMU */
 500         r->offset |= BIT(imem->iommu_bit - imem->iommu_pgshift);
 501
 502         node->base.mem.offset = ((u64)r->offset) << imem->iommu_pgshift;
 503
 504         INIT_LIST_HEAD(&node->base.mem.regions);
 505         list_add_tail(&r->rl_entry, &node->base.mem.regions);
 506
 507         return 0;
 508
 509 release_area:
 510         mutex_lock(imem->mm_mutex);
 511         nvkm_mm_free(imem->mm, &r);
 512         mutex_unlock(imem->mm_mutex);
 513
 514 free_pages:
 515         for (i = 0; i < npages && node->pages[i] != NULL; i++) {
 516                 dma_addr_t dma_addr = node->dma_addrs[i];
 517                 if (dma_addr)
 518                         dma_unmap_page(dev, dma_addr, PAGE_SIZE,
 519                                        DMA_BIDIRECTIONAL);
 520                 __free_page(node->pages[i]);
 521         }
 522
 523         return ret;
 524 }
 525
 526 static int
 527 gk20a_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero,
 528                   struct nvkm_memory **pmemory)
 529 {
 530         struct gk20a_instmem *imem = gk20a_instmem(base);
 531         struct nvkm_subdev *subdev = &imem->base.subdev;
 532         struct gk20a_instobj *node = NULL;
 533         int ret;
 534
 535         nvkm_debug(subdev, "%s (%s): size: %x align: %x\n", __func__,
 536                    imem->domain ? "IOMMU" : "DMA", size, align);
 537
 538         /* Round size and align to page bounds */
 539         size = max(roundup(size, PAGE_SIZE), PAGE_SIZE);
 540         align = max(roundup(align, PAGE_SIZE), PAGE_SIZE);
 541
 542         if (imem->domain)
 543                 ret = gk20a_instobj_ctor_iommu(imem, size >> PAGE_SHIFT,
 544                                                align, &node);
 545         else
 546                 ret = gk20a_instobj_ctor_dma(imem, size >> PAGE_SHIFT,
 547                                              align, &node);
 548         *pmemory = node ? &node->memory : NULL;
 549         if (ret)
 550                 return ret;
 551
 552         node->imem = imem;
 553
 554         /* present memory for being mapped using small pages */
 555         node->mem.size = size >> 12;
 556         node->mem.memtype = 0;
 557         node->mem.page_shift = 12;
 558
 559         nvkm_debug(subdev, "alloc size: 0x%x, align: 0x%x, gaddr: 0x%llx\n",
 560                    size, align, node->mem.offset);
 561
 562         return 0;
 563 }
 564
 565 static void *
 566 gk20a_instmem_dtor(struct nvkm_instmem *base)
 567 {
 568         struct gk20a_instmem *imem = gk20a_instmem(base);
 569
 570         /* perform some sanity checks... */
 571         if (!list_empty(&imem->vaddr_lru))
 572                 nvkm_warn(&base->subdev, "instobj LRU not empty!\n");
 573
 574         if (imem->vaddr_use != 0)
 575                 nvkm_warn(&base->subdev, "instobj vmap area not empty! "
 576                           "0x%x bytes still mapped\n", imem->vaddr_use);
 577
 578         return imem;
 579 }
 580
 581 static const struct nvkm_instmem_func
 582 gk20a_instmem = {
 583         .dtor = gk20a_instmem_dtor,
 584         .memory_new = gk20a_instobj_new,
 585         .persistent = true,
 586         .zero = false,
 587 };
 588
 589 int
 590 gk20a_instmem_new(struct nvkm_device *device, int index,
 591                   struct nvkm_instmem **pimem)
 592 {
 593         struct nvkm_device_tegra *tdev = device->func->tegra(device);
 594         struct gk20a_instmem *imem;
 595
 596         if (!(imem = kzalloc(sizeof(*imem), GFP_KERNEL)))
 597                 return -ENOMEM;
 598         nvkm_instmem_ctor(&gk20a_instmem, device, index, &imem->base);
 599         spin_lock_init(&imem->lock);
 600         *pimem = &imem->base;
 601
 602         /* do not allow more than 1MB of CPU-mapped instmem */
 603         imem->vaddr_use = 0;
 604         imem->vaddr_max = 0x100000;
 605         INIT_LIST_HEAD(&imem->vaddr_lru);
 606
 607         if (tdev->iommu.domain) {
 608                 imem->mm_mutex = &tdev->iommu.mutex;
 609                 imem->mm = &tdev->iommu.mm;
 610                 imem->domain = tdev->iommu.domain;
 611                 imem->iommu_pgshift = tdev->iommu.pgshift;
 612                 imem->cpu_map = gk20a_instobj_cpu_map_iommu;
 613                 imem->iommu_bit = tdev->func->iommu_bit;
 614
 615                 nvkm_info(&imem->base.subdev, "using IOMMU\n");
 616         } else {
 617                 init_dma_attrs(&imem->attrs);
 618                 /* We will access the memory through our own mapping */
 619                 dma_set_attr(DMA_ATTR_NON_CONSISTENT, &imem->attrs);
 620                 dma_set_attr(DMA_ATTR_WEAK_ORDERING, &imem->attrs);
 621                 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &imem->attrs);
 622                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &imem->attrs);
 623                 imem->cpu_map = gk20a_instobj_cpu_map_dma;
 624
 625                 nvkm_info(&imem->base.subdev, "using DMA API\n");
 626         }
 627
 628         return 0;
 629 }