Linux 4.16.11
[linux/fpc-iii.git] / drivers / mtd / devices / mtd_dataflash.c
blob5dc8bd042cc54b2d07407f123d0ee62bce738594
1 /*
2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <linux/mutex.h>
17 #include <linux/err.h>
18 #include <linux/math64.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/flash.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/partitions.h>
29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
30 * each chip, which may be used for double buffered I/O; but this driver
31 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
33 * Sometimes DataFlash is packaged in MMC-format cards, although the
34 * MMC stack can't (yet?) distinguish between MMC and DataFlash
35 * protocols during enumeration.
38 /* reads can bypass the buffers */
39 #define OP_READ_CONTINUOUS 0xE8
40 #define OP_READ_PAGE 0xD2
42 /* group B requests can run even while status reports "busy" */
43 #define OP_READ_STATUS 0xD7 /* group B */
45 /* move data between host and buffer */
46 #define OP_READ_BUFFER1 0xD4 /* group B */
47 #define OP_READ_BUFFER2 0xD6 /* group B */
48 #define OP_WRITE_BUFFER1 0x84 /* group B */
49 #define OP_WRITE_BUFFER2 0x87 /* group B */
51 /* erasing flash */
52 #define OP_ERASE_PAGE 0x81
53 #define OP_ERASE_BLOCK 0x50
55 /* move data between buffer and flash */
56 #define OP_TRANSFER_BUF1 0x53
57 #define OP_TRANSFER_BUF2 0x55
58 #define OP_MREAD_BUFFER1 0xD4
59 #define OP_MREAD_BUFFER2 0xD6
60 #define OP_MWERASE_BUFFER1 0x83
61 #define OP_MWERASE_BUFFER2 0x86
62 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
63 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
65 /* write to buffer, then write-erase to flash */
66 #define OP_PROGRAM_VIA_BUF1 0x82
67 #define OP_PROGRAM_VIA_BUF2 0x85
69 /* compare buffer to flash */
70 #define OP_COMPARE_BUF1 0x60
71 #define OP_COMPARE_BUF2 0x61
73 /* read flash to buffer, then write-erase to flash */
74 #define OP_REWRITE_VIA_BUF1 0x58
75 #define OP_REWRITE_VIA_BUF2 0x59
77 /* newer chips report JEDEC manufacturer and device IDs; chip
78 * serial number and OTP bits; and per-sector writeprotect.
80 #define OP_READ_ID 0x9F
81 #define OP_READ_SECURITY 0x77
82 #define OP_WRITE_SECURITY_REVC 0x9A
83 #define OP_WRITE_SECURITY 0x9B /* revision D */
85 #define CFI_MFR_ATMEL 0x1F
87 #define DATAFLASH_SHIFT_EXTID 24
88 #define DATAFLASH_SHIFT_ID 40
90 struct dataflash {
91 u8 command[4];
92 char name[24];
94 unsigned short page_offset; /* offset in flash address */
95 unsigned int page_size; /* of bytes per page */
97 struct mutex lock;
98 struct spi_device *spi;
100 struct mtd_info mtd;
103 #ifdef CONFIG_OF
104 static const struct of_device_id dataflash_dt_ids[] = {
105 { .compatible = "atmel,at45", },
106 { .compatible = "atmel,dataflash", },
107 { /* sentinel */ }
109 MODULE_DEVICE_TABLE(of, dataflash_dt_ids);
110 #endif
112 /* ......................................................................... */
115 * Return the status of the DataFlash device.
117 static inline int dataflash_status(struct spi_device *spi)
119 /* NOTE: at45db321c over 25 MHz wants to write
120 * a dummy byte after the opcode...
122 return spi_w8r8(spi, OP_READ_STATUS);
126 * Poll the DataFlash device until it is READY.
127 * This usually takes 5-20 msec or so; more for sector erase.
129 static int dataflash_waitready(struct spi_device *spi)
131 int status;
133 for (;;) {
134 status = dataflash_status(spi);
135 if (status < 0) {
136 dev_dbg(&spi->dev, "status %d?\n", status);
137 status = 0;
140 if (status & (1 << 7)) /* RDY/nBSY */
141 return status;
143 msleep(3);
147 /* ......................................................................... */
150 * Erase pages of flash.
152 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
154 struct dataflash *priv = mtd->priv;
155 struct spi_device *spi = priv->spi;
156 struct spi_transfer x = { };
157 struct spi_message msg;
158 unsigned blocksize = priv->page_size << 3;
159 u8 *command;
160 u32 rem;
162 dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n",
163 (long long)instr->addr, (long long)instr->len);
165 div_u64_rem(instr->len, priv->page_size, &rem);
166 if (rem)
167 return -EINVAL;
168 div_u64_rem(instr->addr, priv->page_size, &rem);
169 if (rem)
170 return -EINVAL;
172 spi_message_init(&msg);
174 x.tx_buf = command = priv->command;
175 x.len = 4;
176 spi_message_add_tail(&x, &msg);
178 mutex_lock(&priv->lock);
179 while (instr->len > 0) {
180 unsigned int pageaddr;
181 int status;
182 int do_block;
184 /* Calculate flash page address; use block erase (for speed) if
185 * we're at a block boundary and need to erase the whole block.
187 pageaddr = div_u64(instr->addr, priv->page_size);
188 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
189 pageaddr = pageaddr << priv->page_offset;
191 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
192 command[1] = (u8)(pageaddr >> 16);
193 command[2] = (u8)(pageaddr >> 8);
194 command[3] = 0;
196 dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n",
197 do_block ? "block" : "page",
198 command[0], command[1], command[2], command[3],
199 pageaddr);
201 status = spi_sync(spi, &msg);
202 (void) dataflash_waitready(spi);
204 if (status < 0) {
205 dev_err(&spi->dev, "erase %x, err %d\n",
206 pageaddr, status);
207 /* REVISIT: can retry instr->retries times; or
208 * giveup and instr->fail_addr = instr->addr;
210 continue;
213 if (do_block) {
214 instr->addr += blocksize;
215 instr->len -= blocksize;
216 } else {
217 instr->addr += priv->page_size;
218 instr->len -= priv->page_size;
221 mutex_unlock(&priv->lock);
223 /* Inform MTD subsystem that erase is complete */
224 instr->state = MTD_ERASE_DONE;
225 mtd_erase_callback(instr);
227 return 0;
231 * Read from the DataFlash device.
232 * from : Start offset in flash device
233 * len : Amount to read
234 * retlen : About of data actually read
235 * buf : Buffer containing the data
237 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
238 size_t *retlen, u_char *buf)
240 struct dataflash *priv = mtd->priv;
241 struct spi_transfer x[2] = { };
242 struct spi_message msg;
243 unsigned int addr;
244 u8 *command;
245 int status;
247 dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n",
248 (unsigned int)from, (unsigned int)(from + len));
250 /* Calculate flash page/byte address */
251 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
252 + ((unsigned)from % priv->page_size);
254 command = priv->command;
256 dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
257 command[0], command[1], command[2], command[3]);
259 spi_message_init(&msg);
261 x[0].tx_buf = command;
262 x[0].len = 8;
263 spi_message_add_tail(&x[0], &msg);
265 x[1].rx_buf = buf;
266 x[1].len = len;
267 spi_message_add_tail(&x[1], &msg);
269 mutex_lock(&priv->lock);
271 /* Continuous read, max clock = f(car) which may be less than
272 * the peak rate available. Some chips support commands with
273 * fewer "don't care" bytes. Both buffers stay unchanged.
275 command[0] = OP_READ_CONTINUOUS;
276 command[1] = (u8)(addr >> 16);
277 command[2] = (u8)(addr >> 8);
278 command[3] = (u8)(addr >> 0);
279 /* plus 4 "don't care" bytes */
281 status = spi_sync(priv->spi, &msg);
282 mutex_unlock(&priv->lock);
284 if (status >= 0) {
285 *retlen = msg.actual_length - 8;
286 status = 0;
287 } else
288 dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n",
289 (unsigned)from, (unsigned)(from + len),
290 status);
291 return status;
295 * Write to the DataFlash device.
296 * to : Start offset in flash device
297 * len : Amount to write
298 * retlen : Amount of data actually written
299 * buf : Buffer containing the data
301 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
302 size_t * retlen, const u_char * buf)
304 struct dataflash *priv = mtd->priv;
305 struct spi_device *spi = priv->spi;
306 struct spi_transfer x[2] = { };
307 struct spi_message msg;
308 unsigned int pageaddr, addr, offset, writelen;
309 size_t remaining = len;
310 u_char *writebuf = (u_char *) buf;
311 int status = -EINVAL;
312 u8 *command;
314 dev_dbg(&spi->dev, "write 0x%x..0x%x\n",
315 (unsigned int)to, (unsigned int)(to + len));
317 spi_message_init(&msg);
319 x[0].tx_buf = command = priv->command;
320 x[0].len = 4;
321 spi_message_add_tail(&x[0], &msg);
323 pageaddr = ((unsigned)to / priv->page_size);
324 offset = ((unsigned)to % priv->page_size);
325 if (offset + len > priv->page_size)
326 writelen = priv->page_size - offset;
327 else
328 writelen = len;
330 mutex_lock(&priv->lock);
331 while (remaining > 0) {
332 dev_dbg(&spi->dev, "write @ %i:%i len=%i\n",
333 pageaddr, offset, writelen);
335 /* REVISIT:
336 * (a) each page in a sector must be rewritten at least
337 * once every 10K sibling erase/program operations.
338 * (b) for pages that are already erased, we could
339 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
340 * (c) WRITE to buffer could be done while waiting for
341 * a previous MWRITE/MWERASE to complete ...
342 * (d) error handling here seems to be mostly missing.
344 * Two persistent bits per page, plus a per-sector counter,
345 * could support (a) and (b) ... we might consider using
346 * the second half of sector zero, which is just one block,
347 * to track that state. (On AT91, that sector should also
348 * support boot-from-DataFlash.)
351 addr = pageaddr << priv->page_offset;
353 /* (1) Maybe transfer partial page to Buffer1 */
354 if (writelen != priv->page_size) {
355 command[0] = OP_TRANSFER_BUF1;
356 command[1] = (addr & 0x00FF0000) >> 16;
357 command[2] = (addr & 0x0000FF00) >> 8;
358 command[3] = 0;
360 dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n",
361 command[0], command[1], command[2], command[3]);
363 status = spi_sync(spi, &msg);
364 if (status < 0)
365 dev_dbg(&spi->dev, "xfer %u -> %d\n",
366 addr, status);
368 (void) dataflash_waitready(priv->spi);
371 /* (2) Program full page via Buffer1 */
372 addr += offset;
373 command[0] = OP_PROGRAM_VIA_BUF1;
374 command[1] = (addr & 0x00FF0000) >> 16;
375 command[2] = (addr & 0x0000FF00) >> 8;
376 command[3] = (addr & 0x000000FF);
378 dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n",
379 command[0], command[1], command[2], command[3]);
381 x[1].tx_buf = writebuf;
382 x[1].len = writelen;
383 spi_message_add_tail(x + 1, &msg);
384 status = spi_sync(spi, &msg);
385 spi_transfer_del(x + 1);
386 if (status < 0)
387 dev_dbg(&spi->dev, "pgm %u/%u -> %d\n",
388 addr, writelen, status);
390 (void) dataflash_waitready(priv->spi);
393 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
395 /* (3) Compare to Buffer1 */
396 addr = pageaddr << priv->page_offset;
397 command[0] = OP_COMPARE_BUF1;
398 command[1] = (addr & 0x00FF0000) >> 16;
399 command[2] = (addr & 0x0000FF00) >> 8;
400 command[3] = 0;
402 dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n",
403 command[0], command[1], command[2], command[3]);
405 status = spi_sync(spi, &msg);
406 if (status < 0)
407 dev_dbg(&spi->dev, "compare %u -> %d\n",
408 addr, status);
410 status = dataflash_waitready(priv->spi);
412 /* Check result of the compare operation */
413 if (status & (1 << 6)) {
414 dev_err(&spi->dev, "compare page %u, err %d\n",
415 pageaddr, status);
416 remaining = 0;
417 status = -EIO;
418 break;
419 } else
420 status = 0;
422 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
424 remaining = remaining - writelen;
425 pageaddr++;
426 offset = 0;
427 writebuf += writelen;
428 *retlen += writelen;
430 if (remaining > priv->page_size)
431 writelen = priv->page_size;
432 else
433 writelen = remaining;
435 mutex_unlock(&priv->lock);
437 return status;
440 /* ......................................................................... */
442 #ifdef CONFIG_MTD_DATAFLASH_OTP
444 static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len,
445 size_t *retlen, struct otp_info *info)
447 /* Report both blocks as identical: bytes 0..64, locked.
448 * Unless the user block changed from all-ones, we can't
449 * tell whether it's still writable; so we assume it isn't.
451 info->start = 0;
452 info->length = 64;
453 info->locked = 1;
454 *retlen = sizeof(*info);
455 return 0;
458 static ssize_t otp_read(struct spi_device *spi, unsigned base,
459 u8 *buf, loff_t off, size_t len)
461 struct spi_message m;
462 size_t l;
463 u8 *scratch;
464 struct spi_transfer t;
465 int status;
467 if (off > 64)
468 return -EINVAL;
470 if ((off + len) > 64)
471 len = 64 - off;
473 spi_message_init(&m);
475 l = 4 + base + off + len;
476 scratch = kzalloc(l, GFP_KERNEL);
477 if (!scratch)
478 return -ENOMEM;
480 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
481 * IN: ignore 4 bytes, data bytes 0..N (max 127)
483 scratch[0] = OP_READ_SECURITY;
485 memset(&t, 0, sizeof t);
486 t.tx_buf = scratch;
487 t.rx_buf = scratch;
488 t.len = l;
489 spi_message_add_tail(&t, &m);
491 dataflash_waitready(spi);
493 status = spi_sync(spi, &m);
494 if (status >= 0) {
495 memcpy(buf, scratch + 4 + base + off, len);
496 status = len;
499 kfree(scratch);
500 return status;
503 static int dataflash_read_fact_otp(struct mtd_info *mtd,
504 loff_t from, size_t len, size_t *retlen, u_char *buf)
506 struct dataflash *priv = mtd->priv;
507 int status;
509 /* 64 bytes, from 0..63 ... start at 64 on-chip */
510 mutex_lock(&priv->lock);
511 status = otp_read(priv->spi, 64, buf, from, len);
512 mutex_unlock(&priv->lock);
514 if (status < 0)
515 return status;
516 *retlen = status;
517 return 0;
520 static int dataflash_read_user_otp(struct mtd_info *mtd,
521 loff_t from, size_t len, size_t *retlen, u_char *buf)
523 struct dataflash *priv = mtd->priv;
524 int status;
526 /* 64 bytes, from 0..63 ... start at 0 on-chip */
527 mutex_lock(&priv->lock);
528 status = otp_read(priv->spi, 0, buf, from, len);
529 mutex_unlock(&priv->lock);
531 if (status < 0)
532 return status;
533 *retlen = status;
534 return 0;
537 static int dataflash_write_user_otp(struct mtd_info *mtd,
538 loff_t from, size_t len, size_t *retlen, u_char *buf)
540 struct spi_message m;
541 const size_t l = 4 + 64;
542 u8 *scratch;
543 struct spi_transfer t;
544 struct dataflash *priv = mtd->priv;
545 int status;
547 if (from >= 64) {
549 * Attempting to write beyond the end of OTP memory,
550 * no data can be written.
552 *retlen = 0;
553 return 0;
556 /* Truncate the write to fit into OTP memory. */
557 if ((from + len) > 64)
558 len = 64 - from;
560 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
561 * IN: ignore all
563 scratch = kzalloc(l, GFP_KERNEL);
564 if (!scratch)
565 return -ENOMEM;
566 scratch[0] = OP_WRITE_SECURITY;
567 memcpy(scratch + 4 + from, buf, len);
569 spi_message_init(&m);
571 memset(&t, 0, sizeof t);
572 t.tx_buf = scratch;
573 t.len = l;
574 spi_message_add_tail(&t, &m);
576 /* Write the OTP bits, if they've not yet been written.
577 * This modifies SRAM buffer1.
579 mutex_lock(&priv->lock);
580 dataflash_waitready(priv->spi);
581 status = spi_sync(priv->spi, &m);
582 mutex_unlock(&priv->lock);
584 kfree(scratch);
586 if (status >= 0) {
587 status = 0;
588 *retlen = len;
590 return status;
593 static char *otp_setup(struct mtd_info *device, char revision)
595 device->_get_fact_prot_info = dataflash_get_otp_info;
596 device->_read_fact_prot_reg = dataflash_read_fact_otp;
597 device->_get_user_prot_info = dataflash_get_otp_info;
598 device->_read_user_prot_reg = dataflash_read_user_otp;
600 /* rev c parts (at45db321c and at45db1281 only!) use a
601 * different write procedure; not (yet?) implemented.
603 if (revision > 'c')
604 device->_write_user_prot_reg = dataflash_write_user_otp;
606 return ", OTP";
609 #else
611 static char *otp_setup(struct mtd_info *device, char revision)
613 return " (OTP)";
616 #endif
618 /* ......................................................................... */
621 * Register DataFlash device with MTD subsystem.
623 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
624 int pagesize, int pageoffset, char revision)
626 struct dataflash *priv;
627 struct mtd_info *device;
628 struct flash_platform_data *pdata = dev_get_platdata(&spi->dev);
629 char *otp_tag = "";
630 int err = 0;
632 priv = kzalloc(sizeof *priv, GFP_KERNEL);
633 if (!priv)
634 return -ENOMEM;
636 mutex_init(&priv->lock);
637 priv->spi = spi;
638 priv->page_size = pagesize;
639 priv->page_offset = pageoffset;
641 /* name must be usable with cmdlinepart */
642 sprintf(priv->name, "spi%d.%d-%s",
643 spi->master->bus_num, spi->chip_select,
644 name);
646 device = &priv->mtd;
647 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
648 device->size = nr_pages * pagesize;
649 device->erasesize = pagesize;
650 device->writesize = pagesize;
651 device->type = MTD_DATAFLASH;
652 device->flags = MTD_WRITEABLE;
653 device->_erase = dataflash_erase;
654 device->_read = dataflash_read;
655 device->_write = dataflash_write;
656 device->priv = priv;
658 device->dev.parent = &spi->dev;
659 mtd_set_of_node(device, spi->dev.of_node);
661 if (revision >= 'c')
662 otp_tag = otp_setup(device, revision);
664 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
665 name, (long long)((device->size + 1023) >> 10),
666 pagesize, otp_tag);
667 spi_set_drvdata(spi, priv);
669 err = mtd_device_register(device,
670 pdata ? pdata->parts : NULL,
671 pdata ? pdata->nr_parts : 0);
673 if (!err)
674 return 0;
676 kfree(priv);
677 return err;
680 static inline int add_dataflash(struct spi_device *spi, char *name,
681 int nr_pages, int pagesize, int pageoffset)
683 return add_dataflash_otp(spi, name, nr_pages, pagesize,
684 pageoffset, 0);
687 struct flash_info {
688 char *name;
690 /* JEDEC id has a high byte of zero plus three data bytes:
691 * the manufacturer id, then a two byte device id.
693 u64 jedec_id;
695 /* The size listed here is what works with OP_ERASE_PAGE. */
696 unsigned nr_pages;
697 u16 pagesize;
698 u16 pageoffset;
700 u16 flags;
701 #define SUP_EXTID 0x0004 /* supports extended ID data */
702 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
703 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
706 static struct flash_info dataflash_data[] = {
709 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
710 * one with IS_POW2PS and the other without. The entry with the
711 * non-2^N byte page size can't name exact chip revisions without
712 * losing backwards compatibility for cmdlinepart.
714 * These newer chips also support 128-byte security registers (with
715 * 64 bytes one-time-programmable) and software write-protection.
717 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
718 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
720 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
721 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
723 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
724 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
726 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
727 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
729 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
730 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
732 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
734 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
735 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
737 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
738 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
740 { "AT45DB641E", 0x1f28000100, 32768, 264, 9, SUP_EXTID | SUP_POW2PS},
741 { "at45db641e", 0x1f28000100, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS},
744 static struct flash_info *jedec_lookup(struct spi_device *spi,
745 u64 jedec, bool use_extid)
747 struct flash_info *info;
748 int status;
750 for (info = dataflash_data;
751 info < dataflash_data + ARRAY_SIZE(dataflash_data);
752 info++) {
753 if (use_extid && !(info->flags & SUP_EXTID))
754 continue;
756 if (info->jedec_id == jedec) {
757 dev_dbg(&spi->dev, "OTP, sector protect%s\n",
758 (info->flags & SUP_POW2PS) ?
759 ", binary pagesize" : "");
760 if (info->flags & SUP_POW2PS) {
761 status = dataflash_status(spi);
762 if (status < 0) {
763 dev_dbg(&spi->dev, "status error %d\n",
764 status);
765 return ERR_PTR(status);
767 if (status & 0x1) {
768 if (info->flags & IS_POW2PS)
769 return info;
770 } else {
771 if (!(info->flags & IS_POW2PS))
772 return info;
774 } else
775 return info;
779 return ERR_PTR(-ENODEV);
782 static struct flash_info *jedec_probe(struct spi_device *spi)
784 int ret;
785 u8 code = OP_READ_ID;
786 u64 jedec;
787 u8 id[sizeof(jedec)] = {0};
788 const unsigned int id_size = 5;
789 struct flash_info *info;
792 * JEDEC also defines an optional "extended device information"
793 * string for after vendor-specific data, after the three bytes
794 * we use here. Supporting some chips might require using it.
796 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
797 * That's not an error; only rev C and newer chips handle it, and
798 * only Atmel sells these chips.
800 ret = spi_write_then_read(spi, &code, 1, id, id_size);
801 if (ret < 0) {
802 dev_dbg(&spi->dev, "error %d reading JEDEC ID\n", ret);
803 return ERR_PTR(ret);
806 if (id[0] != CFI_MFR_ATMEL)
807 return NULL;
809 jedec = be64_to_cpup((__be64 *)id);
812 * First, try to match device using extended device
813 * information
815 info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true);
816 if (!IS_ERR(info))
817 return info;
819 * If that fails, make another pass using regular ID
820 * information
822 info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false);
823 if (!IS_ERR(info))
824 return info;
826 * Treat other chips as errors ... we won't know the right page
827 * size (it might be binary) even when we can tell which density
828 * class is involved (legacy chip id scheme).
830 dev_warn(&spi->dev, "JEDEC id %016llx not handled\n", jedec);
831 return ERR_PTR(-ENODEV);
835 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
836 * or else the ID code embedded in the status bits:
838 * Device Density ID code #Pages PageSize Offset
839 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
840 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
841 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
842 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
843 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
844 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
845 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
846 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
848 static int dataflash_probe(struct spi_device *spi)
850 int status;
851 struct flash_info *info;
854 * Try to detect dataflash by JEDEC ID.
855 * If it succeeds we know we have either a C or D part.
856 * D will support power of 2 pagesize option.
857 * Both support the security register, though with different
858 * write procedures.
860 info = jedec_probe(spi);
861 if (IS_ERR(info))
862 return PTR_ERR(info);
863 if (info != NULL)
864 return add_dataflash_otp(spi, info->name, info->nr_pages,
865 info->pagesize, info->pageoffset,
866 (info->flags & SUP_POW2PS) ? 'd' : 'c');
869 * Older chips support only legacy commands, identifing
870 * capacity using bits in the status byte.
872 status = dataflash_status(spi);
873 if (status <= 0 || status == 0xff) {
874 dev_dbg(&spi->dev, "status error %d\n", status);
875 if (status == 0 || status == 0xff)
876 status = -ENODEV;
877 return status;
880 /* if there's a device there, assume it's dataflash.
881 * board setup should have set spi->max_speed_max to
882 * match f(car) for continuous reads, mode 0 or 3.
884 switch (status & 0x3c) {
885 case 0x0c: /* 0 0 1 1 x x */
886 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
887 break;
888 case 0x14: /* 0 1 0 1 x x */
889 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
890 break;
891 case 0x1c: /* 0 1 1 1 x x */
892 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
893 break;
894 case 0x24: /* 1 0 0 1 x x */
895 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
896 break;
897 case 0x2c: /* 1 0 1 1 x x */
898 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
899 break;
900 case 0x34: /* 1 1 0 1 x x */
901 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
902 break;
903 case 0x38: /* 1 1 1 x x x */
904 case 0x3c:
905 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
906 break;
907 /* obsolete AT45DB1282 not (yet?) supported */
908 default:
909 dev_info(&spi->dev, "unsupported device (%x)\n",
910 status & 0x3c);
911 status = -ENODEV;
914 if (status < 0)
915 dev_dbg(&spi->dev, "add_dataflash --> %d\n", status);
917 return status;
920 static int dataflash_remove(struct spi_device *spi)
922 struct dataflash *flash = spi_get_drvdata(spi);
923 int status;
925 dev_dbg(&spi->dev, "remove\n");
927 status = mtd_device_unregister(&flash->mtd);
928 if (status == 0)
929 kfree(flash);
930 return status;
933 static struct spi_driver dataflash_driver = {
934 .driver = {
935 .name = "mtd_dataflash",
936 .of_match_table = of_match_ptr(dataflash_dt_ids),
939 .probe = dataflash_probe,
940 .remove = dataflash_remove,
942 /* FIXME: investigate suspend and resume... */
945 module_spi_driver(dataflash_driver);
947 MODULE_LICENSE("GPL");
948 MODULE_AUTHOR("Andrew Victor, David Brownell");
949 MODULE_DESCRIPTION("MTD DataFlash driver");
950 MODULE_ALIAS("spi:mtd_dataflash");