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PM / sleep: Asynchronous threads for suspend_noirq
[linux/fpc-iii.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_sriov.c
blobe42f48df6e943e9ab21a34a5e3a7a49c43a726c8
1 /* bnx2x_sriov.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2013 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Shmulik Ravid <shmulikr@broadcom.com>
17 * Ariel Elior <ariele@broadcom.com>
18 *
19 */
20 #include "bnx2x.h"
21 #include "bnx2x_init.h"
22 #include "bnx2x_cmn.h"
23 #include "bnx2x_sp.h"
24 #include <linux/crc32.h>
25 #include <linux/if_vlan.h>
26
27 /* General service functions */
28 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
29 u16 pf_id)
30 {
31 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
32 pf_id);
33 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
34 pf_id);
35 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
36 pf_id);
37 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
38 pf_id);
39 }
40
41 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
42 u8 enable)
43 {
44 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
45 enable);
46 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
47 enable);
48 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
49 enable);
50 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
51 enable);
52 }
53
54 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
55 {
56 int idx;
57
58 for_each_vf(bp, idx)
59 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
60 break;
61 return idx;
62 }
63
64 static
65 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 {
67 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
68 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
69 }
70
71 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
72 u8 igu_sb_id, u8 segment, u16 index, u8 op,
73 u8 update)
74 {
75 /* acking a VF sb through the PF - use the GRC */
76 u32 ctl;
77 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
78 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
79 u32 func_encode = vf->abs_vfid;
80 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
81 struct igu_regular cmd_data = {0};
82
83 cmd_data.sb_id_and_flags =
84 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
85 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
86 (update << IGU_REGULAR_BUPDATE_SHIFT) |
87 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
88
89 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
90 func_encode << IGU_CTRL_REG_FID_SHIFT |
91 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
92
93 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
94 cmd_data.sb_id_and_flags, igu_addr_data);
95 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
96 mmiowb();
97 barrier();
98
99 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
100 ctl, igu_addr_ctl);
101 REG_WR(bp, igu_addr_ctl, ctl);
102 mmiowb();
103 barrier();
104 }
105 /* VFOP - VF slow-path operation support */
106
107 #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
108
109 /* VFOP operations states */
110 enum bnx2x_vfop_qctor_state {
111 BNX2X_VFOP_QCTOR_INIT,
112 BNX2X_VFOP_QCTOR_SETUP,
113 BNX2X_VFOP_QCTOR_INT_EN
114 };
115
116 enum bnx2x_vfop_qdtor_state {
117 BNX2X_VFOP_QDTOR_HALT,
118 BNX2X_VFOP_QDTOR_TERMINATE,
119 BNX2X_VFOP_QDTOR_CFCDEL,
120 BNX2X_VFOP_QDTOR_DONE
121 };
122
123 enum bnx2x_vfop_vlan_mac_state {
124 BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
125 BNX2X_VFOP_VLAN_MAC_CLEAR,
126 BNX2X_VFOP_VLAN_MAC_CHK_DONE,
127 BNX2X_VFOP_MAC_CONFIG_LIST,
128 BNX2X_VFOP_VLAN_CONFIG_LIST,
129 BNX2X_VFOP_VLAN_CONFIG_LIST_0
130 };
131
132 enum bnx2x_vfop_qsetup_state {
133 BNX2X_VFOP_QSETUP_CTOR,
134 BNX2X_VFOP_QSETUP_VLAN0,
135 BNX2X_VFOP_QSETUP_DONE
136 };
137
138 enum bnx2x_vfop_mcast_state {
139 BNX2X_VFOP_MCAST_DEL,
140 BNX2X_VFOP_MCAST_ADD,
141 BNX2X_VFOP_MCAST_CHK_DONE
142 };
143 enum bnx2x_vfop_qflr_state {
144 BNX2X_VFOP_QFLR_CLR_VLAN,
145 BNX2X_VFOP_QFLR_CLR_MAC,
146 BNX2X_VFOP_QFLR_TERMINATE,
147 BNX2X_VFOP_QFLR_DONE
148 };
149
150 enum bnx2x_vfop_flr_state {
151 BNX2X_VFOP_FLR_QUEUES,
152 BNX2X_VFOP_FLR_HW
153 };
154
155 enum bnx2x_vfop_close_state {
156 BNX2X_VFOP_CLOSE_QUEUES,
157 BNX2X_VFOP_CLOSE_HW
158 };
159
160 enum bnx2x_vfop_rxmode_state {
161 BNX2X_VFOP_RXMODE_CONFIG,
162 BNX2X_VFOP_RXMODE_DONE
163 };
164
165 enum bnx2x_vfop_qteardown_state {
166 BNX2X_VFOP_QTEARDOWN_RXMODE,
167 BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
168 BNX2X_VFOP_QTEARDOWN_CLR_MAC,
169 BNX2X_VFOP_QTEARDOWN_CLR_MCAST,
170 BNX2X_VFOP_QTEARDOWN_QDTOR,
171 BNX2X_VFOP_QTEARDOWN_DONE
172 };
173
174 enum bnx2x_vfop_rss_state {
175 BNX2X_VFOP_RSS_CONFIG,
176 BNX2X_VFOP_RSS_DONE
177 };
178
179 #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
180
181 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
182 struct bnx2x_queue_init_params *init_params,
183 struct bnx2x_queue_setup_params *setup_params,
184 u16 q_idx, u16 sb_idx)
185 {
186 DP(BNX2X_MSG_IOV,
187 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
188 vf->abs_vfid,
189 q_idx,
190 sb_idx,
191 init_params->tx.sb_cq_index,
192 init_params->tx.hc_rate,
193 setup_params->flags,
194 setup_params->txq_params.traffic_type);
195 }
196
197 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
198 struct bnx2x_queue_init_params *init_params,
199 struct bnx2x_queue_setup_params *setup_params,
200 u16 q_idx, u16 sb_idx)
201 {
202 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
203
204 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
205 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
206 vf->abs_vfid,
207 q_idx,
208 sb_idx,
209 init_params->rx.sb_cq_index,
210 init_params->rx.hc_rate,
211 setup_params->gen_params.mtu,
212 rxq_params->buf_sz,
213 rxq_params->sge_buf_sz,
214 rxq_params->max_sges_pkt,
215 rxq_params->tpa_agg_sz,
216 setup_params->flags,
217 rxq_params->drop_flags,
218 rxq_params->cache_line_log);
219 }
220
221 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
222 struct bnx2x_virtf *vf,
223 struct bnx2x_vf_queue *q,
224 struct bnx2x_vfop_qctor_params *p,
225 unsigned long q_type)
226 {
227 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
228 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
229
230 /* INIT */
231
232 /* Enable host coalescing in the transition to INIT state */
233 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
234 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
235
236 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
237 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
238
239 /* FW SB ID */
240 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
241 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
242
243 /* context */
244 init_p->cxts[0] = q->cxt;
245
246 /* SETUP */
247
248 /* Setup-op general parameters */
249 setup_p->gen_params.spcl_id = vf->sp_cl_id;
250 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
251
252 /* Setup-op pause params:
253 * Nothing to do, the pause thresholds are set by default to 0 which
254 * effectively turns off the feature for this queue. We don't want
255 * one queue (VF) to interfering with another queue (another VF)
256 */
257 if (vf->cfg_flags & VF_CFG_FW_FC)
258 BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
259 vf->abs_vfid);
260 /* Setup-op flags:
261 * collect statistics, zero statistics, local-switching, security,
262 * OV for Flex10, RSS and MCAST for leading
263 */
264 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
265 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
266
267 /* for VFs, enable tx switching, bd coherency, and mac address
268 * anti-spoofing
269 */
270 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
271 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
272 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
273
274 /* Setup-op rx parameters */
275 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
276 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
277
278 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
279 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
280 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
281
282 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
283 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
284 }
285
286 /* Setup-op tx parameters */
287 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
288 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
289 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
290 }
291 }
292
293 /* VFOP queue construction */
294 static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
295 {
296 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
297 struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
298 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
299 enum bnx2x_vfop_qctor_state state = vfop->state;
300
301 bnx2x_vfop_reset_wq(vf);
302
303 if (vfop->rc < 0)
304 goto op_err;
305
306 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
307
308 switch (state) {
309 case BNX2X_VFOP_QCTOR_INIT:
310
311 /* has this queue already been opened? */
312 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
313 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
314 DP(BNX2X_MSG_IOV,
315 "Entered qctor but queue was already up. Aborting gracefully\n");
316 goto op_done;
317 }
318
319 /* next state */
320 vfop->state = BNX2X_VFOP_QCTOR_SETUP;
321
322 q_params->cmd = BNX2X_Q_CMD_INIT;
323 vfop->rc = bnx2x_queue_state_change(bp, q_params);
324
325 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
326
327 case BNX2X_VFOP_QCTOR_SETUP:
328 /* next state */
329 vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
330
331 /* copy pre-prepared setup params to the queue-state params */
332 vfop->op_p->qctor.qstate.params.setup =
333 vfop->op_p->qctor.prep_qsetup;
334
335 q_params->cmd = BNX2X_Q_CMD_SETUP;
336 vfop->rc = bnx2x_queue_state_change(bp, q_params);
337
338 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
339
340 case BNX2X_VFOP_QCTOR_INT_EN:
341
342 /* enable interrupts */
343 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
344 USTORM_ID, 0, IGU_INT_ENABLE, 0);
345 goto op_done;
346 default:
347 bnx2x_vfop_default(state);
348 }
349 op_err:
350 BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
351 vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
352 op_done:
353 bnx2x_vfop_end(bp, vf, vfop);
354 op_pending:
355 return;
356 }
357
358 static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
359 struct bnx2x_virtf *vf,
360 struct bnx2x_vfop_cmd *cmd,
361 int qid)
362 {
363 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
364
365 if (vfop) {
366 vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
367
368 vfop->args.qctor.qid = qid;
369 vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
370
371 bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
372 bnx2x_vfop_qctor, cmd->done);
373 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
374 cmd->block);
375 }
376 return -ENOMEM;
377 }
378
379 /* VFOP queue destruction */
380 static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
381 {
382 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
383 struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
384 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
385 enum bnx2x_vfop_qdtor_state state = vfop->state;
386
387 bnx2x_vfop_reset_wq(vf);
388
389 if (vfop->rc < 0)
390 goto op_err;
391
392 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
393
394 switch (state) {
395 case BNX2X_VFOP_QDTOR_HALT:
396
397 /* has this queue already been stopped? */
398 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
399 BNX2X_Q_LOGICAL_STATE_STOPPED) {
400 DP(BNX2X_MSG_IOV,
401 "Entered qdtor but queue was already stopped. Aborting gracefully\n");
402
403 /* next state */
404 vfop->state = BNX2X_VFOP_QDTOR_DONE;
405
406 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
407 }
408
409 /* next state */
410 vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
411
412 q_params->cmd = BNX2X_Q_CMD_HALT;
413 vfop->rc = bnx2x_queue_state_change(bp, q_params);
414
415 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
416
417 case BNX2X_VFOP_QDTOR_TERMINATE:
418 /* next state */
419 vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
420
421 q_params->cmd = BNX2X_Q_CMD_TERMINATE;
422 vfop->rc = bnx2x_queue_state_change(bp, q_params);
423
424 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
425
426 case BNX2X_VFOP_QDTOR_CFCDEL:
427 /* next state */
428 vfop->state = BNX2X_VFOP_QDTOR_DONE;
429
430 q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
431 vfop->rc = bnx2x_queue_state_change(bp, q_params);
432
433 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
434 op_err:
435 BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
436 vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
437 op_done:
438 case BNX2X_VFOP_QDTOR_DONE:
439 /* invalidate the context */
440 if (qdtor->cxt) {
441 qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
442 qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
443 }
444 bnx2x_vfop_end(bp, vf, vfop);
445 return;
446 default:
447 bnx2x_vfop_default(state);
448 }
449 op_pending:
450 return;
451 }
452
453 static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
454 struct bnx2x_virtf *vf,
455 struct bnx2x_vfop_cmd *cmd,
456 int qid)
457 {
458 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
459
460 if (vfop) {
461 struct bnx2x_queue_state_params *qstate =
462 &vf->op_params.qctor.qstate;
463
464 memset(qstate, 0, sizeof(*qstate));
465 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
466
467 vfop->args.qdtor.qid = qid;
468 vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
469
470 bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
471 bnx2x_vfop_qdtor, cmd->done);
472 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
473 cmd->block);
474 } else {
475 BNX2X_ERR("VF[%d] failed to add a vfop\n", vf->abs_vfid);
476 return -ENOMEM;
477 }
478 }
479
480 static void
481 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
482 {
483 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
484 if (vf) {
485 /* the first igu entry belonging to VFs of this PF */
486 if (!BP_VFDB(bp)->first_vf_igu_entry)
487 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
488
489 /* the first igu entry belonging to this VF */
490 if (!vf_sb_count(vf))
491 vf->igu_base_id = igu_sb_id;
492
493 ++vf_sb_count(vf);
494 ++vf->sb_count;
495 }
496 BP_VFDB(bp)->vf_sbs_pool++;
497 }
498
499 /* VFOP MAC/VLAN helpers */
500 static inline void bnx2x_vfop_credit(struct bnx2x *bp,
501 struct bnx2x_vfop *vfop,
502 struct bnx2x_vlan_mac_obj *obj)
503 {
504 struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
505
506 /* update credit only if there is no error
507 * and a valid credit counter
508 */
509 if (!vfop->rc && args->credit) {
510 struct list_head *pos;
511 int read_lock;
512 int cnt = 0;
513
514 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
515 if (read_lock)
516 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
517
518 list_for_each(pos, &obj->head)
519 cnt++;
520
521 if (!read_lock)
522 bnx2x_vlan_mac_h_read_unlock(bp, obj);
523
524 atomic_set(args->credit, cnt);
525 }
526 }
527
528 static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
529 struct bnx2x_vfop_filter *pos,
530 struct bnx2x_vlan_mac_data *user_req)
531 {
532 user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
533 BNX2X_VLAN_MAC_DEL;
534
535 switch (pos->type) {
536 case BNX2X_VFOP_FILTER_MAC:
537 memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
538 break;
539 case BNX2X_VFOP_FILTER_VLAN:
540 user_req->u.vlan.vlan = pos->vid;
541 break;
542 default:
543 BNX2X_ERR("Invalid filter type, skipping\n");
544 return 1;
545 }
546 return 0;
547 }
548
549 static int bnx2x_vfop_config_list(struct bnx2x *bp,
550 struct bnx2x_vfop_filters *filters,
551 struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
552 {
553 struct bnx2x_vfop_filter *pos, *tmp;
554 struct list_head rollback_list, *filters_list = &filters->head;
555 struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
556 int rc = 0, cnt = 0;
557
558 INIT_LIST_HEAD(&rollback_list);
559
560 list_for_each_entry_safe(pos, tmp, filters_list, link) {
561 if (bnx2x_vfop_set_user_req(bp, pos, user_req))
562 continue;
563
564 rc = bnx2x_config_vlan_mac(bp, vlan_mac);
565 if (rc >= 0) {
566 cnt += pos->add ? 1 : -1;
567 list_move(&pos->link, &rollback_list);
568 rc = 0;
569 } else if (rc == -EEXIST) {
570 rc = 0;
571 } else {
572 BNX2X_ERR("Failed to add a new vlan_mac command\n");
573 break;
574 }
575 }
576
577 /* rollback if error or too many rules added */
578 if (rc || cnt > filters->add_cnt) {
579 BNX2X_ERR("error or too many rules added. Performing rollback\n");
580 list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
581 pos->add = !pos->add; /* reverse op */
582 bnx2x_vfop_set_user_req(bp, pos, user_req);
583 bnx2x_config_vlan_mac(bp, vlan_mac);
584 list_del(&pos->link);
585 }
586 cnt = 0;
587 if (!rc)
588 rc = -EINVAL;
589 }
590 filters->add_cnt = cnt;
591 return rc;
592 }
593
594 /* VFOP set VLAN/MAC */
595 static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
596 {
597 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
598 struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
599 struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
600 struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
601
602 enum bnx2x_vfop_vlan_mac_state state = vfop->state;
603
604 if (vfop->rc < 0)
605 goto op_err;
606
607 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
608
609 bnx2x_vfop_reset_wq(vf);
610
611 switch (state) {
612 case BNX2X_VFOP_VLAN_MAC_CLEAR:
613 /* next state */
614 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
615
616 /* do delete */
617 vfop->rc = obj->delete_all(bp, obj,
618 &vlan_mac->user_req.vlan_mac_flags,
619 &vlan_mac->ramrod_flags);
620
621 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
622
623 case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
624 /* next state */
625 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
626
627 /* do config */
628 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
629 if (vfop->rc == -EEXIST)
630 vfop->rc = 0;
631
632 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
633
634 case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
635 vfop->rc = !!obj->raw.check_pending(&obj->raw);
636 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
637
638 case BNX2X_VFOP_MAC_CONFIG_LIST:
639 /* next state */
640 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
641
642 /* do list config */
643 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
644 if (vfop->rc)
645 goto op_err;
646
647 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
648 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
649 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
650
651 case BNX2X_VFOP_VLAN_CONFIG_LIST:
652 /* next state */
653 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
654
655 /* do list config */
656 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
657 if (!vfop->rc) {
658 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
659 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
660 }
661 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
662
663 default:
664 bnx2x_vfop_default(state);
665 }
666 op_err:
667 BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
668 op_done:
669 kfree(filters);
670 bnx2x_vfop_credit(bp, vfop, obj);
671 bnx2x_vfop_end(bp, vf, vfop);
672 op_pending:
673 return;
674 }
675
676 struct bnx2x_vfop_vlan_mac_flags {
677 bool drv_only;
678 bool dont_consume;
679 bool single_cmd;
680 bool add;
681 };
682
683 static void
684 bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
685 struct bnx2x_vfop_vlan_mac_flags *flags)
686 {
687 struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
688
689 memset(ramrod, 0, sizeof(*ramrod));
690
691 /* ramrod flags */
692 if (flags->drv_only)
693 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
694 if (flags->single_cmd)
695 set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
696
697 /* mac_vlan flags */
698 if (flags->dont_consume)
699 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
700
701 /* cmd */
702 ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
703 }
704
705 static inline void
706 bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
707 struct bnx2x_vfop_vlan_mac_flags *flags)
708 {
709 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
710 set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
711 }
712
713 static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
714 struct bnx2x_virtf *vf,
715 struct bnx2x_vfop_cmd *cmd,
716 int qid, bool drv_only)
717 {
718 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
719 int rc;
720
721 if (vfop) {
722 struct bnx2x_vfop_args_filters filters = {
723 .multi_filter = NULL, /* single */
724 .credit = NULL, /* consume credit */
725 };
726 struct bnx2x_vfop_vlan_mac_flags flags = {
727 .drv_only = drv_only,
728 .dont_consume = (filters.credit != NULL),
729 .single_cmd = true,
730 .add = false /* don't care */,
731 };
732 struct bnx2x_vlan_mac_ramrod_params *ramrod =
733 &vf->op_params.vlan_mac;
734
735 /* set ramrod params */
736 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
737
738 /* set object */
739 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
740 if (rc)
741 return rc;
742 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
743
744 /* set extra args */
745 vfop->args.filters = filters;
746
747 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
748 bnx2x_vfop_vlan_mac, cmd->done);
749 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
750 cmd->block);
751 }
752 return -ENOMEM;
753 }
754
755 int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
756 struct bnx2x_virtf *vf,
757 struct bnx2x_vfop_cmd *cmd,
758 struct bnx2x_vfop_filters *macs,
759 int qid, bool drv_only)
760 {
761 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
762 int rc;
763
764 if (vfop) {
765 struct bnx2x_vfop_args_filters filters = {
766 .multi_filter = macs,
767 .credit = NULL, /* consume credit */
768 };
769 struct bnx2x_vfop_vlan_mac_flags flags = {
770 .drv_only = drv_only,
771 .dont_consume = (filters.credit != NULL),
772 .single_cmd = false,
773 .add = false, /* don't care since only the items in the
774 * filters list affect the sp operation,
775 * not the list itself
776 */
777 };
778 struct bnx2x_vlan_mac_ramrod_params *ramrod =
779 &vf->op_params.vlan_mac;
780
781 /* set ramrod params */
782 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
783
784 /* set object */
785 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
786 if (rc)
787 return rc;
788 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
789
790 /* set extra args */
791 filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
792 vfop->args.filters = filters;
793
794 bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
795 bnx2x_vfop_vlan_mac, cmd->done);
796 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
797 cmd->block);
798 }
799 return -ENOMEM;
800 }
801
802 static int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
803 struct bnx2x_virtf *vf,
804 struct bnx2x_vfop_cmd *cmd,
805 int qid, u16 vid, bool add)
806 {
807 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
808 int rc;
809
810 if (vfop) {
811 struct bnx2x_vfop_args_filters filters = {
812 .multi_filter = NULL, /* single command */
813 .credit = &bnx2x_vfq(vf, qid, vlan_count),
814 };
815 struct bnx2x_vfop_vlan_mac_flags flags = {
816 .drv_only = false,
817 .dont_consume = (filters.credit != NULL),
818 .single_cmd = true,
819 .add = add,
820 };
821 struct bnx2x_vlan_mac_ramrod_params *ramrod =
822 &vf->op_params.vlan_mac;
823
824 /* set ramrod params */
825 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
826 ramrod->user_req.u.vlan.vlan = vid;
827
828 /* set object */
829 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
830 if (rc)
831 return rc;
832 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
833
834 /* set extra args */
835 vfop->args.filters = filters;
836
837 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
838 bnx2x_vfop_vlan_mac, cmd->done);
839 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
840 cmd->block);
841 }
842 return -ENOMEM;
843 }
844
845 static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
846 struct bnx2x_virtf *vf,
847 struct bnx2x_vfop_cmd *cmd,
848 int qid, bool drv_only)
849 {
850 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
851 int rc;
852
853 if (vfop) {
854 struct bnx2x_vfop_args_filters filters = {
855 .multi_filter = NULL, /* single command */
856 .credit = &bnx2x_vfq(vf, qid, vlan_count),
857 };
858 struct bnx2x_vfop_vlan_mac_flags flags = {
859 .drv_only = drv_only,
860 .dont_consume = (filters.credit != NULL),
861 .single_cmd = true,
862 .add = false, /* don't care */
863 };
864 struct bnx2x_vlan_mac_ramrod_params *ramrod =
865 &vf->op_params.vlan_mac;
866
867 /* set ramrod params */
868 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
869
870 /* set object */
871 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
872 if (rc)
873 return rc;
874 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
875
876 /* set extra args */
877 vfop->args.filters = filters;
878
879 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
880 bnx2x_vfop_vlan_mac, cmd->done);
881 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
882 cmd->block);
883 }
884 return -ENOMEM;
885 }
886
887 int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
888 struct bnx2x_virtf *vf,
889 struct bnx2x_vfop_cmd *cmd,
890 struct bnx2x_vfop_filters *vlans,
891 int qid, bool drv_only)
892 {
893 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
894 int rc;
895
896 if (vfop) {
897 struct bnx2x_vfop_args_filters filters = {
898 .multi_filter = vlans,
899 .credit = &bnx2x_vfq(vf, qid, vlan_count),
900 };
901 struct bnx2x_vfop_vlan_mac_flags flags = {
902 .drv_only = drv_only,
903 .dont_consume = (filters.credit != NULL),
904 .single_cmd = false,
905 .add = false, /* don't care */
906 };
907 struct bnx2x_vlan_mac_ramrod_params *ramrod =
908 &vf->op_params.vlan_mac;
909
910 /* set ramrod params */
911 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
912
913 /* set object */
914 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
915 if (rc)
916 return rc;
917 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
918
919 /* set extra args */
920 filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
921 atomic_read(filters.credit);
922
923 vfop->args.filters = filters;
924
925 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
926 bnx2x_vfop_vlan_mac, cmd->done);
927 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
928 cmd->block);
929 }
930 return -ENOMEM;
931 }
932
933 /* VFOP queue setup (queue constructor + set vlan 0) */
934 static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
935 {
936 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
937 int qid = vfop->args.qctor.qid;
938 enum bnx2x_vfop_qsetup_state state = vfop->state;
939 struct bnx2x_vfop_cmd cmd = {
940 .done = bnx2x_vfop_qsetup,
941 .block = false,
942 };
943
944 if (vfop->rc < 0)
945 goto op_err;
946
947 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
948
949 switch (state) {
950 case BNX2X_VFOP_QSETUP_CTOR:
951 /* init the queue ctor command */
952 vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
953 vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
954 if (vfop->rc)
955 goto op_err;
956 return;
957
958 case BNX2X_VFOP_QSETUP_VLAN0:
959 /* skip if non-leading or FPGA/EMU*/
960 if (qid)
961 goto op_done;
962
963 /* init the queue set-vlan command (for vlan 0) */
964 vfop->state = BNX2X_VFOP_QSETUP_DONE;
965 vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
966 if (vfop->rc)
967 goto op_err;
968 return;
969 op_err:
970 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
971 op_done:
972 case BNX2X_VFOP_QSETUP_DONE:
973 vf->cfg_flags |= VF_CFG_VLAN;
974 smp_mb__before_clear_bit();
975 set_bit(BNX2X_SP_RTNL_HYPERVISOR_VLAN,
976 &bp->sp_rtnl_state);
977 smp_mb__after_clear_bit();
978 schedule_delayed_work(&bp->sp_rtnl_task, 0);
979 bnx2x_vfop_end(bp, vf, vfop);
980 return;
981 default:
982 bnx2x_vfop_default(state);
983 }
984 }
985
986 int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
987 struct bnx2x_virtf *vf,
988 struct bnx2x_vfop_cmd *cmd,
989 int qid)
990 {
991 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
992
993 if (vfop) {
994 vfop->args.qctor.qid = qid;
995
996 bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
997 bnx2x_vfop_qsetup, cmd->done);
998 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
999 cmd->block);
1000 }
1001 return -ENOMEM;
1002 }
1003
1004 /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
1005 static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1006 {
1007 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1008 int qid = vfop->args.qx.qid;
1009 enum bnx2x_vfop_qflr_state state = vfop->state;
1010 struct bnx2x_queue_state_params *qstate;
1011 struct bnx2x_vfop_cmd cmd;
1012
1013 bnx2x_vfop_reset_wq(vf);
1014
1015 if (vfop->rc < 0)
1016 goto op_err;
1017
1018 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
1019
1020 cmd.done = bnx2x_vfop_qflr;
1021 cmd.block = false;
1022
1023 switch (state) {
1024 case BNX2X_VFOP_QFLR_CLR_VLAN:
1025 /* vlan-clear-all: driver-only, don't consume credit */
1026 vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
1027
1028 if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj))) {
1029 /* the vlan_mac vfop will re-schedule us */
1030 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd,
1031 qid, true);
1032 if (vfop->rc)
1033 goto op_err;
1034 return;
1035
1036 } else {
1037 /* need to reschedule ourselves */
1038 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1039 }
1040
1041 case BNX2X_VFOP_QFLR_CLR_MAC:
1042 /* mac-clear-all: driver only consume credit */
1043 vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
1044 if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj))) {
1045 /* the vlan_mac vfop will re-schedule us */
1046 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd,
1047 qid, true);
1048 if (vfop->rc)
1049 goto op_err;
1050 return;
1051
1052 } else {
1053 /* need to reschedule ourselves */
1054 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1055 }
1056
1057 case BNX2X_VFOP_QFLR_TERMINATE:
1058 qstate = &vfop->op_p->qctor.qstate;
1059 memset(qstate , 0, sizeof(*qstate));
1060 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
1061 vfop->state = BNX2X_VFOP_QFLR_DONE;
1062
1063 DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
1064 vf->abs_vfid, qstate->q_obj->state);
1065
1066 if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
1067 qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
1068 qstate->cmd = BNX2X_Q_CMD_TERMINATE;
1069 vfop->rc = bnx2x_queue_state_change(bp, qstate);
1070 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
1071 } else {
1072 goto op_done;
1073 }
1074
1075 op_err:
1076 BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
1077 vf->abs_vfid, qid, vfop->rc);
1078 op_done:
1079 case BNX2X_VFOP_QFLR_DONE:
1080 bnx2x_vfop_end(bp, vf, vfop);
1081 return;
1082 default:
1083 bnx2x_vfop_default(state);
1084 }
1085 op_pending:
1086 return;
1087 }
1088
1089 static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
1090 struct bnx2x_virtf *vf,
1091 struct bnx2x_vfop_cmd *cmd,
1092 int qid)
1093 {
1094 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1095
1096 if (vfop) {
1097 vfop->args.qx.qid = qid;
1098 bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
1099 bnx2x_vfop_qflr, cmd->done);
1100 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
1101 cmd->block);
1102 }
1103 return -ENOMEM;
1104 }
1105
1106 /* VFOP multi-casts */
1107 static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
1108 {
1109 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1110 struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
1111 struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
1112 struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
1113 enum bnx2x_vfop_mcast_state state = vfop->state;
1114 int i;
1115
1116 bnx2x_vfop_reset_wq(vf);
1117
1118 if (vfop->rc < 0)
1119 goto op_err;
1120
1121 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1122
1123 switch (state) {
1124 case BNX2X_VFOP_MCAST_DEL:
1125 /* clear existing mcasts */
1126 vfop->state = (args->mc_num) ? BNX2X_VFOP_MCAST_ADD
1127 : BNX2X_VFOP_MCAST_CHK_DONE;
1128 mcast->mcast_list_len = vf->mcast_list_len;
1129 vf->mcast_list_len = args->mc_num;
1130 vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
1131 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1132
1133 case BNX2X_VFOP_MCAST_ADD:
1134 if (raw->check_pending(raw))
1135 goto op_pending;
1136
1137 /* update mcast list on the ramrod params */
1138 INIT_LIST_HEAD(&mcast->mcast_list);
1139 for (i = 0; i < args->mc_num; i++)
1140 list_add_tail(&(args->mc[i].link),
1141 &mcast->mcast_list);
1142 mcast->mcast_list_len = args->mc_num;
1143
1144 /* add new mcasts */
1145 vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
1146 vfop->rc = bnx2x_config_mcast(bp, mcast,
1147 BNX2X_MCAST_CMD_ADD);
1148 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1149
1150 case BNX2X_VFOP_MCAST_CHK_DONE:
1151 vfop->rc = raw->check_pending(raw) ? 1 : 0;
1152 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1153 default:
1154 bnx2x_vfop_default(state);
1155 }
1156 op_err:
1157 BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
1158 op_done:
1159 kfree(args->mc);
1160 bnx2x_vfop_end(bp, vf, vfop);
1161 op_pending:
1162 return;
1163 }
1164
1165 int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
1166 struct bnx2x_virtf *vf,
1167 struct bnx2x_vfop_cmd *cmd,
1168 bnx2x_mac_addr_t *mcasts,
1169 int mcast_num, bool drv_only)
1170 {
1171 struct bnx2x_vfop *vfop = NULL;
1172 size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
1173 struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
1174 NULL;
1175
1176 if (!mc_sz || mc) {
1177 vfop = bnx2x_vfop_add(bp, vf);
1178 if (vfop) {
1179 int i;
1180 struct bnx2x_mcast_ramrod_params *ramrod =
1181 &vf->op_params.mcast;
1182
1183 /* set ramrod params */
1184 memset(ramrod, 0, sizeof(*ramrod));
1185 ramrod->mcast_obj = &vf->mcast_obj;
1186 if (drv_only)
1187 set_bit(RAMROD_DRV_CLR_ONLY,
1188 &ramrod->ramrod_flags);
1189
1190 /* copy mcasts pointers */
1191 vfop->args.mc_list.mc_num = mcast_num;
1192 vfop->args.mc_list.mc = mc;
1193 for (i = 0; i < mcast_num; i++)
1194 mc[i].mac = mcasts[i];
1195
1196 bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
1197 bnx2x_vfop_mcast, cmd->done);
1198 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
1199 cmd->block);
1200 } else {
1201 kfree(mc);
1202 }
1203 }
1204 return -ENOMEM;
1205 }
1206
1207 /* VFOP rx-mode */
1208 static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
1209 {
1210 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1211 struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
1212 enum bnx2x_vfop_rxmode_state state = vfop->state;
1213
1214 bnx2x_vfop_reset_wq(vf);
1215
1216 if (vfop->rc < 0)
1217 goto op_err;
1218
1219 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1220
1221 switch (state) {
1222 case BNX2X_VFOP_RXMODE_CONFIG:
1223 /* next state */
1224 vfop->state = BNX2X_VFOP_RXMODE_DONE;
1225
1226 /* record the accept flags in vfdb so hypervisor can modify them
1227 * if necessary
1228 */
1229 bnx2x_vfq(vf, ramrod->cl_id - vf->igu_base_id, accept_flags) =
1230 ramrod->rx_accept_flags;
1231 vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
1232 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1233 op_err:
1234 BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
1235 op_done:
1236 case BNX2X_VFOP_RXMODE_DONE:
1237 bnx2x_vfop_end(bp, vf, vfop);
1238 return;
1239 default:
1240 bnx2x_vfop_default(state);
1241 }
1242 op_pending:
1243 return;
1244 }
1245
1246 static void bnx2x_vf_prep_rx_mode(struct bnx2x *bp, u8 qid,
1247 struct bnx2x_rx_mode_ramrod_params *ramrod,
1248 struct bnx2x_virtf *vf,
1249 unsigned long accept_flags)
1250 {
1251 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
1252
1253 memset(ramrod, 0, sizeof(*ramrod));
1254 ramrod->cid = vfq->cid;
1255 ramrod->cl_id = vfq_cl_id(vf, vfq);
1256 ramrod->rx_mode_obj = &bp->rx_mode_obj;
1257 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
1258 ramrod->rx_accept_flags = accept_flags;
1259 ramrod->tx_accept_flags = accept_flags;
1260 ramrod->pstate = &vf->filter_state;
1261 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
1262
1263 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1264 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
1265 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
1266
1267 ramrod->rdata = bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
1268 ramrod->rdata_mapping = bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
1269 }
1270
1271 int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
1272 struct bnx2x_virtf *vf,
1273 struct bnx2x_vfop_cmd *cmd,
1274 int qid, unsigned long accept_flags)
1275 {
1276 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1277
1278 if (vfop) {
1279 struct bnx2x_rx_mode_ramrod_params *ramrod =
1280 &vf->op_params.rx_mode;
1281
1282 bnx2x_vf_prep_rx_mode(bp, qid, ramrod, vf, accept_flags);
1283
1284 bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
1285 bnx2x_vfop_rxmode, cmd->done);
1286 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
1287 cmd->block);
1288 }
1289 return -ENOMEM;
1290 }
1291
1292 /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
1293 * queue destructor)
1294 */
1295 static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
1296 {
1297 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1298 int qid = vfop->args.qx.qid;
1299 enum bnx2x_vfop_qteardown_state state = vfop->state;
1300 struct bnx2x_vfop_cmd cmd;
1301
1302 if (vfop->rc < 0)
1303 goto op_err;
1304
1305 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1306
1307 cmd.done = bnx2x_vfop_qdown;
1308 cmd.block = false;
1309
1310 switch (state) {
1311 case BNX2X_VFOP_QTEARDOWN_RXMODE:
1312 /* Drop all */
1313 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
1314 vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
1315 if (vfop->rc)
1316 goto op_err;
1317 return;
1318
1319 case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
1320 /* vlan-clear-all: don't consume credit */
1321 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
1322 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
1323 if (vfop->rc)
1324 goto op_err;
1325 return;
1326
1327 case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
1328 /* mac-clear-all: consume credit */
1329 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MCAST;
1330 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
1331 if (vfop->rc)
1332 goto op_err;
1333 return;
1334
1335 case BNX2X_VFOP_QTEARDOWN_CLR_MCAST:
1336 vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
1337 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
1338 if (vfop->rc)
1339 goto op_err;
1340 return;
1341
1342 case BNX2X_VFOP_QTEARDOWN_QDTOR:
1343 /* run the queue destruction flow */
1344 DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
1345 vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
1346 DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
1347 vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
1348 DP(BNX2X_MSG_IOV, "returned from cmd\n");
1349 if (vfop->rc)
1350 goto op_err;
1351 return;
1352 op_err:
1353 BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
1354 vf->abs_vfid, qid, vfop->rc);
1355
1356 case BNX2X_VFOP_QTEARDOWN_DONE:
1357 bnx2x_vfop_end(bp, vf, vfop);
1358 return;
1359 default:
1360 bnx2x_vfop_default(state);
1361 }
1362 }
1363
1364 int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
1365 struct bnx2x_virtf *vf,
1366 struct bnx2x_vfop_cmd *cmd,
1367 int qid)
1368 {
1369 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1370
1371 /* for non leading queues skip directly to qdown sate */
1372 if (vfop) {
1373 vfop->args.qx.qid = qid;
1374 bnx2x_vfop_opset(qid == LEADING_IDX ?
1375 BNX2X_VFOP_QTEARDOWN_RXMODE :
1376 BNX2X_VFOP_QTEARDOWN_QDTOR, bnx2x_vfop_qdown,
1377 cmd->done);
1378 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
1379 cmd->block);
1380 }
1381
1382 return -ENOMEM;
1383 }
1384
1385 /* VF enable primitives
1386 * when pretend is required the caller is responsible
1387 * for calling pretend prior to calling these routines
1388 */
1389
1390 /* internal vf enable - until vf is enabled internally all transactions
1391 * are blocked. This routine should always be called last with pretend.
1392 */
1393 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
1394 {
1395 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
1396 }
1397
1398 /* clears vf error in all semi blocks */
1399 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
1400 {
1401 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
1402 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
1403 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
1404 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
1405 }
1406
1407 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
1408 {
1409 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
1410 u32 was_err_reg = 0;
1411
1412 switch (was_err_group) {
1413 case 0:
1414 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
1415 break;
1416 case 1:
1417 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
1418 break;
1419 case 2:
1420 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
1421 break;
1422 case 3:
1423 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
1424 break;
1425 }
1426 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
1427 }
1428
1429 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
1430 {
1431 int i;
1432 u32 val;
1433
1434 /* Set VF masks and configuration - pretend */
1435 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1436
1437 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
1438 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
1439 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
1440 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
1441 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
1442 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
1443
1444 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1445 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
1446 if (vf->cfg_flags & VF_CFG_INT_SIMD)
1447 val |= IGU_VF_CONF_SINGLE_ISR_EN;
1448 val &= ~IGU_VF_CONF_PARENT_MASK;
1449 val |= (BP_ABS_FUNC(bp) >> 1) << IGU_VF_CONF_PARENT_SHIFT;
1450 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1451
1452 DP(BNX2X_MSG_IOV,
1453 "value in IGU_REG_VF_CONFIGURATION of vf %d after write is 0x%08x\n",
1454 vf->abs_vfid, val);
1455
1456 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1457
1458 /* iterate over all queues, clear sb consumer */
1459 for (i = 0; i < vf_sb_count(vf); i++) {
1460 u8 igu_sb_id = vf_igu_sb(vf, i);
1461
1462 /* zero prod memory */
1463 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
1464
1465 /* clear sb state machine */
1466 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
1467 false /* VF */);
1468
1469 /* disable + update */
1470 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
1471 IGU_INT_DISABLE, 1);
1472 }
1473 }
1474
1475 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
1476 {
1477 /* set the VF-PF association in the FW */
1478 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
1479 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
1480
1481 /* clear vf errors*/
1482 bnx2x_vf_semi_clear_err(bp, abs_vfid);
1483 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
1484
1485 /* internal vf-enable - pretend */
1486 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
1487 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
1488 bnx2x_vf_enable_internal(bp, true);
1489 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1490 }
1491
1492 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
1493 {
1494 /* Reset vf in IGU interrupts are still disabled */
1495 bnx2x_vf_igu_reset(bp, vf);
1496
1497 /* pretend to enable the vf with the PBF */
1498 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1499 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
1500 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1501 }
1502
1503 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
1504 {
1505 struct pci_dev *dev;
1506 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1507
1508 if (!vf)
1509 return false;
1510
1511 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
1512 if (dev)
1513 return bnx2x_is_pcie_pending(dev);
1514 return false;
1515 }
1516
1517 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
1518 {
1519 /* Verify no pending pci transactions */
1520 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
1521 BNX2X_ERR("PCIE Transactions still pending\n");
1522
1523 return 0;
1524 }
1525
1526 /* must be called after the number of PF queues and the number of VFs are
1527 * both known
1528 */
1529 static void
1530 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1531 {
1532 struct vf_pf_resc_request *resc = &vf->alloc_resc;
1533 u16 vlan_count = 0;
1534
1535 /* will be set only during VF-ACQUIRE */
1536 resc->num_rxqs = 0;
1537 resc->num_txqs = 0;
1538
1539 /* no credit calculations for macs (just yet) */
1540 resc->num_mac_filters = 1;
1541
1542 /* divvy up vlan rules */
1543 vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
1544 vlan_count = 1 << ilog2(vlan_count);
1545 resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
1546
1547 /* no real limitation */
1548 resc->num_mc_filters = 0;
1549
1550 /* num_sbs already set */
1551 resc->num_sbs = vf->sb_count;
1552 }
1553
1554 /* FLR routines: */
1555 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1556 {
1557 /* reset the state variables */
1558 bnx2x_iov_static_resc(bp, vf);
1559 vf->state = VF_FREE;
1560 }
1561
1562 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
1563 {
1564 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
1565
1566 /* DQ usage counter */
1567 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1568 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
1569 "DQ VF usage counter timed out",
1570 poll_cnt);
1571 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1572
1573 /* FW cleanup command - poll for the results */
1574 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
1575 poll_cnt))
1576 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
1577
1578 /* verify TX hw is flushed */
1579 bnx2x_tx_hw_flushed(bp, poll_cnt);
1580 }
1581
1582 static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1583 {
1584 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1585 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
1586 enum bnx2x_vfop_flr_state state = vfop->state;
1587 struct bnx2x_vfop_cmd cmd = {
1588 .done = bnx2x_vfop_flr,
1589 .block = false,
1590 };
1591
1592 if (vfop->rc < 0)
1593 goto op_err;
1594
1595 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1596
1597 switch (state) {
1598 case BNX2X_VFOP_FLR_QUEUES:
1599 /* the cleanup operations are valid if and only if the VF
1600 * was first acquired.
1601 */
1602 if (++(qx->qid) < vf_rxq_count(vf)) {
1603 vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
1604 qx->qid);
1605 if (vfop->rc)
1606 goto op_err;
1607 return;
1608 }
1609 /* remove multicasts */
1610 vfop->state = BNX2X_VFOP_FLR_HW;
1611 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
1612 0, true);
1613 if (vfop->rc)
1614 goto op_err;
1615 return;
1616 case BNX2X_VFOP_FLR_HW:
1617
1618 /* dispatch final cleanup and wait for HW queues to flush */
1619 bnx2x_vf_flr_clnup_hw(bp, vf);
1620
1621 /* release VF resources */
1622 bnx2x_vf_free_resc(bp, vf);
1623
1624 /* re-open the mailbox */
1625 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1626
1627 goto op_done;
1628 default:
1629 bnx2x_vfop_default(state);
1630 }
1631 op_err:
1632 BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
1633 op_done:
1634 vf->flr_clnup_stage = VF_FLR_ACK;
1635 bnx2x_vfop_end(bp, vf, vfop);
1636 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1637 }
1638
1639 static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
1640 struct bnx2x_virtf *vf,
1641 vfop_handler_t done)
1642 {
1643 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1644 if (vfop) {
1645 vfop->args.qx.qid = -1; /* loop */
1646 bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
1647 bnx2x_vfop_flr, done);
1648 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
1649 }
1650 return -ENOMEM;
1651 }
1652
1653 static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
1654 {
1655 int i = prev_vf ? prev_vf->index + 1 : 0;
1656 struct bnx2x_virtf *vf;
1657
1658 /* find next VF to cleanup */
1659 next_vf_to_clean:
1660 for (;
1661 i < BNX2X_NR_VIRTFN(bp) &&
1662 (bnx2x_vf(bp, i, state) != VF_RESET ||
1663 bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
1664 i++)
1665 ;
1666
1667 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
1668 BNX2X_NR_VIRTFN(bp));
1669
1670 if (i < BNX2X_NR_VIRTFN(bp)) {
1671 vf = BP_VF(bp, i);
1672
1673 /* lock the vf pf channel */
1674 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1675
1676 /* invoke the VF FLR SM */
1677 if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
1678 BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
1679 vf->abs_vfid);
1680
1681 /* mark the VF to be ACKED and continue */
1682 vf->flr_clnup_stage = VF_FLR_ACK;
1683 goto next_vf_to_clean;
1684 }
1685 return;
1686 }
1687
1688 /* we are done, update vf records */
1689 for_each_vf(bp, i) {
1690 vf = BP_VF(bp, i);
1691
1692 if (vf->flr_clnup_stage != VF_FLR_ACK)
1693 continue;
1694
1695 vf->flr_clnup_stage = VF_FLR_EPILOG;
1696 }
1697
1698 /* Acknowledge the handled VFs.
1699 * we are acknowledge all the vfs which an flr was requested for, even
1700 * if amongst them there are such that we never opened, since the mcp
1701 * will interrupt us immediately again if we only ack some of the bits,
1702 * resulting in an endless loop. This can happen for example in KVM
1703 * where an 'all ones' flr request is sometimes given by hyper visor
1704 */
1705 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
1706 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1707 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1708 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
1709 bp->vfdb->flrd_vfs[i]);
1710
1711 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
1712
1713 /* clear the acked bits - better yet if the MCP implemented
1714 * write to clear semantics
1715 */
1716 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1717 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
1718 }
1719
1720 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
1721 {
1722 int i;
1723
1724 /* Read FLR'd VFs */
1725 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1726 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
1727
1728 DP(BNX2X_MSG_MCP,
1729 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
1730 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1731
1732 for_each_vf(bp, i) {
1733 struct bnx2x_virtf *vf = BP_VF(bp, i);
1734 u32 reset = 0;
1735
1736 if (vf->abs_vfid < 32)
1737 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
1738 else
1739 reset = bp->vfdb->flrd_vfs[1] &
1740 (1 << (vf->abs_vfid - 32));
1741
1742 if (reset) {
1743 /* set as reset and ready for cleanup */
1744 vf->state = VF_RESET;
1745 vf->flr_clnup_stage = VF_FLR_CLN;
1746
1747 DP(BNX2X_MSG_IOV,
1748 "Initiating Final cleanup for VF %d\n",
1749 vf->abs_vfid);
1750 }
1751 }
1752
1753 /* do the FLR cleanup for all marked VFs*/
1754 bnx2x_vf_flr_clnup(bp, NULL);
1755 }
1756
1757 /* IOV global initialization routines */
1758 void bnx2x_iov_init_dq(struct bnx2x *bp)
1759 {
1760 if (!IS_SRIOV(bp))
1761 return;
1762
1763 /* Set the DQ such that the CID reflect the abs_vfid */
1764 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1765 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1766
1767 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1768 * the PF L2 queues
1769 */
1770 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1771
1772 /* The VF window size is the log2 of the max number of CIDs per VF */
1773 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1774
1775 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1776 * the Pf doorbell size although the 2 are independent.
1777 */
1778 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1779
1780 /* No security checks for now -
1781 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1782 * CID range 0 - 0x1ffff
1783 */
1784 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1785 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1786 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1787 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1788
1789 /* set the VF doorbell threshold */
1790 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
1791 }
1792
1793 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1794 {
1795 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1796 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1797 }
1798
1799 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1800 {
1801 struct pci_dev *dev = bp->pdev;
1802 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1803
1804 return dev->bus->number + ((dev->devfn + iov->offset +
1805 iov->stride * vfid) >> 8);
1806 }
1807
1808 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1809 {
1810 struct pci_dev *dev = bp->pdev;
1811 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1812
1813 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1814 }
1815
1816 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1817 {
1818 int i, n;
1819 struct pci_dev *dev = bp->pdev;
1820 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1821
1822 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1823 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1824 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1825
1826 size /= iov->total;
1827 vf->bars[n].bar = start + size * vf->abs_vfid;
1828 vf->bars[n].size = size;
1829 }
1830 }
1831
1832 static int bnx2x_ari_enabled(struct pci_dev *dev)
1833 {
1834 return dev->bus->self && dev->bus->self->ari_enabled;
1835 }
1836
1837 static void
1838 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1839 {
1840 int sb_id;
1841 u32 val;
1842 u8 fid, current_pf = 0;
1843
1844 /* IGU in normal mode - read CAM */
1845 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1846 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1847 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1848 continue;
1849 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1850 if (fid & IGU_FID_ENCODE_IS_PF)
1851 current_pf = fid & IGU_FID_PF_NUM_MASK;
1852 else if (current_pf == BP_FUNC(bp))
1853 bnx2x_vf_set_igu_info(bp, sb_id,
1854 (fid & IGU_FID_VF_NUM_MASK));
1855 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1856 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1857 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1858 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1859 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1860 }
1861 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1862 }
1863
1864 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1865 {
1866 if (bp->vfdb) {
1867 kfree(bp->vfdb->vfqs);
1868 kfree(bp->vfdb->vfs);
1869 kfree(bp->vfdb);
1870 }
1871 bp->vfdb = NULL;
1872 }
1873
1874 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1875 {
1876 int pos;
1877 struct pci_dev *dev = bp->pdev;
1878
1879 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1880 if (!pos) {
1881 BNX2X_ERR("failed to find SRIOV capability in device\n");
1882 return -ENODEV;
1883 }
1884
1885 iov->pos = pos;
1886 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1887 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1888 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1889 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1890 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1891 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1892 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1893 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1894 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1895
1896 return 0;
1897 }
1898
1899 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1900 {
1901 u32 val;
1902
1903 /* read the SRIOV capability structure
1904 * The fields can be read via configuration read or
1905 * directly from the device (starting at offset PCICFG_OFFSET)
1906 */
1907 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1908 return -ENODEV;
1909
1910 /* get the number of SRIOV bars */
1911 iov->nres = 0;
1912
1913 /* read the first_vfid */
1914 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1915 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1916 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1917
1918 DP(BNX2X_MSG_IOV,
1919 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1920 BP_FUNC(bp),
1921 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1922 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1923
1924 return 0;
1925 }
1926
1927 /* must be called after PF bars are mapped */
1928 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1929 int num_vfs_param)
1930 {
1931 int err, i;
1932 struct bnx2x_sriov *iov;
1933 struct pci_dev *dev = bp->pdev;
1934
1935 bp->vfdb = NULL;
1936
1937 /* verify is pf */
1938 if (IS_VF(bp))
1939 return 0;
1940
1941 /* verify sriov capability is present in configuration space */
1942 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1943 return 0;
1944
1945 /* verify chip revision */
1946 if (CHIP_IS_E1x(bp))
1947 return 0;
1948
1949 /* check if SRIOV support is turned off */
1950 if (!num_vfs_param)
1951 return 0;
1952
1953 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1954 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1955 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1956 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1957 return 0;
1958 }
1959
1960 /* SRIOV can be enabled only with MSIX */
1961 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1962 int_mode_param == BNX2X_INT_MODE_INTX) {
1963 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1964 return 0;
1965 }
1966
1967 err = -EIO;
1968 /* verify ari is enabled */
1969 if (!bnx2x_ari_enabled(bp->pdev)) {
1970 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1971 return 0;
1972 }
1973
1974 /* verify igu is in normal mode */
1975 if (CHIP_INT_MODE_IS_BC(bp)) {
1976 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1977 return 0;
1978 }
1979
1980 /* allocate the vfs database */
1981 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1982 if (!bp->vfdb) {
1983 BNX2X_ERR("failed to allocate vf database\n");
1984 err = -ENOMEM;
1985 goto failed;
1986 }
1987
1988 /* get the sriov info - Linux already collected all the pertinent
1989 * information, however the sriov structure is for the private use
1990 * of the pci module. Also we want this information regardless
1991 * of the hyper-visor.
1992 */
1993 iov = &(bp->vfdb->sriov);
1994 err = bnx2x_sriov_info(bp, iov);
1995 if (err)
1996 goto failed;
1997
1998 /* SR-IOV capability was enabled but there are no VFs*/
1999 if (iov->total == 0)
2000 goto failed;
2001
2002 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
2003
2004 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
2005 num_vfs_param, iov->nr_virtfn);
2006
2007 /* allocate the vf array */
2008 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
2009 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
2010 if (!bp->vfdb->vfs) {
2011 BNX2X_ERR("failed to allocate vf array\n");
2012 err = -ENOMEM;
2013 goto failed;
2014 }
2015
2016 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
2017 for_each_vf(bp, i) {
2018 bnx2x_vf(bp, i, index) = i;
2019 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
2020 bnx2x_vf(bp, i, state) = VF_FREE;
2021 INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
2022 mutex_init(&bnx2x_vf(bp, i, op_mutex));
2023 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
2024 }
2025
2026 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
2027 bnx2x_get_vf_igu_cam_info(bp);
2028
2029 /* allocate the queue arrays for all VFs */
2030 bp->vfdb->vfqs = kzalloc(
2031 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
2032 GFP_KERNEL);
2033
2034 DP(BNX2X_MSG_IOV, "bp->vfdb->vfqs was %p\n", bp->vfdb->vfqs);
2035
2036 if (!bp->vfdb->vfqs) {
2037 BNX2X_ERR("failed to allocate vf queue array\n");
2038 err = -ENOMEM;
2039 goto failed;
2040 }
2041
2042 return 0;
2043 failed:
2044 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
2045 __bnx2x_iov_free_vfdb(bp);
2046 return err;
2047 }
2048
2049 void bnx2x_iov_remove_one(struct bnx2x *bp)
2050 {
2051 int vf_idx;
2052
2053 /* if SRIOV is not enabled there's nothing to do */
2054 if (!IS_SRIOV(bp))
2055 return;
2056
2057 DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
2058 pci_disable_sriov(bp->pdev);
2059 DP(BNX2X_MSG_IOV, "sriov disabled\n");
2060
2061 /* disable access to all VFs */
2062 for (vf_idx = 0; vf_idx < bp->vfdb->sriov.total; vf_idx++) {
2063 bnx2x_pretend_func(bp,
2064 HW_VF_HANDLE(bp,
2065 bp->vfdb->sriov.first_vf_in_pf +
2066 vf_idx));
2067 DP(BNX2X_MSG_IOV, "disabling internal access for vf %d\n",
2068 bp->vfdb->sriov.first_vf_in_pf + vf_idx);
2069 bnx2x_vf_enable_internal(bp, 0);
2070 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2071 }
2072
2073 /* free vf database */
2074 __bnx2x_iov_free_vfdb(bp);
2075 }
2076
2077 void bnx2x_iov_free_mem(struct bnx2x *bp)
2078 {
2079 int i;
2080
2081 if (!IS_SRIOV(bp))
2082 return;
2083
2084 /* free vfs hw contexts */
2085 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2086 struct hw_dma *cxt = &bp->vfdb->context[i];
2087 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
2088 }
2089
2090 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
2091 BP_VFDB(bp)->sp_dma.mapping,
2092 BP_VFDB(bp)->sp_dma.size);
2093
2094 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
2095 BP_VF_MBX_DMA(bp)->mapping,
2096 BP_VF_MBX_DMA(bp)->size);
2097
2098 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
2099 BP_VF_BULLETIN_DMA(bp)->mapping,
2100 BP_VF_BULLETIN_DMA(bp)->size);
2101 }
2102
2103 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
2104 {
2105 size_t tot_size;
2106 int i, rc = 0;
2107
2108 if (!IS_SRIOV(bp))
2109 return rc;
2110
2111 /* allocate vfs hw contexts */
2112 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
2113 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
2114
2115 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2116 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
2117 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
2118
2119 if (cxt->size) {
2120 BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
2121 } else {
2122 cxt->addr = NULL;
2123 cxt->mapping = 0;
2124 }
2125 tot_size -= cxt->size;
2126 }
2127
2128 /* allocate vfs ramrods dma memory - client_init and set_mac */
2129 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
2130 BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
2131 tot_size);
2132 BP_VFDB(bp)->sp_dma.size = tot_size;
2133
2134 /* allocate mailboxes */
2135 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
2136 BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
2137 tot_size);
2138 BP_VF_MBX_DMA(bp)->size = tot_size;
2139
2140 /* allocate local bulletin boards */
2141 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
2142 BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
2143 &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
2144 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
2145
2146 return 0;
2147
2148 alloc_mem_err:
2149 return -ENOMEM;
2150 }
2151
2152 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
2153 struct bnx2x_vf_queue *q)
2154 {
2155 u8 cl_id = vfq_cl_id(vf, q);
2156 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
2157 unsigned long q_type = 0;
2158
2159 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
2160 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
2161
2162 /* Queue State object */
2163 bnx2x_init_queue_obj(bp, &q->sp_obj,
2164 cl_id, &q->cid, 1, func_id,
2165 bnx2x_vf_sp(bp, vf, q_data),
2166 bnx2x_vf_sp_map(bp, vf, q_data),
2167 q_type);
2168
2169 DP(BNX2X_MSG_IOV,
2170 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
2171 vf->abs_vfid, q->sp_obj.func_id, q->cid);
2172 }
2173
2174 /* called by bnx2x_nic_load */
2175 int bnx2x_iov_nic_init(struct bnx2x *bp)
2176 {
2177 int vfid;
2178
2179 if (!IS_SRIOV(bp)) {
2180 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
2181 return 0;
2182 }
2183
2184 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
2185
2186 /* let FLR complete ... */
2187 msleep(100);
2188
2189 /* initialize vf database */
2190 for_each_vf(bp, vfid) {
2191 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2192
2193 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
2194 BNX2X_CIDS_PER_VF;
2195
2196 union cdu_context *base_cxt = (union cdu_context *)
2197 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2198 (base_vf_cid & (ILT_PAGE_CIDS-1));
2199
2200 DP(BNX2X_MSG_IOV,
2201 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
2202 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
2203 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
2204
2205 /* init statically provisioned resources */
2206 bnx2x_iov_static_resc(bp, vf);
2207
2208 /* queues are initialized during VF-ACQUIRE */
2209
2210 /* reserve the vf vlan credit */
2211 bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
2212
2213 vf->filter_state = 0;
2214 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
2215
2216 /* init mcast object - This object will be re-initialized
2217 * during VF-ACQUIRE with the proper cl_id and cid.
2218 * It needs to be initialized here so that it can be safely
2219 * handled by a subsequent FLR flow.
2220 */
2221 vf->mcast_list_len = 0;
2222 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
2223 0xFF, 0xFF, 0xFF,
2224 bnx2x_vf_sp(bp, vf, mcast_rdata),
2225 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
2226 BNX2X_FILTER_MCAST_PENDING,
2227 &vf->filter_state,
2228 BNX2X_OBJ_TYPE_RX_TX);
2229
2230 /* set the mailbox message addresses */
2231 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
2232 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
2233 MBX_MSG_ALIGNED_SIZE);
2234
2235 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
2236 vfid * MBX_MSG_ALIGNED_SIZE;
2237
2238 /* Enable vf mailbox */
2239 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
2240 }
2241
2242 /* Final VF init */
2243 for_each_vf(bp, vfid) {
2244 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2245
2246 /* fill in the BDF and bars */
2247 vf->bus = bnx2x_vf_bus(bp, vfid);
2248 vf->devfn = bnx2x_vf_devfn(bp, vfid);
2249 bnx2x_vf_set_bars(bp, vf);
2250
2251 DP(BNX2X_MSG_IOV,
2252 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
2253 vf->abs_vfid, vf->bus, vf->devfn,
2254 (unsigned)vf->bars[0].bar, vf->bars[0].size,
2255 (unsigned)vf->bars[1].bar, vf->bars[1].size,
2256 (unsigned)vf->bars[2].bar, vf->bars[2].size);
2257 }
2258
2259 return 0;
2260 }
2261
2262 /* called by bnx2x_chip_cleanup */
2263 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
2264 {
2265 int i;
2266
2267 if (!IS_SRIOV(bp))
2268 return 0;
2269
2270 /* release all the VFs */
2271 for_each_vf(bp, i)
2272 bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
2273
2274 return 0;
2275 }
2276
2277 /* called by bnx2x_init_hw_func, returns the next ilt line */
2278 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
2279 {
2280 int i;
2281 struct bnx2x_ilt *ilt = BP_ILT(bp);
2282
2283 if (!IS_SRIOV(bp))
2284 return line;
2285
2286 /* set vfs ilt lines */
2287 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2288 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
2289
2290 ilt->lines[line+i].page = hw_cxt->addr;
2291 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
2292 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
2293 }
2294 return line + i;
2295 }
2296
2297 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
2298 {
2299 return ((cid >= BNX2X_FIRST_VF_CID) &&
2300 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
2301 }
2302
2303 static
2304 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
2305 struct bnx2x_vf_queue *vfq,
2306 union event_ring_elem *elem)
2307 {
2308 unsigned long ramrod_flags = 0;
2309 int rc = 0;
2310
2311 /* Always push next commands out, don't wait here */
2312 set_bit(RAMROD_CONT, &ramrod_flags);
2313
2314 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
2315 case BNX2X_FILTER_MAC_PENDING:
2316 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
2317 &ramrod_flags);
2318 break;
2319 case BNX2X_FILTER_VLAN_PENDING:
2320 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
2321 &ramrod_flags);
2322 break;
2323 default:
2324 BNX2X_ERR("Unsupported classification command: %d\n",
2325 elem->message.data.eth_event.echo);
2326 return;
2327 }
2328 if (rc < 0)
2329 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
2330 else if (rc > 0)
2331 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
2332 }
2333
2334 static
2335 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
2336 struct bnx2x_virtf *vf)
2337 {
2338 struct bnx2x_mcast_ramrod_params rparam = {NULL};
2339 int rc;
2340
2341 rparam.mcast_obj = &vf->mcast_obj;
2342 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
2343
2344 /* If there are pending mcast commands - send them */
2345 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
2346 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
2347 if (rc < 0)
2348 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
2349 rc);
2350 }
2351 }
2352
2353 static
2354 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
2355 struct bnx2x_virtf *vf)
2356 {
2357 smp_mb__before_clear_bit();
2358 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
2359 smp_mb__after_clear_bit();
2360 }
2361
2362 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
2363 {
2364 struct bnx2x_virtf *vf;
2365 int qidx = 0, abs_vfid;
2366 u8 opcode;
2367 u16 cid = 0xffff;
2368
2369 if (!IS_SRIOV(bp))
2370 return 1;
2371
2372 /* first get the cid - the only events we handle here are cfc-delete
2373 * and set-mac completion
2374 */
2375 opcode = elem->message.opcode;
2376
2377 switch (opcode) {
2378 case EVENT_RING_OPCODE_CFC_DEL:
2379 cid = SW_CID((__force __le32)
2380 elem->message.data.cfc_del_event.cid);
2381 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
2382 break;
2383 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2384 case EVENT_RING_OPCODE_MULTICAST_RULES:
2385 case EVENT_RING_OPCODE_FILTERS_RULES:
2386 cid = (elem->message.data.eth_event.echo &
2387 BNX2X_SWCID_MASK);
2388 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
2389 break;
2390 case EVENT_RING_OPCODE_VF_FLR:
2391 abs_vfid = elem->message.data.vf_flr_event.vf_id;
2392 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
2393 abs_vfid);
2394 goto get_vf;
2395 case EVENT_RING_OPCODE_MALICIOUS_VF:
2396 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
2397 BNX2X_ERR("Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
2398 abs_vfid,
2399 elem->message.data.malicious_vf_event.err_id);
2400 goto get_vf;
2401 default:
2402 return 1;
2403 }
2404
2405 /* check if the cid is the VF range */
2406 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
2407 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
2408 return 1;
2409 }
2410
2411 /* extract vf and rxq index from vf_cid - relies on the following:
2412 * 1. vfid on cid reflects the true abs_vfid
2413 * 2. The max number of VFs (per path) is 64
2414 */
2415 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
2416 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2417 get_vf:
2418 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
2419
2420 if (!vf) {
2421 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
2422 cid, abs_vfid);
2423 return 0;
2424 }
2425
2426 switch (opcode) {
2427 case EVENT_RING_OPCODE_CFC_DEL:
2428 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
2429 vf->abs_vfid, qidx);
2430 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
2431 &vfq_get(vf,
2432 qidx)->sp_obj,
2433 BNX2X_Q_CMD_CFC_DEL);
2434 break;
2435 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2436 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
2437 vf->abs_vfid, qidx);
2438 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
2439 break;
2440 case EVENT_RING_OPCODE_MULTICAST_RULES:
2441 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
2442 vf->abs_vfid, qidx);
2443 bnx2x_vf_handle_mcast_eqe(bp, vf);
2444 break;
2445 case EVENT_RING_OPCODE_FILTERS_RULES:
2446 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
2447 vf->abs_vfid, qidx);
2448 bnx2x_vf_handle_filters_eqe(bp, vf);
2449 break;
2450 case EVENT_RING_OPCODE_VF_FLR:
2451 case EVENT_RING_OPCODE_MALICIOUS_VF:
2452 /* Do nothing for now */
2453 return 0;
2454 }
2455 /* SRIOV: reschedule any 'in_progress' operations */
2456 bnx2x_iov_sp_event(bp, cid, false);
2457
2458 return 0;
2459 }
2460
2461 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
2462 {
2463 /* extract the vf from vf_cid - relies on the following:
2464 * 1. vfid on cid reflects the true abs_vfid
2465 * 2. The max number of VFs (per path) is 64
2466 */
2467 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2468 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
2469 }
2470
2471 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
2472 struct bnx2x_queue_sp_obj **q_obj)
2473 {
2474 struct bnx2x_virtf *vf;
2475
2476 if (!IS_SRIOV(bp))
2477 return;
2478
2479 vf = bnx2x_vf_by_cid(bp, vf_cid);
2480
2481 if (vf) {
2482 /* extract queue index from vf_cid - relies on the following:
2483 * 1. vfid on cid reflects the true abs_vfid
2484 * 2. The max number of VFs (per path) is 64
2485 */
2486 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
2487 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
2488 } else {
2489 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
2490 }
2491 }
2492
2493 void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
2494 {
2495 struct bnx2x_virtf *vf;
2496
2497 /* check if the cid is the VF range */
2498 if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
2499 return;
2500
2501 vf = bnx2x_vf_by_cid(bp, vf_cid);
2502 if (vf) {
2503 /* set in_progress flag */
2504 atomic_set(&vf->op_in_progress, 1);
2505 if (queue_work)
2506 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
2507 }
2508 }
2509
2510 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
2511 {
2512 int i;
2513 int first_queue_query_index, num_queues_req;
2514 dma_addr_t cur_data_offset;
2515 struct stats_query_entry *cur_query_entry;
2516 u8 stats_count = 0;
2517 bool is_fcoe = false;
2518
2519 if (!IS_SRIOV(bp))
2520 return;
2521
2522 if (!NO_FCOE(bp))
2523 is_fcoe = true;
2524
2525 /* fcoe adds one global request and one queue request */
2526 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
2527 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
2528 (is_fcoe ? 0 : 1);
2529
2530 DP(BNX2X_MSG_IOV,
2531 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
2532 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
2533 first_queue_query_index + num_queues_req);
2534
2535 cur_data_offset = bp->fw_stats_data_mapping +
2536 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
2537 num_queues_req * sizeof(struct per_queue_stats);
2538
2539 cur_query_entry = &bp->fw_stats_req->
2540 query[first_queue_query_index + num_queues_req];
2541
2542 for_each_vf(bp, i) {
2543 int j;
2544 struct bnx2x_virtf *vf = BP_VF(bp, i);
2545
2546 if (vf->state != VF_ENABLED) {
2547 DP(BNX2X_MSG_IOV,
2548 "vf %d not enabled so no stats for it\n",
2549 vf->abs_vfid);
2550 continue;
2551 }
2552
2553 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
2554 for_each_vfq(vf, j) {
2555 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
2556
2557 dma_addr_t q_stats_addr =
2558 vf->fw_stat_map + j * vf->stats_stride;
2559
2560 /* collect stats fro active queues only */
2561 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
2562 BNX2X_Q_LOGICAL_STATE_STOPPED)
2563 continue;
2564
2565 /* create stats query entry for this queue */
2566 cur_query_entry->kind = STATS_TYPE_QUEUE;
2567 cur_query_entry->index = vfq_stat_id(vf, rxq);
2568 cur_query_entry->funcID =
2569 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
2570 cur_query_entry->address.hi =
2571 cpu_to_le32(U64_HI(q_stats_addr));
2572 cur_query_entry->address.lo =
2573 cpu_to_le32(U64_LO(q_stats_addr));
2574 DP(BNX2X_MSG_IOV,
2575 "added address %x %x for vf %d queue %d client %d\n",
2576 cur_query_entry->address.hi,
2577 cur_query_entry->address.lo, cur_query_entry->funcID,
2578 j, cur_query_entry->index);
2579 cur_query_entry++;
2580 cur_data_offset += sizeof(struct per_queue_stats);
2581 stats_count++;
2582
2583 /* all stats are coalesced to the leading queue */
2584 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
2585 break;
2586 }
2587 }
2588 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
2589 }
2590
2591 void bnx2x_iov_sp_task(struct bnx2x *bp)
2592 {
2593 int i;
2594
2595 if (!IS_SRIOV(bp))
2596 return;
2597 /* Iterate over all VFs and invoke state transition for VFs with
2598 * 'in-progress' slow-path operations
2599 */
2600 DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
2601 for_each_vf(bp, i) {
2602 struct bnx2x_virtf *vf = BP_VF(bp, i);
2603
2604 if (!vf) {
2605 BNX2X_ERR("VF was null! skipping...\n");
2606 continue;
2607 }
2608
2609 if (!list_empty(&vf->op_list_head) &&
2610 atomic_read(&vf->op_in_progress)) {
2611 DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
2612 bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
2613 }
2614 }
2615 }
2616
2617 static inline
2618 struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
2619 {
2620 int i;
2621 struct bnx2x_virtf *vf = NULL;
2622
2623 for_each_vf(bp, i) {
2624 vf = BP_VF(bp, i);
2625 if (stat_id >= vf->igu_base_id &&
2626 stat_id < vf->igu_base_id + vf_sb_count(vf))
2627 break;
2628 }
2629 return vf;
2630 }
2631
2632 /* VF API helpers */
2633 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
2634 u8 enable)
2635 {
2636 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
2637 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
2638
2639 REG_WR(bp, reg, val);
2640 }
2641
2642 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
2643 {
2644 int i;
2645
2646 for_each_vfq(vf, i)
2647 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2648 vfq_qzone_id(vf, vfq_get(vf, i)), false);
2649 }
2650
2651 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
2652 {
2653 u32 val;
2654
2655 /* clear the VF configuration - pretend */
2656 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
2657 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
2658 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
2659 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
2660 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
2661 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2662 }
2663
2664 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2665 {
2666 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2667 BNX2X_VF_MAX_QUEUES);
2668 }
2669
2670 static
2671 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2672 struct vf_pf_resc_request *req_resc)
2673 {
2674 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2675 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2676
2677 return ((req_resc->num_rxqs <= rxq_cnt) &&
2678 (req_resc->num_txqs <= txq_cnt) &&
2679 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2680 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2681 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2682 }
2683
2684 /* CORE VF API */
2685 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2686 struct vf_pf_resc_request *resc)
2687 {
2688 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2689 BNX2X_CIDS_PER_VF;
2690
2691 union cdu_context *base_cxt = (union cdu_context *)
2692 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2693 (base_vf_cid & (ILT_PAGE_CIDS-1));
2694 int i;
2695
2696 /* if state is 'acquired' the VF was not released or FLR'd, in
2697 * this case the returned resources match the acquired already
2698 * acquired resources. Verify that the requested numbers do
2699 * not exceed the already acquired numbers.
2700 */
2701 if (vf->state == VF_ACQUIRED) {
2702 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2703 vf->abs_vfid);
2704
2705 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2706 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2707 vf->abs_vfid);
2708 return -EINVAL;
2709 }
2710 return 0;
2711 }
2712
2713 /* Otherwise vf state must be 'free' or 'reset' */
2714 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2715 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2716 vf->abs_vfid, vf->state);
2717 return -EINVAL;
2718 }
2719
2720 /* static allocation:
2721 * the global maximum number are fixed per VF. Fail the request if
2722 * requested number exceed these globals
2723 */
2724 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2725 DP(BNX2X_MSG_IOV,
2726 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2727 /* set the max resource in the vf */
2728 return -ENOMEM;
2729 }
2730
2731 /* Set resources counters - 0 request means max available */
2732 vf_sb_count(vf) = resc->num_sbs;
2733 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2734 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2735 if (resc->num_mac_filters)
2736 vf_mac_rules_cnt(vf) = resc->num_mac_filters;
2737 if (resc->num_vlan_filters)
2738 vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
2739
2740 DP(BNX2X_MSG_IOV,
2741 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2742 vf_sb_count(vf), vf_rxq_count(vf),
2743 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2744 vf_vlan_rules_cnt(vf));
2745
2746 /* Initialize the queues */
2747 if (!vf->vfqs) {
2748 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2749 return -EINVAL;
2750 }
2751
2752 for_each_vfq(vf, i) {
2753 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2754
2755 if (!q) {
2756 BNX2X_ERR("q number %d was not allocated\n", i);
2757 return -EINVAL;
2758 }
2759
2760 q->index = i;
2761 q->cxt = &((base_cxt + i)->eth);
2762 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2763
2764 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2765 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2766
2767 /* init SP objects */
2768 bnx2x_vfq_init(bp, vf, q);
2769 }
2770 vf->state = VF_ACQUIRED;
2771 return 0;
2772 }
2773
2774 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2775 {
2776 struct bnx2x_func_init_params func_init = {0};
2777 u16 flags = 0;
2778 int i;
2779
2780 /* the sb resources are initialized at this point, do the
2781 * FW/HW initializations
2782 */
2783 for_each_vf_sb(vf, i)
2784 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2785 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2786
2787 /* Sanity checks */
2788 if (vf->state != VF_ACQUIRED) {
2789 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2790 vf->abs_vfid, vf->state);
2791 return -EINVAL;
2792 }
2793
2794 /* let FLR complete ... */
2795 msleep(100);
2796
2797 /* FLR cleanup epilogue */
2798 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2799 return -EBUSY;
2800
2801 /* reset IGU VF statistics: MSIX */
2802 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2803
2804 /* vf init */
2805 if (vf->cfg_flags & VF_CFG_STATS)
2806 flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
2807
2808 if (vf->cfg_flags & VF_CFG_TPA)
2809 flags |= FUNC_FLG_TPA;
2810
2811 if (is_vf_multi(vf))
2812 flags |= FUNC_FLG_RSS;
2813
2814 /* function setup */
2815 func_init.func_flgs = flags;
2816 func_init.pf_id = BP_FUNC(bp);
2817 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2818 func_init.fw_stat_map = vf->fw_stat_map;
2819 func_init.spq_map = vf->spq_map;
2820 func_init.spq_prod = 0;
2821 bnx2x_func_init(bp, &func_init);
2822
2823 /* Enable the vf */
2824 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2825 bnx2x_vf_enable_traffic(bp, vf);
2826
2827 /* queue protection table */
2828 for_each_vfq(vf, i)
2829 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2830 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2831
2832 vf->state = VF_ENABLED;
2833
2834 /* update vf bulletin board */
2835 bnx2x_post_vf_bulletin(bp, vf->index);
2836
2837 return 0;
2838 }
2839
2840 struct set_vf_state_cookie {
2841 struct bnx2x_virtf *vf;
2842 u8 state;
2843 };
2844
2845 static void bnx2x_set_vf_state(void *cookie)
2846 {
2847 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2848
2849 p->vf->state = p->state;
2850 }
2851
2852 /* VFOP close (teardown the queues, delete mcasts and close HW) */
2853 static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2854 {
2855 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2856 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
2857 enum bnx2x_vfop_close_state state = vfop->state;
2858 struct bnx2x_vfop_cmd cmd = {
2859 .done = bnx2x_vfop_close,
2860 .block = false,
2861 };
2862
2863 if (vfop->rc < 0)
2864 goto op_err;
2865
2866 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
2867
2868 switch (state) {
2869 case BNX2X_VFOP_CLOSE_QUEUES:
2870
2871 if (++(qx->qid) < vf_rxq_count(vf)) {
2872 vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
2873 if (vfop->rc)
2874 goto op_err;
2875 return;
2876 }
2877 vfop->state = BNX2X_VFOP_CLOSE_HW;
2878 vfop->rc = 0;
2879 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
2880
2881 case BNX2X_VFOP_CLOSE_HW:
2882
2883 /* disable the interrupts */
2884 DP(BNX2X_MSG_IOV, "disabling igu\n");
2885 bnx2x_vf_igu_disable(bp, vf);
2886
2887 /* disable the VF */
2888 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2889 bnx2x_vf_clr_qtbl(bp, vf);
2890
2891 goto op_done;
2892 default:
2893 bnx2x_vfop_default(state);
2894 }
2895 op_err:
2896 BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
2897 op_done:
2898
2899 /* need to make sure there are no outstanding stats ramrods which may
2900 * cause the device to access the VF's stats buffer which it will free
2901 * as soon as we return from the close flow.
2902 */
2903 {
2904 struct set_vf_state_cookie cookie;
2905
2906 cookie.vf = vf;
2907 cookie.state = VF_ACQUIRED;
2908 bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2909 }
2910
2911 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2912 bnx2x_vfop_end(bp, vf, vfop);
2913 op_pending:
2914 /* Not supported at the moment; Exists for macros only */
2915 return;
2916 }
2917
2918 int bnx2x_vfop_close_cmd(struct bnx2x *bp,
2919 struct bnx2x_virtf *vf,
2920 struct bnx2x_vfop_cmd *cmd)
2921 {
2922 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
2923 if (vfop) {
2924 vfop->args.qx.qid = -1; /* loop */
2925 bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
2926 bnx2x_vfop_close, cmd->done);
2927 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
2928 cmd->block);
2929 }
2930 return -ENOMEM;
2931 }
2932
2933 /* VF release can be called either: 1. The VF was acquired but
2934 * not enabled 2. the vf was enabled or in the process of being
2935 * enabled
2936 */
2937 static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2938 {
2939 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2940 struct bnx2x_vfop_cmd cmd = {
2941 .done = bnx2x_vfop_release,
2942 .block = false,
2943 };
2944
2945 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2946
2947 if (vfop->rc < 0)
2948 goto op_err;
2949
2950 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2951 vf->state == VF_FREE ? "Free" :
2952 vf->state == VF_ACQUIRED ? "Acquired" :
2953 vf->state == VF_ENABLED ? "Enabled" :
2954 vf->state == VF_RESET ? "Reset" :
2955 "Unknown");
2956
2957 switch (vf->state) {
2958 case VF_ENABLED:
2959 vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
2960 if (vfop->rc)
2961 goto op_err;
2962 return;
2963
2964 case VF_ACQUIRED:
2965 DP(BNX2X_MSG_IOV, "about to free resources\n");
2966 bnx2x_vf_free_resc(bp, vf);
2967 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2968 goto op_done;
2969
2970 case VF_FREE:
2971 case VF_RESET:
2972 /* do nothing */
2973 goto op_done;
2974 default:
2975 bnx2x_vfop_default(vf->state);
2976 }
2977 op_err:
2978 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
2979 op_done:
2980 bnx2x_vfop_end(bp, vf, vfop);
2981 }
2982
2983 static void bnx2x_vfop_rss(struct bnx2x *bp, struct bnx2x_virtf *vf)
2984 {
2985 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2986 enum bnx2x_vfop_rss_state state;
2987
2988 if (!vfop) {
2989 BNX2X_ERR("vfop was null\n");
2990 return;
2991 }
2992
2993 state = vfop->state;
2994 bnx2x_vfop_reset_wq(vf);
2995
2996 if (vfop->rc < 0)
2997 goto op_err;
2998
2999 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
3000
3001 switch (state) {
3002 case BNX2X_VFOP_RSS_CONFIG:
3003 /* next state */
3004 vfop->state = BNX2X_VFOP_RSS_DONE;
3005 bnx2x_config_rss(bp, &vfop->op_p->rss);
3006 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
3007 op_err:
3008 BNX2X_ERR("RSS error: rc %d\n", vfop->rc);
3009 op_done:
3010 case BNX2X_VFOP_RSS_DONE:
3011 bnx2x_vfop_end(bp, vf, vfop);
3012 return;
3013 default:
3014 bnx2x_vfop_default(state);
3015 }
3016 op_pending:
3017 return;
3018 }
3019
3020 int bnx2x_vfop_release_cmd(struct bnx2x *bp,
3021 struct bnx2x_virtf *vf,
3022 struct bnx2x_vfop_cmd *cmd)
3023 {
3024 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
3025 if (vfop) {
3026 bnx2x_vfop_opset(-1, /* use vf->state */
3027 bnx2x_vfop_release, cmd->done);
3028 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
3029 cmd->block);
3030 }
3031 return -ENOMEM;
3032 }
3033
3034 int bnx2x_vfop_rss_cmd(struct bnx2x *bp,
3035 struct bnx2x_virtf *vf,
3036 struct bnx2x_vfop_cmd *cmd)
3037 {
3038 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
3039
3040 if (vfop) {
3041 bnx2x_vfop_opset(BNX2X_VFOP_RSS_CONFIG, bnx2x_vfop_rss,
3042 cmd->done);
3043 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rss,
3044 cmd->block);
3045 }
3046 return -ENOMEM;
3047 }
3048
3049 /* VF release ~ VF close + VF release-resources
3050 * Release is the ultimate SW shutdown and is called whenever an
3051 * irrecoverable error is encountered.
3052 */
3053 void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
3054 {
3055 struct bnx2x_vfop_cmd cmd = {
3056 .done = NULL,
3057 .block = block,
3058 };
3059 int rc;
3060
3061 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
3062 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
3063
3064 rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
3065 if (rc)
3066 WARN(rc,
3067 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
3068 vf->abs_vfid, rc);
3069 }
3070
3071 static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
3072 struct bnx2x_virtf *vf, u32 *sbdf)
3073 {
3074 *sbdf = vf->devfn | (vf->bus << 8);
3075 }
3076
3077 static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
3078 struct bnx2x_vf_bar_info *bar_info)
3079 {
3080 int n;
3081
3082 bar_info->nr_bars = bp->vfdb->sriov.nres;
3083 for (n = 0; n < bar_info->nr_bars; n++)
3084 bar_info->bars[n] = vf->bars[n];
3085 }
3086
3087 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3088 enum channel_tlvs tlv)
3089 {
3090 /* we don't lock the channel for unsupported tlvs */
3091 if (!bnx2x_tlv_supported(tlv)) {
3092 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
3093 return;
3094 }
3095
3096 /* lock the channel */
3097 mutex_lock(&vf->op_mutex);
3098
3099 /* record the locking op */
3100 vf->op_current = tlv;
3101
3102 /* log the lock */
3103 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
3104 vf->abs_vfid, tlv);
3105 }
3106
3107 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3108 enum channel_tlvs expected_tlv)
3109 {
3110 enum channel_tlvs current_tlv;
3111
3112 if (!vf) {
3113 BNX2X_ERR("VF was %p\n", vf);
3114 return;
3115 }
3116
3117 current_tlv = vf->op_current;
3118
3119 /* we don't unlock the channel for unsupported tlvs */
3120 if (!bnx2x_tlv_supported(expected_tlv))
3121 return;
3122
3123 WARN(expected_tlv != vf->op_current,
3124 "lock mismatch: expected %d found %d", expected_tlv,
3125 vf->op_current);
3126
3127 /* record the locking op */
3128 vf->op_current = CHANNEL_TLV_NONE;
3129
3130 /* lock the channel */
3131 mutex_unlock(&vf->op_mutex);
3132
3133 /* log the unlock */
3134 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
3135 vf->abs_vfid, vf->op_current);
3136 }
3137
3138 static int bnx2x_set_pf_tx_switching(struct bnx2x *bp, bool enable)
3139 {
3140 struct bnx2x_queue_state_params q_params;
3141 u32 prev_flags;
3142 int i, rc;
3143
3144 /* Verify changes are needed and record current Tx switching state */
3145 prev_flags = bp->flags;
3146 if (enable)
3147 bp->flags |= TX_SWITCHING;
3148 else
3149 bp->flags &= ~TX_SWITCHING;
3150 if (prev_flags == bp->flags)
3151 return 0;
3152
3153 /* Verify state enables the sending of queue ramrods */
3154 if ((bp->state != BNX2X_STATE_OPEN) ||
3155 (bnx2x_get_q_logical_state(bp,
3156 &bnx2x_sp_obj(bp, &bp->fp[0]).q_obj) !=
3157 BNX2X_Q_LOGICAL_STATE_ACTIVE))
3158 return 0;
3159
3160 /* send q. update ramrod to configure Tx switching */
3161 memset(&q_params, 0, sizeof(q_params));
3162 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
3163 q_params.cmd = BNX2X_Q_CMD_UPDATE;
3164 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
3165 &q_params.params.update.update_flags);
3166 if (enable)
3167 __set_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
3168 &q_params.params.update.update_flags);
3169 else
3170 __clear_bit(BNX2X_Q_UPDATE_TX_SWITCHING,
3171 &q_params.params.update.update_flags);
3172
3173 /* send the ramrod on all the queues of the PF */
3174 for_each_eth_queue(bp, i) {
3175 struct bnx2x_fastpath *fp = &bp->fp[i];
3176
3177 /* Set the appropriate Queue object */
3178 q_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
3179
3180 /* Update the Queue state */
3181 rc = bnx2x_queue_state_change(bp, &q_params);
3182 if (rc) {
3183 BNX2X_ERR("Failed to configure Tx switching\n");
3184 return rc;
3185 }
3186 }
3187
3188 DP(BNX2X_MSG_IOV, "%s Tx Switching\n", enable ? "Enabled" : "Disabled");
3189 return 0;
3190 }
3191
3192 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
3193 {
3194 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
3195
3196 if (!IS_SRIOV(bp)) {
3197 BNX2X_ERR("failed to configure SR-IOV since vfdb was not allocated. Check dmesg for errors in probe stage\n");
3198 return -EINVAL;
3199 }
3200
3201 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
3202 num_vfs_param, BNX2X_NR_VIRTFN(bp));
3203
3204 /* HW channel is only operational when PF is up */
3205 if (bp->state != BNX2X_STATE_OPEN) {
3206 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
3207 return -EINVAL;
3208 }
3209
3210 /* we are always bound by the total_vfs in the configuration space */
3211 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
3212 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
3213 num_vfs_param, BNX2X_NR_VIRTFN(bp));
3214 num_vfs_param = BNX2X_NR_VIRTFN(bp);
3215 }
3216
3217 bp->requested_nr_virtfn = num_vfs_param;
3218 if (num_vfs_param == 0) {
3219 bnx2x_set_pf_tx_switching(bp, false);
3220 pci_disable_sriov(dev);
3221 return 0;
3222 } else {
3223 return bnx2x_enable_sriov(bp);
3224 }
3225 }
3226
3227 #define IGU_ENTRY_SIZE 4
3228
3229 int bnx2x_enable_sriov(struct bnx2x *bp)
3230 {
3231 int rc = 0, req_vfs = bp->requested_nr_virtfn;
3232 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
3233 u32 igu_entry, address;
3234 u16 num_vf_queues;
3235
3236 if (req_vfs == 0)
3237 return 0;
3238
3239 first_vf = bp->vfdb->sriov.first_vf_in_pf;
3240
3241 /* statically distribute vf sb pool between VFs */
3242 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
3243 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
3244
3245 /* zero previous values learned from igu cam */
3246 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
3247 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3248
3249 vf->sb_count = 0;
3250 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
3251 }
3252 bp->vfdb->vf_sbs_pool = 0;
3253
3254 /* prepare IGU cam */
3255 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
3256 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
3257 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3258 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
3259 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
3260 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
3261 IGU_REG_MAPPING_MEMORY_VALID;
3262 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
3263 sb_idx, vf_idx);
3264 REG_WR(bp, address, igu_entry);
3265 sb_idx++;
3266 address += IGU_ENTRY_SIZE;
3267 }
3268 }
3269
3270 /* Reinitialize vf database according to igu cam */
3271 bnx2x_get_vf_igu_cam_info(bp);
3272
3273 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
3274 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
3275
3276 qcount = 0;
3277 for_each_vf(bp, vf_idx) {
3278 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3279
3280 /* set local queue arrays */
3281 vf->vfqs = &bp->vfdb->vfqs[qcount];
3282 qcount += vf_sb_count(vf);
3283 bnx2x_iov_static_resc(bp, vf);
3284 }
3285
3286 /* prepare msix vectors in VF configuration space - the value in the
3287 * PCI configuration space should be the index of the last entry,
3288 * namely one less than the actual size of the table
3289 */
3290 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3291 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
3292 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
3293 num_vf_queues - 1);
3294 DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
3295 vf_idx, num_vf_queues - 1);
3296 }
3297 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
3298
3299 /* enable sriov. This will probe all the VFs, and consequentially cause
3300 * the "acquire" messages to appear on the VF PF channel.
3301 */
3302 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
3303 bnx2x_disable_sriov(bp);
3304
3305 rc = bnx2x_set_pf_tx_switching(bp, true);
3306 if (rc)
3307 return rc;
3308
3309 rc = pci_enable_sriov(bp->pdev, req_vfs);
3310 if (rc) {
3311 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
3312 return rc;
3313 }
3314 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
3315 return req_vfs;
3316 }
3317
3318 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
3319 {
3320 int vfidx;
3321 struct pf_vf_bulletin_content *bulletin;
3322
3323 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
3324 for_each_vf(bp, vfidx) {
3325 bulletin = BP_VF_BULLETIN(bp, vfidx);
3326 if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
3327 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
3328 }
3329 }
3330
3331 void bnx2x_disable_sriov(struct bnx2x *bp)
3332 {
3333 pci_disable_sriov(bp->pdev);
3334 }
3335
3336 static int bnx2x_vf_ndo_prep(struct bnx2x *bp, int vfidx,
3337 struct bnx2x_virtf **vf,
3338 struct pf_vf_bulletin_content **bulletin)
3339 {
3340 if (bp->state != BNX2X_STATE_OPEN) {
3341 BNX2X_ERR("vf ndo called though PF is down\n");
3342 return -EINVAL;
3343 }
3344
3345 if (!IS_SRIOV(bp)) {
3346 BNX2X_ERR("vf ndo called though sriov is disabled\n");
3347 return -EINVAL;
3348 }
3349
3350 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
3351 BNX2X_ERR("vf ndo called for uninitialized VF. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
3352 vfidx, BNX2X_NR_VIRTFN(bp));
3353 return -EINVAL;
3354 }
3355
3356 /* init members */
3357 *vf = BP_VF(bp, vfidx);
3358 *bulletin = BP_VF_BULLETIN(bp, vfidx);
3359
3360 if (!*vf) {
3361 BNX2X_ERR("vf ndo called but vf struct is null. vfidx was %d\n",
3362 vfidx);
3363 return -EINVAL;
3364 }
3365
3366 if (!(*vf)->vfqs) {
3367 BNX2X_ERR("vf ndo called but vfqs struct is null. Was ndo invoked before dynamically enabling SR-IOV? vfidx was %d\n",
3368 vfidx);
3369 return -EINVAL;
3370 }
3371
3372 if (!*bulletin) {
3373 BNX2X_ERR("vf ndo called but Bulletin Board struct is null. vfidx was %d\n",
3374 vfidx);
3375 return -EINVAL;
3376 }
3377
3378 return 0;
3379 }
3380
3381 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
3382 struct ifla_vf_info *ivi)
3383 {
3384 struct bnx2x *bp = netdev_priv(dev);
3385 struct bnx2x_virtf *vf = NULL;
3386 struct pf_vf_bulletin_content *bulletin = NULL;
3387 struct bnx2x_vlan_mac_obj *mac_obj;
3388 struct bnx2x_vlan_mac_obj *vlan_obj;
3389 int rc;
3390
3391 /* sanity and init */
3392 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3393 if (rc)
3394 return rc;
3395 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
3396 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
3397 if (!mac_obj || !vlan_obj) {
3398 BNX2X_ERR("VF partially initialized\n");
3399 return -EINVAL;
3400 }
3401
3402 ivi->vf = vfidx;
3403 ivi->qos = 0;
3404 ivi->tx_rate = 10000; /* always 10G. TBA take from link struct */
3405 ivi->spoofchk = 1; /*always enabled */
3406 if (vf->state == VF_ENABLED) {
3407 /* mac and vlan are in vlan_mac objects */
3408 if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj)))
3409 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
3410 0, ETH_ALEN);
3411 if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, vlan_obj)))
3412 vlan_obj->get_n_elements(bp, vlan_obj, 1,
3413 (u8 *)&ivi->vlan, 0,
3414 VLAN_HLEN);
3415 } else {
3416 /* mac */
3417 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
3418 /* mac configured by ndo so its in bulletin board */
3419 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
3420 else
3421 /* function has not been loaded yet. Show mac as 0s */
3422 memset(&ivi->mac, 0, ETH_ALEN);
3423
3424 /* vlan */
3425 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
3426 /* vlan configured by ndo so its in bulletin board */
3427 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
3428 else
3429 /* function has not been loaded yet. Show vlans as 0s */
3430 memset(&ivi->vlan, 0, VLAN_HLEN);
3431 }
3432
3433 return 0;
3434 }
3435
3436 /* New mac for VF. Consider these cases:
3437 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
3438 * supply at acquire.
3439 * 2. VF has already been acquired but has not yet initialized - store in local
3440 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
3441 * will configure this mac when it is ready.
3442 * 3. VF has already initialized but has not yet setup a queue - post the new
3443 * mac on VF's bulletin board right now. VF will configure this mac when it
3444 * is ready.
3445 * 4. VF has already set a queue - delete any macs already configured for this
3446 * queue and manually config the new mac.
3447 * In any event, once this function has been called refuse any attempts by the
3448 * VF to configure any mac for itself except for this mac. In case of a race
3449 * where the VF fails to see the new post on its bulletin board before sending a
3450 * mac configuration request, the PF will simply fail the request and VF can try
3451 * again after consulting its bulletin board.
3452 */
3453 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
3454 {
3455 struct bnx2x *bp = netdev_priv(dev);
3456 int rc, q_logical_state;
3457 struct bnx2x_virtf *vf = NULL;
3458 struct pf_vf_bulletin_content *bulletin = NULL;
3459
3460 /* sanity and init */
3461 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3462 if (rc)
3463 return rc;
3464 if (!is_valid_ether_addr(mac)) {
3465 BNX2X_ERR("mac address invalid\n");
3466 return -EINVAL;
3467 }
3468
3469 /* update PF's copy of the VF's bulletin. Will no longer accept mac
3470 * configuration requests from vf unless match this mac
3471 */
3472 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
3473 memcpy(bulletin->mac, mac, ETH_ALEN);
3474
3475 /* Post update on VF's bulletin board */
3476 rc = bnx2x_post_vf_bulletin(bp, vfidx);
3477 if (rc) {
3478 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
3479 return rc;
3480 }
3481
3482 q_logical_state =
3483 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
3484 if (vf->state == VF_ENABLED &&
3485 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
3486 /* configure the mac in device on this vf's queue */
3487 unsigned long ramrod_flags = 0;
3488 struct bnx2x_vlan_mac_obj *mac_obj =
3489 &bnx2x_leading_vfq(vf, mac_obj);
3490
3491 rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3492 if (rc)
3493 return rc;
3494
3495 /* must lock vfpf channel to protect against vf flows */
3496 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3497
3498 /* remove existing eth macs */
3499 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
3500 if (rc) {
3501 BNX2X_ERR("failed to delete eth macs\n");
3502 rc = -EINVAL;
3503 goto out;
3504 }
3505
3506 /* remove existing uc list macs */
3507 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
3508 if (rc) {
3509 BNX2X_ERR("failed to delete uc_list macs\n");
3510 rc = -EINVAL;
3511 goto out;
3512 }
3513
3514 /* configure the new mac to device */
3515 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3516 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
3517 BNX2X_ETH_MAC, &ramrod_flags);
3518
3519 out:
3520 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3521 }
3522
3523 return 0;
3524 }
3525
3526 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
3527 {
3528 struct bnx2x_queue_state_params q_params = {NULL};
3529 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
3530 struct bnx2x_queue_update_params *update_params;
3531 struct pf_vf_bulletin_content *bulletin = NULL;
3532 struct bnx2x_rx_mode_ramrod_params rx_ramrod;
3533 struct bnx2x *bp = netdev_priv(dev);
3534 struct bnx2x_vlan_mac_obj *vlan_obj;
3535 unsigned long vlan_mac_flags = 0;
3536 unsigned long ramrod_flags = 0;
3537 struct bnx2x_virtf *vf = NULL;
3538 unsigned long accept_flags;
3539 int rc;
3540
3541 /* sanity and init */
3542 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3543 if (rc)
3544 return rc;
3545
3546 if (vlan > 4095) {
3547 BNX2X_ERR("illegal vlan value %d\n", vlan);
3548 return -EINVAL;
3549 }
3550
3551 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
3552 vfidx, vlan, 0);
3553
3554 /* update PF's copy of the VF's bulletin. No point in posting the vlan
3555 * to the VF since it doesn't have anything to do with it. But it useful
3556 * to store it here in case the VF is not up yet and we can only
3557 * configure the vlan later when it does. Treat vlan id 0 as remove the
3558 * Host tag.
3559 */
3560 if (vlan > 0)
3561 bulletin->valid_bitmap |= 1 << VLAN_VALID;
3562 else
3563 bulletin->valid_bitmap &= ~(1 << VLAN_VALID);
3564 bulletin->vlan = vlan;
3565
3566 /* is vf initialized and queue set up? */
3567 if (vf->state != VF_ENABLED ||
3568 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj)) !=
3569 BNX2X_Q_LOGICAL_STATE_ACTIVE)
3570 return rc;
3571
3572 /* configure the vlan in device on this vf's queue */
3573 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
3574 rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3575 if (rc)
3576 return rc;
3577
3578 /* must lock vfpf channel to protect against vf flows */
3579 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3580
3581 /* remove existing vlans */
3582 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3583 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
3584 &ramrod_flags);
3585 if (rc) {
3586 BNX2X_ERR("failed to delete vlans\n");
3587 rc = -EINVAL;
3588 goto out;
3589 }
3590
3591 /* need to remove/add the VF's accept_any_vlan bit */
3592 accept_flags = bnx2x_leading_vfq(vf, accept_flags);
3593 if (vlan)
3594 clear_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
3595 else
3596 set_bit(BNX2X_ACCEPT_ANY_VLAN, &accept_flags);
3597
3598 bnx2x_vf_prep_rx_mode(bp, LEADING_IDX, &rx_ramrod, vf,
3599 accept_flags);
3600 bnx2x_leading_vfq(vf, accept_flags) = accept_flags;
3601 bnx2x_config_rx_mode(bp, &rx_ramrod);
3602
3603 /* configure the new vlan to device */
3604 memset(&ramrod_param, 0, sizeof(ramrod_param));
3605 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3606 ramrod_param.vlan_mac_obj = vlan_obj;
3607 ramrod_param.ramrod_flags = ramrod_flags;
3608 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT,
3609 &ramrod_param.user_req.vlan_mac_flags);
3610 ramrod_param.user_req.u.vlan.vlan = vlan;
3611 ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
3612 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
3613 if (rc) {
3614 BNX2X_ERR("failed to configure vlan\n");
3615 rc = -EINVAL;
3616 goto out;
3617 }
3618
3619 /* send queue update ramrod to configure default vlan and silent
3620 * vlan removal
3621 */
3622 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
3623 q_params.cmd = BNX2X_Q_CMD_UPDATE;
3624 q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
3625 update_params = &q_params.params.update;
3626 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
3627 &update_params->update_flags);
3628 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
3629 &update_params->update_flags);
3630 if (vlan == 0) {
3631 /* if vlan is 0 then we want to leave the VF traffic
3632 * untagged, and leave the incoming traffic untouched
3633 * (i.e. do not remove any vlan tags).
3634 */
3635 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3636 &update_params->update_flags);
3637 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3638 &update_params->update_flags);
3639 } else {
3640 /* configure default vlan to vf queue and set silent
3641 * vlan removal (the vf remains unaware of this vlan).
3642 */
3643 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3644 &update_params->update_flags);
3645 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3646 &update_params->update_flags);
3647 update_params->def_vlan = vlan;
3648 update_params->silent_removal_value =
3649 vlan & VLAN_VID_MASK;
3650 update_params->silent_removal_mask = VLAN_VID_MASK;
3651 }
3652
3653 /* Update the Queue state */
3654 rc = bnx2x_queue_state_change(bp, &q_params);
3655 if (rc) {
3656 BNX2X_ERR("Failed to configure default VLAN\n");
3657 goto out;
3658 }
3659
3660
3661 /* clear the flag indicating that this VF needs its vlan
3662 * (will only be set if the HV configured the Vlan before vf was
3663 * up and we were called because the VF came up later
3664 */
3665 out:
3666 vf->cfg_flags &= ~VF_CFG_VLAN;
3667 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3668
3669 return rc;
3670 }
3671
3672 /* crc is the first field in the bulletin board. Compute the crc over the
3673 * entire bulletin board excluding the crc field itself. Use the length field
3674 * as the Bulletin Board was posted by a PF with possibly a different version
3675 * from the vf which will sample it. Therefore, the length is computed by the
3676 * PF and the used blindly by the VF.
3677 */
3678 u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
3679 struct pf_vf_bulletin_content *bulletin)
3680 {
3681 return crc32(BULLETIN_CRC_SEED,
3682 ((u8 *)bulletin) + sizeof(bulletin->crc),
3683 bulletin->length - sizeof(bulletin->crc));
3684 }
3685
3686 /* Check for new posts on the bulletin board */
3687 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3688 {
3689 struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
3690 int attempts;
3691
3692 /* bulletin board hasn't changed since last sample */
3693 if (bp->old_bulletin.version == bulletin.version)
3694 return PFVF_BULLETIN_UNCHANGED;
3695
3696 /* validate crc of new bulletin board */
3697 if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
3698 /* sampling structure in mid post may result with corrupted data
3699 * validate crc to ensure coherency.
3700 */
3701 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3702 bulletin = bp->pf2vf_bulletin->content;
3703 if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
3704 &bulletin))
3705 break;
3706 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3707 bulletin.crc,
3708 bnx2x_crc_vf_bulletin(bp, &bulletin));
3709 }
3710 if (attempts >= BULLETIN_ATTEMPTS) {
3711 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3712 attempts);
3713 return PFVF_BULLETIN_CRC_ERR;
3714 }
3715 }
3716
3717 /* the mac address in bulletin board is valid and is new */
3718 if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
3719 !ether_addr_equal(bulletin.mac, bp->old_bulletin.mac)) {
3720 /* update new mac to net device */
3721 memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
3722 }
3723
3724 /* the vlan in bulletin board is valid and is new */
3725 if (bulletin.valid_bitmap & 1 << VLAN_VALID)
3726 memcpy(&bulletin.vlan, &bp->old_bulletin.vlan, VLAN_HLEN);
3727
3728 /* copy new bulletin board to bp */
3729 bp->old_bulletin = bulletin;
3730
3731 return PFVF_BULLETIN_UPDATED;
3732 }
3733
3734 void bnx2x_timer_sriov(struct bnx2x *bp)
3735 {
3736 bnx2x_sample_bulletin(bp);
3737
3738 /* if channel is down we need to self destruct */
3739 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) {
3740 smp_mb__before_clear_bit();
3741 set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3742 &bp->sp_rtnl_state);
3743 smp_mb__after_clear_bit();
3744 schedule_delayed_work(&bp->sp_rtnl_task, 0);
3745 }
3746 }
3747
3748 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3749 {
3750 /* vf doorbells are embedded within the regview */
3751 return bp->regview + PXP_VF_ADDR_DB_START;
3752 }
3753
3754 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3755 {
3756 mutex_init(&bp->vf2pf_mutex);
3757
3758 /* allocate vf2pf mailbox for vf to pf channel */
3759 BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
3760 sizeof(struct bnx2x_vf_mbx_msg));
3761
3762 /* allocate pf 2 vf bulletin board */
3763 BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
3764 sizeof(union pf_vf_bulletin));
3765
3766 return 0;
3767
3768 alloc_mem_err:
3769 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3770 sizeof(struct bnx2x_vf_mbx_msg));
3771 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3772 sizeof(union pf_vf_bulletin));
3773 return -ENOMEM;
3774 }
3775
3776 void bnx2x_iov_channel_down(struct bnx2x *bp)
3777 {
3778 int vf_idx;
3779 struct pf_vf_bulletin_content *bulletin;
3780
3781 if (!IS_SRIOV(bp))
3782 return;
3783
3784 for_each_vf(bp, vf_idx) {
3785 /* locate this VFs bulletin board and update the channel down
3786 * bit
3787 */
3788 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3789 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3790
3791 /* update vf bulletin board */
3792 bnx2x_post_vf_bulletin(bp, vf_idx);
3793 }
3794 }
Linux with added FPC-III support