arch/xtensa/include/asm/mmu_context.h

   1 /*
   2  * Switch an MMU context.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2001 - 2013 Tensilica Inc.
   9  */
  10
  11 #ifndef _XTENSA_MMU_CONTEXT_H
  12 #define _XTENSA_MMU_CONTEXT_H
  13
  14 #ifndef CONFIG_MMU
  15 #include <asm/nommu_context.h>
  16 #else
  17
  18 #include <linux/stringify.h>
  19 #include <linux/sched.h>
  20
  21 #include <asm/vectors.h>
  22
  23 #include <asm/pgtable.h>
  24 #include <asm/cacheflush.h>
  25 #include <asm/tlbflush.h>
  26 #include <asm-generic/mm_hooks.h>
  27 #include <asm-generic/percpu.h>
  28
  29 #if (XCHAL_HAVE_TLBS != 1)
  30 # error "Linux must have an MMU!"
  31 #endif
  32
  33 DECLARE_PER_CPU(unsigned long, asid_cache);
  34 #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu)
  35
  36 /*
  37  * NO_CONTEXT is the invalid ASID value that we don't ever assign to
  38  * any user or kernel context.  We use the reserved values in the
  39  * ASID_INSERT macro below.
  40  *
  41  * 0 invalid
  42  * 1 kernel
  43  * 2 reserved
  44  * 3 reserved
  45  * 4...255 available
  46  */
  47
  48 #define NO_CONTEXT      0
  49 #define ASID_USER_FIRST 4
  50 #define ASID_MASK       ((1 << XCHAL_MMU_ASID_BITS) - 1)
  51 #define ASID_INSERT(x)  (0x03020001 | (((x) & ASID_MASK) << 8))
  52
  53 #ifdef CONFIG_MMU
  54 void init_mmu(void);
  55 #else
  56 static inline void init_mmu(void) { }
  57 #endif
  58
  59 static inline void set_rasid_register (unsigned long val)
  60 {
  61         __asm__ __volatile__ (" wsr %0, rasid\n\t"
  62                               " isync\n" : : "a" (val));
  63 }
  64
  65 static inline unsigned long get_rasid_register (void)
  66 {
  67         unsigned long tmp;
  68         __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp));
  69         return tmp;
  70 }
  71
  72 static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu)
  73 {
  74         unsigned long asid = cpu_asid_cache(cpu);
  75         if ((++asid & ASID_MASK) == 0) {
  76                 /*
  77                  * Start new asid cycle; continue counting with next
  78                  * incarnation bits; skipping over 0, 1, 2, 3.
  79                  */
  80                 local_flush_tlb_all();
  81                 asid += ASID_USER_FIRST;
  82         }
  83         cpu_asid_cache(cpu) = asid;
  84         mm->context.asid[cpu] = asid;
  85         mm->context.cpu = cpu;
  86 }
  87
  88 static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
  89 {
  90         /*
  91          * Check if our ASID is of an older version and thus invalid.
  92          */
  93
  94         if (mm) {
  95                 unsigned long asid = mm->context.asid[cpu];
  96
  97                 if (asid == NO_CONTEXT ||
  98                                 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK))
  99                         get_new_mmu_context(mm, cpu);
 100         }
 101 }
 102
 103 static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
 104 {
 105         get_mmu_context(mm, cpu);
 106         set_rasid_register(ASID_INSERT(mm->context.asid[cpu]));
 107         invalidate_page_directory();
 108 }
 109
 110 /*
 111  * Initialize the context related info for a new mm_struct
 112  * instance.  Valid cpu values are 0..(NR_CPUS-1), so initializing
 113  * to -1 says the process has never run on any core.
 114  */
 115
 116 static inline int init_new_context(struct task_struct *tsk,
 117                 struct mm_struct *mm)
 118 {
 119         int cpu;
 120         for_each_possible_cpu(cpu) {
 121                 mm->context.asid[cpu] = NO_CONTEXT;
 122         }
 123         mm->context.cpu = -1;
 124         return 0;
 125 }
 126
 127 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 128                              struct task_struct *tsk)
 129 {
 130         unsigned int cpu = smp_processor_id();
 131         int migrated = next->context.cpu != cpu;
 132         /* Flush the icache if we migrated to a new core. */
 133         if (migrated) {
 134                 __invalidate_icache_all();
 135                 next->context.cpu = cpu;
 136         }
 137         if (migrated || prev != next)
 138                 activate_context(next, cpu);
 139 }
 140
 141 #define activate_mm(prev, next) switch_mm((prev), (next), NULL)
 142 #define deactivate_mm(tsk, mm)  do { } while (0)
 143
 144 /*
 145  * Destroy context related info for an mm_struct that is about
 146  * to be put to rest.
 147  */
 148 static inline void destroy_context(struct mm_struct *mm)
 149 {
 150         invalidate_page_directory();
 151 }
 152
 153
 154 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 155 {
 156         /* Nothing to do. */
 157
 158 }
 159
 160 #endif /* CONFIG_MMU */
 161 #endif /* _XTENSA_MMU_CONTEXT_H */