staging: erofs: fix warning Comparison to bool
[linux/fpc-iii.git] / arch / arc / boot / dts / haps_hs_idu.dts
blob0c603308aeb360880bca3a3403a74044cb1c12bc
1 /*
2  * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com)
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 /dts-v1/;
10 /include/ "skeleton_hs_idu.dtsi"
12 / {
13         model = "snps,zebu_hs-smp";
14         compatible = "snps,zebu_hs";
15         #address-cells = <1>;
16         #size-cells = <1>;
17         interrupt-parent = <&core_intc>;
19         memory {
20                 device_type = "memory";
21                 reg = <0x80000000 0x20000000>;  /* 512 */
22         };
24         chosen {
25                 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
26         };
28         aliases {
29                 serial0 = &uart0;
30         };
32         fpga {
33                 compatible = "simple-bus";
34                 #address-cells = <1>;
35                 #size-cells = <1>;
37                 /* child and parent address space 1:1 mapped */
38                 ranges;
40                 core_clk: core_clk {
41                         #clock-cells = <0>;
42                         compatible = "fixed-clock";
43                         clock-frequency = <50000000>;   /* 50 MHZ */
44                 };
46                 core_intc: interrupt-controller {
47                         compatible = "snps,archs-intc";
48                         interrupt-controller;
49                         #interrupt-cells = <1>;
50                 };
52                 idu_intc: idu-interrupt-controller {
53                         compatible = "snps,archs-idu-intc";
54                         interrupt-controller;
55                         interrupt-parent = <&core_intc>;
56                         #interrupt-cells = <1>;
57                 };
59                 uart0: serial@f0000000 {
60                         /* compatible = "ns8250"; Doesn't use FIFOs */
61                         compatible = "ns16550a";
62                         reg = <0xf0000000 0x2000>;
63                         interrupt-parent = <&idu_intc>;
64                         interrupts = <0>;
65                         clock-frequency = <50000000>;
66                         baud = <115200>;
67                         reg-shift = <2>;
68                         reg-io-width = <4>;
69                         no-loopback-test = <1>;
70                 };
72                 arcpct0: pct {
73                         compatible = "snps,archs-pct";
74                         #interrupt-cells = <1>;
75                         interrupts = <20>;
76                 };
77         };