drivers/i2c/busses/i2c-piix4.c

   1 /*
   2     piix4.c - Part of lm_sensors, Linux kernel modules for hardware
   3               monitoring
   4     Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
   5     Philip Edelbrock <phil@netroedge.com>
   6
   7     This program is free software; you can redistribute it and/or modify
   8     it under the terms of the GNU General Public License as published by
   9     the Free Software Foundation; either version 2 of the License, or
  10     (at your option) any later version.
  11
  12     This program is distributed in the hope that it will be useful,
  13     but WITHOUT ANY WARRANTY; without even the implied warranty of
  14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15     GNU General Public License for more details.
  16
  17     You should have received a copy of the GNU General Public License
  18     along with this program; if not, write to the Free Software
  19     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 /*
  23    Supports:
  24         Intel PIIX4, 440MX
  25         Serverworks OSB4, CSB5, CSB6, HT-1000
  26         ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
  27         SMSC Victory66
  28
  29    Note: we assume there can only be one device, with one SMBus interface.
  30 */
  31
  32 #include <linux/module.h>
  33 #include <linux/moduleparam.h>
  34 #include <linux/pci.h>
  35 #include <linux/kernel.h>
  36 #include <linux/delay.h>
  37 #include <linux/stddef.h>
  38 #include <linux/ioport.h>
  39 #include <linux/i2c.h>
  40 #include <linux/init.h>
  41 #include <linux/dmi.h>
  42 #include <asm/io.h>
  43
  44
  45 struct sd {
  46         const unsigned short mfr;
  47         const unsigned short dev;
  48         const unsigned char fn;
  49         const char *name;
  50 };
  51
  52 /* PIIX4 SMBus address offsets */
  53 #define SMBHSTSTS       (0 + piix4_smba)
  54 #define SMBHSLVSTS      (1 + piix4_smba)
  55 #define SMBHSTCNT       (2 + piix4_smba)
  56 #define SMBHSTCMD       (3 + piix4_smba)
  57 #define SMBHSTADD       (4 + piix4_smba)
  58 #define SMBHSTDAT0      (5 + piix4_smba)
  59 #define SMBHSTDAT1      (6 + piix4_smba)
  60 #define SMBBLKDAT       (7 + piix4_smba)
  61 #define SMBSLVCNT       (8 + piix4_smba)
  62 #define SMBSHDWCMD      (9 + piix4_smba)
  63 #define SMBSLVEVT       (0xA + piix4_smba)
  64 #define SMBSLVDAT       (0xC + piix4_smba)
  65
  66 /* count for request_region */
  67 #define SMBIOSIZE       8
  68
  69 /* PCI Address Constants */
  70 #define SMBBA           0x090
  71 #define SMBHSTCFG       0x0D2
  72 #define SMBSLVC         0x0D3
  73 #define SMBSHDW1        0x0D4
  74 #define SMBSHDW2        0x0D5
  75 #define SMBREV          0x0D6
  76
  77 /* Other settings */
  78 #define MAX_TIMEOUT     500
  79 #define  ENABLE_INT9    0
  80
  81 /* PIIX4 constants */
  82 #define PIIX4_QUICK             0x00
  83 #define PIIX4_BYTE              0x04
  84 #define PIIX4_BYTE_DATA         0x08
  85 #define PIIX4_WORD_DATA         0x0C
  86 #define PIIX4_BLOCK_DATA        0x14
  87
  88 /* insmod parameters */
  89
  90 /* If force is set to anything different from 0, we forcibly enable the
  91    PIIX4. DANGEROUS! */
  92 static int force;
  93 module_param (force, int, 0);
  94 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
  95
  96 /* If force_addr is set to anything different from 0, we forcibly enable
  97    the PIIX4 at the given address. VERY DANGEROUS! */
  98 static int force_addr;
  99 module_param (force_addr, int, 0);
 100 MODULE_PARM_DESC(force_addr,
 101                  "Forcibly enable the PIIX4 at the given address. "
 102                  "EXTREMELY DANGEROUS!");
 103
 104 static int piix4_transaction(void);
 105
 106 static unsigned short piix4_smba;
 107 static struct pci_driver piix4_driver;
 108 static struct i2c_adapter piix4_adapter;
 109
 110 static struct dmi_system_id __devinitdata piix4_dmi_table[] = {
 111         {
 112                 .ident = "IBM",
 113                 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
 114         },
 115         { },
 116 };
 117
 118 static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
 119                                 const struct pci_device_id *id)
 120 {
 121         unsigned char temp;
 122
 123         dev_info(&PIIX4_dev->dev, "Found %s device\n", pci_name(PIIX4_dev));
 124
 125         /* Don't access SMBus on IBM systems which get corrupted eeproms */
 126         if (dmi_check_system(piix4_dmi_table) &&
 127                         PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
 128                 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
 129                         "may corrupt your serial eeprom! Refusing to load "
 130                         "module!\n");
 131                 return -EPERM;
 132         }
 133
 134         /* Determine the address of the SMBus areas */
 135         if (force_addr) {
 136                 piix4_smba = force_addr & 0xfff0;
 137                 force = 0;
 138         } else {
 139                 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
 140                 piix4_smba &= 0xfff0;
 141                 if(piix4_smba == 0) {
 142                         dev_err(&PIIX4_dev->dev, "SMB base address "
 143                                 "uninitialized - upgrade BIOS or use "
 144                                 "force_addr=0xaddr\n");
 145                         return -ENODEV;
 146                 }
 147         }
 148
 149         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 150                 dev_err(&PIIX4_dev->dev, "SMB region 0x%x already in use!\n",
 151                         piix4_smba);
 152                 return -ENODEV;
 153         }
 154
 155         pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 156
 157         /* If force_addr is set, we program the new address here. Just to make
 158            sure, we disable the PIIX4 first. */
 159         if (force_addr) {
 160                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
 161                 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
 162                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
 163                 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
 164                         "new address %04x!\n", piix4_smba);
 165         } else if ((temp & 1) == 0) {
 166                 if (force) {
 167                         /* This should never need to be done, but has been
 168                          * noted that many Dell machines have the SMBus
 169                          * interface on the PIIX4 disabled!? NOTE: This assumes
 170                          * I/O space and other allocations WERE done by the
 171                          * Bios!  Don't complain if your hardware does weird
 172                          * things after enabling this. :') Check for Bios
 173                          * updates before resorting to this.
 174                          */
 175                         pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
 176                                               temp | 1);
 177                         dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
 178                                 "WARNING: SMBus interface has been "
 179                                 "FORCEFULLY ENABLED!\n");
 180                 } else {
 181                         dev_err(&PIIX4_dev->dev,
 182                                 "Host SMBus controller not enabled!\n");
 183                         release_region(piix4_smba, SMBIOSIZE);
 184                         piix4_smba = 0;
 185                         return -ENODEV;
 186                 }
 187         }
 188
 189         if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
 190                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
 191         else if ((temp & 0x0E) == 0)
 192                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
 193         else
 194                 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
 195                         "(or code out of date)!\n");
 196
 197         pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
 198         dev_dbg(&PIIX4_dev->dev, "SMBREV = 0x%X\n", temp);
 199         dev_dbg(&PIIX4_dev->dev, "SMBA = 0x%X\n", piix4_smba);
 200
 201         return 0;
 202 }
 203
 204 /* Another internally used function */
 205 static int piix4_transaction(void)
 206 {
 207         int temp;
 208         int result = 0;
 209         int timeout = 0;
 210
 211         dev_dbg(&piix4_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
 212                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 213                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 214                 inb_p(SMBHSTDAT1));
 215
 216         /* Make sure the SMBus host is ready to start transmitting */
 217         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 218                 dev_dbg(&piix4_adapter.dev, "SMBus busy (%02x). "
 219                         "Resetting...\n", temp);
 220                 outb_p(temp, SMBHSTSTS);
 221                 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 222                         dev_err(&piix4_adapter.dev, "Failed! (%02x)\n", temp);
 223                         return -1;
 224                 } else {
 225                         dev_dbg(&piix4_adapter.dev, "Successful!\n");
 226                 }
 227         }
 228
 229         /* start the transaction by setting bit 6 */
 230         outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
 231
 232         /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
 233         do {
 234                 msleep(1);
 235                 temp = inb_p(SMBHSTSTS);
 236         } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
 237
 238         /* If the SMBus is still busy, we give up */
 239         if (timeout >= MAX_TIMEOUT) {
 240                 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
 241                 result = -1;
 242         }
 243
 244         if (temp & 0x10) {
 245                 result = -1;
 246                 dev_err(&piix4_adapter.dev, "Error: Failed bus transaction\n");
 247         }
 248
 249         if (temp & 0x08) {
 250                 result = -1;
 251                 dev_dbg(&piix4_adapter.dev, "Bus collision! SMBus may be "
 252                         "locked until next hard reset. (sorry!)\n");
 253                 /* Clock stops and slave is stuck in mid-transmission */
 254         }
 255
 256         if (temp & 0x04) {
 257                 result = -1;
 258                 dev_dbg(&piix4_adapter.dev, "Error: no response!\n");
 259         }
 260
 261         if (inb_p(SMBHSTSTS) != 0x00)
 262                 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
 263
 264         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 265                 dev_err(&piix4_adapter.dev, "Failed reset at end of "
 266                         "transaction (%02x)\n", temp);
 267         }
 268         dev_dbg(&piix4_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, "
 269                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 270                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 271                 inb_p(SMBHSTDAT1));
 272         return result;
 273 }
 274
 275 /* Return -1 on error. */
 276 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
 277                  unsigned short flags, char read_write,
 278                  u8 command, int size, union i2c_smbus_data * data)
 279 {
 280         int i, len;
 281
 282         switch (size) {
 283         case I2C_SMBUS_PROC_CALL:
 284                 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
 285                 return -1;
 286         case I2C_SMBUS_QUICK:
 287                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 288                        SMBHSTADD);
 289                 size = PIIX4_QUICK;
 290                 break;
 291         case I2C_SMBUS_BYTE:
 292                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 293                        SMBHSTADD);
 294                 if (read_write == I2C_SMBUS_WRITE)
 295                         outb_p(command, SMBHSTCMD);
 296                 size = PIIX4_BYTE;
 297                 break;
 298         case I2C_SMBUS_BYTE_DATA:
 299                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 300                        SMBHSTADD);
 301                 outb_p(command, SMBHSTCMD);
 302                 if (read_write == I2C_SMBUS_WRITE)
 303                         outb_p(data->byte, SMBHSTDAT0);
 304                 size = PIIX4_BYTE_DATA;
 305                 break;
 306         case I2C_SMBUS_WORD_DATA:
 307                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 308                        SMBHSTADD);
 309                 outb_p(command, SMBHSTCMD);
 310                 if (read_write == I2C_SMBUS_WRITE) {
 311                         outb_p(data->word & 0xff, SMBHSTDAT0);
 312                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
 313                 }
 314                 size = PIIX4_WORD_DATA;
 315                 break;
 316         case I2C_SMBUS_BLOCK_DATA:
 317                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
 318                        SMBHSTADD);
 319                 outb_p(command, SMBHSTCMD);
 320                 if (read_write == I2C_SMBUS_WRITE) {
 321                         len = data->block[0];
 322                         if (len < 0)
 323                                 len = 0;
 324                         if (len > 32)
 325                                 len = 32;
 326                         outb_p(len, SMBHSTDAT0);
 327                         i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
 328                         for (i = 1; i <= len; i++)
 329                                 outb_p(data->block[i], SMBBLKDAT);
 330                 }
 331                 size = PIIX4_BLOCK_DATA;
 332                 break;
 333         }
 334
 335         outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
 336
 337         if (piix4_transaction())        /* Error in transaction */
 338                 return -1;
 339
 340         if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
 341                 return 0;
 342
 343
 344         switch (size) {
 345         case PIIX4_BYTE:
 346         case PIIX4_BYTE_DATA:
 347                 data->byte = inb_p(SMBHSTDAT0);
 348                 break;
 349         case PIIX4_WORD_DATA:
 350                 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
 351                 break;
 352         case PIIX4_BLOCK_DATA:
 353                 data->block[0] = inb_p(SMBHSTDAT0);
 354                 i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
 355                 for (i = 1; i <= data->block[0]; i++)
 356                         data->block[i] = inb_p(SMBBLKDAT);
 357                 break;
 358         }
 359         return 0;
 360 }
 361
 362 static u32 piix4_func(struct i2c_adapter *adapter)
 363 {
 364         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 365             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 366             I2C_FUNC_SMBUS_BLOCK_DATA;
 367 }
 368
 369 static const struct i2c_algorithm smbus_algorithm = {
 370         .smbus_xfer     = piix4_access,
 371         .functionality  = piix4_func,
 372 };
 373
 374 static struct i2c_adapter piix4_adapter = {
 375         .owner          = THIS_MODULE,
 376         .id             = I2C_HW_SMBUS_PIIX4,
 377         .class          = I2C_CLASS_HWMON,
 378         .algo           = &smbus_algorithm,
 379 };
 380
 381 static struct pci_device_id piix4_ids[] = {
 382         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
 383         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
 384         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
 385         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
 386         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
 387         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
 388         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
 389         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 390                      PCI_DEVICE_ID_SERVERWORKS_OSB4) },
 391         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 392                      PCI_DEVICE_ID_SERVERWORKS_CSB5) },
 393         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 394                      PCI_DEVICE_ID_SERVERWORKS_CSB6) },
 395         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 396                      PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
 397         { 0, }
 398 };
 399
 400 MODULE_DEVICE_TABLE (pci, piix4_ids);
 401
 402 static int __devinit piix4_probe(struct pci_dev *dev,
 403                                 const struct pci_device_id *id)
 404 {
 405         int retval;
 406
 407         retval = piix4_setup(dev, id);
 408         if (retval)
 409                 return retval;
 410
 411         /* set up the sysfs linkage to our parent device */
 412         piix4_adapter.dev.parent = &dev->dev;
 413
 414         snprintf(piix4_adapter.name, sizeof(piix4_adapter.name),
 415                 "SMBus PIIX4 adapter at %04x", piix4_smba);
 416
 417         if ((retval = i2c_add_adapter(&piix4_adapter))) {
 418                 dev_err(&dev->dev, "Couldn't register adapter!\n");
 419                 release_region(piix4_smba, SMBIOSIZE);
 420                 piix4_smba = 0;
 421         }
 422
 423         return retval;
 424 }
 425
 426 static void __devexit piix4_remove(struct pci_dev *dev)
 427 {
 428         if (piix4_smba) {
 429                 i2c_del_adapter(&piix4_adapter);
 430                 release_region(piix4_smba, SMBIOSIZE);
 431                 piix4_smba = 0;
 432         }
 433 }
 434
 435 static struct pci_driver piix4_driver = {
 436         .name           = "piix4_smbus",
 437         .id_table       = piix4_ids,
 438         .probe          = piix4_probe,
 439         .remove         = __devexit_p(piix4_remove),
 440 };
 441
 442 static int __init i2c_piix4_init(void)
 443 {
 444         return pci_register_driver(&piix4_driver);
 445 }
 446
 447 static void __exit i2c_piix4_exit(void)
 448 {
 449         pci_unregister_driver(&piix4_driver);
 450 }
 451
 452 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
 453                 "Philip Edelbrock <phil@netroedge.com>");
 454 MODULE_DESCRIPTION("PIIX4 SMBus driver");
 455 MODULE_LICENSE("GPL");
 456
 457 module_init(i2c_piix4_init);
 458 module_exit(i2c_piix4_exit);