drivers/i2c/busses/i2c-cht-wc.c

   1 /*
   2  * Intel CHT Whiskey Cove PMIC I2C Master driver
   3  * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
   4  *
   5  * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
   6  * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License version
  10  * 2 as published by the Free Software Foundation, or (at your option)
  11  * any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/acpi.h>
  20 #include <linux/completion.h>
  21 #include <linux/delay.h>
  22 #include <linux/i2c.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/irq.h>
  25 #include <linux/irqdomain.h>
  26 #include <linux/mfd/intel_soc_pmic.h>
  27 #include <linux/module.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/power/bq24190_charger.h>
  30 #include <linux/slab.h>
  31
  32 #define CHT_WC_I2C_CTRL                 0x5e24
  33 #define CHT_WC_I2C_CTRL_WR              BIT(0)
  34 #define CHT_WC_I2C_CTRL_RD              BIT(1)
  35 #define CHT_WC_I2C_CLIENT_ADDR          0x5e25
  36 #define CHT_WC_I2C_REG_OFFSET           0x5e26
  37 #define CHT_WC_I2C_WRDATA               0x5e27
  38 #define CHT_WC_I2C_RDDATA               0x5e28
  39
  40 #define CHT_WC_EXTCHGRIRQ               0x6e0a
  41 #define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ    BIT(0)
  42 #define CHT_WC_EXTCHGRIRQ_WRITE_IRQ     BIT(1)
  43 #define CHT_WC_EXTCHGRIRQ_READ_IRQ      BIT(2)
  44 #define CHT_WC_EXTCHGRIRQ_NACK_IRQ      BIT(3)
  45 #define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK  ((u8)GENMASK(3, 1))
  46 #define CHT_WC_EXTCHGRIRQ_MSK           0x6e17
  47
  48 struct cht_wc_i2c_adap {
  49         struct i2c_adapter adapter;
  50         wait_queue_head_t wait;
  51         struct irq_chip irqchip;
  52         struct mutex adap_lock;
  53         struct mutex irqchip_lock;
  54         struct regmap *regmap;
  55         struct irq_domain *irq_domain;
  56         struct i2c_client *client;
  57         int client_irq;
  58         u8 irq_mask;
  59         u8 old_irq_mask;
  60         int read_data;
  61         bool io_error;
  62         bool done;
  63 };
  64
  65 static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
  66 {
  67         struct cht_wc_i2c_adap *adap = data;
  68         int ret, reg;
  69
  70         mutex_lock(&adap->adap_lock);
  71
  72         /* Read IRQs */
  73         ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, &reg);
  74         if (ret) {
  75                 dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n");
  76                 mutex_unlock(&adap->adap_lock);
  77                 return IRQ_NONE;
  78         }
  79
  80         reg &= ~adap->irq_mask;
  81
  82         /* Reads must be acked after reading the received data. */
  83         ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &adap->read_data);
  84         if (ret)
  85                 adap->io_error = true;
  86
  87         /*
  88          * Immediately ack IRQs, so that if new IRQs arrives while we're
  89          * handling the previous ones our irq will re-trigger when we're done.
  90          */
  91         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg);
  92         if (ret)
  93                 dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n");
  94
  95         if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) {
  96                 adap->io_error |= !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ);
  97                 adap->done = true;
  98         }
  99
 100         mutex_unlock(&adap->adap_lock);
 101
 102         if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK)
 103                 wake_up(&adap->wait);
 104
 105         /*
 106          * Do NOT use handle_nested_irq here, the client irq handler will
 107          * likely want to do i2c transfers and the i2c controller uses this
 108          * interrupt handler as well, so running the client irq handler from
 109          * this thread will cause things to lock up.
 110          */
 111         if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) {
 112                 /*
 113                  * generic_handle_irq expects local IRQs to be disabled
 114                  * as normally it is called from interrupt context.
 115                  */
 116                 local_irq_disable();
 117                 generic_handle_irq(adap->client_irq);
 118                 local_irq_enable();
 119         }
 120
 121         return IRQ_HANDLED;
 122 }
 123
 124 static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
 125 {
 126         /* This i2c adapter only supports SMBUS byte transfers */
 127         return I2C_FUNC_SMBUS_BYTE_DATA;
 128 }
 129
 130 static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
 131                                       unsigned short flags, char read_write,
 132                                       u8 command, int size,
 133                                       union i2c_smbus_data *data)
 134 {
 135         struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap);
 136         int ret;
 137
 138         mutex_lock(&adap->adap_lock);
 139         adap->io_error = false;
 140         adap->done = false;
 141         mutex_unlock(&adap->adap_lock);
 142
 143         ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr);
 144         if (ret)
 145                 return ret;
 146
 147         if (read_write == I2C_SMBUS_WRITE) {
 148                 ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte);
 149                 if (ret)
 150                         return ret;
 151         }
 152
 153         ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command);
 154         if (ret)
 155                 return ret;
 156
 157         ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL,
 158                            (read_write == I2C_SMBUS_WRITE) ?
 159                            CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD);
 160         if (ret)
 161                 return ret;
 162
 163         ret = wait_event_timeout(adap->wait, adap->done, msecs_to_jiffies(30));
 164         if (ret == 0) {
 165                 /*
 166                  * The CHT GPIO controller serializes all IRQs, sometimes
 167                  * causing significant delays, check status manually.
 168                  */
 169                 cht_wc_i2c_adap_thread_handler(0, adap);
 170                 if (!adap->done)
 171                         return -ETIMEDOUT;
 172         }
 173
 174         ret = 0;
 175         mutex_lock(&adap->adap_lock);
 176         if (adap->io_error)
 177                 ret = -EIO;
 178         else if (read_write == I2C_SMBUS_READ)
 179                 data->byte = adap->read_data;
 180         mutex_unlock(&adap->adap_lock);
 181
 182         return ret;
 183 }
 184
 185 static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
 186         .functionality = cht_wc_i2c_adap_master_func,
 187         .smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
 188 };
 189
 190 /*
 191  * We are an i2c-adapter which itself is part of an i2c-client. This means that
 192  * transfers done through us take adapter->bus_lock twice, once for our parent
 193  * i2c-adapter and once to take our own bus_lock. Lockdep does not like this
 194  * nested locking, to make lockdep happy in the case of busses with muxes, the
 195  * i2c-core's i2c_adapter_lock_bus function calls:
 196  * rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter));
 197  *
 198  * But i2c_adapter_depth only works when the direct parent of the adapter is
 199  * another adapter, as it is only meant for muxes. In our case there is an
 200  * i2c-client and MFD instantiated platform_device in the parent->child chain
 201  * between the 2 devices.
 202  *
 203  * So we override the default i2c_lock_operations and pass a hardcoded
 204  * depth of 1 to rt_mutex_lock_nested, to make lockdep happy.
 205  *
 206  * Note that if there were to be a mux attached to our adapter, this would
 207  * break things again since the i2c-mux code expects the root-adapter to have
 208  * a locking depth of 0. But we always have only 1 client directly attached
 209  * in the form of the Charger IC paired with the CHT Whiskey Cove PMIC.
 210  */
 211 static void cht_wc_i2c_adap_lock_bus(struct i2c_adapter *adapter,
 212                                  unsigned int flags)
 213 {
 214         rt_mutex_lock_nested(&adapter->bus_lock, 1);
 215 }
 216
 217 static int cht_wc_i2c_adap_trylock_bus(struct i2c_adapter *adapter,
 218                                    unsigned int flags)
 219 {
 220         return rt_mutex_trylock(&adapter->bus_lock);
 221 }
 222
 223 static void cht_wc_i2c_adap_unlock_bus(struct i2c_adapter *adapter,
 224                                    unsigned int flags)
 225 {
 226         rt_mutex_unlock(&adapter->bus_lock);
 227 }
 228
 229 static const struct i2c_lock_operations cht_wc_i2c_adap_lock_ops = {
 230         .lock_bus =    cht_wc_i2c_adap_lock_bus,
 231         .trylock_bus = cht_wc_i2c_adap_trylock_bus,
 232         .unlock_bus =  cht_wc_i2c_adap_unlock_bus,
 233 };
 234
 235 /**** irqchip for the client connected to the extchgr i2c adapter ****/
 236 static void cht_wc_i2c_irq_lock(struct irq_data *data)
 237 {
 238         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 239
 240         mutex_lock(&adap->irqchip_lock);
 241 }
 242
 243 static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data)
 244 {
 245         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 246         int ret;
 247
 248         if (adap->irq_mask != adap->old_irq_mask) {
 249                 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK,
 250                                    adap->irq_mask);
 251                 if (ret == 0)
 252                         adap->old_irq_mask = adap->irq_mask;
 253                 else
 254                         dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n");
 255         }
 256
 257         mutex_unlock(&adap->irqchip_lock);
 258 }
 259
 260 static void cht_wc_i2c_irq_enable(struct irq_data *data)
 261 {
 262         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 263
 264         adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
 265 }
 266
 267 static void cht_wc_i2c_irq_disable(struct irq_data *data)
 268 {
 269         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 270
 271         adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
 272 }
 273
 274 static const struct irq_chip cht_wc_i2c_irq_chip = {
 275         .irq_bus_lock           = cht_wc_i2c_irq_lock,
 276         .irq_bus_sync_unlock    = cht_wc_i2c_irq_sync_unlock,
 277         .irq_disable            = cht_wc_i2c_irq_disable,
 278         .irq_enable             = cht_wc_i2c_irq_enable,
 279         .name                   = "cht_wc_ext_chrg_irq_chip",
 280 };
 281
 282 static const char * const bq24190_suppliers[] = {
 283         "tcpm-source-psy-i2c-fusb302" };
 284
 285 static const struct property_entry bq24190_props[] = {
 286         PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq24190_suppliers),
 287         PROPERTY_ENTRY_BOOL("omit-battery-class"),
 288         PROPERTY_ENTRY_BOOL("disable-reset"),
 289         { }
 290 };
 291
 292 static struct regulator_consumer_supply fusb302_consumer = {
 293         .supply = "vbus",
 294         /* Must match fusb302 dev_name in intel_cht_int33fe.c */
 295         .dev_name = "i2c-fusb302",
 296 };
 297
 298 static const struct regulator_init_data bq24190_vbus_init_data = {
 299         .constraints = {
 300                 /* The name is used in intel_cht_int33fe.c do not change. */
 301                 .name = "cht_wc_usb_typec_vbus",
 302                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 303         },
 304         .consumer_supplies = &fusb302_consumer,
 305         .num_consumer_supplies = 1,
 306 };
 307
 308 static struct bq24190_platform_data bq24190_pdata = {
 309         .regulator_init_data = &bq24190_vbus_init_data,
 310 };
 311
 312 static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
 313 {
 314         struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
 315         struct cht_wc_i2c_adap *adap;
 316         struct i2c_board_info board_info = {
 317                 .type = "bq24190",
 318                 .addr = 0x6b,
 319                 .dev_name = "bq24190",
 320                 .properties = bq24190_props,
 321                 .platform_data = &bq24190_pdata,
 322         };
 323         int ret, reg, irq;
 324
 325         irq = platform_get_irq(pdev, 0);
 326         if (irq < 0) {
 327                 dev_err(&pdev->dev, "Error missing irq resource\n");
 328                 return -EINVAL;
 329         }
 330
 331         adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL);
 332         if (!adap)
 333                 return -ENOMEM;
 334
 335         init_waitqueue_head(&adap->wait);
 336         mutex_init(&adap->adap_lock);
 337         mutex_init(&adap->irqchip_lock);
 338         adap->irqchip = cht_wc_i2c_irq_chip;
 339         adap->regmap = pmic->regmap;
 340         adap->adapter.owner = THIS_MODULE;
 341         adap->adapter.class = I2C_CLASS_HWMON;
 342         adap->adapter.algo = &cht_wc_i2c_adap_algo;
 343         adap->adapter.lock_ops = &cht_wc_i2c_adap_lock_ops;
 344         strlcpy(adap->adapter.name, "PMIC I2C Adapter",
 345                 sizeof(adap->adapter.name));
 346         adap->adapter.dev.parent = &pdev->dev;
 347
 348         /* Clear and activate i2c-adapter interrupts, disable client IRQ */
 349         adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK;
 350
 351         ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &reg);
 352         if (ret)
 353                 return ret;
 354
 355         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask);
 356         if (ret)
 357                 return ret;
 358
 359         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask);
 360         if (ret)
 361                 return ret;
 362
 363         /* Alloc and register client IRQ */
 364         adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1,
 365                                                  &irq_domain_simple_ops, NULL);
 366         if (!adap->irq_domain)
 367                 return -ENOMEM;
 368
 369         adap->client_irq = irq_create_mapping(adap->irq_domain, 0);
 370         if (!adap->client_irq) {
 371                 ret = -ENOMEM;
 372                 goto remove_irq_domain;
 373         }
 374
 375         irq_set_chip_data(adap->client_irq, adap);
 376         irq_set_chip_and_handler(adap->client_irq, &adap->irqchip,
 377                                  handle_simple_irq);
 378
 379         ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 380                                         cht_wc_i2c_adap_thread_handler,
 381                                         IRQF_ONESHOT, "PMIC I2C Adapter", adap);
 382         if (ret)
 383                 goto remove_irq_domain;
 384
 385         i2c_set_adapdata(&adap->adapter, adap);
 386         ret = i2c_add_adapter(&adap->adapter);
 387         if (ret)
 388                 goto remove_irq_domain;
 389
 390         /*
 391          * Normally the Whiskey Cove PMIC is paired with a TI bq24292i charger,
 392          * connected to this i2c bus, and a max17047 fuel-gauge and a fusb302
 393          * USB Type-C controller connected to another i2c bus. In this setup
 394          * the max17047 and fusb302 devices are enumerated through an INT33FE
 395          * ACPI device. If this device is present register an i2c-client for
 396          * the TI bq24292i charger.
 397          */
 398         if (acpi_dev_present("INT33FE", NULL, -1)) {
 399                 board_info.irq = adap->client_irq;
 400                 adap->client = i2c_new_device(&adap->adapter, &board_info);
 401                 if (!adap->client) {
 402                         ret = -ENOMEM;
 403                         goto del_adapter;
 404                 }
 405         }
 406
 407         platform_set_drvdata(pdev, adap);
 408         return 0;
 409
 410 del_adapter:
 411         i2c_del_adapter(&adap->adapter);
 412 remove_irq_domain:
 413         irq_domain_remove(adap->irq_domain);
 414         return ret;
 415 }
 416
 417 static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev)
 418 {
 419         struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev);
 420
 421         if (adap->client)
 422                 i2c_unregister_device(adap->client);
 423         i2c_del_adapter(&adap->adapter);
 424         irq_domain_remove(adap->irq_domain);
 425
 426         return 0;
 427 }
 428
 429 static const struct platform_device_id cht_wc_i2c_adap_id_table[] = {
 430         { .name = "cht_wcove_ext_chgr" },
 431         {},
 432 };
 433 MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table);
 434
 435 static struct platform_driver cht_wc_i2c_adap_driver = {
 436         .probe = cht_wc_i2c_adap_i2c_probe,
 437         .remove = cht_wc_i2c_adap_i2c_remove,
 438         .driver = {
 439                 .name = "cht_wcove_ext_chgr",
 440         },
 441         .id_table = cht_wc_i2c_adap_id_table,
 442 };
 443 module_platform_driver(cht_wc_i2c_adap_driver);
 444
 445 MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
 446 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 447 MODULE_LICENSE("GPL");