2 * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
5 * Ben Collins <bcollins@ubuntu.com>
8 * John Brooks <john.brooks@bluecherry.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/slab.h>
28 module_param(multi_p2m
, uint
, 0644);
29 MODULE_PARM_DESC(multi_p2m
,
30 "Use multiple P2M DMA channels (default: no, 6010-only)");
33 module_param(desc_mode
, uint
, 0644);
34 MODULE_PARM_DESC(desc_mode
,
35 "Allow use of descriptor mode DMA (default: no, 6010-only)");
37 int solo_p2m_dma(struct solo_dev
*solo_dev
, int wr
,
38 void *sys_addr
, u32 ext_addr
, u32 size
,
39 int repeat
, u32 ext_size
)
44 if (WARN_ON_ONCE((unsigned long)sys_addr
& 0x03))
46 if (WARN_ON_ONCE(!size
))
49 dma_addr
= pci_map_single(solo_dev
->pdev
, sys_addr
, size
,
50 wr
? PCI_DMA_TODEVICE
: PCI_DMA_FROMDEVICE
);
51 if (pci_dma_mapping_error(solo_dev
->pdev
, dma_addr
))
54 ret
= solo_p2m_dma_t(solo_dev
, wr
, dma_addr
, ext_addr
, size
,
57 pci_unmap_single(solo_dev
->pdev
, dma_addr
, size
,
58 wr
? PCI_DMA_TODEVICE
: PCI_DMA_FROMDEVICE
);
63 /* Mutex must be held for p2m_id before calling this!! */
64 int solo_p2m_dma_desc(struct solo_dev
*solo_dev
,
65 struct solo_p2m_desc
*desc
, dma_addr_t desc_dma
,
68 struct solo_p2m_dev
*p2m_dev
;
70 unsigned int config
= 0;
72 unsigned int p2m_id
= 0;
74 /* Get next ID. According to Softlogic, 6110 has problems on !=0 P2M */
75 if (solo_dev
->type
!= SOLO_DEV_6110
&& multi_p2m
)
76 p2m_id
= atomic_inc_return(&solo_dev
->p2m_count
) % SOLO_NR_P2M
;
78 p2m_dev
= &solo_dev
->p2m_dev
[p2m_id
];
80 if (mutex_lock_interruptible(&p2m_dev
->mutex
))
83 reinit_completion(&p2m_dev
->completion
);
86 if (desc_cnt
> 1 && solo_dev
->type
!= SOLO_DEV_6110
&& desc_mode
) {
87 /* For 6010 with more than one desc, we can do a one-shot */
88 p2m_dev
->desc_count
= p2m_dev
->desc_idx
= 0;
89 config
= solo_reg_read(solo_dev
, SOLO_P2M_CONFIG(p2m_id
));
91 solo_reg_write(solo_dev
, SOLO_P2M_DES_ADR(p2m_id
), desc_dma
);
92 solo_reg_write(solo_dev
, SOLO_P2M_DESC_ID(p2m_id
), desc_cnt
);
93 solo_reg_write(solo_dev
, SOLO_P2M_CONFIG(p2m_id
), config
|
96 /* For single descriptors and 6110, we need to run each desc */
97 p2m_dev
->desc_count
= desc_cnt
;
98 p2m_dev
->desc_idx
= 1;
99 p2m_dev
->descs
= desc
;
101 solo_reg_write(solo_dev
, SOLO_P2M_TAR_ADR(p2m_id
),
103 solo_reg_write(solo_dev
, SOLO_P2M_EXT_ADR(p2m_id
),
105 solo_reg_write(solo_dev
, SOLO_P2M_EXT_CFG(p2m_id
),
107 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(p2m_id
),
111 timeout
= wait_for_completion_timeout(&p2m_dev
->completion
,
112 solo_dev
->p2m_jiffies
);
114 if (WARN_ON_ONCE(p2m_dev
->error
))
116 else if (timeout
== 0) {
117 solo_dev
->p2m_timeouts
++;
121 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(p2m_id
), 0);
123 /* Don't write here for the no_desc_mode case, because config is 0.
124 * We can't test no_desc_mode again, it might race. */
125 if (desc_cnt
> 1 && solo_dev
->type
!= SOLO_DEV_6110
&& config
)
126 solo_reg_write(solo_dev
, SOLO_P2M_CONFIG(p2m_id
), config
);
128 mutex_unlock(&p2m_dev
->mutex
);
133 void solo_p2m_fill_desc(struct solo_p2m_desc
*desc
, int wr
,
134 dma_addr_t dma_addr
, u32 ext_addr
, u32 size
,
135 int repeat
, u32 ext_size
)
137 WARN_ON_ONCE(dma_addr
& 0x03);
140 desc
->cfg
= SOLO_P2M_COPY_SIZE(size
>> 2);
141 desc
->ctrl
= SOLO_P2M_BURST_SIZE(SOLO_P2M_BURST_256
) |
142 (wr
? SOLO_P2M_WRITE
: 0) | SOLO_P2M_TRANS_ON
;
145 desc
->cfg
|= SOLO_P2M_EXT_INC(ext_size
>> 2);
146 desc
->ctrl
|= SOLO_P2M_PCI_INC(size
>> 2) |
147 SOLO_P2M_REPEAT(repeat
);
150 desc
->dma_addr
= dma_addr
;
151 desc
->ext_addr
= ext_addr
;
154 int solo_p2m_dma_t(struct solo_dev
*solo_dev
, int wr
,
155 dma_addr_t dma_addr
, u32 ext_addr
, u32 size
,
156 int repeat
, u32 ext_size
)
158 struct solo_p2m_desc desc
[2];
160 solo_p2m_fill_desc(&desc
[1], wr
, dma_addr
, ext_addr
, size
, repeat
,
163 /* No need for desc_dma since we know it is a single-shot */
164 return solo_p2m_dma_desc(solo_dev
, desc
, 0, 1);
167 void solo_p2m_isr(struct solo_dev
*solo_dev
, int id
)
169 struct solo_p2m_dev
*p2m_dev
= &solo_dev
->p2m_dev
[id
];
170 struct solo_p2m_desc
*desc
;
172 if (p2m_dev
->desc_count
<= p2m_dev
->desc_idx
) {
173 complete(&p2m_dev
->completion
);
177 /* Setup next descriptor */
179 desc
= &p2m_dev
->descs
[p2m_dev
->desc_idx
];
181 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(id
), 0);
182 solo_reg_write(solo_dev
, SOLO_P2M_TAR_ADR(id
), desc
->dma_addr
);
183 solo_reg_write(solo_dev
, SOLO_P2M_EXT_ADR(id
), desc
->ext_addr
);
184 solo_reg_write(solo_dev
, SOLO_P2M_EXT_CFG(id
), desc
->cfg
);
185 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(id
), desc
->ctrl
);
188 void solo_p2m_error_isr(struct solo_dev
*solo_dev
)
190 unsigned int err
= solo_reg_read(solo_dev
, SOLO_PCI_ERR
);
191 struct solo_p2m_dev
*p2m_dev
;
194 if (!(err
& (SOLO_PCI_ERR_P2M
| SOLO_PCI_ERR_P2M_DESC
)))
197 for (i
= 0; i
< SOLO_NR_P2M
; i
++) {
198 p2m_dev
= &solo_dev
->p2m_dev
[i
];
200 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(i
), 0);
201 complete(&p2m_dev
->completion
);
205 void solo_p2m_exit(struct solo_dev
*solo_dev
)
209 for (i
= 0; i
< SOLO_NR_P2M
; i
++)
210 solo_irq_off(solo_dev
, SOLO_IRQ_P2M(i
));
213 static int solo_p2m_test(struct solo_dev
*solo_dev
, int base
, int size
)
219 int order
= get_order(size
);
221 wr_buf
= (u32
*)__get_free_pages(GFP_KERNEL
, order
);
225 rd_buf
= (u32
*)__get_free_pages(GFP_KERNEL
, order
);
226 if (rd_buf
== NULL
) {
227 free_pages((unsigned long)wr_buf
, order
);
231 for (i
= 0; i
< (size
>> 3); i
++)
232 *(wr_buf
+ i
) = (i
<< 16) | (i
+ 1);
234 for (i
= (size
>> 3); i
< (size
>> 2); i
++)
235 *(wr_buf
+ i
) = ~((i
<< 16) | (i
+ 1));
237 memset(rd_buf
, 0x55, size
);
239 if (solo_p2m_dma(solo_dev
, 1, wr_buf
, base
, size
, 0, 0))
242 if (solo_p2m_dma(solo_dev
, 0, rd_buf
, base
, size
, 0, 0))
245 for (i
= 0; i
< (size
>> 2); i
++) {
246 if (*(wr_buf
+ i
) != *(rd_buf
+ i
))
253 free_pages((unsigned long)wr_buf
, order
);
254 free_pages((unsigned long)rd_buf
, order
);
259 int solo_p2m_init(struct solo_dev
*solo_dev
)
261 struct solo_p2m_dev
*p2m_dev
;
264 for (i
= 0; i
< SOLO_NR_P2M
; i
++) {
265 p2m_dev
= &solo_dev
->p2m_dev
[i
];
267 mutex_init(&p2m_dev
->mutex
);
268 init_completion(&p2m_dev
->completion
);
270 solo_reg_write(solo_dev
, SOLO_P2M_CONTROL(i
), 0);
271 solo_reg_write(solo_dev
, SOLO_P2M_CONFIG(i
),
272 SOLO_P2M_CSC_16BIT_565
|
273 SOLO_P2M_DESC_INTR_OPT
|
274 SOLO_P2M_DMA_INTERVAL(0) |
275 SOLO_P2M_PCI_MASTER_MODE
);
276 solo_irq_on(solo_dev
, SOLO_IRQ_P2M(i
));
279 /* Find correct SDRAM size */
280 for (solo_dev
->sdram_size
= 0, i
= 2; i
>= 0; i
--) {
281 solo_reg_write(solo_dev
, SOLO_DMA_CTRL
,
282 SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
283 SOLO_DMA_CTRL_SDRAM_SIZE(i
) |
284 SOLO_DMA_CTRL_SDRAM_CLK_INVERT
|
285 SOLO_DMA_CTRL_READ_CLK_SELECT
|
286 SOLO_DMA_CTRL_LATENCY(1));
288 solo_reg_write(solo_dev
, SOLO_SYS_CFG
, solo_dev
->sys_config
|
290 solo_reg_write(solo_dev
, SOLO_SYS_CFG
, solo_dev
->sys_config
);
294 if (solo_p2m_test(solo_dev
, 0x07ff0000, 0x00010000) ||
295 solo_p2m_test(solo_dev
, 0x05ff0000, 0x00010000))
300 if (solo_p2m_test(solo_dev
, 0x03ff0000, 0x00010000))
305 if (solo_p2m_test(solo_dev
, 0x01ff0000, 0x00010000))
309 solo_dev
->sdram_size
= (32 << 20) << i
;
313 if (!solo_dev
->sdram_size
) {
314 dev_err(&solo_dev
->pdev
->dev
, "Error detecting SDRAM size\n");
318 if (SOLO_SDRAM_END(solo_dev
) > solo_dev
->sdram_size
) {
319 dev_err(&solo_dev
->pdev
->dev
,
320 "SDRAM is not large enough (%u < %u)\n",
321 solo_dev
->sdram_size
, SOLO_SDRAM_END(solo_dev
));