1 // SPDX-License-Identifier: GPL-2.0+
3 // Security related flags and so on.
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
8 #include <linux/kernel.h>
9 #include <linux/debugfs.h>
10 #include <linux/device.h>
11 #include <linux/seq_buf.h>
13 #include <asm/debug.h>
14 #include <asm/asm-prototypes.h>
15 #include <asm/code-patching.h>
16 #include <asm/security_features.h>
17 #include <asm/setup.h>
20 unsigned long powerpc_security_features __read_mostly
= SEC_FTR_DEFAULT
;
22 enum count_cache_flush_type
{
23 COUNT_CACHE_FLUSH_NONE
= 0x1,
24 COUNT_CACHE_FLUSH_SW
= 0x2,
25 COUNT_CACHE_FLUSH_HW
= 0x4,
27 static enum count_cache_flush_type count_cache_flush_type
= COUNT_CACHE_FLUSH_NONE
;
28 static bool link_stack_flush_enabled
;
30 bool barrier_nospec_enabled
;
31 static bool no_nospec
;
32 static bool btb_flush_enabled
;
33 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
34 static bool no_spectrev2
;
37 static void enable_barrier_nospec(bool enable
)
39 barrier_nospec_enabled
= enable
;
40 do_barrier_nospec_fixups(enable
);
43 void setup_barrier_nospec(void)
48 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
49 * But there's a good reason not to. The two flags we check below are
50 * both are enabled by default in the kernel, so if the hcall is not
51 * functional they will be enabled.
52 * On a system where the host firmware has been updated (so the ori
53 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
54 * not been updated, we would like to enable the barrier. Dropping the
55 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
56 * we potentially enable the barrier on systems where the host firmware
57 * is not updated, but that's harmless as it's a no-op.
59 enable
= security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY
) &&
60 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR
);
63 enable_barrier_nospec(enable
);
66 static int __init
handle_nospectre_v1(char *p
)
72 early_param("nospectre_v1", handle_nospectre_v1
);
74 #ifdef CONFIG_DEBUG_FS
75 static int barrier_nospec_set(void *data
, u64 val
)
85 if (!!val
== !!barrier_nospec_enabled
)
88 enable_barrier_nospec(!!val
);
93 static int barrier_nospec_get(void *data
, u64
*val
)
95 *val
= barrier_nospec_enabled
? 1 : 0;
99 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec
,
100 barrier_nospec_get
, barrier_nospec_set
, "%llu\n");
102 static __init
int barrier_nospec_debugfs_init(void)
104 debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root
, NULL
,
105 &fops_barrier_nospec
);
108 device_initcall(barrier_nospec_debugfs_init
);
109 #endif /* CONFIG_DEBUG_FS */
111 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
112 static int __init
handle_nospectre_v2(char *p
)
118 early_param("nospectre_v2", handle_nospectre_v2
);
119 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
121 #ifdef CONFIG_PPC_FSL_BOOK3E
122 void setup_spectre_v2(void)
125 do_btb_flush_fixups();
127 btb_flush_enabled
= true;
129 #endif /* CONFIG_PPC_FSL_BOOK3E */
131 #ifdef CONFIG_PPC_BOOK3S_64
132 ssize_t
cpu_show_meltdown(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
136 thread_priv
= security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV
);
138 if (rfi_flush
|| thread_priv
) {
140 seq_buf_init(&s
, buf
, PAGE_SIZE
- 1);
142 seq_buf_printf(&s
, "Mitigation: ");
145 seq_buf_printf(&s
, "RFI Flush");
147 if (rfi_flush
&& thread_priv
)
148 seq_buf_printf(&s
, ", ");
151 seq_buf_printf(&s
, "L1D private per thread");
153 seq_buf_printf(&s
, "\n");
158 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV
) &&
159 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR
))
160 return sprintf(buf
, "Not affected\n");
162 return sprintf(buf
, "Vulnerable\n");
166 ssize_t
cpu_show_spectre_v1(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
170 seq_buf_init(&s
, buf
, PAGE_SIZE
- 1);
172 if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR
)) {
173 if (barrier_nospec_enabled
)
174 seq_buf_printf(&s
, "Mitigation: __user pointer sanitization");
176 seq_buf_printf(&s
, "Vulnerable");
178 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31
))
179 seq_buf_printf(&s
, ", ori31 speculation barrier enabled");
181 seq_buf_printf(&s
, "\n");
183 seq_buf_printf(&s
, "Not affected\n");
188 ssize_t
cpu_show_spectre_v2(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
193 seq_buf_init(&s
, buf
, PAGE_SIZE
- 1);
195 bcs
= security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED
);
196 ccd
= security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED
);
199 seq_buf_printf(&s
, "Mitigation: ");
202 seq_buf_printf(&s
, "Indirect branch serialisation (kernel only)");
205 seq_buf_printf(&s
, ", ");
208 seq_buf_printf(&s
, "Indirect branch cache disabled");
210 if (link_stack_flush_enabled
)
211 seq_buf_printf(&s
, ", Software link stack flush");
213 } else if (count_cache_flush_type
!= COUNT_CACHE_FLUSH_NONE
) {
214 seq_buf_printf(&s
, "Mitigation: Software count cache flush");
216 if (count_cache_flush_type
== COUNT_CACHE_FLUSH_HW
)
217 seq_buf_printf(&s
, " (hardware accelerated)");
219 if (link_stack_flush_enabled
)
220 seq_buf_printf(&s
, ", Software link stack flush");
222 } else if (btb_flush_enabled
) {
223 seq_buf_printf(&s
, "Mitigation: Branch predictor state flush");
225 seq_buf_printf(&s
, "Vulnerable");
228 seq_buf_printf(&s
, "\n");
233 #ifdef CONFIG_PPC_BOOK3S_64
235 * Store-forwarding barrier support.
238 static enum stf_barrier_type stf_enabled_flush_types
;
239 static bool no_stf_barrier
;
242 static int __init
handle_no_stf_barrier(char *p
)
244 pr_info("stf-barrier: disabled on command line.");
245 no_stf_barrier
= true;
249 early_param("no_stf_barrier", handle_no_stf_barrier
);
251 /* This is the generic flag used by other architectures */
252 static int __init
handle_ssbd(char *p
)
254 if (!p
|| strncmp(p
, "auto", 5) == 0 || strncmp(p
, "on", 2) == 0 ) {
255 /* Until firmware tells us, we have the barrier with auto */
257 } else if (strncmp(p
, "off", 3) == 0) {
258 handle_no_stf_barrier(NULL
);
265 early_param("spec_store_bypass_disable", handle_ssbd
);
267 /* This is the generic flag used by other architectures */
268 static int __init
handle_no_ssbd(char *p
)
270 handle_no_stf_barrier(NULL
);
273 early_param("nospec_store_bypass_disable", handle_no_ssbd
);
275 static void stf_barrier_enable(bool enable
)
278 do_stf_barrier_fixups(stf_enabled_flush_types
);
280 do_stf_barrier_fixups(STF_BARRIER_NONE
);
282 stf_barrier
= enable
;
285 void setup_stf_barrier(void)
287 enum stf_barrier_type type
;
290 hv
= cpu_has_feature(CPU_FTR_HVMODE
);
292 /* Default to fallback in case fw-features are not available */
293 if (cpu_has_feature(CPU_FTR_ARCH_207S
))
294 type
= STF_BARRIER_SYNC_ORI
;
295 else if (cpu_has_feature(CPU_FTR_ARCH_206
))
296 type
= STF_BARRIER_FALLBACK
;
298 type
= STF_BARRIER_NONE
;
300 enable
= security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY
) &&
301 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR
) ||
302 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV
) && hv
));
304 if (type
== STF_BARRIER_FALLBACK
) {
305 pr_info("stf-barrier: fallback barrier available\n");
306 } else if (type
== STF_BARRIER_SYNC_ORI
) {
307 pr_info("stf-barrier: hwsync barrier available\n");
308 } else if (type
== STF_BARRIER_EIEIO
) {
309 pr_info("stf-barrier: eieio barrier available\n");
312 stf_enabled_flush_types
= type
;
315 stf_barrier_enable(enable
);
318 ssize_t
cpu_show_spec_store_bypass(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
320 if (stf_barrier
&& stf_enabled_flush_types
!= STF_BARRIER_NONE
) {
322 switch (stf_enabled_flush_types
) {
323 case STF_BARRIER_EIEIO
:
326 case STF_BARRIER_SYNC_ORI
:
329 case STF_BARRIER_FALLBACK
:
335 return sprintf(buf
, "Mitigation: Kernel entry/exit barrier (%s)\n", type
);
338 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV
) &&
339 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR
))
340 return sprintf(buf
, "Not affected\n");
342 return sprintf(buf
, "Vulnerable\n");
345 #ifdef CONFIG_DEBUG_FS
346 static int stf_barrier_set(void *data
, u64 val
)
357 /* Only do anything if we're changing state */
358 if (enable
!= stf_barrier
)
359 stf_barrier_enable(enable
);
364 static int stf_barrier_get(void *data
, u64
*val
)
366 *val
= stf_barrier
? 1 : 0;
370 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier
, stf_barrier_get
, stf_barrier_set
, "%llu\n");
372 static __init
int stf_barrier_debugfs_init(void)
374 debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root
, NULL
, &fops_stf_barrier
);
377 device_initcall(stf_barrier_debugfs_init
);
378 #endif /* CONFIG_DEBUG_FS */
380 static void no_count_cache_flush(void)
382 count_cache_flush_type
= COUNT_CACHE_FLUSH_NONE
;
383 pr_info("count-cache-flush: software flush disabled.\n");
386 static void toggle_count_cache_flush(bool enable
)
388 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE
) &&
389 !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK
))
393 patch_instruction_site(&patch__call_flush_count_cache
, PPC_INST_NOP
);
394 pr_info("link-stack-flush: software flush disabled.\n");
395 link_stack_flush_enabled
= false;
396 no_count_cache_flush();
400 // This enables the branch from _switch to flush_count_cache
401 patch_branch_site(&patch__call_flush_count_cache
,
402 (u64
)&flush_count_cache
, BRANCH_SET_LINK
);
404 pr_info("link-stack-flush: software flush enabled.\n");
405 link_stack_flush_enabled
= true;
407 // If we just need to flush the link stack, patch an early return
408 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE
)) {
409 patch_instruction_site(&patch__flush_link_stack_return
, PPC_INST_BLR
);
410 no_count_cache_flush();
414 if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST
)) {
415 count_cache_flush_type
= COUNT_CACHE_FLUSH_SW
;
416 pr_info("count-cache-flush: full software flush sequence enabled.\n");
420 patch_instruction_site(&patch__flush_count_cache_return
, PPC_INST_BLR
);
421 count_cache_flush_type
= COUNT_CACHE_FLUSH_HW
;
422 pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
425 void setup_count_cache_flush(void)
429 if (no_spectrev2
|| cpu_mitigations_off()) {
430 if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED
) ||
431 security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED
))
432 pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
438 * There's no firmware feature flag/hypervisor bit to tell us we need to
439 * flush the link stack on context switch. So we set it here if we see
440 * either of the Spectre v2 mitigations that aim to protect userspace.
442 if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED
) ||
443 security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE
))
444 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK
);
446 toggle_count_cache_flush(enable
);
449 #ifdef CONFIG_DEBUG_FS
450 static int count_cache_flush_set(void *data
, u64 val
)
461 toggle_count_cache_flush(enable
);
466 static int count_cache_flush_get(void *data
, u64
*val
)
468 if (count_cache_flush_type
== COUNT_CACHE_FLUSH_NONE
)
476 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush
, count_cache_flush_get
,
477 count_cache_flush_set
, "%llu\n");
479 static __init
int count_cache_flush_debugfs_init(void)
481 debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root
,
482 NULL
, &fops_count_cache_flush
);
485 device_initcall(count_cache_flush_debugfs_init
);
486 #endif /* CONFIG_DEBUG_FS */
487 #endif /* CONFIG_PPC_BOOK3S_64 */