Linux 4.13.16
[linux/fpc-iii.git] / arch / xtensa / include / asm / mmu_context.h
blobf7e186dfc4e44e7694c4cce368a368d63aca13d2
1 /*
2 * Switch an MMU context.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
8 * Copyright (C) 2001 - 2013 Tensilica Inc.
9 */
11 #ifndef _XTENSA_MMU_CONTEXT_H
12 #define _XTENSA_MMU_CONTEXT_H
14 #ifndef CONFIG_MMU
15 #include <asm/nommu_context.h>
16 #else
18 #include <linux/stringify.h>
19 #include <linux/sched.h>
20 #include <linux/mm_types.h>
22 #include <asm/vectors.h>
24 #include <asm/pgtable.h>
25 #include <asm/cacheflush.h>
26 #include <asm/tlbflush.h>
27 #include <asm-generic/mm_hooks.h>
28 #include <asm-generic/percpu.h>
30 #if (XCHAL_HAVE_TLBS != 1)
31 # error "Linux must have an MMU!"
32 #endif
34 DECLARE_PER_CPU(unsigned long, asid_cache);
35 #define cpu_asid_cache(cpu) per_cpu(asid_cache, cpu)
38 * NO_CONTEXT is the invalid ASID value that we don't ever assign to
39 * any user or kernel context. We use the reserved values in the
40 * ASID_INSERT macro below.
42 * 0 invalid
43 * 1 kernel
44 * 2 reserved
45 * 3 reserved
46 * 4...255 available
49 #define NO_CONTEXT 0
50 #define ASID_USER_FIRST 4
51 #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1)
52 #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8))
54 void init_mmu(void);
56 static inline void set_rasid_register (unsigned long val)
58 __asm__ __volatile__ (" wsr %0, rasid\n\t"
59 " isync\n" : : "a" (val));
62 static inline unsigned long get_rasid_register (void)
64 unsigned long tmp;
65 __asm__ __volatile__ (" rsr %0, rasid\n\t" : "=a" (tmp));
66 return tmp;
69 static inline void get_new_mmu_context(struct mm_struct *mm, unsigned int cpu)
71 unsigned long asid = cpu_asid_cache(cpu);
72 if ((++asid & ASID_MASK) == 0) {
74 * Start new asid cycle; continue counting with next
75 * incarnation bits; skipping over 0, 1, 2, 3.
77 local_flush_tlb_all();
78 asid += ASID_USER_FIRST;
80 cpu_asid_cache(cpu) = asid;
81 mm->context.asid[cpu] = asid;
82 mm->context.cpu = cpu;
85 static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
88 * Check if our ASID is of an older version and thus invalid.
91 if (mm) {
92 unsigned long asid = mm->context.asid[cpu];
94 if (asid == NO_CONTEXT ||
95 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK))
96 get_new_mmu_context(mm, cpu);
100 static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
102 get_mmu_context(mm, cpu);
103 set_rasid_register(ASID_INSERT(mm->context.asid[cpu]));
104 invalidate_page_directory();
108 * Initialize the context related info for a new mm_struct
109 * instance. Valid cpu values are 0..(NR_CPUS-1), so initializing
110 * to -1 says the process has never run on any core.
113 static inline int init_new_context(struct task_struct *tsk,
114 struct mm_struct *mm)
116 int cpu;
117 for_each_possible_cpu(cpu) {
118 mm->context.asid[cpu] = NO_CONTEXT;
120 mm->context.cpu = -1;
121 return 0;
124 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
125 struct task_struct *tsk)
127 unsigned int cpu = smp_processor_id();
128 int migrated = next->context.cpu != cpu;
129 /* Flush the icache if we migrated to a new core. */
130 if (migrated) {
131 __invalidate_icache_all();
132 next->context.cpu = cpu;
134 if (migrated || prev != next)
135 activate_context(next, cpu);
138 #define activate_mm(prev, next) switch_mm((prev), (next), NULL)
139 #define deactivate_mm(tsk, mm) do { } while (0)
142 * Destroy context related info for an mm_struct that is about
143 * to be put to rest.
145 static inline void destroy_context(struct mm_struct *mm)
147 invalidate_page_directory();
151 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
153 /* Nothing to do. */
157 #endif /* CONFIG_MMU */
158 #endif /* _XTENSA_MMU_CONTEXT_H */