Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pwm/renesas,tpu-pwm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas R-Car Timer Pulse Unit PWM Controller
   8
   9 maintainers:
  10   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
  11
  12 properties:
  13   compatible:
  14     items:
  15       - enum:
  16           - renesas,tpu-r8a73a4   # R-Mobile APE6
  17           - renesas,tpu-r8a7740   # R-Mobile A1
  18           - renesas,tpu-r8a7743   # RZ/G1M
  19           - renesas,tpu-r8a7744   # RZ/G1N
  20           - renesas,tpu-r8a7745   # RZ/G1E
  21           - renesas,tpu-r8a7790   # R-Car H2
  22           - renesas,tpu-r8a7795   # R-Car H3
  23           - renesas,tpu-r8a7796   # R-Car M3-W
  24           - renesas,tpu-r8a77965  # R-Car M3-N
  25           - renesas,tpu-r8a77970  # R-Car V3M
  26           - renesas,tpu-r8a77980  # R-Car V3H
  27       - const: renesas,tpu
  28
  29   reg:
  30     # Base address and length of each memory resource used by the PWM
  31     # controller hardware module.
  32     maxItems: 1
  33
  34   interrupts:
  35     maxItems: 1
  36
  37   '#pwm-cells':
  38     # should be 3. See pwm.yaml in this directory for a description of
  39     # the cells format. The only third cell flag supported by this binding is
  40     # PWM_POLARITY_INVERTED.
  41     const: 3
  42
  43   clocks:
  44     maxItems: 1
  45
  46   power-domains:
  47     maxItems: 1
  48
  49   resets:
  50     maxItems: 1
  51
  52 required:
  53   - compatible
  54   - reg
  55   - '#pwm-cells'
  56
  57 additionalProperties: false
  58
  59 examples:
  60   - |
  61     #include <dt-bindings/clock/r8a7740-clock.h>
  62
  63     tpu: pwm@e6600000 {
  64         compatible = "renesas,tpu-r8a7740", "renesas,tpu";
  65         reg = <0xe6600000 0x148>;
  66         clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
  67         power-domains = <&pd_a3sp>;
  68         #pwm-cells = <3>;
  69     };