treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / ethernet / chelsio / cxgb4 / cxgb4_ethtool.c
blobc837382ee522da107650f1c1f00c74741f7dda52
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2013-2015 Chelsio Communications. All rights reserved.
4 */
6 #include <linux/firmware.h>
7 #include <linux/mdio.h>
9 #include "cxgb4.h"
10 #include "t4_regs.h"
11 #include "t4fw_api.h"
12 #include "cxgb4_cudbg.h"
14 #define EEPROM_MAGIC 0x38E2F10C
16 static u32 get_msglevel(struct net_device *dev)
18 return netdev2adap(dev)->msg_enable;
21 static void set_msglevel(struct net_device *dev, u32 val)
23 netdev2adap(dev)->msg_enable = val;
26 static const char stats_strings[][ETH_GSTRING_LEN] = {
27 "tx_octets_ok ",
28 "tx_frames_ok ",
29 "tx_broadcast_frames ",
30 "tx_multicast_frames ",
31 "tx_unicast_frames ",
32 "tx_error_frames ",
34 "tx_frames_64 ",
35 "tx_frames_65_to_127 ",
36 "tx_frames_128_to_255 ",
37 "tx_frames_256_to_511 ",
38 "tx_frames_512_to_1023 ",
39 "tx_frames_1024_to_1518 ",
40 "tx_frames_1519_to_max ",
42 "tx_frames_dropped ",
43 "tx_pause_frames ",
44 "tx_ppp0_frames ",
45 "tx_ppp1_frames ",
46 "tx_ppp2_frames ",
47 "tx_ppp3_frames ",
48 "tx_ppp4_frames ",
49 "tx_ppp5_frames ",
50 "tx_ppp6_frames ",
51 "tx_ppp7_frames ",
53 "rx_octets_ok ",
54 "rx_frames_ok ",
55 "rx_broadcast_frames ",
56 "rx_multicast_frames ",
57 "rx_unicast_frames ",
59 "rx_frames_too_long ",
60 "rx_jabber_errors ",
61 "rx_fcs_errors ",
62 "rx_length_errors ",
63 "rx_symbol_errors ",
64 "rx_runt_frames ",
66 "rx_frames_64 ",
67 "rx_frames_65_to_127 ",
68 "rx_frames_128_to_255 ",
69 "rx_frames_256_to_511 ",
70 "rx_frames_512_to_1023 ",
71 "rx_frames_1024_to_1518 ",
72 "rx_frames_1519_to_max ",
74 "rx_pause_frames ",
75 "rx_ppp0_frames ",
76 "rx_ppp1_frames ",
77 "rx_ppp2_frames ",
78 "rx_ppp3_frames ",
79 "rx_ppp4_frames ",
80 "rx_ppp5_frames ",
81 "rx_ppp6_frames ",
82 "rx_ppp7_frames ",
84 "rx_bg0_frames_dropped ",
85 "rx_bg1_frames_dropped ",
86 "rx_bg2_frames_dropped ",
87 "rx_bg3_frames_dropped ",
88 "rx_bg0_frames_trunc ",
89 "rx_bg1_frames_trunc ",
90 "rx_bg2_frames_trunc ",
91 "rx_bg3_frames_trunc ",
93 "tso ",
94 "uso ",
95 "tx_csum_offload ",
96 "rx_csum_good ",
97 "vlan_extractions ",
98 "vlan_insertions ",
99 "gro_packets ",
100 "gro_merged ",
103 static char adapter_stats_strings[][ETH_GSTRING_LEN] = {
104 "db_drop ",
105 "db_full ",
106 "db_empty ",
107 "write_coal_success ",
108 "write_coal_fail ",
111 static char loopback_stats_strings[][ETH_GSTRING_LEN] = {
112 "-------Loopback----------- ",
113 "octets_ok ",
114 "frames_ok ",
115 "bcast_frames ",
116 "mcast_frames ",
117 "ucast_frames ",
118 "error_frames ",
119 "frames_64 ",
120 "frames_65_to_127 ",
121 "frames_128_to_255 ",
122 "frames_256_to_511 ",
123 "frames_512_to_1023 ",
124 "frames_1024_to_1518 ",
125 "frames_1519_to_max ",
126 "frames_dropped ",
127 "bg0_frames_dropped ",
128 "bg1_frames_dropped ",
129 "bg2_frames_dropped ",
130 "bg3_frames_dropped ",
131 "bg0_frames_trunc ",
132 "bg1_frames_trunc ",
133 "bg2_frames_trunc ",
134 "bg3_frames_trunc ",
137 static const char cxgb4_priv_flags_strings[][ETH_GSTRING_LEN] = {
138 [PRIV_FLAG_PORT_TX_VM_BIT] = "port_tx_vm_wr",
141 static int get_sset_count(struct net_device *dev, int sset)
143 switch (sset) {
144 case ETH_SS_STATS:
145 return ARRAY_SIZE(stats_strings) +
146 ARRAY_SIZE(adapter_stats_strings) +
147 ARRAY_SIZE(loopback_stats_strings);
148 case ETH_SS_PRIV_FLAGS:
149 return ARRAY_SIZE(cxgb4_priv_flags_strings);
150 default:
151 return -EOPNOTSUPP;
155 static int get_regs_len(struct net_device *dev)
157 struct adapter *adap = netdev2adap(dev);
159 return t4_get_regs_len(adap);
162 static int get_eeprom_len(struct net_device *dev)
164 return EEPROMSIZE;
167 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
169 struct adapter *adapter = netdev2adap(dev);
170 u32 exprom_vers;
172 strlcpy(info->driver, cxgb4_driver_name, sizeof(info->driver));
173 strlcpy(info->version, cxgb4_driver_version,
174 sizeof(info->version));
175 strlcpy(info->bus_info, pci_name(adapter->pdev),
176 sizeof(info->bus_info));
177 info->regdump_len = get_regs_len(dev);
179 if (!adapter->params.fw_vers)
180 strcpy(info->fw_version, "N/A");
181 else
182 snprintf(info->fw_version, sizeof(info->fw_version),
183 "%u.%u.%u.%u, TP %u.%u.%u.%u",
184 FW_HDR_FW_VER_MAJOR_G(adapter->params.fw_vers),
185 FW_HDR_FW_VER_MINOR_G(adapter->params.fw_vers),
186 FW_HDR_FW_VER_MICRO_G(adapter->params.fw_vers),
187 FW_HDR_FW_VER_BUILD_G(adapter->params.fw_vers),
188 FW_HDR_FW_VER_MAJOR_G(adapter->params.tp_vers),
189 FW_HDR_FW_VER_MINOR_G(adapter->params.tp_vers),
190 FW_HDR_FW_VER_MICRO_G(adapter->params.tp_vers),
191 FW_HDR_FW_VER_BUILD_G(adapter->params.tp_vers));
193 if (!t4_get_exprom_version(adapter, &exprom_vers))
194 snprintf(info->erom_version, sizeof(info->erom_version),
195 "%u.%u.%u.%u",
196 FW_HDR_FW_VER_MAJOR_G(exprom_vers),
197 FW_HDR_FW_VER_MINOR_G(exprom_vers),
198 FW_HDR_FW_VER_MICRO_G(exprom_vers),
199 FW_HDR_FW_VER_BUILD_G(exprom_vers));
200 info->n_priv_flags = ARRAY_SIZE(cxgb4_priv_flags_strings);
203 static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
205 if (stringset == ETH_SS_STATS) {
206 memcpy(data, stats_strings, sizeof(stats_strings));
207 data += sizeof(stats_strings);
208 memcpy(data, adapter_stats_strings,
209 sizeof(adapter_stats_strings));
210 data += sizeof(adapter_stats_strings);
211 memcpy(data, loopback_stats_strings,
212 sizeof(loopback_stats_strings));
213 } else if (stringset == ETH_SS_PRIV_FLAGS) {
214 memcpy(data, cxgb4_priv_flags_strings,
215 sizeof(cxgb4_priv_flags_strings));
219 /* port stats maintained per queue of the port. They should be in the same
220 * order as in stats_strings above.
222 struct queue_port_stats {
223 u64 tso;
224 u64 uso;
225 u64 tx_csum;
226 u64 rx_csum;
227 u64 vlan_ex;
228 u64 vlan_ins;
229 u64 gro_pkts;
230 u64 gro_merged;
233 struct adapter_stats {
234 u64 db_drop;
235 u64 db_full;
236 u64 db_empty;
237 u64 wc_success;
238 u64 wc_fail;
241 static void collect_sge_port_stats(const struct adapter *adap,
242 const struct port_info *p,
243 struct queue_port_stats *s)
245 const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset];
246 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset];
247 struct sge_eohw_txq *eohw_tx;
248 unsigned int i;
250 memset(s, 0, sizeof(*s));
251 for (i = 0; i < p->nqsets; i++, rx++, tx++) {
252 s->tso += tx->tso;
253 s->uso += tx->uso;
254 s->tx_csum += tx->tx_cso;
255 s->rx_csum += rx->stats.rx_cso;
256 s->vlan_ex += rx->stats.vlan_ex;
257 s->vlan_ins += tx->vlan_ins;
258 s->gro_pkts += rx->stats.lro_pkts;
259 s->gro_merged += rx->stats.lro_merged;
262 if (adap->sge.eohw_txq) {
263 eohw_tx = &adap->sge.eohw_txq[p->first_qset];
264 for (i = 0; i < p->nqsets; i++, eohw_tx++) {
265 s->tso += eohw_tx->tso;
266 s->uso += eohw_tx->uso;
267 s->tx_csum += eohw_tx->tx_cso;
268 s->vlan_ins += eohw_tx->vlan_ins;
273 static void collect_adapter_stats(struct adapter *adap, struct adapter_stats *s)
275 u64 val1, val2;
277 memset(s, 0, sizeof(*s));
279 s->db_drop = adap->db_stats.db_drop;
280 s->db_full = adap->db_stats.db_full;
281 s->db_empty = adap->db_stats.db_empty;
283 if (!is_t4(adap->params.chip)) {
284 int v;
286 v = t4_read_reg(adap, SGE_STAT_CFG_A);
287 if (STATSOURCE_T5_G(v) == 7) {
288 val2 = t4_read_reg(adap, SGE_STAT_MATCH_A);
289 val1 = t4_read_reg(adap, SGE_STAT_TOTAL_A);
290 s->wc_success = val1 - val2;
291 s->wc_fail = val2;
296 static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
297 u64 *data)
299 struct port_info *pi = netdev_priv(dev);
300 struct adapter *adapter = pi->adapter;
301 struct lb_port_stats s;
302 int i;
303 u64 *p0;
305 t4_get_port_stats_offset(adapter, pi->tx_chan,
306 (struct port_stats *)data,
307 &pi->stats_base);
309 data += sizeof(struct port_stats) / sizeof(u64);
310 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
311 data += sizeof(struct queue_port_stats) / sizeof(u64);
312 collect_adapter_stats(adapter, (struct adapter_stats *)data);
313 data += sizeof(struct adapter_stats) / sizeof(u64);
315 *data++ = (u64)pi->port_id;
316 memset(&s, 0, sizeof(s));
317 t4_get_lb_stats(adapter, pi->port_id, &s);
319 p0 = &s.octets;
320 for (i = 0; i < ARRAY_SIZE(loopback_stats_strings) - 1; i++)
321 *data++ = (unsigned long long)*p0++;
324 static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
325 void *buf)
327 struct adapter *adap = netdev2adap(dev);
328 size_t buf_size;
330 buf_size = t4_get_regs_len(adap);
331 regs->version = mk_adap_vers(adap);
332 t4_get_regs(adap, buf, buf_size);
335 static int restart_autoneg(struct net_device *dev)
337 struct port_info *p = netdev_priv(dev);
339 if (!netif_running(dev))
340 return -EAGAIN;
341 if (p->link_cfg.autoneg != AUTONEG_ENABLE)
342 return -EINVAL;
343 t4_restart_aneg(p->adapter, p->adapter->pf, p->tx_chan);
344 return 0;
347 static int identify_port(struct net_device *dev,
348 enum ethtool_phys_id_state state)
350 unsigned int val;
351 struct adapter *adap = netdev2adap(dev);
353 if (state == ETHTOOL_ID_ACTIVE)
354 val = 0xffff;
355 else if (state == ETHTOOL_ID_INACTIVE)
356 val = 0;
357 else
358 return -EINVAL;
360 return t4_identify_port(adap, adap->pf, netdev2pinfo(dev)->viid, val);
364 * from_fw_port_mod_type - translate Firmware Port/Module type to Ethtool
365 * @port_type: Firmware Port Type
366 * @mod_type: Firmware Module Type
368 * Translate Firmware Port/Module type to Ethtool Port Type.
370 static int from_fw_port_mod_type(enum fw_port_type port_type,
371 enum fw_port_module_type mod_type)
373 if (port_type == FW_PORT_TYPE_BT_SGMII ||
374 port_type == FW_PORT_TYPE_BT_XFI ||
375 port_type == FW_PORT_TYPE_BT_XAUI) {
376 return PORT_TP;
377 } else if (port_type == FW_PORT_TYPE_FIBER_XFI ||
378 port_type == FW_PORT_TYPE_FIBER_XAUI) {
379 return PORT_FIBRE;
380 } else if (port_type == FW_PORT_TYPE_SFP ||
381 port_type == FW_PORT_TYPE_QSFP_10G ||
382 port_type == FW_PORT_TYPE_QSA ||
383 port_type == FW_PORT_TYPE_QSFP ||
384 port_type == FW_PORT_TYPE_CR4_QSFP ||
385 port_type == FW_PORT_TYPE_CR_QSFP ||
386 port_type == FW_PORT_TYPE_CR2_QSFP ||
387 port_type == FW_PORT_TYPE_SFP28) {
388 if (mod_type == FW_PORT_MOD_TYPE_LR ||
389 mod_type == FW_PORT_MOD_TYPE_SR ||
390 mod_type == FW_PORT_MOD_TYPE_ER ||
391 mod_type == FW_PORT_MOD_TYPE_LRM)
392 return PORT_FIBRE;
393 else if (mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE ||
394 mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE)
395 return PORT_DA;
396 else
397 return PORT_OTHER;
398 } else if (port_type == FW_PORT_TYPE_KR4_100G ||
399 port_type == FW_PORT_TYPE_KR_SFP28 ||
400 port_type == FW_PORT_TYPE_KR_XLAUI) {
401 return PORT_NONE;
404 return PORT_OTHER;
408 * speed_to_fw_caps - translate Port Speed to Firmware Port Capabilities
409 * @speed: speed in Kb/s
411 * Translates a specific Port Speed into a Firmware Port Capabilities
412 * value.
414 static unsigned int speed_to_fw_caps(int speed)
416 if (speed == 100)
417 return FW_PORT_CAP32_SPEED_100M;
418 if (speed == 1000)
419 return FW_PORT_CAP32_SPEED_1G;
420 if (speed == 10000)
421 return FW_PORT_CAP32_SPEED_10G;
422 if (speed == 25000)
423 return FW_PORT_CAP32_SPEED_25G;
424 if (speed == 40000)
425 return FW_PORT_CAP32_SPEED_40G;
426 if (speed == 50000)
427 return FW_PORT_CAP32_SPEED_50G;
428 if (speed == 100000)
429 return FW_PORT_CAP32_SPEED_100G;
430 if (speed == 200000)
431 return FW_PORT_CAP32_SPEED_200G;
432 if (speed == 400000)
433 return FW_PORT_CAP32_SPEED_400G;
434 return 0;
438 * fw_caps_to_lmm - translate Firmware to ethtool Link Mode Mask
439 * @port_type: Firmware Port Type
440 * @fw_caps: Firmware Port Capabilities
441 * @link_mode_mask: ethtool Link Mode Mask
443 * Translate a Firmware Port Capabilities specification to an ethtool
444 * Link Mode Mask.
446 static void fw_caps_to_lmm(enum fw_port_type port_type,
447 fw_port_cap32_t fw_caps,
448 unsigned long *link_mode_mask)
450 #define SET_LMM(__lmm_name) \
451 do { \
452 __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
453 link_mode_mask); \
454 } while (0)
456 #define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \
457 do { \
458 if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \
459 SET_LMM(__lmm_name); \
460 } while (0)
462 switch (port_type) {
463 case FW_PORT_TYPE_BT_SGMII:
464 case FW_PORT_TYPE_BT_XFI:
465 case FW_PORT_TYPE_BT_XAUI:
466 SET_LMM(TP);
467 FW_CAPS_TO_LMM(SPEED_100M, 100baseT_Full);
468 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
469 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
470 break;
472 case FW_PORT_TYPE_KX4:
473 case FW_PORT_TYPE_KX:
474 SET_LMM(Backplane);
475 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
476 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
477 break;
479 case FW_PORT_TYPE_KR:
480 SET_LMM(Backplane);
481 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
482 break;
484 case FW_PORT_TYPE_BP_AP:
485 SET_LMM(Backplane);
486 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
487 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
488 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
489 break;
491 case FW_PORT_TYPE_BP4_AP:
492 SET_LMM(Backplane);
493 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
494 FW_CAPS_TO_LMM(SPEED_10G, 10000baseR_FEC);
495 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
496 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKX4_Full);
497 break;
499 case FW_PORT_TYPE_FIBER_XFI:
500 case FW_PORT_TYPE_FIBER_XAUI:
501 case FW_PORT_TYPE_SFP:
502 case FW_PORT_TYPE_QSFP_10G:
503 case FW_PORT_TYPE_QSA:
504 SET_LMM(FIBRE);
505 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
506 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
507 break;
509 case FW_PORT_TYPE_BP40_BA:
510 case FW_PORT_TYPE_QSFP:
511 SET_LMM(FIBRE);
512 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
513 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
514 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
515 break;
517 case FW_PORT_TYPE_CR_QSFP:
518 case FW_PORT_TYPE_SFP28:
519 SET_LMM(FIBRE);
520 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
521 FW_CAPS_TO_LMM(SPEED_10G, 10000baseT_Full);
522 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
523 break;
525 case FW_PORT_TYPE_KR_SFP28:
526 SET_LMM(Backplane);
527 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
528 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
529 FW_CAPS_TO_LMM(SPEED_25G, 25000baseKR_Full);
530 break;
532 case FW_PORT_TYPE_KR_XLAUI:
533 SET_LMM(Backplane);
534 FW_CAPS_TO_LMM(SPEED_1G, 1000baseKX_Full);
535 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
536 FW_CAPS_TO_LMM(SPEED_40G, 40000baseKR4_Full);
537 break;
539 case FW_PORT_TYPE_CR2_QSFP:
540 SET_LMM(FIBRE);
541 FW_CAPS_TO_LMM(SPEED_50G, 50000baseSR2_Full);
542 break;
544 case FW_PORT_TYPE_KR4_100G:
545 case FW_PORT_TYPE_CR4_QSFP:
546 SET_LMM(FIBRE);
547 FW_CAPS_TO_LMM(SPEED_1G, 1000baseT_Full);
548 FW_CAPS_TO_LMM(SPEED_10G, 10000baseKR_Full);
549 FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);
550 FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);
551 FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full);
552 FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full);
553 break;
555 default:
556 break;
559 if (fw_caps & FW_PORT_CAP32_FEC_V(FW_PORT_CAP32_FEC_M)) {
560 FW_CAPS_TO_LMM(FEC_RS, FEC_RS);
561 FW_CAPS_TO_LMM(FEC_BASER_RS, FEC_BASER);
562 } else {
563 SET_LMM(FEC_NONE);
566 FW_CAPS_TO_LMM(ANEG, Autoneg);
567 FW_CAPS_TO_LMM(802_3_PAUSE, Pause);
568 FW_CAPS_TO_LMM(802_3_ASM_DIR, Asym_Pause);
570 #undef FW_CAPS_TO_LMM
571 #undef SET_LMM
575 * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware
576 * capabilities
577 * @et_lmm: ethtool Link Mode Mask
579 * Translate ethtool Link Mode Mask into a Firmware Port capabilities
580 * value.
582 static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask)
584 unsigned int fw_caps = 0;
586 #define LMM_TO_FW_CAPS(__lmm_name, __fw_name) \
587 do { \
588 if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \
589 link_mode_mask)) \
590 fw_caps |= FW_PORT_CAP32_ ## __fw_name; \
591 } while (0)
593 LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M);
594 LMM_TO_FW_CAPS(1000baseT_Full, SPEED_1G);
595 LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G);
596 LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G);
597 LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G);
598 LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G);
599 LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G);
601 #undef LMM_TO_FW_CAPS
603 return fw_caps;
606 static int get_link_ksettings(struct net_device *dev,
607 struct ethtool_link_ksettings *link_ksettings)
609 struct port_info *pi = netdev_priv(dev);
610 struct ethtool_link_settings *base = &link_ksettings->base;
612 /* For the nonce, the Firmware doesn't send up Port State changes
613 * when the Virtual Interface attached to the Port is down. So
614 * if it's down, let's grab any changes.
616 if (!netif_running(dev))
617 (void)t4_update_port_info(pi);
619 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
620 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
621 ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);
623 base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type);
625 if (pi->mdio_addr >= 0) {
626 base->phy_address = pi->mdio_addr;
627 base->mdio_support = (pi->port_type == FW_PORT_TYPE_BT_SGMII
628 ? ETH_MDIO_SUPPORTS_C22
629 : ETH_MDIO_SUPPORTS_C45);
630 } else {
631 base->phy_address = 255;
632 base->mdio_support = 0;
635 fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps,
636 link_ksettings->link_modes.supported);
637 fw_caps_to_lmm(pi->port_type,
638 t4_link_acaps(pi->adapter,
639 pi->lport,
640 &pi->link_cfg),
641 link_ksettings->link_modes.advertising);
642 fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps,
643 link_ksettings->link_modes.lp_advertising);
645 base->speed = (netif_carrier_ok(dev)
646 ? pi->link_cfg.speed
647 : SPEED_UNKNOWN);
648 base->duplex = DUPLEX_FULL;
650 base->autoneg = pi->link_cfg.autoneg;
651 if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG)
652 ethtool_link_ksettings_add_link_mode(link_ksettings,
653 supported, Autoneg);
654 if (pi->link_cfg.autoneg)
655 ethtool_link_ksettings_add_link_mode(link_ksettings,
656 advertising, Autoneg);
658 return 0;
661 static int set_link_ksettings(struct net_device *dev,
662 const struct ethtool_link_ksettings *link_ksettings)
664 struct port_info *pi = netdev_priv(dev);
665 struct link_config *lc = &pi->link_cfg;
666 const struct ethtool_link_settings *base = &link_ksettings->base;
667 struct link_config old_lc;
668 unsigned int fw_caps;
669 int ret = 0;
671 /* only full-duplex supported */
672 if (base->duplex != DUPLEX_FULL)
673 return -EINVAL;
675 old_lc = *lc;
676 if (!(lc->pcaps & FW_PORT_CAP32_ANEG) ||
677 base->autoneg == AUTONEG_DISABLE) {
678 fw_caps = speed_to_fw_caps(base->speed);
680 /* Speed must be supported by Physical Port Capabilities. */
681 if (!(lc->pcaps & fw_caps))
682 return -EINVAL;
684 lc->speed_caps = fw_caps;
685 lc->acaps = fw_caps;
686 } else {
687 fw_caps =
688 lmm_to_fw_caps(link_ksettings->link_modes.advertising);
689 if (!(lc->pcaps & fw_caps))
690 return -EINVAL;
691 lc->speed_caps = 0;
692 lc->acaps = fw_caps | FW_PORT_CAP32_ANEG;
694 lc->autoneg = base->autoneg;
696 /* If the firmware rejects the Link Configuration request, back out
697 * the changes and report the error.
699 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox, pi->tx_chan, lc);
700 if (ret)
701 *lc = old_lc;
703 return ret;
706 /* Translate the Firmware FEC value into the ethtool value. */
707 static inline unsigned int fwcap_to_eth_fec(unsigned int fw_fec)
709 unsigned int eth_fec = 0;
711 if (fw_fec & FW_PORT_CAP32_FEC_RS)
712 eth_fec |= ETHTOOL_FEC_RS;
713 if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)
714 eth_fec |= ETHTOOL_FEC_BASER;
716 /* if nothing is set, then FEC is off */
717 if (!eth_fec)
718 eth_fec = ETHTOOL_FEC_OFF;
720 return eth_fec;
723 /* Translate Common Code FEC value into ethtool value. */
724 static inline unsigned int cc_to_eth_fec(unsigned int cc_fec)
726 unsigned int eth_fec = 0;
728 if (cc_fec & FEC_AUTO)
729 eth_fec |= ETHTOOL_FEC_AUTO;
730 if (cc_fec & FEC_RS)
731 eth_fec |= ETHTOOL_FEC_RS;
732 if (cc_fec & FEC_BASER_RS)
733 eth_fec |= ETHTOOL_FEC_BASER;
735 /* if nothing is set, then FEC is off */
736 if (!eth_fec)
737 eth_fec = ETHTOOL_FEC_OFF;
739 return eth_fec;
742 /* Translate ethtool FEC value into Common Code value. */
743 static inline unsigned int eth_to_cc_fec(unsigned int eth_fec)
745 unsigned int cc_fec = 0;
747 if (eth_fec & ETHTOOL_FEC_OFF)
748 return cc_fec;
750 if (eth_fec & ETHTOOL_FEC_AUTO)
751 cc_fec |= FEC_AUTO;
752 if (eth_fec & ETHTOOL_FEC_RS)
753 cc_fec |= FEC_RS;
754 if (eth_fec & ETHTOOL_FEC_BASER)
755 cc_fec |= FEC_BASER_RS;
757 return cc_fec;
760 static int get_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
762 const struct port_info *pi = netdev_priv(dev);
763 const struct link_config *lc = &pi->link_cfg;
765 /* Translate the Firmware FEC Support into the ethtool value. We
766 * always support IEEE 802.3 "automatic" selection of Link FEC type if
767 * any FEC is supported.
769 fec->fec = fwcap_to_eth_fec(lc->pcaps);
770 if (fec->fec != ETHTOOL_FEC_OFF)
771 fec->fec |= ETHTOOL_FEC_AUTO;
773 /* Translate the current internal FEC parameters into the
774 * ethtool values.
776 fec->active_fec = cc_to_eth_fec(lc->fec);
778 return 0;
781 static int set_fecparam(struct net_device *dev, struct ethtool_fecparam *fec)
783 struct port_info *pi = netdev_priv(dev);
784 struct link_config *lc = &pi->link_cfg;
785 struct link_config old_lc;
786 int ret;
788 /* Save old Link Configuration in case the L1 Configure below
789 * fails.
791 old_lc = *lc;
793 /* Try to perform the L1 Configure and return the result of that
794 * effort. If it fails, revert the attempted change.
796 lc->requested_fec = eth_to_cc_fec(fec->fec);
797 ret = t4_link_l1cfg(pi->adapter, pi->adapter->mbox,
798 pi->tx_chan, lc);
799 if (ret)
800 *lc = old_lc;
801 return ret;
804 static void get_pauseparam(struct net_device *dev,
805 struct ethtool_pauseparam *epause)
807 struct port_info *p = netdev_priv(dev);
809 epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
810 epause->rx_pause = (p->link_cfg.advertised_fc & PAUSE_RX) != 0;
811 epause->tx_pause = (p->link_cfg.advertised_fc & PAUSE_TX) != 0;
814 static int set_pauseparam(struct net_device *dev,
815 struct ethtool_pauseparam *epause)
817 struct port_info *p = netdev_priv(dev);
818 struct link_config *lc = &p->link_cfg;
820 if (epause->autoneg == AUTONEG_DISABLE)
821 lc->requested_fc = 0;
822 else if (lc->pcaps & FW_PORT_CAP32_ANEG)
823 lc->requested_fc = PAUSE_AUTONEG;
824 else
825 return -EINVAL;
827 if (epause->rx_pause)
828 lc->requested_fc |= PAUSE_RX;
829 if (epause->tx_pause)
830 lc->requested_fc |= PAUSE_TX;
831 if (netif_running(dev))
832 return t4_link_l1cfg(p->adapter, p->adapter->mbox, p->tx_chan,
833 lc);
834 return 0;
837 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
839 const struct port_info *pi = netdev_priv(dev);
840 const struct sge *s = &pi->adapter->sge;
842 e->rx_max_pending = MAX_RX_BUFFERS;
843 e->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
844 e->rx_jumbo_max_pending = 0;
845 e->tx_max_pending = MAX_TXQ_ENTRIES;
847 e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8;
848 e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
849 e->rx_jumbo_pending = 0;
850 e->tx_pending = s->ethtxq[pi->first_qset].q.size;
853 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
855 int i;
856 const struct port_info *pi = netdev_priv(dev);
857 struct adapter *adapter = pi->adapter;
858 struct sge *s = &adapter->sge;
860 if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending ||
861 e->tx_pending > MAX_TXQ_ENTRIES ||
862 e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
863 e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
864 e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES)
865 return -EINVAL;
867 if (adapter->flags & CXGB4_FULL_INIT_DONE)
868 return -EBUSY;
870 for (i = 0; i < pi->nqsets; ++i) {
871 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending;
872 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8;
873 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending;
875 return 0;
879 * set_rx_intr_params - set a net devices's RX interrupt holdoff paramete!
880 * @dev: the network device
881 * @us: the hold-off time in us, or 0 to disable timer
882 * @cnt: the hold-off packet count, or 0 to disable counter
884 * Set the RX interrupt hold-off parameters for a network device.
886 static int set_rx_intr_params(struct net_device *dev,
887 unsigned int us, unsigned int cnt)
889 int i, err;
890 struct port_info *pi = netdev_priv(dev);
891 struct adapter *adap = pi->adapter;
892 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
894 for (i = 0; i < pi->nqsets; i++, q++) {
895 err = cxgb4_set_rspq_intr_params(&q->rspq, us, cnt);
896 if (err)
897 return err;
899 return 0;
902 static int set_adaptive_rx_setting(struct net_device *dev, int adaptive_rx)
904 int i;
905 struct port_info *pi = netdev_priv(dev);
906 struct adapter *adap = pi->adapter;
907 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
909 for (i = 0; i < pi->nqsets; i++, q++)
910 q->rspq.adaptive_rx = adaptive_rx;
912 return 0;
915 static int get_adaptive_rx_setting(struct net_device *dev)
917 struct port_info *pi = netdev_priv(dev);
918 struct adapter *adap = pi->adapter;
919 struct sge_eth_rxq *q = &adap->sge.ethrxq[pi->first_qset];
921 return q->rspq.adaptive_rx;
924 /* Return the current global Adapter SGE Doorbell Queue Timer Tick for all
925 * Ethernet TX Queues.
927 static int get_dbqtimer_tick(struct net_device *dev)
929 struct port_info *pi = netdev_priv(dev);
930 struct adapter *adap = pi->adapter;
932 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
933 return 0;
935 return adap->sge.dbqtimer_tick;
938 /* Return the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
939 * associated with a Network Device.
941 static int get_dbqtimer(struct net_device *dev)
943 struct port_info *pi = netdev_priv(dev);
944 struct adapter *adap = pi->adapter;
945 struct sge_eth_txq *txq;
947 txq = &adap->sge.ethtxq[pi->first_qset];
949 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
950 return 0;
952 /* all of the TX Queues use the same Timer Index */
953 return adap->sge.dbqtimer_val[txq->dbqtimerix];
956 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
957 * Queues. This is the fundamental "Tick" that sets the scale of values which
958 * can be used. Individual Ethernet TX Queues index into a relatively small
959 * array of Tick Multipliers. Changing the base Tick will thus change all of
960 * the resulting Timer Values associated with those multipliers for all
961 * Ethernet TX Queues.
963 static int set_dbqtimer_tick(struct net_device *dev, int usecs)
965 struct port_info *pi = netdev_priv(dev);
966 struct adapter *adap = pi->adapter;
967 struct sge *s = &adap->sge;
968 u32 param, val;
969 int ret;
971 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
972 return 0;
974 /* return early if it's the same Timer Tick we're already using */
975 if (s->dbqtimer_tick == usecs)
976 return 0;
978 /* attempt to set the new Timer Tick value */
979 param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
980 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DBQ_TIMERTICK));
981 val = usecs;
982 ret = t4_set_params(adap, adap->mbox, adap->pf, 0, 1, &param, &val);
983 if (ret)
984 return ret;
985 s->dbqtimer_tick = usecs;
987 /* if successful, reread resulting dependent Timer values */
988 ret = t4_read_sge_dbqtimers(adap, ARRAY_SIZE(s->dbqtimer_val),
989 s->dbqtimer_val);
990 return ret;
993 /* Set the SGE Doorbell Queue Timer Value for the Ethernet TX Queues
994 * associated with a Network Device. There is a relatively small array of
995 * possible Timer Values so we need to pick the closest value available.
997 static int set_dbqtimer(struct net_device *dev, int usecs)
999 int qix, timerix, min_timerix, delta, min_delta;
1000 struct port_info *pi = netdev_priv(dev);
1001 struct adapter *adap = pi->adapter;
1002 struct sge *s = &adap->sge;
1003 struct sge_eth_txq *txq;
1004 u32 param, val;
1005 int ret;
1007 if (!(adap->flags & CXGB4_SGE_DBQ_TIMER))
1008 return 0;
1010 /* Find the SGE Doorbell Timer Value that's closest to the requested
1011 * value.
1013 min_delta = INT_MAX;
1014 min_timerix = 0;
1015 for (timerix = 0; timerix < ARRAY_SIZE(s->dbqtimer_val); timerix++) {
1016 delta = s->dbqtimer_val[timerix] - usecs;
1017 if (delta < 0)
1018 delta = -delta;
1019 if (delta < min_delta) {
1020 min_delta = delta;
1021 min_timerix = timerix;
1025 /* Return early if it's the same Timer Index we're already using.
1026 * We use the same Timer Index for all of the TX Queues for an
1027 * interface so it's only necessary to check the first one.
1029 txq = &s->ethtxq[pi->first_qset];
1030 if (txq->dbqtimerix == min_timerix)
1031 return 0;
1033 for (qix = 0; qix < pi->nqsets; qix++, txq++) {
1034 if (adap->flags & CXGB4_FULL_INIT_DONE) {
1035 param =
1036 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DMAQ) |
1037 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DMAQ_EQ_TIMERIX) |
1038 FW_PARAMS_PARAM_YZ_V(txq->q.cntxt_id));
1039 val = min_timerix;
1040 ret = t4_set_params(adap, adap->mbox, adap->pf, 0,
1041 1, &param, &val);
1042 if (ret)
1043 return ret;
1045 txq->dbqtimerix = min_timerix;
1047 return 0;
1050 /* Set the global Adapter SGE Doorbell Queue Timer Tick for all Ethernet TX
1051 * Queues and the Timer Value for the Ethernet TX Queues associated with a
1052 * Network Device. Since changing the global Tick changes all of the
1053 * available Timer Values, we need to do this first before selecting the
1054 * resulting closest Timer Value. Moreover, since the Tick is global,
1055 * changing it affects the Timer Values for all Network Devices on the
1056 * adapter. So, before changing the Tick, we grab all of the current Timer
1057 * Values for other Network Devices on this Adapter and then attempt to select
1058 * new Timer Values which are close to the old values ...
1060 static int set_dbqtimer_tickval(struct net_device *dev,
1061 int tick_usecs, int timer_usecs)
1063 struct port_info *pi = netdev_priv(dev);
1064 struct adapter *adap = pi->adapter;
1065 int timer[MAX_NPORTS];
1066 unsigned int port;
1067 int ret;
1069 /* Grab the other adapter Network Interface current timers and fill in
1070 * the new one for this Network Interface.
1072 for_each_port(adap, port)
1073 if (port == pi->port_id)
1074 timer[port] = timer_usecs;
1075 else
1076 timer[port] = get_dbqtimer(adap->port[port]);
1078 /* Change the global Tick first ... */
1079 ret = set_dbqtimer_tick(dev, tick_usecs);
1080 if (ret)
1081 return ret;
1083 /* ... and then set all of the Network Interface Timer Values ... */
1084 for_each_port(adap, port) {
1085 ret = set_dbqtimer(adap->port[port], timer[port]);
1086 if (ret)
1087 return ret;
1090 return 0;
1093 static int set_coalesce(struct net_device *dev,
1094 struct ethtool_coalesce *coalesce)
1096 int ret;
1098 set_adaptive_rx_setting(dev, coalesce->use_adaptive_rx_coalesce);
1100 ret = set_rx_intr_params(dev, coalesce->rx_coalesce_usecs,
1101 coalesce->rx_max_coalesced_frames);
1102 if (ret)
1103 return ret;
1105 return set_dbqtimer_tickval(dev,
1106 coalesce->tx_coalesce_usecs_irq,
1107 coalesce->tx_coalesce_usecs);
1110 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1112 const struct port_info *pi = netdev_priv(dev);
1113 const struct adapter *adap = pi->adapter;
1114 const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq;
1116 c->rx_coalesce_usecs = qtimer_val(adap, rq);
1117 c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN_F) ?
1118 adap->sge.counter_val[rq->pktcnt_idx] : 0;
1119 c->use_adaptive_rx_coalesce = get_adaptive_rx_setting(dev);
1120 c->tx_coalesce_usecs_irq = get_dbqtimer_tick(dev);
1121 c->tx_coalesce_usecs = get_dbqtimer(dev);
1122 return 0;
1125 /* The next two routines implement eeprom read/write from physical addresses.
1127 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v)
1129 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1131 if (vaddr >= 0)
1132 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v);
1133 return vaddr < 0 ? vaddr : 0;
1136 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v)
1138 int vaddr = t4_eeprom_ptov(phys_addr, adap->pf, EEPROMPFSIZE);
1140 if (vaddr >= 0)
1141 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v);
1142 return vaddr < 0 ? vaddr : 0;
1145 #define EEPROM_MAGIC 0x38E2F10C
1147 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
1148 u8 *data)
1150 int i, err = 0;
1151 struct adapter *adapter = netdev2adap(dev);
1152 u8 *buf = kvzalloc(EEPROMSIZE, GFP_KERNEL);
1154 if (!buf)
1155 return -ENOMEM;
1157 e->magic = EEPROM_MAGIC;
1158 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
1159 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]);
1161 if (!err)
1162 memcpy(data, buf + e->offset, e->len);
1163 kvfree(buf);
1164 return err;
1167 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
1168 u8 *data)
1170 u8 *buf;
1171 int err = 0;
1172 u32 aligned_offset, aligned_len, *p;
1173 struct adapter *adapter = netdev2adap(dev);
1175 if (eeprom->magic != EEPROM_MAGIC)
1176 return -EINVAL;
1178 aligned_offset = eeprom->offset & ~3;
1179 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
1181 if (adapter->pf > 0) {
1182 u32 start = 1024 + adapter->pf * EEPROMPFSIZE;
1184 if (aligned_offset < start ||
1185 aligned_offset + aligned_len > start + EEPROMPFSIZE)
1186 return -EPERM;
1189 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
1190 /* RMW possibly needed for first or last words.
1192 buf = kvzalloc(aligned_len, GFP_KERNEL);
1193 if (!buf)
1194 return -ENOMEM;
1195 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf);
1196 if (!err && aligned_len > 4)
1197 err = eeprom_rd_phys(adapter,
1198 aligned_offset + aligned_len - 4,
1199 (u32 *)&buf[aligned_len - 4]);
1200 if (err)
1201 goto out;
1202 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
1203 } else {
1204 buf = data;
1207 err = t4_seeprom_wp(adapter, false);
1208 if (err)
1209 goto out;
1211 for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
1212 err = eeprom_wr_phys(adapter, aligned_offset, *p);
1213 aligned_offset += 4;
1216 if (!err)
1217 err = t4_seeprom_wp(adapter, true);
1218 out:
1219 if (buf != data)
1220 kvfree(buf);
1221 return err;
1224 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef)
1226 int ret;
1227 const struct firmware *fw;
1228 struct adapter *adap = netdev2adap(netdev);
1229 unsigned int mbox = PCIE_FW_MASTER_M + 1;
1230 u32 pcie_fw;
1231 unsigned int master;
1232 u8 master_vld = 0;
1234 pcie_fw = t4_read_reg(adap, PCIE_FW_A);
1235 master = PCIE_FW_MASTER_G(pcie_fw);
1236 if (pcie_fw & PCIE_FW_MASTER_VLD_F)
1237 master_vld = 1;
1238 /* if csiostor is the master return */
1239 if (master_vld && (master != adap->pf)) {
1240 dev_warn(adap->pdev_dev,
1241 "cxgb4 driver needs to be loaded as MASTER to support FW flash\n");
1242 return -EOPNOTSUPP;
1245 ef->data[sizeof(ef->data) - 1] = '\0';
1246 ret = request_firmware(&fw, ef->data, adap->pdev_dev);
1247 if (ret < 0)
1248 return ret;
1250 /* If the adapter has been fully initialized then we'll go ahead and
1251 * try to get the firmware's cooperation in upgrading to the new
1252 * firmware image otherwise we'll try to do the entire job from the
1253 * host ... and we always "force" the operation in this path.
1255 if (adap->flags & CXGB4_FULL_INIT_DONE)
1256 mbox = adap->mbox;
1258 ret = t4_fw_upgrade(adap, mbox, fw->data, fw->size, 1);
1259 release_firmware(fw);
1260 if (!ret)
1261 dev_info(adap->pdev_dev,
1262 "loaded firmware %s, reload cxgb4 driver\n", ef->data);
1263 return ret;
1266 static int get_ts_info(struct net_device *dev, struct ethtool_ts_info *ts_info)
1268 struct port_info *pi = netdev_priv(dev);
1269 struct adapter *adapter = pi->adapter;
1271 ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1272 SOF_TIMESTAMPING_RX_SOFTWARE |
1273 SOF_TIMESTAMPING_SOFTWARE;
1275 ts_info->so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE |
1276 SOF_TIMESTAMPING_TX_HARDWARE |
1277 SOF_TIMESTAMPING_RAW_HARDWARE;
1279 ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1280 (1 << HWTSTAMP_TX_ON);
1282 ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1283 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1284 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1285 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1286 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1287 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1289 if (adapter->ptp_clock)
1290 ts_info->phc_index = ptp_clock_index(adapter->ptp_clock);
1291 else
1292 ts_info->phc_index = -1;
1294 return 0;
1297 static u32 get_rss_table_size(struct net_device *dev)
1299 const struct port_info *pi = netdev_priv(dev);
1301 return pi->rss_size;
1304 static int get_rss_table(struct net_device *dev, u32 *p, u8 *key, u8 *hfunc)
1306 const struct port_info *pi = netdev_priv(dev);
1307 unsigned int n = pi->rss_size;
1309 if (hfunc)
1310 *hfunc = ETH_RSS_HASH_TOP;
1311 if (!p)
1312 return 0;
1313 while (n--)
1314 p[n] = pi->rss[n];
1315 return 0;
1318 static int set_rss_table(struct net_device *dev, const u32 *p, const u8 *key,
1319 const u8 hfunc)
1321 unsigned int i;
1322 struct port_info *pi = netdev_priv(dev);
1324 /* We require at least one supported parameter to be changed and no
1325 * change in any of the unsupported parameters
1327 if (key ||
1328 (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
1329 return -EOPNOTSUPP;
1330 if (!p)
1331 return 0;
1333 /* Interface must be brought up atleast once */
1334 if (pi->adapter->flags & CXGB4_FULL_INIT_DONE) {
1335 for (i = 0; i < pi->rss_size; i++)
1336 pi->rss[i] = p[i];
1338 return cxgb4_write_rss(pi, pi->rss);
1341 return -EPERM;
1344 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1345 u32 *rules)
1347 const struct port_info *pi = netdev_priv(dev);
1349 switch (info->cmd) {
1350 case ETHTOOL_GRXFH: {
1351 unsigned int v = pi->rss_mode;
1353 info->data = 0;
1354 switch (info->flow_type) {
1355 case TCP_V4_FLOW:
1356 if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)
1357 info->data = RXH_IP_SRC | RXH_IP_DST |
1358 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1359 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1360 info->data = RXH_IP_SRC | RXH_IP_DST;
1361 break;
1362 case UDP_V4_FLOW:
1363 if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &&
1364 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1365 info->data = RXH_IP_SRC | RXH_IP_DST |
1366 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1367 else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1368 info->data = RXH_IP_SRC | RXH_IP_DST;
1369 break;
1370 case SCTP_V4_FLOW:
1371 case AH_ESP_V4_FLOW:
1372 case IPV4_FLOW:
1373 if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)
1374 info->data = RXH_IP_SRC | RXH_IP_DST;
1375 break;
1376 case TCP_V6_FLOW:
1377 if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)
1378 info->data = RXH_IP_SRC | RXH_IP_DST |
1379 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1380 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1381 info->data = RXH_IP_SRC | RXH_IP_DST;
1382 break;
1383 case UDP_V6_FLOW:
1384 if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &&
1385 (v & FW_RSS_VI_CONFIG_CMD_UDPEN_F))
1386 info->data = RXH_IP_SRC | RXH_IP_DST |
1387 RXH_L4_B_0_1 | RXH_L4_B_2_3;
1388 else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1389 info->data = RXH_IP_SRC | RXH_IP_DST;
1390 break;
1391 case SCTP_V6_FLOW:
1392 case AH_ESP_V6_FLOW:
1393 case IPV6_FLOW:
1394 if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)
1395 info->data = RXH_IP_SRC | RXH_IP_DST;
1396 break;
1398 return 0;
1400 case ETHTOOL_GRXRINGS:
1401 info->data = pi->nqsets;
1402 return 0;
1404 return -EOPNOTSUPP;
1407 static int set_dump(struct net_device *dev, struct ethtool_dump *eth_dump)
1409 struct adapter *adapter = netdev2adap(dev);
1410 u32 len = 0;
1412 len = sizeof(struct cudbg_hdr) +
1413 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1414 len += cxgb4_get_dump_length(adapter, eth_dump->flag);
1416 adapter->eth_dump.flag = eth_dump->flag;
1417 adapter->eth_dump.len = len;
1418 return 0;
1421 static int get_dump_flag(struct net_device *dev, struct ethtool_dump *eth_dump)
1423 struct adapter *adapter = netdev2adap(dev);
1425 eth_dump->flag = adapter->eth_dump.flag;
1426 eth_dump->len = adapter->eth_dump.len;
1427 eth_dump->version = adapter->eth_dump.version;
1428 return 0;
1431 static int get_dump_data(struct net_device *dev, struct ethtool_dump *eth_dump,
1432 void *buf)
1434 struct adapter *adapter = netdev2adap(dev);
1435 u32 len = 0;
1436 int ret = 0;
1438 if (adapter->eth_dump.flag == CXGB4_ETH_DUMP_NONE)
1439 return -ENOENT;
1441 len = sizeof(struct cudbg_hdr) +
1442 sizeof(struct cudbg_entity_hdr) * CUDBG_MAX_ENTITY;
1443 len += cxgb4_get_dump_length(adapter, adapter->eth_dump.flag);
1444 if (eth_dump->len < len)
1445 return -ENOMEM;
1447 ret = cxgb4_cudbg_collect(adapter, buf, &len, adapter->eth_dump.flag);
1448 if (ret)
1449 return ret;
1451 eth_dump->flag = adapter->eth_dump.flag;
1452 eth_dump->len = len;
1453 eth_dump->version = adapter->eth_dump.version;
1454 return 0;
1457 static int cxgb4_get_module_info(struct net_device *dev,
1458 struct ethtool_modinfo *modinfo)
1460 struct port_info *pi = netdev_priv(dev);
1461 u8 sff8472_comp, sff_diag_type, sff_rev;
1462 struct adapter *adapter = pi->adapter;
1463 int ret;
1465 if (!t4_is_inserted_mod_type(pi->mod_type))
1466 return -EINVAL;
1468 switch (pi->port_type) {
1469 case FW_PORT_TYPE_SFP:
1470 case FW_PORT_TYPE_QSA:
1471 case FW_PORT_TYPE_SFP28:
1472 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1473 I2C_DEV_ADDR_A0, SFF_8472_COMP_ADDR,
1474 SFF_8472_COMP_LEN, &sff8472_comp);
1475 if (ret)
1476 return ret;
1477 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1478 I2C_DEV_ADDR_A0, SFP_DIAG_TYPE_ADDR,
1479 SFP_DIAG_TYPE_LEN, &sff_diag_type);
1480 if (ret)
1481 return ret;
1483 if (!sff8472_comp || (sff_diag_type & 4)) {
1484 modinfo->type = ETH_MODULE_SFF_8079;
1485 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
1486 } else {
1487 modinfo->type = ETH_MODULE_SFF_8472;
1488 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1490 break;
1492 case FW_PORT_TYPE_QSFP:
1493 case FW_PORT_TYPE_QSFP_10G:
1494 case FW_PORT_TYPE_CR_QSFP:
1495 case FW_PORT_TYPE_CR2_QSFP:
1496 case FW_PORT_TYPE_CR4_QSFP:
1497 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1498 I2C_DEV_ADDR_A0, SFF_REV_ADDR,
1499 SFF_REV_LEN, &sff_rev);
1500 /* For QSFP type ports, revision value >= 3
1501 * means the SFP is 8636 compliant.
1503 if (ret)
1504 return ret;
1505 if (sff_rev >= 0x3) {
1506 modinfo->type = ETH_MODULE_SFF_8636;
1507 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1508 } else {
1509 modinfo->type = ETH_MODULE_SFF_8436;
1510 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1512 break;
1514 default:
1515 return -EINVAL;
1518 return 0;
1521 static int cxgb4_get_module_eeprom(struct net_device *dev,
1522 struct ethtool_eeprom *eprom, u8 *data)
1524 int ret = 0, offset = eprom->offset, len = eprom->len;
1525 struct port_info *pi = netdev_priv(dev);
1526 struct adapter *adapter = pi->adapter;
1528 memset(data, 0, eprom->len);
1529 if (offset + len <= I2C_PAGE_SIZE)
1530 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1531 I2C_DEV_ADDR_A0, offset, len, data);
1533 /* offset + len spans 0xa0 and 0xa1 pages */
1534 if (offset <= I2C_PAGE_SIZE) {
1535 /* read 0xa0 page */
1536 len = I2C_PAGE_SIZE - offset;
1537 ret = t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan,
1538 I2C_DEV_ADDR_A0, offset, len, data);
1539 if (ret)
1540 return ret;
1541 offset = I2C_PAGE_SIZE;
1542 /* Remaining bytes to be read from second page =
1543 * Total length - bytes read from first page
1545 len = eprom->len - len;
1547 /* Read additional optical diagnostics from page 0xa2 if supported */
1548 return t4_i2c_rd(adapter, adapter->mbox, pi->tx_chan, I2C_DEV_ADDR_A2,
1549 offset, len, &data[eprom->len - len]);
1552 static u32 cxgb4_get_priv_flags(struct net_device *netdev)
1554 struct port_info *pi = netdev_priv(netdev);
1555 struct adapter *adapter = pi->adapter;
1557 return (adapter->eth_flags | pi->eth_flags);
1561 * set_flags - set/unset specified flags if passed in new_flags
1562 * @cur_flags: pointer to current flags
1563 * @new_flags: new incoming flags
1564 * @flags: set of flags to set/unset
1566 static inline void set_flags(u32 *cur_flags, u32 new_flags, u32 flags)
1568 *cur_flags = (*cur_flags & ~flags) | (new_flags & flags);
1571 static int cxgb4_set_priv_flags(struct net_device *netdev, u32 flags)
1573 struct port_info *pi = netdev_priv(netdev);
1574 struct adapter *adapter = pi->adapter;
1576 set_flags(&adapter->eth_flags, flags, PRIV_FLAGS_ADAP);
1577 set_flags(&pi->eth_flags, flags, PRIV_FLAGS_PORT);
1579 return 0;
1582 static const struct ethtool_ops cxgb_ethtool_ops = {
1583 .get_link_ksettings = get_link_ksettings,
1584 .set_link_ksettings = set_link_ksettings,
1585 .get_fecparam = get_fecparam,
1586 .set_fecparam = set_fecparam,
1587 .get_drvinfo = get_drvinfo,
1588 .get_msglevel = get_msglevel,
1589 .set_msglevel = set_msglevel,
1590 .get_ringparam = get_sge_param,
1591 .set_ringparam = set_sge_param,
1592 .get_coalesce = get_coalesce,
1593 .set_coalesce = set_coalesce,
1594 .get_eeprom_len = get_eeprom_len,
1595 .get_eeprom = get_eeprom,
1596 .set_eeprom = set_eeprom,
1597 .get_pauseparam = get_pauseparam,
1598 .set_pauseparam = set_pauseparam,
1599 .get_link = ethtool_op_get_link,
1600 .get_strings = get_strings,
1601 .set_phys_id = identify_port,
1602 .nway_reset = restart_autoneg,
1603 .get_sset_count = get_sset_count,
1604 .get_ethtool_stats = get_stats,
1605 .get_regs_len = get_regs_len,
1606 .get_regs = get_regs,
1607 .get_rxnfc = get_rxnfc,
1608 .get_rxfh_indir_size = get_rss_table_size,
1609 .get_rxfh = get_rss_table,
1610 .set_rxfh = set_rss_table,
1611 .flash_device = set_flash,
1612 .get_ts_info = get_ts_info,
1613 .set_dump = set_dump,
1614 .get_dump_flag = get_dump_flag,
1615 .get_dump_data = get_dump_data,
1616 .get_module_info = cxgb4_get_module_info,
1617 .get_module_eeprom = cxgb4_get_module_eeprom,
1618 .get_priv_flags = cxgb4_get_priv_flags,
1619 .set_priv_flags = cxgb4_set_priv_flags,
1622 void cxgb4_set_ethtool_ops(struct net_device *netdev)
1624 netdev->ethtool_ops = &cxgb_ethtool_ops;