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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / ethernet / stmicro / stmmac / stmmac_ethtool.c
blobb29603ec744c4225ad5bddd4e04dbb0f8eeba4ac
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 STMMAC Ethtool support
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10
11 #include <linux/etherdevice.h>
12 #include <linux/ethtool.h>
13 #include <linux/interrupt.h>
14 #include <linux/mii.h>
15 #include <linux/phylink.h>
16 #include <linux/net_tstamp.h>
17 #include <asm/io.h>
18
19 #include "stmmac.h"
20 #include "dwmac_dma.h"
21 #include "dwxgmac2.h"
22
23 #define REG_SPACE_SIZE 0x1060
24 #define MAC100_ETHTOOL_NAME "st_mac100"
25 #define GMAC_ETHTOOL_NAME "st_gmac"
26 #define XGMAC_ETHTOOL_NAME "st_xgmac"
27
28 #define ETHTOOL_DMA_OFFSET 55
29
30 struct stmmac_stats {
31 char stat_string[ETH_GSTRING_LEN];
32 int sizeof_stat;
33 int stat_offset;
34 };
35
36 #define STMMAC_STAT(m) \
37 { #m, sizeof_field(struct stmmac_extra_stats, m), \
38 offsetof(struct stmmac_priv, xstats.m)}
39
40 static const struct stmmac_stats stmmac_gstrings_stats[] = {
41 /* Transmit errors */
42 STMMAC_STAT(tx_underflow),
43 STMMAC_STAT(tx_carrier),
44 STMMAC_STAT(tx_losscarrier),
45 STMMAC_STAT(vlan_tag),
46 STMMAC_STAT(tx_deferred),
47 STMMAC_STAT(tx_vlan),
48 STMMAC_STAT(tx_jabber),
49 STMMAC_STAT(tx_frame_flushed),
50 STMMAC_STAT(tx_payload_error),
51 STMMAC_STAT(tx_ip_header_error),
52 /* Receive errors */
53 STMMAC_STAT(rx_desc),
54 STMMAC_STAT(sa_filter_fail),
55 STMMAC_STAT(overflow_error),
56 STMMAC_STAT(ipc_csum_error),
57 STMMAC_STAT(rx_collision),
58 STMMAC_STAT(rx_crc_errors),
59 STMMAC_STAT(dribbling_bit),
60 STMMAC_STAT(rx_length),
61 STMMAC_STAT(rx_mii),
62 STMMAC_STAT(rx_multicast),
63 STMMAC_STAT(rx_gmac_overflow),
64 STMMAC_STAT(rx_watchdog),
65 STMMAC_STAT(da_rx_filter_fail),
66 STMMAC_STAT(sa_rx_filter_fail),
67 STMMAC_STAT(rx_missed_cntr),
68 STMMAC_STAT(rx_overflow_cntr),
69 STMMAC_STAT(rx_vlan),
70 STMMAC_STAT(rx_split_hdr_pkt_n),
71 /* Tx/Rx IRQ error info */
72 STMMAC_STAT(tx_undeflow_irq),
73 STMMAC_STAT(tx_process_stopped_irq),
74 STMMAC_STAT(tx_jabber_irq),
75 STMMAC_STAT(rx_overflow_irq),
76 STMMAC_STAT(rx_buf_unav_irq),
77 STMMAC_STAT(rx_process_stopped_irq),
78 STMMAC_STAT(rx_watchdog_irq),
79 STMMAC_STAT(tx_early_irq),
80 STMMAC_STAT(fatal_bus_error_irq),
81 /* Tx/Rx IRQ Events */
82 STMMAC_STAT(rx_early_irq),
83 STMMAC_STAT(threshold),
84 STMMAC_STAT(tx_pkt_n),
85 STMMAC_STAT(rx_pkt_n),
86 STMMAC_STAT(normal_irq_n),
87 STMMAC_STAT(rx_normal_irq_n),
88 STMMAC_STAT(napi_poll),
89 STMMAC_STAT(tx_normal_irq_n),
90 STMMAC_STAT(tx_clean),
91 STMMAC_STAT(tx_set_ic_bit),
92 STMMAC_STAT(irq_receive_pmt_irq_n),
93 /* MMC info */
94 STMMAC_STAT(mmc_tx_irq_n),
95 STMMAC_STAT(mmc_rx_irq_n),
96 STMMAC_STAT(mmc_rx_csum_offload_irq_n),
97 /* EEE */
98 STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
99 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
100 STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
101 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
102 STMMAC_STAT(phy_eee_wakeup_error_n),
103 /* Extended RDES status */
104 STMMAC_STAT(ip_hdr_err),
105 STMMAC_STAT(ip_payload_err),
106 STMMAC_STAT(ip_csum_bypassed),
107 STMMAC_STAT(ipv4_pkt_rcvd),
108 STMMAC_STAT(ipv6_pkt_rcvd),
109 STMMAC_STAT(no_ptp_rx_msg_type_ext),
110 STMMAC_STAT(ptp_rx_msg_type_sync),
111 STMMAC_STAT(ptp_rx_msg_type_follow_up),
112 STMMAC_STAT(ptp_rx_msg_type_delay_req),
113 STMMAC_STAT(ptp_rx_msg_type_delay_resp),
114 STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
115 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
116 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
117 STMMAC_STAT(ptp_rx_msg_type_announce),
118 STMMAC_STAT(ptp_rx_msg_type_management),
119 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
120 STMMAC_STAT(ptp_frame_type),
121 STMMAC_STAT(ptp_ver),
122 STMMAC_STAT(timestamp_dropped),
123 STMMAC_STAT(av_pkt_rcvd),
124 STMMAC_STAT(av_tagged_pkt_rcvd),
125 STMMAC_STAT(vlan_tag_priority_val),
126 STMMAC_STAT(l3_filter_match),
127 STMMAC_STAT(l4_filter_match),
128 STMMAC_STAT(l3_l4_filter_no_match),
129 /* PCS */
130 STMMAC_STAT(irq_pcs_ane_n),
131 STMMAC_STAT(irq_pcs_link_n),
132 STMMAC_STAT(irq_rgmii_n),
133 /* DEBUG */
134 STMMAC_STAT(mtl_tx_status_fifo_full),
135 STMMAC_STAT(mtl_tx_fifo_not_empty),
136 STMMAC_STAT(mmtl_fifo_ctrl),
137 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
138 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
139 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
140 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
141 STMMAC_STAT(mac_tx_in_pause),
142 STMMAC_STAT(mac_tx_frame_ctrl_xfer),
143 STMMAC_STAT(mac_tx_frame_ctrl_idle),
144 STMMAC_STAT(mac_tx_frame_ctrl_wait),
145 STMMAC_STAT(mac_tx_frame_ctrl_pause),
146 STMMAC_STAT(mac_gmii_tx_proto_engine),
147 STMMAC_STAT(mtl_rx_fifo_fill_level_full),
148 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
149 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
150 STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
151 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
152 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
153 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
154 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
155 STMMAC_STAT(mtl_rx_fifo_ctrl_active),
156 STMMAC_STAT(mac_rx_frame_ctrl_fifo),
157 STMMAC_STAT(mac_gmii_rx_proto_engine),
158 /* TSO */
159 STMMAC_STAT(tx_tso_frames),
160 STMMAC_STAT(tx_tso_nfrags),
161 };
162 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
163
164 /* HW MAC Management counters (if supported) */
165 #define STMMAC_MMC_STAT(m) \
166 { #m, sizeof_field(struct stmmac_counters, m), \
167 offsetof(struct stmmac_priv, mmc.m)}
168
169 static const struct stmmac_stats stmmac_mmc[] = {
170 STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
171 STMMAC_MMC_STAT(mmc_tx_framecount_gb),
172 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
173 STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
174 STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
175 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
176 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
177 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
178 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
179 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
180 STMMAC_MMC_STAT(mmc_tx_unicast_gb),
181 STMMAC_MMC_STAT(mmc_tx_multicast_gb),
182 STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
183 STMMAC_MMC_STAT(mmc_tx_underflow_error),
184 STMMAC_MMC_STAT(mmc_tx_singlecol_g),
185 STMMAC_MMC_STAT(mmc_tx_multicol_g),
186 STMMAC_MMC_STAT(mmc_tx_deferred),
187 STMMAC_MMC_STAT(mmc_tx_latecol),
188 STMMAC_MMC_STAT(mmc_tx_exesscol),
189 STMMAC_MMC_STAT(mmc_tx_carrier_error),
190 STMMAC_MMC_STAT(mmc_tx_octetcount_g),
191 STMMAC_MMC_STAT(mmc_tx_framecount_g),
192 STMMAC_MMC_STAT(mmc_tx_excessdef),
193 STMMAC_MMC_STAT(mmc_tx_pause_frame),
194 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
195 STMMAC_MMC_STAT(mmc_rx_framecount_gb),
196 STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
197 STMMAC_MMC_STAT(mmc_rx_octetcount_g),
198 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
199 STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
200 STMMAC_MMC_STAT(mmc_rx_crc_error),
201 STMMAC_MMC_STAT(mmc_rx_align_error),
202 STMMAC_MMC_STAT(mmc_rx_run_error),
203 STMMAC_MMC_STAT(mmc_rx_jabber_error),
204 STMMAC_MMC_STAT(mmc_rx_undersize_g),
205 STMMAC_MMC_STAT(mmc_rx_oversize_g),
206 STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
207 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
208 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
209 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
210 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
211 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
212 STMMAC_MMC_STAT(mmc_rx_unicast_g),
213 STMMAC_MMC_STAT(mmc_rx_length_error),
214 STMMAC_MMC_STAT(mmc_rx_autofrangetype),
215 STMMAC_MMC_STAT(mmc_rx_pause_frames),
216 STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
217 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
218 STMMAC_MMC_STAT(mmc_rx_watchdog_error),
219 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
220 STMMAC_MMC_STAT(mmc_rx_ipc_intr),
221 STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
222 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
223 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
224 STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
225 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
226 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
227 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
228 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
229 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
230 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
231 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
232 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
233 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
234 STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
235 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
236 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
237 STMMAC_MMC_STAT(mmc_rx_udp_gd),
238 STMMAC_MMC_STAT(mmc_rx_udp_err),
239 STMMAC_MMC_STAT(mmc_rx_tcp_gd),
240 STMMAC_MMC_STAT(mmc_rx_tcp_err),
241 STMMAC_MMC_STAT(mmc_rx_icmp_gd),
242 STMMAC_MMC_STAT(mmc_rx_icmp_err),
243 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
244 STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
245 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
246 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
247 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
248 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
249 STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
250 STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
251 STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
252 STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
253 STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
254 STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
255 };
256 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
257
258 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
259 struct ethtool_drvinfo *info)
260 {
261 struct stmmac_priv *priv = netdev_priv(dev);
262
263 if (priv->plat->has_gmac || priv->plat->has_gmac4)
264 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
265 else if (priv->plat->has_xgmac)
266 strlcpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
267 else
268 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
269 sizeof(info->driver));
270
271 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
272 }
273
274 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
275 struct ethtool_link_ksettings *cmd)
276 {
277 struct stmmac_priv *priv = netdev_priv(dev);
278
279 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
280 priv->hw->pcs & STMMAC_PCS_SGMII) {
281 struct rgmii_adv adv;
282 u32 supported, advertising, lp_advertising;
283
284 if (!priv->xstats.pcs_link) {
285 cmd->base.speed = SPEED_UNKNOWN;
286 cmd->base.duplex = DUPLEX_UNKNOWN;
287 return 0;
288 }
289 cmd->base.duplex = priv->xstats.pcs_duplex;
290
291 cmd->base.speed = priv->xstats.pcs_speed;
292
293 /* Get and convert ADV/LP_ADV from the HW AN registers */
294 if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
295 return -EOPNOTSUPP; /* should never happen indeed */
296
297 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
298
299 ethtool_convert_link_mode_to_legacy_u32(
300 &supported, cmd->link_modes.supported);
301 ethtool_convert_link_mode_to_legacy_u32(
302 &advertising, cmd->link_modes.advertising);
303 ethtool_convert_link_mode_to_legacy_u32(
304 &lp_advertising, cmd->link_modes.lp_advertising);
305
306 if (adv.pause & STMMAC_PCS_PAUSE)
307 advertising |= ADVERTISED_Pause;
308 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
309 advertising |= ADVERTISED_Asym_Pause;
310 if (adv.lp_pause & STMMAC_PCS_PAUSE)
311 lp_advertising |= ADVERTISED_Pause;
312 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
313 lp_advertising |= ADVERTISED_Asym_Pause;
314
315 /* Reg49[3] always set because ANE is always supported */
316 cmd->base.autoneg = ADVERTISED_Autoneg;
317 supported |= SUPPORTED_Autoneg;
318 advertising |= ADVERTISED_Autoneg;
319 lp_advertising |= ADVERTISED_Autoneg;
320
321 if (adv.duplex) {
322 supported |= (SUPPORTED_1000baseT_Full |
323 SUPPORTED_100baseT_Full |
324 SUPPORTED_10baseT_Full);
325 advertising |= (ADVERTISED_1000baseT_Full |
326 ADVERTISED_100baseT_Full |
327 ADVERTISED_10baseT_Full);
328 } else {
329 supported |= (SUPPORTED_1000baseT_Half |
330 SUPPORTED_100baseT_Half |
331 SUPPORTED_10baseT_Half);
332 advertising |= (ADVERTISED_1000baseT_Half |
333 ADVERTISED_100baseT_Half |
334 ADVERTISED_10baseT_Half);
335 }
336 if (adv.lp_duplex)
337 lp_advertising |= (ADVERTISED_1000baseT_Full |
338 ADVERTISED_100baseT_Full |
339 ADVERTISED_10baseT_Full);
340 else
341 lp_advertising |= (ADVERTISED_1000baseT_Half |
342 ADVERTISED_100baseT_Half |
343 ADVERTISED_10baseT_Half);
344 cmd->base.port = PORT_OTHER;
345
346 ethtool_convert_legacy_u32_to_link_mode(
347 cmd->link_modes.supported, supported);
348 ethtool_convert_legacy_u32_to_link_mode(
349 cmd->link_modes.advertising, advertising);
350 ethtool_convert_legacy_u32_to_link_mode(
351 cmd->link_modes.lp_advertising, lp_advertising);
352
353 return 0;
354 }
355
356 return phylink_ethtool_ksettings_get(priv->phylink, cmd);
357 }
358
359 static int
360 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
361 const struct ethtool_link_ksettings *cmd)
362 {
363 struct stmmac_priv *priv = netdev_priv(dev);
364
365 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
366 priv->hw->pcs & STMMAC_PCS_SGMII) {
367 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
368
369 /* Only support ANE */
370 if (cmd->base.autoneg != AUTONEG_ENABLE)
371 return -EINVAL;
372
373 mask &= (ADVERTISED_1000baseT_Half |
374 ADVERTISED_1000baseT_Full |
375 ADVERTISED_100baseT_Half |
376 ADVERTISED_100baseT_Full |
377 ADVERTISED_10baseT_Half |
378 ADVERTISED_10baseT_Full);
379
380 mutex_lock(&priv->lock);
381 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
382 mutex_unlock(&priv->lock);
383
384 return 0;
385 }
386
387 return phylink_ethtool_ksettings_set(priv->phylink, cmd);
388 }
389
390 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
391 {
392 struct stmmac_priv *priv = netdev_priv(dev);
393 return priv->msg_enable;
394 }
395
396 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
397 {
398 struct stmmac_priv *priv = netdev_priv(dev);
399 priv->msg_enable = level;
400
401 }
402
403 static int stmmac_check_if_running(struct net_device *dev)
404 {
405 if (!netif_running(dev))
406 return -EBUSY;
407 return 0;
408 }
409
410 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
411 {
412 struct stmmac_priv *priv = netdev_priv(dev);
413
414 if (priv->plat->has_xgmac)
415 return XGMAC_REGSIZE * 4;
416 return REG_SPACE_SIZE;
417 }
418
419 static void stmmac_ethtool_gregs(struct net_device *dev,
420 struct ethtool_regs *regs, void *space)
421 {
422 struct stmmac_priv *priv = netdev_priv(dev);
423 u32 *reg_space = (u32 *) space;
424
425 stmmac_dump_mac_regs(priv, priv->hw, reg_space);
426 stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
427
428 if (!priv->plat->has_xgmac) {
429 /* Copy DMA registers to where ethtool expects them */
430 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
431 &reg_space[DMA_BUS_MODE / 4],
432 NUM_DWMAC1000_DMA_REGS * 4);
433 }
434 }
435
436 static int stmmac_nway_reset(struct net_device *dev)
437 {
438 struct stmmac_priv *priv = netdev_priv(dev);
439
440 return phylink_ethtool_nway_reset(priv->phylink);
441 }
442
443 static void
444 stmmac_get_pauseparam(struct net_device *netdev,
445 struct ethtool_pauseparam *pause)
446 {
447 struct stmmac_priv *priv = netdev_priv(netdev);
448 struct rgmii_adv adv_lp;
449
450 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
451 pause->autoneg = 1;
452 if (!adv_lp.pause)
453 return;
454 } else {
455 phylink_ethtool_get_pauseparam(priv->phylink, pause);
456 }
457 }
458
459 static int
460 stmmac_set_pauseparam(struct net_device *netdev,
461 struct ethtool_pauseparam *pause)
462 {
463 struct stmmac_priv *priv = netdev_priv(netdev);
464 struct rgmii_adv adv_lp;
465
466 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
467 pause->autoneg = 1;
468 if (!adv_lp.pause)
469 return -EOPNOTSUPP;
470 return 0;
471 } else {
472 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
473 }
474 }
475
476 static void stmmac_get_ethtool_stats(struct net_device *dev,
477 struct ethtool_stats *dummy, u64 *data)
478 {
479 struct stmmac_priv *priv = netdev_priv(dev);
480 u32 rx_queues_count = priv->plat->rx_queues_to_use;
481 u32 tx_queues_count = priv->plat->tx_queues_to_use;
482 unsigned long count;
483 int i, j = 0, ret;
484
485 if (priv->dma_cap.asp) {
486 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
487 if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
488 &count, NULL))
489 data[j++] = count;
490 }
491 }
492
493 /* Update the DMA HW counters for dwmac10/100 */
494 ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
495 priv->ioaddr);
496 if (ret) {
497 /* If supported, for new GMAC chips expose the MMC counters */
498 if (priv->dma_cap.rmon) {
499 stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
500
501 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
502 char *p;
503 p = (char *)priv + stmmac_mmc[i].stat_offset;
504
505 data[j++] = (stmmac_mmc[i].sizeof_stat ==
506 sizeof(u64)) ? (*(u64 *)p) :
507 (*(u32 *)p);
508 }
509 }
510 if (priv->eee_enabled) {
511 int val = phylink_get_eee_err(priv->phylink);
512 if (val)
513 priv->xstats.phy_eee_wakeup_error_n = val;
514 }
515
516 if (priv->synopsys_id >= DWMAC_CORE_3_50)
517 stmmac_mac_debug(priv, priv->ioaddr,
518 (void *)&priv->xstats,
519 rx_queues_count, tx_queues_count);
520 }
521 for (i = 0; i < STMMAC_STATS_LEN; i++) {
522 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
523 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
524 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
525 }
526 }
527
528 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
529 {
530 struct stmmac_priv *priv = netdev_priv(netdev);
531 int i, len, safety_len = 0;
532
533 switch (sset) {
534 case ETH_SS_STATS:
535 len = STMMAC_STATS_LEN;
536
537 if (priv->dma_cap.rmon)
538 len += STMMAC_MMC_STATS_LEN;
539 if (priv->dma_cap.asp) {
540 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
541 if (!stmmac_safety_feat_dump(priv,
542 &priv->sstats, i,
543 NULL, NULL))
544 safety_len++;
545 }
546
547 len += safety_len;
548 }
549
550 return len;
551 case ETH_SS_TEST:
552 return stmmac_selftest_get_count(priv);
553 default:
554 return -EOPNOTSUPP;
555 }
556 }
557
558 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
559 {
560 int i;
561 u8 *p = data;
562 struct stmmac_priv *priv = netdev_priv(dev);
563
564 switch (stringset) {
565 case ETH_SS_STATS:
566 if (priv->dma_cap.asp) {
567 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
568 const char *desc;
569 if (!stmmac_safety_feat_dump(priv,
570 &priv->sstats, i,
571 NULL, &desc)) {
572 memcpy(p, desc, ETH_GSTRING_LEN);
573 p += ETH_GSTRING_LEN;
574 }
575 }
576 }
577 if (priv->dma_cap.rmon)
578 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
579 memcpy(p, stmmac_mmc[i].stat_string,
580 ETH_GSTRING_LEN);
581 p += ETH_GSTRING_LEN;
582 }
583 for (i = 0; i < STMMAC_STATS_LEN; i++) {
584 memcpy(p, stmmac_gstrings_stats[i].stat_string,
585 ETH_GSTRING_LEN);
586 p += ETH_GSTRING_LEN;
587 }
588 break;
589 case ETH_SS_TEST:
590 stmmac_selftest_get_strings(priv, p);
591 break;
592 default:
593 WARN_ON(1);
594 break;
595 }
596 }
597
598 /* Currently only support WOL through Magic packet. */
599 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
600 {
601 struct stmmac_priv *priv = netdev_priv(dev);
602
603 mutex_lock(&priv->lock);
604 if (device_can_wakeup(priv->device)) {
605 wol->supported = WAKE_MAGIC | WAKE_UCAST;
606 wol->wolopts = priv->wolopts;
607 }
608 mutex_unlock(&priv->lock);
609 }
610
611 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
612 {
613 struct stmmac_priv *priv = netdev_priv(dev);
614 u32 support = WAKE_MAGIC | WAKE_UCAST;
615
616 /* By default almost all GMAC devices support the WoL via
617 * magic frame but we can disable it if the HW capability
618 * register shows no support for pmt_magic_frame. */
619 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
620 wol->wolopts &= ~WAKE_MAGIC;
621
622 if (!device_can_wakeup(priv->device))
623 return -EINVAL;
624
625 if (wol->wolopts & ~support)
626 return -EINVAL;
627
628 if (wol->wolopts) {
629 pr_info("stmmac: wakeup enable\n");
630 device_set_wakeup_enable(priv->device, 1);
631 enable_irq_wake(priv->wol_irq);
632 } else {
633 device_set_wakeup_enable(priv->device, 0);
634 disable_irq_wake(priv->wol_irq);
635 }
636
637 mutex_lock(&priv->lock);
638 priv->wolopts = wol->wolopts;
639 mutex_unlock(&priv->lock);
640
641 return 0;
642 }
643
644 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
645 struct ethtool_eee *edata)
646 {
647 struct stmmac_priv *priv = netdev_priv(dev);
648
649 if (!priv->dma_cap.eee)
650 return -EOPNOTSUPP;
651
652 edata->eee_enabled = priv->eee_enabled;
653 edata->eee_active = priv->eee_active;
654 edata->tx_lpi_timer = priv->tx_lpi_timer;
655
656 return phylink_ethtool_get_eee(priv->phylink, edata);
657 }
658
659 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
660 struct ethtool_eee *edata)
661 {
662 struct stmmac_priv *priv = netdev_priv(dev);
663 int ret;
664
665 if (!edata->eee_enabled) {
666 stmmac_disable_eee_mode(priv);
667 } else {
668 /* We are asking for enabling the EEE but it is safe
669 * to verify all by invoking the eee_init function.
670 * In case of failure it will return an error.
671 */
672 edata->eee_enabled = stmmac_eee_init(priv);
673 if (!edata->eee_enabled)
674 return -EOPNOTSUPP;
675 }
676
677 ret = phylink_ethtool_set_eee(priv->phylink, edata);
678 if (ret)
679 return ret;
680
681 priv->eee_enabled = edata->eee_enabled;
682 priv->tx_lpi_timer = edata->tx_lpi_timer;
683 return 0;
684 }
685
686 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
687 {
688 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
689
690 if (!clk) {
691 clk = priv->plat->clk_ref_rate;
692 if (!clk)
693 return 0;
694 }
695
696 return (usec * (clk / 1000000)) / 256;
697 }
698
699 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
700 {
701 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
702
703 if (!clk) {
704 clk = priv->plat->clk_ref_rate;
705 if (!clk)
706 return 0;
707 }
708
709 return (riwt * 256) / (clk / 1000000);
710 }
711
712 static int stmmac_get_coalesce(struct net_device *dev,
713 struct ethtool_coalesce *ec)
714 {
715 struct stmmac_priv *priv = netdev_priv(dev);
716
717 ec->tx_coalesce_usecs = priv->tx_coal_timer;
718 ec->tx_max_coalesced_frames = priv->tx_coal_frames;
719
720 if (priv->use_riwt) {
721 ec->rx_max_coalesced_frames = priv->rx_coal_frames;
722 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
723 }
724
725 return 0;
726 }
727
728 static int stmmac_set_coalesce(struct net_device *dev,
729 struct ethtool_coalesce *ec)
730 {
731 struct stmmac_priv *priv = netdev_priv(dev);
732 u32 rx_cnt = priv->plat->rx_queues_to_use;
733 unsigned int rx_riwt;
734
735 /* Check not supported parameters */
736 if ((ec->rx_coalesce_usecs_irq) ||
737 (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
738 (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
739 (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
740 (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
741 (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
742 (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
743 (ec->rx_max_coalesced_frames_high) ||
744 (ec->tx_max_coalesced_frames_irq) ||
745 (ec->stats_block_coalesce_usecs) ||
746 (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
747 return -EOPNOTSUPP;
748
749 if (priv->use_riwt && (ec->rx_coalesce_usecs > 0)) {
750 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
751
752 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
753 return -EINVAL;
754
755 priv->rx_riwt = rx_riwt;
756 stmmac_rx_watchdog(priv, priv->ioaddr, priv->rx_riwt, rx_cnt);
757 }
758
759 if ((ec->tx_coalesce_usecs == 0) &&
760 (ec->tx_max_coalesced_frames == 0))
761 return -EINVAL;
762
763 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
764 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
765 return -EINVAL;
766
767 /* Only copy relevant parameters, ignore all others. */
768 priv->tx_coal_frames = ec->tx_max_coalesced_frames;
769 priv->tx_coal_timer = ec->tx_coalesce_usecs;
770 priv->rx_coal_frames = ec->rx_max_coalesced_frames;
771 return 0;
772 }
773
774 static int stmmac_get_rxnfc(struct net_device *dev,
775 struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
776 {
777 struct stmmac_priv *priv = netdev_priv(dev);
778
779 switch (rxnfc->cmd) {
780 case ETHTOOL_GRXRINGS:
781 rxnfc->data = priv->plat->rx_queues_to_use;
782 break;
783 default:
784 return -EOPNOTSUPP;
785 }
786
787 return 0;
788 }
789
790 static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
791 {
792 struct stmmac_priv *priv = netdev_priv(dev);
793
794 return sizeof(priv->rss.key);
795 }
796
797 static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
798 {
799 struct stmmac_priv *priv = netdev_priv(dev);
800
801 return ARRAY_SIZE(priv->rss.table);
802 }
803
804 static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
805 u8 *hfunc)
806 {
807 struct stmmac_priv *priv = netdev_priv(dev);
808 int i;
809
810 if (indir) {
811 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
812 indir[i] = priv->rss.table[i];
813 }
814
815 if (key)
816 memcpy(key, priv->rss.key, sizeof(priv->rss.key));
817 if (hfunc)
818 *hfunc = ETH_RSS_HASH_TOP;
819
820 return 0;
821 }
822
823 static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
824 const u8 *key, const u8 hfunc)
825 {
826 struct stmmac_priv *priv = netdev_priv(dev);
827 int i;
828
829 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
830 return -EOPNOTSUPP;
831
832 if (indir) {
833 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
834 priv->rss.table[i] = indir[i];
835 }
836
837 if (key)
838 memcpy(priv->rss.key, key, sizeof(priv->rss.key));
839
840 return stmmac_rss_configure(priv, priv->hw, &priv->rss,
841 priv->plat->rx_queues_to_use);
842 }
843
844 static int stmmac_get_ts_info(struct net_device *dev,
845 struct ethtool_ts_info *info)
846 {
847 struct stmmac_priv *priv = netdev_priv(dev);
848
849 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
850
851 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
852 SOF_TIMESTAMPING_TX_HARDWARE |
853 SOF_TIMESTAMPING_RX_SOFTWARE |
854 SOF_TIMESTAMPING_RX_HARDWARE |
855 SOF_TIMESTAMPING_SOFTWARE |
856 SOF_TIMESTAMPING_RAW_HARDWARE;
857
858 if (priv->ptp_clock)
859 info->phc_index = ptp_clock_index(priv->ptp_clock);
860
861 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
862
863 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
864 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
865 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
866 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
867 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
868 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
869 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
870 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
871 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
872 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
873 (1 << HWTSTAMP_FILTER_ALL));
874 return 0;
875 } else
876 return ethtool_op_get_ts_info(dev, info);
877 }
878
879 static int stmmac_get_tunable(struct net_device *dev,
880 const struct ethtool_tunable *tuna, void *data)
881 {
882 struct stmmac_priv *priv = netdev_priv(dev);
883 int ret = 0;
884
885 switch (tuna->id) {
886 case ETHTOOL_RX_COPYBREAK:
887 *(u32 *)data = priv->rx_copybreak;
888 break;
889 default:
890 ret = -EINVAL;
891 break;
892 }
893
894 return ret;
895 }
896
897 static int stmmac_set_tunable(struct net_device *dev,
898 const struct ethtool_tunable *tuna,
899 const void *data)
900 {
901 struct stmmac_priv *priv = netdev_priv(dev);
902 int ret = 0;
903
904 switch (tuna->id) {
905 case ETHTOOL_RX_COPYBREAK:
906 priv->rx_copybreak = *(u32 *)data;
907 break;
908 default:
909 ret = -EINVAL;
910 break;
911 }
912
913 return ret;
914 }
915
916 static const struct ethtool_ops stmmac_ethtool_ops = {
917 .begin = stmmac_check_if_running,
918 .get_drvinfo = stmmac_ethtool_getdrvinfo,
919 .get_msglevel = stmmac_ethtool_getmsglevel,
920 .set_msglevel = stmmac_ethtool_setmsglevel,
921 .get_regs = stmmac_ethtool_gregs,
922 .get_regs_len = stmmac_ethtool_get_regs_len,
923 .get_link = ethtool_op_get_link,
924 .nway_reset = stmmac_nway_reset,
925 .get_pauseparam = stmmac_get_pauseparam,
926 .set_pauseparam = stmmac_set_pauseparam,
927 .self_test = stmmac_selftest_run,
928 .get_ethtool_stats = stmmac_get_ethtool_stats,
929 .get_strings = stmmac_get_strings,
930 .get_wol = stmmac_get_wol,
931 .set_wol = stmmac_set_wol,
932 .get_eee = stmmac_ethtool_op_get_eee,
933 .set_eee = stmmac_ethtool_op_set_eee,
934 .get_sset_count = stmmac_get_sset_count,
935 .get_rxnfc = stmmac_get_rxnfc,
936 .get_rxfh_key_size = stmmac_get_rxfh_key_size,
937 .get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
938 .get_rxfh = stmmac_get_rxfh,
939 .set_rxfh = stmmac_set_rxfh,
940 .get_ts_info = stmmac_get_ts_info,
941 .get_coalesce = stmmac_get_coalesce,
942 .set_coalesce = stmmac_set_coalesce,
943 .get_tunable = stmmac_get_tunable,
944 .set_tunable = stmmac_set_tunable,
945 .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
946 .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
947 };
948
949 void stmmac_set_ethtool_ops(struct net_device *netdev)
950 {
951 netdev->ethtool_ops = &stmmac_ethtool_ops;
952 }
Linux with added FPC-III support