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treewide: remove redundant IS_ERR() before error code check
[linux/fpc-iii.git] / drivers / net / ethernet / tundra / tsi108_eth.c
blobc62f474b6d08eb74c159811c9ea32549845072e9
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*******************************************************************************
3
4 Copyright(c) 2006 Tundra Semiconductor Corporation.
5
6
7 *******************************************************************************/
8
9 /* This driver is based on the driver code originally developed
10 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
11 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
12 *
13 * Currently changes from original version are:
14 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
15 * - modifications to handle two ports independently and support for
16 * additional PHY devices (alexandre.bounine@tundra.com)
17 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/net.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/delay.h>
31 #include <linux/crc32.h>
32 #include <linux/mii.h>
33 #include <linux/device.h>
34 #include <linux/pci.h>
35 #include <linux/rtnetlink.h>
36 #include <linux/timer.h>
37 #include <linux/platform_device.h>
38 #include <linux/gfp.h>
39
40 #include <asm/io.h>
41 #include <asm/tsi108.h>
42
43 #include "tsi108_eth.h"
44
45 #define MII_READ_DELAY 10000 /* max link wait time in msec */
46
47 #define TSI108_RXRING_LEN 256
48
49 /* NOTE: The driver currently does not support receiving packets
50 * larger than the buffer size, so don't decrease this (unless you
51 * want to add such support).
52 */
53 #define TSI108_RXBUF_SIZE 1536
54
55 #define TSI108_TXRING_LEN 256
56
57 #define TSI108_TX_INT_FREQ 64
58
59 /* Check the phy status every half a second. */
60 #define CHECK_PHY_INTERVAL (HZ/2)
61
62 static int tsi108_init_one(struct platform_device *pdev);
63 static int tsi108_ether_remove(struct platform_device *pdev);
64
65 struct tsi108_prv_data {
66 void __iomem *regs; /* Base of normal regs */
67 void __iomem *phyregs; /* Base of register bank used for PHY access */
68
69 struct net_device *dev;
70 struct napi_struct napi;
71
72 unsigned int phy; /* Index of PHY for this interface */
73 unsigned int irq_num;
74 unsigned int id;
75 unsigned int phy_type;
76
77 struct timer_list timer;/* Timer that triggers the check phy function */
78 unsigned int rxtail; /* Next entry in rxring to read */
79 unsigned int rxhead; /* Next entry in rxring to give a new buffer */
80 unsigned int rxfree; /* Number of free, allocated RX buffers */
81
82 unsigned int rxpending; /* Non-zero if there are still descriptors
83 * to be processed from a previous descriptor
84 * interrupt condition that has been cleared */
85
86 unsigned int txtail; /* Next TX descriptor to check status on */
87 unsigned int txhead; /* Next TX descriptor to use */
88
89 /* Number of free TX descriptors. This could be calculated from
90 * rxhead and rxtail if one descriptor were left unused to disambiguate
91 * full and empty conditions, but it's simpler to just keep track
92 * explicitly. */
93
94 unsigned int txfree;
95
96 unsigned int phy_ok; /* The PHY is currently powered on. */
97
98 /* PHY status (duplex is 1 for half, 2 for full,
99 * so that the default 0 indicates that neither has
100 * yet been configured). */
101
102 unsigned int link_up;
103 unsigned int speed;
104 unsigned int duplex;
105
106 tx_desc *txring;
107 rx_desc *rxring;
108 struct sk_buff *txskbs[TSI108_TXRING_LEN];
109 struct sk_buff *rxskbs[TSI108_RXRING_LEN];
110
111 dma_addr_t txdma, rxdma;
112
113 /* txlock nests in misclock and phy_lock */
114
115 spinlock_t txlock, misclock;
116
117 /* stats is used to hold the upper bits of each hardware counter,
118 * and tmpstats is used to hold the full values for returning
119 * to the caller of get_stats(). They must be separate in case
120 * an overflow interrupt occurs before the stats are consumed.
121 */
122
123 struct net_device_stats stats;
124 struct net_device_stats tmpstats;
125
126 /* These stats are kept separate in hardware, thus require individual
127 * fields for handling carry. They are combined in get_stats.
128 */
129
130 unsigned long rx_fcs; /* Add to rx_frame_errors */
131 unsigned long rx_short_fcs; /* Add to rx_frame_errors */
132 unsigned long rx_long_fcs; /* Add to rx_frame_errors */
133 unsigned long rx_underruns; /* Add to rx_length_errors */
134 unsigned long rx_overruns; /* Add to rx_length_errors */
135
136 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
137 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
138
139 unsigned long mc_hash[16];
140 u32 msg_enable; /* debug message level */
141 struct mii_if_info mii_if;
142 unsigned int init_media;
143
144 struct platform_device *pdev;
145 };
146
147 /* Structure for a device driver */
148
149 static struct platform_driver tsi_eth_driver = {
150 .probe = tsi108_init_one,
151 .remove = tsi108_ether_remove,
152 .driver = {
153 .name = "tsi-ethernet",
154 },
155 };
156
157 static void tsi108_timed_checker(struct timer_list *t);
158
159 #ifdef DEBUG
160 static void dump_eth_one(struct net_device *dev)
161 {
162 struct tsi108_prv_data *data = netdev_priv(dev);
163
164 printk("Dumping %s...\n", dev->name);
165 printk("intstat %x intmask %x phy_ok %d"
166 " link %d speed %d duplex %d\n",
167 TSI_READ(TSI108_EC_INTSTAT),
168 TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
169 data->link_up, data->speed, data->duplex);
170
171 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
172 data->txhead, data->txtail, data->txfree,
173 TSI_READ(TSI108_EC_TXSTAT),
174 TSI_READ(TSI108_EC_TXESTAT),
175 TSI_READ(TSI108_EC_TXERR));
176
177 printk("RX: head %d, tail %d, free %d, stat %x,"
178 " estat %x, err %x, pending %d\n\n",
179 data->rxhead, data->rxtail, data->rxfree,
180 TSI_READ(TSI108_EC_RXSTAT),
181 TSI_READ(TSI108_EC_RXESTAT),
182 TSI_READ(TSI108_EC_RXERR), data->rxpending);
183 }
184 #endif
185
186 /* Synchronization is needed between the thread and up/down events.
187 * Note that the PHY is accessed through the same registers for both
188 * interfaces, so this can't be made interface-specific.
189 */
190
191 static DEFINE_SPINLOCK(phy_lock);
192
193 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
194 {
195 unsigned i;
196
197 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
198 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
199 (reg << TSI108_MAC_MII_ADDR_REG));
200 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
201 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
202 for (i = 0; i < 100; i++) {
203 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
204 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
205 break;
206 udelay(10);
207 }
208
209 if (i == 100)
210 return 0xffff;
211 else
212 return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
213 }
214
215 static void tsi108_write_mii(struct tsi108_prv_data *data,
216 int reg, u16 val)
217 {
218 unsigned i = 100;
219 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
220 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
221 (reg << TSI108_MAC_MII_ADDR_REG));
222 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
223 while (i--) {
224 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
225 TSI108_MAC_MII_IND_BUSY))
226 break;
227 udelay(10);
228 }
229 }
230
231 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
232 {
233 struct tsi108_prv_data *data = netdev_priv(dev);
234 return tsi108_read_mii(data, reg);
235 }
236
237 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
238 {
239 struct tsi108_prv_data *data = netdev_priv(dev);
240 tsi108_write_mii(data, reg, val);
241 }
242
243 static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
244 int reg, u16 val)
245 {
246 unsigned i = 1000;
247 TSI_WRITE(TSI108_MAC_MII_ADDR,
248 (0x1e << TSI108_MAC_MII_ADDR_PHY)
249 | (reg << TSI108_MAC_MII_ADDR_REG));
250 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
251 while(i--) {
252 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
253 return;
254 udelay(10);
255 }
256 printk(KERN_ERR "%s function time out\n", __func__);
257 }
258
259 static int mii_speed(struct mii_if_info *mii)
260 {
261 int advert, lpa, val, media;
262 int lpa2 = 0;
263 int speed;
264
265 if (!mii_link_ok(mii))
266 return 0;
267
268 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
269 if ((val & BMSR_ANEGCOMPLETE) == 0)
270 return 0;
271
272 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
273 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
274 media = mii_nway_result(advert & lpa);
275
276 if (mii->supports_gmii)
277 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
278
279 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
280 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
281 return speed;
282 }
283
284 static void tsi108_check_phy(struct net_device *dev)
285 {
286 struct tsi108_prv_data *data = netdev_priv(dev);
287 u32 mac_cfg2_reg, portctrl_reg;
288 u32 duplex;
289 u32 speed;
290 unsigned long flags;
291
292 spin_lock_irqsave(&phy_lock, flags);
293
294 if (!data->phy_ok)
295 goto out;
296
297 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
298 data->init_media = 0;
299
300 if (netif_carrier_ok(dev)) {
301
302 speed = mii_speed(&data->mii_if);
303
304 if ((speed != data->speed) || duplex) {
305
306 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
307 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
308
309 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
310
311 if (speed == 1000) {
312 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
313 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
314 } else {
315 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
316 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
317 }
318
319 data->speed = speed;
320
321 if (data->mii_if.full_duplex) {
322 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
323 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
324 data->duplex = 2;
325 } else {
326 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
327 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
328 data->duplex = 1;
329 }
330
331 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
332 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
333 }
334
335 if (data->link_up == 0) {
336 /* The manual says it can take 3-4 usecs for the speed change
337 * to take effect.
338 */
339 udelay(5);
340
341 spin_lock(&data->txlock);
342 if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
343 netif_wake_queue(dev);
344
345 data->link_up = 1;
346 spin_unlock(&data->txlock);
347 }
348 } else {
349 if (data->link_up == 1) {
350 netif_stop_queue(dev);
351 data->link_up = 0;
352 printk(KERN_NOTICE "%s : link is down\n", dev->name);
353 }
354
355 goto out;
356 }
357
358
359 out:
360 spin_unlock_irqrestore(&phy_lock, flags);
361 }
362
363 static inline void
364 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
365 unsigned long *upper)
366 {
367 if (carry & carry_bit)
368 *upper += carry_shift;
369 }
370
371 static void tsi108_stat_carry(struct net_device *dev)
372 {
373 struct tsi108_prv_data *data = netdev_priv(dev);
374 unsigned long flags;
375 u32 carry1, carry2;
376
377 spin_lock_irqsave(&data->misclock, flags);
378
379 carry1 = TSI_READ(TSI108_STAT_CARRY1);
380 carry2 = TSI_READ(TSI108_STAT_CARRY2);
381
382 TSI_WRITE(TSI108_STAT_CARRY1, carry1);
383 TSI_WRITE(TSI108_STAT_CARRY2, carry2);
384
385 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
386 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
387
388 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
389 TSI108_STAT_RXPKTS_CARRY,
390 &data->stats.rx_packets);
391
392 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
393 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
394
395 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
396 TSI108_STAT_RXMCAST_CARRY,
397 &data->stats.multicast);
398
399 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
400 TSI108_STAT_RXALIGN_CARRY,
401 &data->stats.rx_frame_errors);
402
403 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
404 TSI108_STAT_RXLENGTH_CARRY,
405 &data->stats.rx_length_errors);
406
407 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
408 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
409
410 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
411 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
412
413 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
414 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
415
416 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
417 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
418
419 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
420 TSI108_STAT_RXDROP_CARRY,
421 &data->stats.rx_missed_errors);
422
423 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
424 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
425
426 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
427 TSI108_STAT_TXPKTS_CARRY,
428 &data->stats.tx_packets);
429
430 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
431 TSI108_STAT_TXEXDEF_CARRY,
432 &data->stats.tx_aborted_errors);
433
434 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
435 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
436
437 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
438 TSI108_STAT_TXTCOL_CARRY,
439 &data->stats.collisions);
440
441 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
442 TSI108_STAT_TXPAUSEDROP_CARRY,
443 &data->tx_pause_drop);
444
445 spin_unlock_irqrestore(&data->misclock, flags);
446 }
447
448 /* Read a stat counter atomically with respect to carries.
449 * data->misclock must be held.
450 */
451 static inline unsigned long
452 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
453 int carry_shift, unsigned long *upper)
454 {
455 int carryreg;
456 unsigned long val;
457
458 if (reg < 0xb0)
459 carryreg = TSI108_STAT_CARRY1;
460 else
461 carryreg = TSI108_STAT_CARRY2;
462
463 again:
464 val = TSI_READ(reg) | *upper;
465
466 /* Check to see if it overflowed, but the interrupt hasn't
467 * been serviced yet. If so, handle the carry here, and
468 * try again.
469 */
470
471 if (unlikely(TSI_READ(carryreg) & carry_bit)) {
472 *upper += carry_shift;
473 TSI_WRITE(carryreg, carry_bit);
474 goto again;
475 }
476
477 return val;
478 }
479
480 static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
481 {
482 unsigned long excol;
483
484 struct tsi108_prv_data *data = netdev_priv(dev);
485 spin_lock_irq(&data->misclock);
486
487 data->tmpstats.rx_packets =
488 tsi108_read_stat(data, TSI108_STAT_RXPKTS,
489 TSI108_STAT_CARRY1_RXPKTS,
490 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
491
492 data->tmpstats.tx_packets =
493 tsi108_read_stat(data, TSI108_STAT_TXPKTS,
494 TSI108_STAT_CARRY2_TXPKTS,
495 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
496
497 data->tmpstats.rx_bytes =
498 tsi108_read_stat(data, TSI108_STAT_RXBYTES,
499 TSI108_STAT_CARRY1_RXBYTES,
500 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
501
502 data->tmpstats.tx_bytes =
503 tsi108_read_stat(data, TSI108_STAT_TXBYTES,
504 TSI108_STAT_CARRY2_TXBYTES,
505 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
506
507 data->tmpstats.multicast =
508 tsi108_read_stat(data, TSI108_STAT_RXMCAST,
509 TSI108_STAT_CARRY1_RXMCAST,
510 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
511
512 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
513 TSI108_STAT_CARRY2_TXEXCOL,
514 TSI108_STAT_TXEXCOL_CARRY,
515 &data->tx_coll_abort);
516
517 data->tmpstats.collisions =
518 tsi108_read_stat(data, TSI108_STAT_TXTCOL,
519 TSI108_STAT_CARRY2_TXTCOL,
520 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
521
522 data->tmpstats.collisions += excol;
523
524 data->tmpstats.rx_length_errors =
525 tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
526 TSI108_STAT_CARRY1_RXLENGTH,
527 TSI108_STAT_RXLENGTH_CARRY,
528 &data->stats.rx_length_errors);
529
530 data->tmpstats.rx_length_errors +=
531 tsi108_read_stat(data, TSI108_STAT_RXRUNT,
532 TSI108_STAT_CARRY1_RXRUNT,
533 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
534
535 data->tmpstats.rx_length_errors +=
536 tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
537 TSI108_STAT_CARRY1_RXJUMBO,
538 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
539
540 data->tmpstats.rx_frame_errors =
541 tsi108_read_stat(data, TSI108_STAT_RXALIGN,
542 TSI108_STAT_CARRY1_RXALIGN,
543 TSI108_STAT_RXALIGN_CARRY,
544 &data->stats.rx_frame_errors);
545
546 data->tmpstats.rx_frame_errors +=
547 tsi108_read_stat(data, TSI108_STAT_RXFCS,
548 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
549 &data->rx_fcs);
550
551 data->tmpstats.rx_frame_errors +=
552 tsi108_read_stat(data, TSI108_STAT_RXFRAG,
553 TSI108_STAT_CARRY1_RXFRAG,
554 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
555
556 data->tmpstats.rx_missed_errors =
557 tsi108_read_stat(data, TSI108_STAT_RXDROP,
558 TSI108_STAT_CARRY1_RXDROP,
559 TSI108_STAT_RXDROP_CARRY,
560 &data->stats.rx_missed_errors);
561
562 /* These three are maintained by software. */
563 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
564 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
565
566 data->tmpstats.tx_aborted_errors =
567 tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
568 TSI108_STAT_CARRY2_TXEXDEF,
569 TSI108_STAT_TXEXDEF_CARRY,
570 &data->stats.tx_aborted_errors);
571
572 data->tmpstats.tx_aborted_errors +=
573 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
574 TSI108_STAT_CARRY2_TXPAUSE,
575 TSI108_STAT_TXPAUSEDROP_CARRY,
576 &data->tx_pause_drop);
577
578 data->tmpstats.tx_aborted_errors += excol;
579
580 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
581 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
582 data->tmpstats.rx_crc_errors +
583 data->tmpstats.rx_frame_errors +
584 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
585
586 spin_unlock_irq(&data->misclock);
587 return &data->tmpstats;
588 }
589
590 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
591 {
592 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
593 TSI108_EC_RXQ_PTRHIGH_VALID);
594
595 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
596 | TSI108_EC_RXCTRL_QUEUE0);
597 }
598
599 static void tsi108_restart_tx(struct tsi108_prv_data * data)
600 {
601 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
602 TSI108_EC_TXQ_PTRHIGH_VALID);
603
604 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
605 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
606 }
607
608 /* txlock must be held by caller, with IRQs disabled, and
609 * with permission to re-enable them when the lock is dropped.
610 */
611 static void tsi108_complete_tx(struct net_device *dev)
612 {
613 struct tsi108_prv_data *data = netdev_priv(dev);
614 int tx;
615 struct sk_buff *skb;
616 int release = 0;
617
618 while (!data->txfree || data->txhead != data->txtail) {
619 tx = data->txtail;
620
621 if (data->txring[tx].misc & TSI108_TX_OWN)
622 break;
623
624 skb = data->txskbs[tx];
625
626 if (!(data->txring[tx].misc & TSI108_TX_OK))
627 printk("%s: bad tx packet, misc %x\n",
628 dev->name, data->txring[tx].misc);
629
630 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
631 data->txfree++;
632
633 if (data->txring[tx].misc & TSI108_TX_EOF) {
634 dev_kfree_skb_any(skb);
635 release++;
636 }
637 }
638
639 if (release) {
640 if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
641 netif_wake_queue(dev);
642 }
643 }
644
645 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
646 {
647 struct tsi108_prv_data *data = netdev_priv(dev);
648 int frags = skb_shinfo(skb)->nr_frags + 1;
649 int i;
650
651 if (!data->phy_ok && net_ratelimit())
652 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
653
654 if (!data->link_up) {
655 printk(KERN_ERR "%s: Transmit while link is down!\n",
656 dev->name);
657 netif_stop_queue(dev);
658 return NETDEV_TX_BUSY;
659 }
660
661 if (data->txfree < MAX_SKB_FRAGS + 1) {
662 netif_stop_queue(dev);
663
664 if (net_ratelimit())
665 printk(KERN_ERR "%s: Transmit with full tx ring!\n",
666 dev->name);
667 return NETDEV_TX_BUSY;
668 }
669
670 if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
671 netif_stop_queue(dev);
672 }
673
674 spin_lock_irq(&data->txlock);
675
676 for (i = 0; i < frags; i++) {
677 int misc = 0;
678 int tx = data->txhead;
679
680 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
681 * the interrupt bit. TX descriptor-complete interrupts are
682 * enabled when the queue fills up, and masked when there is
683 * still free space. This way, when saturating the outbound
684 * link, the tx interrupts are kept to a reasonable level.
685 * When the queue is not full, reclamation of skbs still occurs
686 * as new packets are transmitted, or on a queue-empty
687 * interrupt.
688 */
689
690 if ((tx % TSI108_TX_INT_FREQ == 0) &&
691 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
692 misc = TSI108_TX_INT;
693
694 data->txskbs[tx] = skb;
695
696 if (i == 0) {
697 data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
698 skb->data, skb_headlen(skb),
699 DMA_TO_DEVICE);
700 data->txring[tx].len = skb_headlen(skb);
701 misc |= TSI108_TX_SOF;
702 } else {
703 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
704
705 data->txring[tx].buf0 =
706 skb_frag_dma_map(&data->pdev->dev, frag,
707 0, skb_frag_size(frag),
708 DMA_TO_DEVICE);
709 data->txring[tx].len = skb_frag_size(frag);
710 }
711
712 if (i == frags - 1)
713 misc |= TSI108_TX_EOF;
714
715 if (netif_msg_pktdata(data)) {
716 int i;
717 printk("%s: Tx Frame contents (%d)\n", dev->name,
718 skb->len);
719 for (i = 0; i < skb->len; i++)
720 printk(" %2.2x", skb->data[i]);
721 printk(".\n");
722 }
723 data->txring[tx].misc = misc | TSI108_TX_OWN;
724
725 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
726 data->txfree--;
727 }
728
729 tsi108_complete_tx(dev);
730
731 /* This must be done after the check for completed tx descriptors,
732 * so that the tail pointer is correct.
733 */
734
735 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
736 tsi108_restart_tx(data);
737
738 spin_unlock_irq(&data->txlock);
739 return NETDEV_TX_OK;
740 }
741
742 static int tsi108_complete_rx(struct net_device *dev, int budget)
743 {
744 struct tsi108_prv_data *data = netdev_priv(dev);
745 int done = 0;
746
747 while (data->rxfree && done != budget) {
748 int rx = data->rxtail;
749 struct sk_buff *skb;
750
751 if (data->rxring[rx].misc & TSI108_RX_OWN)
752 break;
753
754 skb = data->rxskbs[rx];
755 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
756 data->rxfree--;
757 done++;
758
759 if (data->rxring[rx].misc & TSI108_RX_BAD) {
760 spin_lock_irq(&data->misclock);
761
762 if (data->rxring[rx].misc & TSI108_RX_CRC)
763 data->stats.rx_crc_errors++;
764 if (data->rxring[rx].misc & TSI108_RX_OVER)
765 data->stats.rx_fifo_errors++;
766
767 spin_unlock_irq(&data->misclock);
768
769 dev_kfree_skb_any(skb);
770 continue;
771 }
772 if (netif_msg_pktdata(data)) {
773 int i;
774 printk("%s: Rx Frame contents (%d)\n",
775 dev->name, data->rxring[rx].len);
776 for (i = 0; i < data->rxring[rx].len; i++)
777 printk(" %2.2x", skb->data[i]);
778 printk(".\n");
779 }
780
781 skb_put(skb, data->rxring[rx].len);
782 skb->protocol = eth_type_trans(skb, dev);
783 netif_receive_skb(skb);
784 }
785
786 return done;
787 }
788
789 static int tsi108_refill_rx(struct net_device *dev, int budget)
790 {
791 struct tsi108_prv_data *data = netdev_priv(dev);
792 int done = 0;
793
794 while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
795 int rx = data->rxhead;
796 struct sk_buff *skb;
797
798 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
799 data->rxskbs[rx] = skb;
800 if (!skb)
801 break;
802
803 data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
804 skb->data, TSI108_RX_SKB_SIZE,
805 DMA_FROM_DEVICE);
806
807 /* Sometimes the hardware sets blen to zero after packet
808 * reception, even though the manual says that it's only ever
809 * modified by the driver.
810 */
811
812 data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
813 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
814
815 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
816 data->rxfree++;
817 done++;
818 }
819
820 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
821 TSI108_EC_RXSTAT_QUEUE0))
822 tsi108_restart_rx(data, dev);
823
824 return done;
825 }
826
827 static int tsi108_poll(struct napi_struct *napi, int budget)
828 {
829 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
830 struct net_device *dev = data->dev;
831 u32 estat = TSI_READ(TSI108_EC_RXESTAT);
832 u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
833 int num_received = 0, num_filled = 0;
834
835 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
836 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
837
838 TSI_WRITE(TSI108_EC_RXESTAT, estat);
839 TSI_WRITE(TSI108_EC_INTSTAT, intstat);
840
841 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
842 num_received = tsi108_complete_rx(dev, budget);
843
844 /* This should normally fill no more slots than the number of
845 * packets received in tsi108_complete_rx(). The exception
846 * is when we previously ran out of memory for RX SKBs. In that
847 * case, it's helpful to obey the budget, not only so that the
848 * CPU isn't hogged, but so that memory (which may still be low)
849 * is not hogged by one device.
850 *
851 * A work unit is considered to be two SKBs to allow us to catch
852 * up when the ring has shrunk due to out-of-memory but we're
853 * still removing the full budget's worth of packets each time.
854 */
855
856 if (data->rxfree < TSI108_RXRING_LEN)
857 num_filled = tsi108_refill_rx(dev, budget * 2);
858
859 if (intstat & TSI108_INT_RXERROR) {
860 u32 err = TSI_READ(TSI108_EC_RXERR);
861 TSI_WRITE(TSI108_EC_RXERR, err);
862
863 if (err) {
864 if (net_ratelimit())
865 printk(KERN_DEBUG "%s: RX error %x\n",
866 dev->name, err);
867
868 if (!(TSI_READ(TSI108_EC_RXSTAT) &
869 TSI108_EC_RXSTAT_QUEUE0))
870 tsi108_restart_rx(data, dev);
871 }
872 }
873
874 if (intstat & TSI108_INT_RXOVERRUN) {
875 spin_lock_irq(&data->misclock);
876 data->stats.rx_fifo_errors++;
877 spin_unlock_irq(&data->misclock);
878 }
879
880 if (num_received < budget) {
881 data->rxpending = 0;
882 napi_complete_done(napi, num_received);
883
884 TSI_WRITE(TSI108_EC_INTMASK,
885 TSI_READ(TSI108_EC_INTMASK)
886 & ~(TSI108_INT_RXQUEUE0
887 | TSI108_INT_RXTHRESH |
888 TSI108_INT_RXOVERRUN |
889 TSI108_INT_RXERROR |
890 TSI108_INT_RXWAIT));
891 } else {
892 data->rxpending = 1;
893 }
894
895 return num_received;
896 }
897
898 static void tsi108_rx_int(struct net_device *dev)
899 {
900 struct tsi108_prv_data *data = netdev_priv(dev);
901
902 /* A race could cause dev to already be scheduled, so it's not an
903 * error if that happens (and interrupts shouldn't be re-masked,
904 * because that can cause harmful races, if poll has already
905 * unmasked them but not cleared LINK_STATE_SCHED).
906 *
907 * This can happen if this code races with tsi108_poll(), which masks
908 * the interrupts after tsi108_irq_one() read the mask, but before
909 * napi_schedule is called. It could also happen due to calls
910 * from tsi108_check_rxring().
911 */
912
913 if (napi_schedule_prep(&data->napi)) {
914 /* Mask, rather than ack, the receive interrupts. The ack
915 * will happen in tsi108_poll().
916 */
917
918 TSI_WRITE(TSI108_EC_INTMASK,
919 TSI_READ(TSI108_EC_INTMASK) |
920 TSI108_INT_RXQUEUE0
921 | TSI108_INT_RXTHRESH |
922 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
923 TSI108_INT_RXWAIT);
924 __napi_schedule(&data->napi);
925 } else {
926 if (!netif_running(dev)) {
927 /* This can happen if an interrupt occurs while the
928 * interface is being brought down, as the START
929 * bit is cleared before the stop function is called.
930 *
931 * In this case, the interrupts must be masked, or
932 * they will continue indefinitely.
933 *
934 * There's a race here if the interface is brought down
935 * and then up in rapid succession, as the device could
936 * be made running after the above check and before
937 * the masking below. This will only happen if the IRQ
938 * thread has a lower priority than the task brining
939 * up the interface. Fixing this race would likely
940 * require changes in generic code.
941 */
942
943 TSI_WRITE(TSI108_EC_INTMASK,
944 TSI_READ
945 (TSI108_EC_INTMASK) |
946 TSI108_INT_RXQUEUE0 |
947 TSI108_INT_RXTHRESH |
948 TSI108_INT_RXOVERRUN |
949 TSI108_INT_RXERROR |
950 TSI108_INT_RXWAIT);
951 }
952 }
953 }
954
955 /* If the RX ring has run out of memory, try periodically
956 * to allocate some more, as otherwise poll would never
957 * get called (apart from the initial end-of-queue condition).
958 *
959 * This is called once per second (by default) from the thread.
960 */
961
962 static void tsi108_check_rxring(struct net_device *dev)
963 {
964 struct tsi108_prv_data *data = netdev_priv(dev);
965
966 /* A poll is scheduled, as opposed to caling tsi108_refill_rx
967 * directly, so as to keep the receive path single-threaded
968 * (and thus not needing a lock).
969 */
970
971 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
972 tsi108_rx_int(dev);
973 }
974
975 static void tsi108_tx_int(struct net_device *dev)
976 {
977 struct tsi108_prv_data *data = netdev_priv(dev);
978 u32 estat = TSI_READ(TSI108_EC_TXESTAT);
979
980 TSI_WRITE(TSI108_EC_TXESTAT, estat);
981 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
982 TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
983 if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
984 u32 err = TSI_READ(TSI108_EC_TXERR);
985 TSI_WRITE(TSI108_EC_TXERR, err);
986
987 if (err && net_ratelimit())
988 printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
989 }
990
991 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
992 spin_lock(&data->txlock);
993 tsi108_complete_tx(dev);
994 spin_unlock(&data->txlock);
995 }
996 }
997
998
999 static irqreturn_t tsi108_irq(int irq, void *dev_id)
1000 {
1001 struct net_device *dev = dev_id;
1002 struct tsi108_prv_data *data = netdev_priv(dev);
1003 u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1004
1005 if (!(stat & TSI108_INT_ANY))
1006 return IRQ_NONE; /* Not our interrupt */
1007
1008 stat &= ~TSI_READ(TSI108_EC_INTMASK);
1009
1010 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1011 TSI108_INT_TXERROR))
1012 tsi108_tx_int(dev);
1013 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1014 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1015 TSI108_INT_RXERROR))
1016 tsi108_rx_int(dev);
1017
1018 if (stat & TSI108_INT_SFN) {
1019 if (net_ratelimit())
1020 printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1021 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1022 }
1023
1024 if (stat & TSI108_INT_STATCARRY) {
1025 tsi108_stat_carry(dev);
1026 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1027 }
1028
1029 return IRQ_HANDLED;
1030 }
1031
1032 static void tsi108_stop_ethernet(struct net_device *dev)
1033 {
1034 struct tsi108_prv_data *data = netdev_priv(dev);
1035 int i = 1000;
1036 /* Disable all TX and RX queues ... */
1037 TSI_WRITE(TSI108_EC_TXCTRL, 0);
1038 TSI_WRITE(TSI108_EC_RXCTRL, 0);
1039
1040 /* ...and wait for them to become idle */
1041 while(i--) {
1042 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1043 break;
1044 udelay(10);
1045 }
1046 i = 1000;
1047 while(i--){
1048 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1049 return;
1050 udelay(10);
1051 }
1052 printk(KERN_ERR "%s function time out\n", __func__);
1053 }
1054
1055 static void tsi108_reset_ether(struct tsi108_prv_data * data)
1056 {
1057 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1058 udelay(100);
1059 TSI_WRITE(TSI108_MAC_CFG1, 0);
1060
1061 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1062 udelay(100);
1063 TSI_WRITE(TSI108_EC_PORTCTRL,
1064 TSI_READ(TSI108_EC_PORTCTRL) &
1065 ~TSI108_EC_PORTCTRL_STATRST);
1066
1067 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1068 udelay(100);
1069 TSI_WRITE(TSI108_EC_TXCFG,
1070 TSI_READ(TSI108_EC_TXCFG) &
1071 ~TSI108_EC_TXCFG_RST);
1072
1073 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1074 udelay(100);
1075 TSI_WRITE(TSI108_EC_RXCFG,
1076 TSI_READ(TSI108_EC_RXCFG) &
1077 ~TSI108_EC_RXCFG_RST);
1078
1079 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1080 TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1081 TSI108_MAC_MII_MGMT_RST);
1082 udelay(100);
1083 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1084 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1085 ~(TSI108_MAC_MII_MGMT_RST |
1086 TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1087 }
1088
1089 static int tsi108_get_mac(struct net_device *dev)
1090 {
1091 struct tsi108_prv_data *data = netdev_priv(dev);
1092 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1093 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1094
1095 /* Note that the octets are reversed from what the manual says,
1096 * producing an even weirder ordering...
1097 */
1098 if (word2 == 0 && word1 == 0) {
1099 dev->dev_addr[0] = 0x00;
1100 dev->dev_addr[1] = 0x06;
1101 dev->dev_addr[2] = 0xd2;
1102 dev->dev_addr[3] = 0x00;
1103 dev->dev_addr[4] = 0x00;
1104 if (0x8 == data->phy)
1105 dev->dev_addr[5] = 0x01;
1106 else
1107 dev->dev_addr[5] = 0x02;
1108
1109 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1110
1111 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1112 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1113
1114 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1115 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1116 } else {
1117 dev->dev_addr[0] = (word2 >> 16) & 0xff;
1118 dev->dev_addr[1] = (word2 >> 24) & 0xff;
1119 dev->dev_addr[2] = (word1 >> 0) & 0xff;
1120 dev->dev_addr[3] = (word1 >> 8) & 0xff;
1121 dev->dev_addr[4] = (word1 >> 16) & 0xff;
1122 dev->dev_addr[5] = (word1 >> 24) & 0xff;
1123 }
1124
1125 if (!is_valid_ether_addr(dev->dev_addr)) {
1126 printk(KERN_ERR
1127 "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1128 dev->name, word1, word2);
1129 return -EINVAL;
1130 }
1131
1132 return 0;
1133 }
1134
1135 static int tsi108_set_mac(struct net_device *dev, void *addr)
1136 {
1137 struct tsi108_prv_data *data = netdev_priv(dev);
1138 u32 word1, word2;
1139 int i;
1140
1141 if (!is_valid_ether_addr(addr))
1142 return -EADDRNOTAVAIL;
1143
1144 for (i = 0; i < 6; i++)
1145 /* +2 is for the offset of the HW addr type */
1146 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1147
1148 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1149
1150 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1151 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1152
1153 spin_lock_irq(&data->misclock);
1154 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1155 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1156 spin_lock(&data->txlock);
1157
1158 if (data->txfree && data->link_up)
1159 netif_wake_queue(dev);
1160
1161 spin_unlock(&data->txlock);
1162 spin_unlock_irq(&data->misclock);
1163 return 0;
1164 }
1165
1166 /* Protected by dev->xmit_lock. */
1167 static void tsi108_set_rx_mode(struct net_device *dev)
1168 {
1169 struct tsi108_prv_data *data = netdev_priv(dev);
1170 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1171
1172 if (dev->flags & IFF_PROMISC) {
1173 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1174 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1175 goto out;
1176 }
1177
1178 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1179
1180 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1181 int i;
1182 struct netdev_hw_addr *ha;
1183 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1184
1185 memset(data->mc_hash, 0, sizeof(data->mc_hash));
1186
1187 netdev_for_each_mc_addr(ha, dev) {
1188 u32 hash, crc;
1189
1190 crc = ether_crc(6, ha->addr);
1191 hash = crc >> 23;
1192 __set_bit(hash, &data->mc_hash[0]);
1193 }
1194
1195 TSI_WRITE(TSI108_EC_HASHADDR,
1196 TSI108_EC_HASHADDR_AUTOINC |
1197 TSI108_EC_HASHADDR_MCAST);
1198
1199 for (i = 0; i < 16; i++) {
1200 /* The manual says that the hardware may drop
1201 * back-to-back writes to the data register.
1202 */
1203 udelay(1);
1204 TSI_WRITE(TSI108_EC_HASHDATA,
1205 data->mc_hash[i]);
1206 }
1207 }
1208
1209 out:
1210 TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1211 }
1212
1213 static void tsi108_init_phy(struct net_device *dev)
1214 {
1215 struct tsi108_prv_data *data = netdev_priv(dev);
1216 u32 i = 0;
1217 u16 phyval = 0;
1218 unsigned long flags;
1219
1220 spin_lock_irqsave(&phy_lock, flags);
1221
1222 tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1223 while (--i) {
1224 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1225 break;
1226 udelay(10);
1227 }
1228 if (i == 0)
1229 printk(KERN_ERR "%s function time out\n", __func__);
1230
1231 if (data->phy_type == TSI108_PHY_BCM54XX) {
1232 tsi108_write_mii(data, 0x09, 0x0300);
1233 tsi108_write_mii(data, 0x10, 0x1020);
1234 tsi108_write_mii(data, 0x1c, 0x8c00);
1235 }
1236
1237 tsi108_write_mii(data,
1238 MII_BMCR,
1239 BMCR_ANENABLE | BMCR_ANRESTART);
1240 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1241 cpu_relax();
1242
1243 /* Set G/MII mode and receive clock select in TBI control #2. The
1244 * second port won't work if this isn't done, even though we don't
1245 * use TBI mode.
1246 */
1247
1248 tsi108_write_tbi(data, 0x11, 0x30);
1249
1250 /* FIXME: It seems to take more than 2 back-to-back reads to the
1251 * PHY_STAT register before the link up status bit is set.
1252 */
1253
1254 data->link_up = 0;
1255
1256 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1257 BMSR_LSTATUS)) {
1258 if (i++ > (MII_READ_DELAY / 10)) {
1259 break;
1260 }
1261 spin_unlock_irqrestore(&phy_lock, flags);
1262 msleep(10);
1263 spin_lock_irqsave(&phy_lock, flags);
1264 }
1265
1266 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1267 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1268 data->phy_ok = 1;
1269 data->init_media = 1;
1270 spin_unlock_irqrestore(&phy_lock, flags);
1271 }
1272
1273 static void tsi108_kill_phy(struct net_device *dev)
1274 {
1275 struct tsi108_prv_data *data = netdev_priv(dev);
1276 unsigned long flags;
1277
1278 spin_lock_irqsave(&phy_lock, flags);
1279 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1280 data->phy_ok = 0;
1281 spin_unlock_irqrestore(&phy_lock, flags);
1282 }
1283
1284 static int tsi108_open(struct net_device *dev)
1285 {
1286 int i;
1287 struct tsi108_prv_data *data = netdev_priv(dev);
1288 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1289 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1290
1291 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1292 if (i != 0) {
1293 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1294 data->id, data->irq_num);
1295 return i;
1296 } else {
1297 dev->irq = data->irq_num;
1298 printk(KERN_NOTICE
1299 "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1300 data->id, dev->irq, dev->name);
1301 }
1302
1303 data->rxring = dma_alloc_coherent(&data->pdev->dev, rxring_size,
1304 &data->rxdma, GFP_KERNEL);
1305 if (!data->rxring)
1306 return -ENOMEM;
1307
1308 data->txring = dma_alloc_coherent(&data->pdev->dev, txring_size,
1309 &data->txdma, GFP_KERNEL);
1310 if (!data->txring) {
1311 dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
1312 data->rxdma);
1313 return -ENOMEM;
1314 }
1315
1316 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1317 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1318 data->rxring[i].blen = TSI108_RXBUF_SIZE;
1319 data->rxring[i].vlan = 0;
1320 }
1321
1322 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1323
1324 data->rxtail = 0;
1325 data->rxhead = 0;
1326
1327 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1328 struct sk_buff *skb;
1329
1330 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1331 if (!skb) {
1332 /* Bah. No memory for now, but maybe we'll get
1333 * some more later.
1334 * For now, we'll live with the smaller ring.
1335 */
1336 printk(KERN_WARNING
1337 "%s: Could only allocate %d receive skb(s).\n",
1338 dev->name, i);
1339 data->rxhead = i;
1340 break;
1341 }
1342
1343 data->rxskbs[i] = skb;
1344 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1345 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1346 }
1347
1348 data->rxfree = i;
1349 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1350
1351 for (i = 0; i < TSI108_TXRING_LEN; i++) {
1352 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1353 data->txring[i].misc = 0;
1354 }
1355
1356 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1357 data->txtail = 0;
1358 data->txhead = 0;
1359 data->txfree = TSI108_TXRING_LEN;
1360 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1361 tsi108_init_phy(dev);
1362
1363 napi_enable(&data->napi);
1364
1365 timer_setup(&data->timer, tsi108_timed_checker, 0);
1366 mod_timer(&data->timer, jiffies + 1);
1367
1368 tsi108_restart_rx(data, dev);
1369
1370 TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1371
1372 TSI_WRITE(TSI108_EC_INTMASK,
1373 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1374 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1375 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1376 TSI108_INT_SFN | TSI108_INT_STATCARRY));
1377
1378 TSI_WRITE(TSI108_MAC_CFG1,
1379 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1380 netif_start_queue(dev);
1381 return 0;
1382 }
1383
1384 static int tsi108_close(struct net_device *dev)
1385 {
1386 struct tsi108_prv_data *data = netdev_priv(dev);
1387
1388 netif_stop_queue(dev);
1389 napi_disable(&data->napi);
1390
1391 del_timer_sync(&data->timer);
1392
1393 tsi108_stop_ethernet(dev);
1394 tsi108_kill_phy(dev);
1395 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1396 TSI_WRITE(TSI108_MAC_CFG1, 0);
1397
1398 /* Check for any pending TX packets, and drop them. */
1399
1400 while (!data->txfree || data->txhead != data->txtail) {
1401 int tx = data->txtail;
1402 struct sk_buff *skb;
1403 skb = data->txskbs[tx];
1404 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1405 data->txfree++;
1406 dev_kfree_skb(skb);
1407 }
1408
1409 free_irq(data->irq_num, dev);
1410
1411 /* Discard the RX ring. */
1412
1413 while (data->rxfree) {
1414 int rx = data->rxtail;
1415 struct sk_buff *skb;
1416
1417 skb = data->rxskbs[rx];
1418 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1419 data->rxfree--;
1420 dev_kfree_skb(skb);
1421 }
1422
1423 dma_free_coherent(&data->pdev->dev,
1424 TSI108_RXRING_LEN * sizeof(rx_desc),
1425 data->rxring, data->rxdma);
1426 dma_free_coherent(&data->pdev->dev,
1427 TSI108_TXRING_LEN * sizeof(tx_desc),
1428 data->txring, data->txdma);
1429
1430 return 0;
1431 }
1432
1433 static void tsi108_init_mac(struct net_device *dev)
1434 {
1435 struct tsi108_prv_data *data = netdev_priv(dev);
1436
1437 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1438 TSI108_MAC_CFG2_PADCRC);
1439
1440 TSI_WRITE(TSI108_EC_TXTHRESH,
1441 (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1442 (192 << TSI108_EC_TXTHRESH_STOPFILL));
1443
1444 TSI_WRITE(TSI108_STAT_CARRYMASK1,
1445 ~(TSI108_STAT_CARRY1_RXBYTES |
1446 TSI108_STAT_CARRY1_RXPKTS |
1447 TSI108_STAT_CARRY1_RXFCS |
1448 TSI108_STAT_CARRY1_RXMCAST |
1449 TSI108_STAT_CARRY1_RXALIGN |
1450 TSI108_STAT_CARRY1_RXLENGTH |
1451 TSI108_STAT_CARRY1_RXRUNT |
1452 TSI108_STAT_CARRY1_RXJUMBO |
1453 TSI108_STAT_CARRY1_RXFRAG |
1454 TSI108_STAT_CARRY1_RXJABBER |
1455 TSI108_STAT_CARRY1_RXDROP));
1456
1457 TSI_WRITE(TSI108_STAT_CARRYMASK2,
1458 ~(TSI108_STAT_CARRY2_TXBYTES |
1459 TSI108_STAT_CARRY2_TXPKTS |
1460 TSI108_STAT_CARRY2_TXEXDEF |
1461 TSI108_STAT_CARRY2_TXEXCOL |
1462 TSI108_STAT_CARRY2_TXTCOL |
1463 TSI108_STAT_CARRY2_TXPAUSE));
1464
1465 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1466 TSI_WRITE(TSI108_MAC_CFG1, 0);
1467
1468 TSI_WRITE(TSI108_EC_RXCFG,
1469 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1470
1471 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1472 TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1473 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1474 TSI108_EC_TXQ_CFG_SFNPORT));
1475
1476 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1477 TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1478 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1479 TSI108_EC_RXQ_CFG_SFNPORT));
1480
1481 TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1482 TSI108_EC_TXQ_BUFCFG_BURST256 |
1483 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1484 TSI108_EC_TXQ_BUFCFG_SFNPORT));
1485
1486 TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1487 TSI108_EC_RXQ_BUFCFG_BURST256 |
1488 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1489 TSI108_EC_RXQ_BUFCFG_SFNPORT));
1490
1491 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1492 }
1493
1494 static int tsi108_get_link_ksettings(struct net_device *dev,
1495 struct ethtool_link_ksettings *cmd)
1496 {
1497 struct tsi108_prv_data *data = netdev_priv(dev);
1498 unsigned long flags;
1499
1500 spin_lock_irqsave(&data->txlock, flags);
1501 mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
1502 spin_unlock_irqrestore(&data->txlock, flags);
1503
1504 return 0;
1505 }
1506
1507 static int tsi108_set_link_ksettings(struct net_device *dev,
1508 const struct ethtool_link_ksettings *cmd)
1509 {
1510 struct tsi108_prv_data *data = netdev_priv(dev);
1511 unsigned long flags;
1512 int rc;
1513
1514 spin_lock_irqsave(&data->txlock, flags);
1515 rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
1516 spin_unlock_irqrestore(&data->txlock, flags);
1517
1518 return rc;
1519 }
1520
1521 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1522 {
1523 struct tsi108_prv_data *data = netdev_priv(dev);
1524 if (!netif_running(dev))
1525 return -EINVAL;
1526 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1527 }
1528
1529 static const struct ethtool_ops tsi108_ethtool_ops = {
1530 .get_link = ethtool_op_get_link,
1531 .get_link_ksettings = tsi108_get_link_ksettings,
1532 .set_link_ksettings = tsi108_set_link_ksettings,
1533 };
1534
1535 static const struct net_device_ops tsi108_netdev_ops = {
1536 .ndo_open = tsi108_open,
1537 .ndo_stop = tsi108_close,
1538 .ndo_start_xmit = tsi108_send_packet,
1539 .ndo_set_rx_mode = tsi108_set_rx_mode,
1540 .ndo_get_stats = tsi108_get_stats,
1541 .ndo_do_ioctl = tsi108_do_ioctl,
1542 .ndo_set_mac_address = tsi108_set_mac,
1543 .ndo_validate_addr = eth_validate_addr,
1544 };
1545
1546 static int
1547 tsi108_init_one(struct platform_device *pdev)
1548 {
1549 struct net_device *dev = NULL;
1550 struct tsi108_prv_data *data = NULL;
1551 hw_info *einfo;
1552 int err = 0;
1553
1554 einfo = dev_get_platdata(&pdev->dev);
1555
1556 if (NULL == einfo) {
1557 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1558 pdev->id);
1559 return -ENODEV;
1560 }
1561
1562 /* Create an ethernet device instance */
1563
1564 dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1565 if (!dev)
1566 return -ENOMEM;
1567
1568 printk("tsi108_eth%d: probe...\n", pdev->id);
1569 data = netdev_priv(dev);
1570 data->dev = dev;
1571 data->pdev = pdev;
1572
1573 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1574 pdev->id, einfo->regs, einfo->phyregs,
1575 einfo->phy, einfo->irq_num);
1576
1577 data->regs = ioremap(einfo->regs, 0x400);
1578 if (NULL == data->regs) {
1579 err = -ENOMEM;
1580 goto regs_fail;
1581 }
1582
1583 data->phyregs = ioremap(einfo->phyregs, 0x400);
1584 if (NULL == data->phyregs) {
1585 err = -ENOMEM;
1586 goto phyregs_fail;
1587 }
1588 /* MII setup */
1589 data->mii_if.dev = dev;
1590 data->mii_if.mdio_read = tsi108_mdio_read;
1591 data->mii_if.mdio_write = tsi108_mdio_write;
1592 data->mii_if.phy_id = einfo->phy;
1593 data->mii_if.phy_id_mask = 0x1f;
1594 data->mii_if.reg_num_mask = 0x1f;
1595
1596 data->phy = einfo->phy;
1597 data->phy_type = einfo->phy_type;
1598 data->irq_num = einfo->irq_num;
1599 data->id = pdev->id;
1600 netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1601 dev->netdev_ops = &tsi108_netdev_ops;
1602 dev->ethtool_ops = &tsi108_ethtool_ops;
1603
1604 /* Apparently, the Linux networking code won't use scatter-gather
1605 * if the hardware doesn't do checksums. However, it's faster
1606 * to checksum in place and use SG, as (among other reasons)
1607 * the cache won't be dirtied (which then has to be flushed
1608 * before DMA). The checksumming is done by the driver (via
1609 * a new function skb_csum_dev() in net/core/skbuff.c).
1610 */
1611
1612 dev->features = NETIF_F_HIGHDMA;
1613
1614 spin_lock_init(&data->txlock);
1615 spin_lock_init(&data->misclock);
1616
1617 tsi108_reset_ether(data);
1618 tsi108_kill_phy(dev);
1619
1620 if ((err = tsi108_get_mac(dev)) != 0) {
1621 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
1622 dev->name);
1623 goto register_fail;
1624 }
1625
1626 tsi108_init_mac(dev);
1627 err = register_netdev(dev);
1628 if (err) {
1629 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1630 dev->name);
1631 goto register_fail;
1632 }
1633
1634 platform_set_drvdata(pdev, dev);
1635 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1636 dev->name, dev->dev_addr);
1637 #ifdef DEBUG
1638 data->msg_enable = DEBUG;
1639 dump_eth_one(dev);
1640 #endif
1641
1642 return 0;
1643
1644 register_fail:
1645 iounmap(data->phyregs);
1646
1647 phyregs_fail:
1648 iounmap(data->regs);
1649
1650 regs_fail:
1651 free_netdev(dev);
1652 return err;
1653 }
1654
1655 /* There's no way to either get interrupts from the PHY when
1656 * something changes, or to have the Tsi108 automatically communicate
1657 * with the PHY to reconfigure itself.
1658 *
1659 * Thus, we have to do it using a timer.
1660 */
1661
1662 static void tsi108_timed_checker(struct timer_list *t)
1663 {
1664 struct tsi108_prv_data *data = from_timer(data, t, timer);
1665 struct net_device *dev = data->dev;
1666
1667 tsi108_check_phy(dev);
1668 tsi108_check_rxring(dev);
1669 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1670 }
1671
1672 static int tsi108_ether_remove(struct platform_device *pdev)
1673 {
1674 struct net_device *dev = platform_get_drvdata(pdev);
1675 struct tsi108_prv_data *priv = netdev_priv(dev);
1676
1677 unregister_netdev(dev);
1678 tsi108_stop_ethernet(dev);
1679 iounmap(priv->regs);
1680 iounmap(priv->phyregs);
1681 free_netdev(dev);
1682
1683 return 0;
1684 }
1685 module_platform_driver(tsi_eth_driver);
1686
1687 MODULE_AUTHOR("Tundra Semiconductor Corporation");
1688 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1689 MODULE_LICENSE("GPL");
1690 MODULE_ALIAS("platform:tsi-ethernet");
Linux with added FPC-III support