arch/arm/boot/dts/imx51-babbage.dts

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 /dts-v1/;
  14 #include "imx51.dtsi"
  15
  16 / {
  17         model = "Freescale i.MX51 Babbage Board";
  18         compatible = "fsl,imx51-babbage", "fsl,imx51";
  19
  20         memory {
  21                 reg = <0x90000000 0x20000000>;
  22         };
  23
  24         display@di0 {
  25                 compatible = "fsl,imx-parallel-display";
  26                 crtcs = <&ipu 0>;
  27                 interface-pix-fmt = "rgb24";
  28                 pinctrl-names = "default";
  29                 pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  30         };
  31
  32         display@di1 {
  33                 compatible = "fsl,imx-parallel-display";
  34                 crtcs = <&ipu 1>;
  35                 interface-pix-fmt = "rgb565";
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&pinctrl_ipu_disp2_1>;
  38         };
  39
  40         gpio-keys {
  41                 compatible = "gpio-keys";
  42
  43                 power {
  44                         label = "Power Button";
  45                         gpios = <&gpio2 21 0>;
  46                         linux,code = <116>; /* KEY_POWER */
  47                         gpio-key,wakeup;
  48                 };
  49         };
  50
  51         sound {
  52                 compatible = "fsl,imx51-babbage-sgtl5000",
  53                              "fsl,imx-audio-sgtl5000";
  54                 model = "imx51-babbage-sgtl5000";
  55                 ssi-controller = <&ssi2>;
  56                 audio-codec = <&sgtl5000>;
  57                 audio-routing =
  58                         "MIC_IN", "Mic Jack",
  59                         "Mic Jack", "Mic Bias",
  60                         "Headphone Jack", "HP_OUT";
  61                 mux-int-port = <2>;
  62                 mux-ext-port = <3>;
  63         };
  64
  65         clocks {
  66                 ckih1 {
  67                         clock-frequency = <22579200>;
  68                 };
  69
  70                 clk_26M: codec_clock {
  71                         compatible = "fixed-clock";
  72                         reg=<0>;
  73                         #clock-cells = <0>;
  74                         clock-frequency = <26000000>;
  75                         gpios = <&gpio4 26 1>;
  76                 };
  77         };
  78 };
  79
  80 &esdhc1 {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&pinctrl_esdhc1_1>;
  83         fsl,cd-controller;
  84         fsl,wp-controller;
  85         status = "okay";
  86 };
  87
  88 &esdhc2 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&pinctrl_esdhc2_1>;
  91         cd-gpios = <&gpio1 6 0>;
  92         wp-gpios = <&gpio1 5 0>;
  93         status = "okay";
  94 };
  95
  96 &uart3 {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&pinctrl_uart3_1>;
  99         fsl,uart-has-rtscts;
 100         status = "okay";
 101 };
 102
 103 &ecspi1 {
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_ecspi1_1>;
 106         fsl,spi-num-chipselects = <2>;
 107         cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
 108         status = "okay";
 109
 110         pmic: mc13892@0 {
 111                 #address-cells = <1>;
 112                 #size-cells = <0>;
 113                 compatible = "fsl,mc13892";
 114                 spi-max-frequency = <6000000>;
 115                 spi-cs-high;
 116                 reg = <0>;
 117                 interrupt-parent = <&gpio1>;
 118                 interrupts = <8 0x4>;
 119
 120                 regulators {
 121                         sw1_reg: sw1 {
 122                                 regulator-min-microvolt = <600000>;
 123                                 regulator-max-microvolt = <1375000>;
 124                                 regulator-boot-on;
 125                                 regulator-always-on;
 126                         };
 127
 128                         sw2_reg: sw2 {
 129                                 regulator-min-microvolt = <900000>;
 130                                 regulator-max-microvolt = <1850000>;
 131                                 regulator-boot-on;
 132                                 regulator-always-on;
 133                         };
 134
 135                         sw3_reg: sw3 {
 136                                 regulator-min-microvolt = <1100000>;
 137                                 regulator-max-microvolt = <1850000>;
 138                                 regulator-boot-on;
 139                                 regulator-always-on;
 140                         };
 141
 142                         sw4_reg: sw4 {
 143                                 regulator-min-microvolt = <1100000>;
 144                                 regulator-max-microvolt = <1850000>;
 145                                 regulator-boot-on;
 146                                 regulator-always-on;
 147                         };
 148
 149                         vpll_reg: vpll {
 150                                 regulator-min-microvolt = <1050000>;
 151                                 regulator-max-microvolt = <1800000>;
 152                                 regulator-boot-on;
 153                                 regulator-always-on;
 154                         };
 155
 156                         vdig_reg: vdig {
 157                                 regulator-min-microvolt = <1650000>;
 158                                 regulator-max-microvolt = <1650000>;
 159                                 regulator-boot-on;
 160                         };
 161
 162                         vsd_reg: vsd {
 163                                 regulator-min-microvolt = <1800000>;
 164                                 regulator-max-microvolt = <3150000>;
 165                         };
 166
 167                         vusb2_reg: vusb2 {
 168                                 regulator-min-microvolt = <2400000>;
 169                                 regulator-max-microvolt = <2775000>;
 170                                 regulator-boot-on;
 171                                 regulator-always-on;
 172                         };
 173
 174                         vvideo_reg: vvideo {
 175                                 regulator-min-microvolt = <2775000>;
 176                                 regulator-max-microvolt = <2775000>;
 177                         };
 178
 179                         vaudio_reg: vaudio {
 180                                 regulator-min-microvolt = <2300000>;
 181                                 regulator-max-microvolt = <3000000>;
 182                         };
 183
 184                         vcam_reg: vcam {
 185                                 regulator-min-microvolt = <2500000>;
 186                                 regulator-max-microvolt = <3000000>;
 187                         };
 188
 189                         vgen1_reg: vgen1 {
 190                                 regulator-min-microvolt = <1200000>;
 191                                 regulator-max-microvolt = <1200000>;
 192                         };
 193
 194                         vgen2_reg: vgen2 {
 195                                 regulator-min-microvolt = <1200000>;
 196                                 regulator-max-microvolt = <3150000>;
 197                                 regulator-always-on;
 198                         };
 199
 200                         vgen3_reg: vgen3 {
 201                                 regulator-min-microvolt = <1800000>;
 202                                 regulator-max-microvolt = <2900000>;
 203                                 regulator-always-on;
 204                         };
 205                 };
 206         };
 207
 208         flash: at45db321d@1 {
 209                 #address-cells = <1>;
 210                 #size-cells = <1>;
 211                 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
 212                 spi-max-frequency = <25000000>;
 213                 reg = <1>;
 214
 215                 partition@0 {
 216                         label = "U-Boot";
 217                         reg = <0x0 0x40000>;
 218                         read-only;
 219                 };
 220
 221                 partition@40000 {
 222                         label = "Kernel";
 223                         reg = <0x40000 0x3c0000>;
 224                 };
 225         };
 226 };
 227
 228 &ssi2 {
 229         fsl,mode = "i2s-slave";
 230         status = "okay";
 231 };
 232
 233 &iomuxc {
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_hog>;
 236
 237         hog {
 238                 pinctrl_hog: hoggrp {
 239                         fsl,pins = <
 240                                 MX51_PAD_GPIO1_0__SD1_CD     0x20d5
 241                                 MX51_PAD_GPIO1_1__SD1_WP     0x20d5
 242                                 MX51_PAD_GPIO1_5__GPIO1_5    0x100
 243                                 MX51_PAD_GPIO1_6__GPIO1_6    0x100
 244                                 MX51_PAD_EIM_A27__GPIO2_21   0x5
 245                                 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
 246                                 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
 247                                 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
 248                         >;
 249                 };
 250         };
 251 };
 252
 253 &uart1 {
 254         pinctrl-names = "default";
 255         pinctrl-0 = <&pinctrl_uart1_1>;
 256         fsl,uart-has-rtscts;
 257         status = "okay";
 258 };
 259
 260 &uart2 {
 261         pinctrl-names = "default";
 262         pinctrl-0 = <&pinctrl_uart2_1>;
 263         status = "okay";
 264 };
 265
 266 &i2c2 {
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&pinctrl_i2c2_1>;
 269         status = "okay";
 270
 271         sgtl5000: codec@0a {
 272                 compatible = "fsl,sgtl5000";
 273                 reg = <0x0a>;
 274                 clocks = <&clk_26M>;
 275                 VDDA-supply = <&vdig_reg>;
 276                 VDDIO-supply = <&vvideo_reg>;
 277         };
 278 };
 279
 280 &audmux {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&pinctrl_audmux_1>;
 283         status = "okay";
 284 };
 285
 286 &fec {
 287         pinctrl-names = "default";
 288         pinctrl-0 = <&pinctrl_fec_1>;
 289         phy-mode = "mii";
 290         status = "okay";
 291 };
 292
 293 &kpp {
 294         pinctrl-names = "default";
 295         pinctrl-0 = <&pinctrl_kpp_1>;
 296         linux,keymap = <0x00000067      /* KEY_UP */
 297                         0x0001006c      /* KEY_DOWN */
 298                         0x00020072      /* KEY_VOLUMEDOWN */
 299                         0x00030066      /* KEY_HOME */
 300                         0x0100006a      /* KEY_RIGHT */
 301                         0x01010069      /* KEY_LEFT */
 302                         0x0102001c      /* KEY_ENTER */
 303                         0x01030073      /* KEY_VOLUMEUP */
 304                         0x02000040      /* KEY_F6 */
 305                         0x02010042      /* KEY_F8 */
 306                         0x02020043      /* KEY_F9 */
 307                         0x02030044      /* KEY_F10 */
 308                         0x0300003b      /* KEY_F1 */
 309                         0x0301003c      /* KEY_F2 */
 310                         0x0302003d      /* KEY_F3 */
 311                         0x03030074>;    /* KEY_POWER */
 312         status = "okay";
 313 };