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Merge tag 'for-linus-20190706' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / net / ethernet / tundra / tsi108_eth.c
blob78a7de3fb622f4d98fae24768297caa9bcf1003c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*******************************************************************************
3
4 Copyright(c) 2006 Tundra Semiconductor Corporation.
5
6
7 *******************************************************************************/
8
9 /* This driver is based on the driver code originally developed
10 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
11 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
12 *
13 * Currently changes from original version are:
14 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
15 * - modifications to handle two ports independently and support for
16 * additional PHY devices (alexandre.bounine@tundra.com)
17 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/interrupt.h>
24 #include <linux/net.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/delay.h>
31 #include <linux/crc32.h>
32 #include <linux/mii.h>
33 #include <linux/device.h>
34 #include <linux/pci.h>
35 #include <linux/rtnetlink.h>
36 #include <linux/timer.h>
37 #include <linux/platform_device.h>
38 #include <linux/gfp.h>
39
40 #include <asm/io.h>
41 #include <asm/tsi108.h>
42
43 #include "tsi108_eth.h"
44
45 #define MII_READ_DELAY 10000 /* max link wait time in msec */
46
47 #define TSI108_RXRING_LEN 256
48
49 /* NOTE: The driver currently does not support receiving packets
50 * larger than the buffer size, so don't decrease this (unless you
51 * want to add such support).
52 */
53 #define TSI108_RXBUF_SIZE 1536
54
55 #define TSI108_TXRING_LEN 256
56
57 #define TSI108_TX_INT_FREQ 64
58
59 /* Check the phy status every half a second. */
60 #define CHECK_PHY_INTERVAL (HZ/2)
61
62 static int tsi108_init_one(struct platform_device *pdev);
63 static int tsi108_ether_remove(struct platform_device *pdev);
64
65 struct tsi108_prv_data {
66 void __iomem *regs; /* Base of normal regs */
67 void __iomem *phyregs; /* Base of register bank used for PHY access */
68
69 struct net_device *dev;
70 struct napi_struct napi;
71
72 unsigned int phy; /* Index of PHY for this interface */
73 unsigned int irq_num;
74 unsigned int id;
75 unsigned int phy_type;
76
77 struct timer_list timer;/* Timer that triggers the check phy function */
78 unsigned int rxtail; /* Next entry in rxring to read */
79 unsigned int rxhead; /* Next entry in rxring to give a new buffer */
80 unsigned int rxfree; /* Number of free, allocated RX buffers */
81
82 unsigned int rxpending; /* Non-zero if there are still descriptors
83 * to be processed from a previous descriptor
84 * interrupt condition that has been cleared */
85
86 unsigned int txtail; /* Next TX descriptor to check status on */
87 unsigned int txhead; /* Next TX descriptor to use */
88
89 /* Number of free TX descriptors. This could be calculated from
90 * rxhead and rxtail if one descriptor were left unused to disambiguate
91 * full and empty conditions, but it's simpler to just keep track
92 * explicitly. */
93
94 unsigned int txfree;
95
96 unsigned int phy_ok; /* The PHY is currently powered on. */
97
98 /* PHY status (duplex is 1 for half, 2 for full,
99 * so that the default 0 indicates that neither has
100 * yet been configured). */
101
102 unsigned int link_up;
103 unsigned int speed;
104 unsigned int duplex;
105
106 tx_desc *txring;
107 rx_desc *rxring;
108 struct sk_buff *txskbs[TSI108_TXRING_LEN];
109 struct sk_buff *rxskbs[TSI108_RXRING_LEN];
110
111 dma_addr_t txdma, rxdma;
112
113 /* txlock nests in misclock and phy_lock */
114
115 spinlock_t txlock, misclock;
116
117 /* stats is used to hold the upper bits of each hardware counter,
118 * and tmpstats is used to hold the full values for returning
119 * to the caller of get_stats(). They must be separate in case
120 * an overflow interrupt occurs before the stats are consumed.
121 */
122
123 struct net_device_stats stats;
124 struct net_device_stats tmpstats;
125
126 /* These stats are kept separate in hardware, thus require individual
127 * fields for handling carry. They are combined in get_stats.
128 */
129
130 unsigned long rx_fcs; /* Add to rx_frame_errors */
131 unsigned long rx_short_fcs; /* Add to rx_frame_errors */
132 unsigned long rx_long_fcs; /* Add to rx_frame_errors */
133 unsigned long rx_underruns; /* Add to rx_length_errors */
134 unsigned long rx_overruns; /* Add to rx_length_errors */
135
136 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
137 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
138
139 unsigned long mc_hash[16];
140 u32 msg_enable; /* debug message level */
141 struct mii_if_info mii_if;
142 unsigned int init_media;
143
144 struct platform_device *pdev;
145 };
146
147 /* Structure for a device driver */
148
149 static struct platform_driver tsi_eth_driver = {
150 .probe = tsi108_init_one,
151 .remove = tsi108_ether_remove,
152 .driver = {
153 .name = "tsi-ethernet",
154 },
155 };
156
157 static void tsi108_timed_checker(struct timer_list *t);
158
159 #ifdef DEBUG
160 static void dump_eth_one(struct net_device *dev)
161 {
162 struct tsi108_prv_data *data = netdev_priv(dev);
163
164 printk("Dumping %s...\n", dev->name);
165 printk("intstat %x intmask %x phy_ok %d"
166 " link %d speed %d duplex %d\n",
167 TSI_READ(TSI108_EC_INTSTAT),
168 TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
169 data->link_up, data->speed, data->duplex);
170
171 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
172 data->txhead, data->txtail, data->txfree,
173 TSI_READ(TSI108_EC_TXSTAT),
174 TSI_READ(TSI108_EC_TXESTAT),
175 TSI_READ(TSI108_EC_TXERR));
176
177 printk("RX: head %d, tail %d, free %d, stat %x,"
178 " estat %x, err %x, pending %d\n\n",
179 data->rxhead, data->rxtail, data->rxfree,
180 TSI_READ(TSI108_EC_RXSTAT),
181 TSI_READ(TSI108_EC_RXESTAT),
182 TSI_READ(TSI108_EC_RXERR), data->rxpending);
183 }
184 #endif
185
186 /* Synchronization is needed between the thread and up/down events.
187 * Note that the PHY is accessed through the same registers for both
188 * interfaces, so this can't be made interface-specific.
189 */
190
191 static DEFINE_SPINLOCK(phy_lock);
192
193 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
194 {
195 unsigned i;
196
197 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
198 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
199 (reg << TSI108_MAC_MII_ADDR_REG));
200 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
201 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
202 for (i = 0; i < 100; i++) {
203 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
204 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
205 break;
206 udelay(10);
207 }
208
209 if (i == 100)
210 return 0xffff;
211 else
212 return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
213 }
214
215 static void tsi108_write_mii(struct tsi108_prv_data *data,
216 int reg, u16 val)
217 {
218 unsigned i = 100;
219 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
220 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
221 (reg << TSI108_MAC_MII_ADDR_REG));
222 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
223 while (i--) {
224 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
225 TSI108_MAC_MII_IND_BUSY))
226 break;
227 udelay(10);
228 }
229 }
230
231 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
232 {
233 struct tsi108_prv_data *data = netdev_priv(dev);
234 return tsi108_read_mii(data, reg);
235 }
236
237 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
238 {
239 struct tsi108_prv_data *data = netdev_priv(dev);
240 tsi108_write_mii(data, reg, val);
241 }
242
243 static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
244 int reg, u16 val)
245 {
246 unsigned i = 1000;
247 TSI_WRITE(TSI108_MAC_MII_ADDR,
248 (0x1e << TSI108_MAC_MII_ADDR_PHY)
249 | (reg << TSI108_MAC_MII_ADDR_REG));
250 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
251 while(i--) {
252 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
253 return;
254 udelay(10);
255 }
256 printk(KERN_ERR "%s function time out\n", __func__);
257 }
258
259 static int mii_speed(struct mii_if_info *mii)
260 {
261 int advert, lpa, val, media;
262 int lpa2 = 0;
263 int speed;
264
265 if (!mii_link_ok(mii))
266 return 0;
267
268 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
269 if ((val & BMSR_ANEGCOMPLETE) == 0)
270 return 0;
271
272 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
273 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
274 media = mii_nway_result(advert & lpa);
275
276 if (mii->supports_gmii)
277 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
278
279 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
280 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
281 return speed;
282 }
283
284 static void tsi108_check_phy(struct net_device *dev)
285 {
286 struct tsi108_prv_data *data = netdev_priv(dev);
287 u32 mac_cfg2_reg, portctrl_reg;
288 u32 duplex;
289 u32 speed;
290 unsigned long flags;
291
292 spin_lock_irqsave(&phy_lock, flags);
293
294 if (!data->phy_ok)
295 goto out;
296
297 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
298 data->init_media = 0;
299
300 if (netif_carrier_ok(dev)) {
301
302 speed = mii_speed(&data->mii_if);
303
304 if ((speed != data->speed) || duplex) {
305
306 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
307 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
308
309 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
310
311 if (speed == 1000) {
312 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
313 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
314 } else {
315 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
316 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
317 }
318
319 data->speed = speed;
320
321 if (data->mii_if.full_duplex) {
322 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
323 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
324 data->duplex = 2;
325 } else {
326 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
327 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
328 data->duplex = 1;
329 }
330
331 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
332 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
333 }
334
335 if (data->link_up == 0) {
336 /* The manual says it can take 3-4 usecs for the speed change
337 * to take effect.
338 */
339 udelay(5);
340
341 spin_lock(&data->txlock);
342 if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
343 netif_wake_queue(dev);
344
345 data->link_up = 1;
346 spin_unlock(&data->txlock);
347 }
348 } else {
349 if (data->link_up == 1) {
350 netif_stop_queue(dev);
351 data->link_up = 0;
352 printk(KERN_NOTICE "%s : link is down\n", dev->name);
353 }
354
355 goto out;
356 }
357
358
359 out:
360 spin_unlock_irqrestore(&phy_lock, flags);
361 }
362
363 static inline void
364 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
365 unsigned long *upper)
366 {
367 if (carry & carry_bit)
368 *upper += carry_shift;
369 }
370
371 static void tsi108_stat_carry(struct net_device *dev)
372 {
373 struct tsi108_prv_data *data = netdev_priv(dev);
374 u32 carry1, carry2;
375
376 spin_lock_irq(&data->misclock);
377
378 carry1 = TSI_READ(TSI108_STAT_CARRY1);
379 carry2 = TSI_READ(TSI108_STAT_CARRY2);
380
381 TSI_WRITE(TSI108_STAT_CARRY1, carry1);
382 TSI_WRITE(TSI108_STAT_CARRY2, carry2);
383
384 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
385 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
386
387 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
388 TSI108_STAT_RXPKTS_CARRY,
389 &data->stats.rx_packets);
390
391 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
392 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
393
394 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
395 TSI108_STAT_RXMCAST_CARRY,
396 &data->stats.multicast);
397
398 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
399 TSI108_STAT_RXALIGN_CARRY,
400 &data->stats.rx_frame_errors);
401
402 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
403 TSI108_STAT_RXLENGTH_CARRY,
404 &data->stats.rx_length_errors);
405
406 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
407 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
408
409 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
410 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
411
412 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
413 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
414
415 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
416 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
417
418 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
419 TSI108_STAT_RXDROP_CARRY,
420 &data->stats.rx_missed_errors);
421
422 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
423 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
424
425 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
426 TSI108_STAT_TXPKTS_CARRY,
427 &data->stats.tx_packets);
428
429 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
430 TSI108_STAT_TXEXDEF_CARRY,
431 &data->stats.tx_aborted_errors);
432
433 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
434 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
435
436 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
437 TSI108_STAT_TXTCOL_CARRY,
438 &data->stats.collisions);
439
440 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
441 TSI108_STAT_TXPAUSEDROP_CARRY,
442 &data->tx_pause_drop);
443
444 spin_unlock_irq(&data->misclock);
445 }
446
447 /* Read a stat counter atomically with respect to carries.
448 * data->misclock must be held.
449 */
450 static inline unsigned long
451 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
452 int carry_shift, unsigned long *upper)
453 {
454 int carryreg;
455 unsigned long val;
456
457 if (reg < 0xb0)
458 carryreg = TSI108_STAT_CARRY1;
459 else
460 carryreg = TSI108_STAT_CARRY2;
461
462 again:
463 val = TSI_READ(reg) | *upper;
464
465 /* Check to see if it overflowed, but the interrupt hasn't
466 * been serviced yet. If so, handle the carry here, and
467 * try again.
468 */
469
470 if (unlikely(TSI_READ(carryreg) & carry_bit)) {
471 *upper += carry_shift;
472 TSI_WRITE(carryreg, carry_bit);
473 goto again;
474 }
475
476 return val;
477 }
478
479 static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
480 {
481 unsigned long excol;
482
483 struct tsi108_prv_data *data = netdev_priv(dev);
484 spin_lock_irq(&data->misclock);
485
486 data->tmpstats.rx_packets =
487 tsi108_read_stat(data, TSI108_STAT_RXPKTS,
488 TSI108_STAT_CARRY1_RXPKTS,
489 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
490
491 data->tmpstats.tx_packets =
492 tsi108_read_stat(data, TSI108_STAT_TXPKTS,
493 TSI108_STAT_CARRY2_TXPKTS,
494 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
495
496 data->tmpstats.rx_bytes =
497 tsi108_read_stat(data, TSI108_STAT_RXBYTES,
498 TSI108_STAT_CARRY1_RXBYTES,
499 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
500
501 data->tmpstats.tx_bytes =
502 tsi108_read_stat(data, TSI108_STAT_TXBYTES,
503 TSI108_STAT_CARRY2_TXBYTES,
504 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
505
506 data->tmpstats.multicast =
507 tsi108_read_stat(data, TSI108_STAT_RXMCAST,
508 TSI108_STAT_CARRY1_RXMCAST,
509 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
510
511 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
512 TSI108_STAT_CARRY2_TXEXCOL,
513 TSI108_STAT_TXEXCOL_CARRY,
514 &data->tx_coll_abort);
515
516 data->tmpstats.collisions =
517 tsi108_read_stat(data, TSI108_STAT_TXTCOL,
518 TSI108_STAT_CARRY2_TXTCOL,
519 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
520
521 data->tmpstats.collisions += excol;
522
523 data->tmpstats.rx_length_errors =
524 tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
525 TSI108_STAT_CARRY1_RXLENGTH,
526 TSI108_STAT_RXLENGTH_CARRY,
527 &data->stats.rx_length_errors);
528
529 data->tmpstats.rx_length_errors +=
530 tsi108_read_stat(data, TSI108_STAT_RXRUNT,
531 TSI108_STAT_CARRY1_RXRUNT,
532 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
533
534 data->tmpstats.rx_length_errors +=
535 tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
536 TSI108_STAT_CARRY1_RXJUMBO,
537 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
538
539 data->tmpstats.rx_frame_errors =
540 tsi108_read_stat(data, TSI108_STAT_RXALIGN,
541 TSI108_STAT_CARRY1_RXALIGN,
542 TSI108_STAT_RXALIGN_CARRY,
543 &data->stats.rx_frame_errors);
544
545 data->tmpstats.rx_frame_errors +=
546 tsi108_read_stat(data, TSI108_STAT_RXFCS,
547 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
548 &data->rx_fcs);
549
550 data->tmpstats.rx_frame_errors +=
551 tsi108_read_stat(data, TSI108_STAT_RXFRAG,
552 TSI108_STAT_CARRY1_RXFRAG,
553 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
554
555 data->tmpstats.rx_missed_errors =
556 tsi108_read_stat(data, TSI108_STAT_RXDROP,
557 TSI108_STAT_CARRY1_RXDROP,
558 TSI108_STAT_RXDROP_CARRY,
559 &data->stats.rx_missed_errors);
560
561 /* These three are maintained by software. */
562 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
563 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
564
565 data->tmpstats.tx_aborted_errors =
566 tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
567 TSI108_STAT_CARRY2_TXEXDEF,
568 TSI108_STAT_TXEXDEF_CARRY,
569 &data->stats.tx_aborted_errors);
570
571 data->tmpstats.tx_aborted_errors +=
572 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
573 TSI108_STAT_CARRY2_TXPAUSE,
574 TSI108_STAT_TXPAUSEDROP_CARRY,
575 &data->tx_pause_drop);
576
577 data->tmpstats.tx_aborted_errors += excol;
578
579 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
580 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
581 data->tmpstats.rx_crc_errors +
582 data->tmpstats.rx_frame_errors +
583 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
584
585 spin_unlock_irq(&data->misclock);
586 return &data->tmpstats;
587 }
588
589 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
590 {
591 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
592 TSI108_EC_RXQ_PTRHIGH_VALID);
593
594 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
595 | TSI108_EC_RXCTRL_QUEUE0);
596 }
597
598 static void tsi108_restart_tx(struct tsi108_prv_data * data)
599 {
600 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
601 TSI108_EC_TXQ_PTRHIGH_VALID);
602
603 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
604 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
605 }
606
607 /* txlock must be held by caller, with IRQs disabled, and
608 * with permission to re-enable them when the lock is dropped.
609 */
610 static void tsi108_complete_tx(struct net_device *dev)
611 {
612 struct tsi108_prv_data *data = netdev_priv(dev);
613 int tx;
614 struct sk_buff *skb;
615 int release = 0;
616
617 while (!data->txfree || data->txhead != data->txtail) {
618 tx = data->txtail;
619
620 if (data->txring[tx].misc & TSI108_TX_OWN)
621 break;
622
623 skb = data->txskbs[tx];
624
625 if (!(data->txring[tx].misc & TSI108_TX_OK))
626 printk("%s: bad tx packet, misc %x\n",
627 dev->name, data->txring[tx].misc);
628
629 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
630 data->txfree++;
631
632 if (data->txring[tx].misc & TSI108_TX_EOF) {
633 dev_kfree_skb_any(skb);
634 release++;
635 }
636 }
637
638 if (release) {
639 if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
640 netif_wake_queue(dev);
641 }
642 }
643
644 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
645 {
646 struct tsi108_prv_data *data = netdev_priv(dev);
647 int frags = skb_shinfo(skb)->nr_frags + 1;
648 int i;
649
650 if (!data->phy_ok && net_ratelimit())
651 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
652
653 if (!data->link_up) {
654 printk(KERN_ERR "%s: Transmit while link is down!\n",
655 dev->name);
656 netif_stop_queue(dev);
657 return NETDEV_TX_BUSY;
658 }
659
660 if (data->txfree < MAX_SKB_FRAGS + 1) {
661 netif_stop_queue(dev);
662
663 if (net_ratelimit())
664 printk(KERN_ERR "%s: Transmit with full tx ring!\n",
665 dev->name);
666 return NETDEV_TX_BUSY;
667 }
668
669 if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
670 netif_stop_queue(dev);
671 }
672
673 spin_lock_irq(&data->txlock);
674
675 for (i = 0; i < frags; i++) {
676 int misc = 0;
677 int tx = data->txhead;
678
679 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
680 * the interrupt bit. TX descriptor-complete interrupts are
681 * enabled when the queue fills up, and masked when there is
682 * still free space. This way, when saturating the outbound
683 * link, the tx interrupts are kept to a reasonable level.
684 * When the queue is not full, reclamation of skbs still occurs
685 * as new packets are transmitted, or on a queue-empty
686 * interrupt.
687 */
688
689 if ((tx % TSI108_TX_INT_FREQ == 0) &&
690 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
691 misc = TSI108_TX_INT;
692
693 data->txskbs[tx] = skb;
694
695 if (i == 0) {
696 data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
697 skb->data, skb_headlen(skb),
698 DMA_TO_DEVICE);
699 data->txring[tx].len = skb_headlen(skb);
700 misc |= TSI108_TX_SOF;
701 } else {
702 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
703
704 data->txring[tx].buf0 =
705 skb_frag_dma_map(&data->pdev->dev, frag,
706 0, skb_frag_size(frag),
707 DMA_TO_DEVICE);
708 data->txring[tx].len = skb_frag_size(frag);
709 }
710
711 if (i == frags - 1)
712 misc |= TSI108_TX_EOF;
713
714 if (netif_msg_pktdata(data)) {
715 int i;
716 printk("%s: Tx Frame contents (%d)\n", dev->name,
717 skb->len);
718 for (i = 0; i < skb->len; i++)
719 printk(" %2.2x", skb->data[i]);
720 printk(".\n");
721 }
722 data->txring[tx].misc = misc | TSI108_TX_OWN;
723
724 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
725 data->txfree--;
726 }
727
728 tsi108_complete_tx(dev);
729
730 /* This must be done after the check for completed tx descriptors,
731 * so that the tail pointer is correct.
732 */
733
734 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
735 tsi108_restart_tx(data);
736
737 spin_unlock_irq(&data->txlock);
738 return NETDEV_TX_OK;
739 }
740
741 static int tsi108_complete_rx(struct net_device *dev, int budget)
742 {
743 struct tsi108_prv_data *data = netdev_priv(dev);
744 int done = 0;
745
746 while (data->rxfree && done != budget) {
747 int rx = data->rxtail;
748 struct sk_buff *skb;
749
750 if (data->rxring[rx].misc & TSI108_RX_OWN)
751 break;
752
753 skb = data->rxskbs[rx];
754 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
755 data->rxfree--;
756 done++;
757
758 if (data->rxring[rx].misc & TSI108_RX_BAD) {
759 spin_lock_irq(&data->misclock);
760
761 if (data->rxring[rx].misc & TSI108_RX_CRC)
762 data->stats.rx_crc_errors++;
763 if (data->rxring[rx].misc & TSI108_RX_OVER)
764 data->stats.rx_fifo_errors++;
765
766 spin_unlock_irq(&data->misclock);
767
768 dev_kfree_skb_any(skb);
769 continue;
770 }
771 if (netif_msg_pktdata(data)) {
772 int i;
773 printk("%s: Rx Frame contents (%d)\n",
774 dev->name, data->rxring[rx].len);
775 for (i = 0; i < data->rxring[rx].len; i++)
776 printk(" %2.2x", skb->data[i]);
777 printk(".\n");
778 }
779
780 skb_put(skb, data->rxring[rx].len);
781 skb->protocol = eth_type_trans(skb, dev);
782 netif_receive_skb(skb);
783 }
784
785 return done;
786 }
787
788 static int tsi108_refill_rx(struct net_device *dev, int budget)
789 {
790 struct tsi108_prv_data *data = netdev_priv(dev);
791 int done = 0;
792
793 while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
794 int rx = data->rxhead;
795 struct sk_buff *skb;
796
797 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
798 data->rxskbs[rx] = skb;
799 if (!skb)
800 break;
801
802 data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
803 skb->data, TSI108_RX_SKB_SIZE,
804 DMA_FROM_DEVICE);
805
806 /* Sometimes the hardware sets blen to zero after packet
807 * reception, even though the manual says that it's only ever
808 * modified by the driver.
809 */
810
811 data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
812 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
813
814 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
815 data->rxfree++;
816 done++;
817 }
818
819 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
820 TSI108_EC_RXSTAT_QUEUE0))
821 tsi108_restart_rx(data, dev);
822
823 return done;
824 }
825
826 static int tsi108_poll(struct napi_struct *napi, int budget)
827 {
828 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
829 struct net_device *dev = data->dev;
830 u32 estat = TSI_READ(TSI108_EC_RXESTAT);
831 u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
832 int num_received = 0, num_filled = 0;
833
834 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
835 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
836
837 TSI_WRITE(TSI108_EC_RXESTAT, estat);
838 TSI_WRITE(TSI108_EC_INTSTAT, intstat);
839
840 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
841 num_received = tsi108_complete_rx(dev, budget);
842
843 /* This should normally fill no more slots than the number of
844 * packets received in tsi108_complete_rx(). The exception
845 * is when we previously ran out of memory for RX SKBs. In that
846 * case, it's helpful to obey the budget, not only so that the
847 * CPU isn't hogged, but so that memory (which may still be low)
848 * is not hogged by one device.
849 *
850 * A work unit is considered to be two SKBs to allow us to catch
851 * up when the ring has shrunk due to out-of-memory but we're
852 * still removing the full budget's worth of packets each time.
853 */
854
855 if (data->rxfree < TSI108_RXRING_LEN)
856 num_filled = tsi108_refill_rx(dev, budget * 2);
857
858 if (intstat & TSI108_INT_RXERROR) {
859 u32 err = TSI_READ(TSI108_EC_RXERR);
860 TSI_WRITE(TSI108_EC_RXERR, err);
861
862 if (err) {
863 if (net_ratelimit())
864 printk(KERN_DEBUG "%s: RX error %x\n",
865 dev->name, err);
866
867 if (!(TSI_READ(TSI108_EC_RXSTAT) &
868 TSI108_EC_RXSTAT_QUEUE0))
869 tsi108_restart_rx(data, dev);
870 }
871 }
872
873 if (intstat & TSI108_INT_RXOVERRUN) {
874 spin_lock_irq(&data->misclock);
875 data->stats.rx_fifo_errors++;
876 spin_unlock_irq(&data->misclock);
877 }
878
879 if (num_received < budget) {
880 data->rxpending = 0;
881 napi_complete_done(napi, num_received);
882
883 TSI_WRITE(TSI108_EC_INTMASK,
884 TSI_READ(TSI108_EC_INTMASK)
885 & ~(TSI108_INT_RXQUEUE0
886 | TSI108_INT_RXTHRESH |
887 TSI108_INT_RXOVERRUN |
888 TSI108_INT_RXERROR |
889 TSI108_INT_RXWAIT));
890 } else {
891 data->rxpending = 1;
892 }
893
894 return num_received;
895 }
896
897 static void tsi108_rx_int(struct net_device *dev)
898 {
899 struct tsi108_prv_data *data = netdev_priv(dev);
900
901 /* A race could cause dev to already be scheduled, so it's not an
902 * error if that happens (and interrupts shouldn't be re-masked,
903 * because that can cause harmful races, if poll has already
904 * unmasked them but not cleared LINK_STATE_SCHED).
905 *
906 * This can happen if this code races with tsi108_poll(), which masks
907 * the interrupts after tsi108_irq_one() read the mask, but before
908 * napi_schedule is called. It could also happen due to calls
909 * from tsi108_check_rxring().
910 */
911
912 if (napi_schedule_prep(&data->napi)) {
913 /* Mask, rather than ack, the receive interrupts. The ack
914 * will happen in tsi108_poll().
915 */
916
917 TSI_WRITE(TSI108_EC_INTMASK,
918 TSI_READ(TSI108_EC_INTMASK) |
919 TSI108_INT_RXQUEUE0
920 | TSI108_INT_RXTHRESH |
921 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
922 TSI108_INT_RXWAIT);
923 __napi_schedule(&data->napi);
924 } else {
925 if (!netif_running(dev)) {
926 /* This can happen if an interrupt occurs while the
927 * interface is being brought down, as the START
928 * bit is cleared before the stop function is called.
929 *
930 * In this case, the interrupts must be masked, or
931 * they will continue indefinitely.
932 *
933 * There's a race here if the interface is brought down
934 * and then up in rapid succession, as the device could
935 * be made running after the above check and before
936 * the masking below. This will only happen if the IRQ
937 * thread has a lower priority than the task brining
938 * up the interface. Fixing this race would likely
939 * require changes in generic code.
940 */
941
942 TSI_WRITE(TSI108_EC_INTMASK,
943 TSI_READ
944 (TSI108_EC_INTMASK) |
945 TSI108_INT_RXQUEUE0 |
946 TSI108_INT_RXTHRESH |
947 TSI108_INT_RXOVERRUN |
948 TSI108_INT_RXERROR |
949 TSI108_INT_RXWAIT);
950 }
951 }
952 }
953
954 /* If the RX ring has run out of memory, try periodically
955 * to allocate some more, as otherwise poll would never
956 * get called (apart from the initial end-of-queue condition).
957 *
958 * This is called once per second (by default) from the thread.
959 */
960
961 static void tsi108_check_rxring(struct net_device *dev)
962 {
963 struct tsi108_prv_data *data = netdev_priv(dev);
964
965 /* A poll is scheduled, as opposed to caling tsi108_refill_rx
966 * directly, so as to keep the receive path single-threaded
967 * (and thus not needing a lock).
968 */
969
970 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
971 tsi108_rx_int(dev);
972 }
973
974 static void tsi108_tx_int(struct net_device *dev)
975 {
976 struct tsi108_prv_data *data = netdev_priv(dev);
977 u32 estat = TSI_READ(TSI108_EC_TXESTAT);
978
979 TSI_WRITE(TSI108_EC_TXESTAT, estat);
980 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
981 TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
982 if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
983 u32 err = TSI_READ(TSI108_EC_TXERR);
984 TSI_WRITE(TSI108_EC_TXERR, err);
985
986 if (err && net_ratelimit())
987 printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
988 }
989
990 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
991 spin_lock(&data->txlock);
992 tsi108_complete_tx(dev);
993 spin_unlock(&data->txlock);
994 }
995 }
996
997
998 static irqreturn_t tsi108_irq(int irq, void *dev_id)
999 {
1000 struct net_device *dev = dev_id;
1001 struct tsi108_prv_data *data = netdev_priv(dev);
1002 u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1003
1004 if (!(stat & TSI108_INT_ANY))
1005 return IRQ_NONE; /* Not our interrupt */
1006
1007 stat &= ~TSI_READ(TSI108_EC_INTMASK);
1008
1009 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1010 TSI108_INT_TXERROR))
1011 tsi108_tx_int(dev);
1012 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1013 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1014 TSI108_INT_RXERROR))
1015 tsi108_rx_int(dev);
1016
1017 if (stat & TSI108_INT_SFN) {
1018 if (net_ratelimit())
1019 printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1020 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1021 }
1022
1023 if (stat & TSI108_INT_STATCARRY) {
1024 tsi108_stat_carry(dev);
1025 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1026 }
1027
1028 return IRQ_HANDLED;
1029 }
1030
1031 static void tsi108_stop_ethernet(struct net_device *dev)
1032 {
1033 struct tsi108_prv_data *data = netdev_priv(dev);
1034 int i = 1000;
1035 /* Disable all TX and RX queues ... */
1036 TSI_WRITE(TSI108_EC_TXCTRL, 0);
1037 TSI_WRITE(TSI108_EC_RXCTRL, 0);
1038
1039 /* ...and wait for them to become idle */
1040 while(i--) {
1041 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1042 break;
1043 udelay(10);
1044 }
1045 i = 1000;
1046 while(i--){
1047 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1048 return;
1049 udelay(10);
1050 }
1051 printk(KERN_ERR "%s function time out\n", __func__);
1052 }
1053
1054 static void tsi108_reset_ether(struct tsi108_prv_data * data)
1055 {
1056 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1057 udelay(100);
1058 TSI_WRITE(TSI108_MAC_CFG1, 0);
1059
1060 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1061 udelay(100);
1062 TSI_WRITE(TSI108_EC_PORTCTRL,
1063 TSI_READ(TSI108_EC_PORTCTRL) &
1064 ~TSI108_EC_PORTCTRL_STATRST);
1065
1066 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1067 udelay(100);
1068 TSI_WRITE(TSI108_EC_TXCFG,
1069 TSI_READ(TSI108_EC_TXCFG) &
1070 ~TSI108_EC_TXCFG_RST);
1071
1072 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1073 udelay(100);
1074 TSI_WRITE(TSI108_EC_RXCFG,
1075 TSI_READ(TSI108_EC_RXCFG) &
1076 ~TSI108_EC_RXCFG_RST);
1077
1078 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1079 TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1080 TSI108_MAC_MII_MGMT_RST);
1081 udelay(100);
1082 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1083 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1084 ~(TSI108_MAC_MII_MGMT_RST |
1085 TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1086 }
1087
1088 static int tsi108_get_mac(struct net_device *dev)
1089 {
1090 struct tsi108_prv_data *data = netdev_priv(dev);
1091 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1092 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1093
1094 /* Note that the octets are reversed from what the manual says,
1095 * producing an even weirder ordering...
1096 */
1097 if (word2 == 0 && word1 == 0) {
1098 dev->dev_addr[0] = 0x00;
1099 dev->dev_addr[1] = 0x06;
1100 dev->dev_addr[2] = 0xd2;
1101 dev->dev_addr[3] = 0x00;
1102 dev->dev_addr[4] = 0x00;
1103 if (0x8 == data->phy)
1104 dev->dev_addr[5] = 0x01;
1105 else
1106 dev->dev_addr[5] = 0x02;
1107
1108 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1109
1110 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1111 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1112
1113 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1114 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1115 } else {
1116 dev->dev_addr[0] = (word2 >> 16) & 0xff;
1117 dev->dev_addr[1] = (word2 >> 24) & 0xff;
1118 dev->dev_addr[2] = (word1 >> 0) & 0xff;
1119 dev->dev_addr[3] = (word1 >> 8) & 0xff;
1120 dev->dev_addr[4] = (word1 >> 16) & 0xff;
1121 dev->dev_addr[5] = (word1 >> 24) & 0xff;
1122 }
1123
1124 if (!is_valid_ether_addr(dev->dev_addr)) {
1125 printk(KERN_ERR
1126 "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1127 dev->name, word1, word2);
1128 return -EINVAL;
1129 }
1130
1131 return 0;
1132 }
1133
1134 static int tsi108_set_mac(struct net_device *dev, void *addr)
1135 {
1136 struct tsi108_prv_data *data = netdev_priv(dev);
1137 u32 word1, word2;
1138 int i;
1139
1140 if (!is_valid_ether_addr(addr))
1141 return -EADDRNOTAVAIL;
1142
1143 for (i = 0; i < 6; i++)
1144 /* +2 is for the offset of the HW addr type */
1145 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1146
1147 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1148
1149 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1150 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1151
1152 spin_lock_irq(&data->misclock);
1153 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1154 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1155 spin_lock(&data->txlock);
1156
1157 if (data->txfree && data->link_up)
1158 netif_wake_queue(dev);
1159
1160 spin_unlock(&data->txlock);
1161 spin_unlock_irq(&data->misclock);
1162 return 0;
1163 }
1164
1165 /* Protected by dev->xmit_lock. */
1166 static void tsi108_set_rx_mode(struct net_device *dev)
1167 {
1168 struct tsi108_prv_data *data = netdev_priv(dev);
1169 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1170
1171 if (dev->flags & IFF_PROMISC) {
1172 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1173 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1174 goto out;
1175 }
1176
1177 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1178
1179 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1180 int i;
1181 struct netdev_hw_addr *ha;
1182 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1183
1184 memset(data->mc_hash, 0, sizeof(data->mc_hash));
1185
1186 netdev_for_each_mc_addr(ha, dev) {
1187 u32 hash, crc;
1188
1189 crc = ether_crc(6, ha->addr);
1190 hash = crc >> 23;
1191 __set_bit(hash, &data->mc_hash[0]);
1192 }
1193
1194 TSI_WRITE(TSI108_EC_HASHADDR,
1195 TSI108_EC_HASHADDR_AUTOINC |
1196 TSI108_EC_HASHADDR_MCAST);
1197
1198 for (i = 0; i < 16; i++) {
1199 /* The manual says that the hardware may drop
1200 * back-to-back writes to the data register.
1201 */
1202 udelay(1);
1203 TSI_WRITE(TSI108_EC_HASHDATA,
1204 data->mc_hash[i]);
1205 }
1206 }
1207
1208 out:
1209 TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1210 }
1211
1212 static void tsi108_init_phy(struct net_device *dev)
1213 {
1214 struct tsi108_prv_data *data = netdev_priv(dev);
1215 u32 i = 0;
1216 u16 phyval = 0;
1217 unsigned long flags;
1218
1219 spin_lock_irqsave(&phy_lock, flags);
1220
1221 tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1222 while (--i) {
1223 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1224 break;
1225 udelay(10);
1226 }
1227 if (i == 0)
1228 printk(KERN_ERR "%s function time out\n", __func__);
1229
1230 if (data->phy_type == TSI108_PHY_BCM54XX) {
1231 tsi108_write_mii(data, 0x09, 0x0300);
1232 tsi108_write_mii(data, 0x10, 0x1020);
1233 tsi108_write_mii(data, 0x1c, 0x8c00);
1234 }
1235
1236 tsi108_write_mii(data,
1237 MII_BMCR,
1238 BMCR_ANENABLE | BMCR_ANRESTART);
1239 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1240 cpu_relax();
1241
1242 /* Set G/MII mode and receive clock select in TBI control #2. The
1243 * second port won't work if this isn't done, even though we don't
1244 * use TBI mode.
1245 */
1246
1247 tsi108_write_tbi(data, 0x11, 0x30);
1248
1249 /* FIXME: It seems to take more than 2 back-to-back reads to the
1250 * PHY_STAT register before the link up status bit is set.
1251 */
1252
1253 data->link_up = 0;
1254
1255 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1256 BMSR_LSTATUS)) {
1257 if (i++ > (MII_READ_DELAY / 10)) {
1258 break;
1259 }
1260 spin_unlock_irqrestore(&phy_lock, flags);
1261 msleep(10);
1262 spin_lock_irqsave(&phy_lock, flags);
1263 }
1264
1265 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1266 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1267 data->phy_ok = 1;
1268 data->init_media = 1;
1269 spin_unlock_irqrestore(&phy_lock, flags);
1270 }
1271
1272 static void tsi108_kill_phy(struct net_device *dev)
1273 {
1274 struct tsi108_prv_data *data = netdev_priv(dev);
1275 unsigned long flags;
1276
1277 spin_lock_irqsave(&phy_lock, flags);
1278 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1279 data->phy_ok = 0;
1280 spin_unlock_irqrestore(&phy_lock, flags);
1281 }
1282
1283 static int tsi108_open(struct net_device *dev)
1284 {
1285 int i;
1286 struct tsi108_prv_data *data = netdev_priv(dev);
1287 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1288 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1289
1290 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1291 if (i != 0) {
1292 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1293 data->id, data->irq_num);
1294 return i;
1295 } else {
1296 dev->irq = data->irq_num;
1297 printk(KERN_NOTICE
1298 "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1299 data->id, dev->irq, dev->name);
1300 }
1301
1302 data->rxring = dma_alloc_coherent(&data->pdev->dev, rxring_size,
1303 &data->rxdma, GFP_KERNEL);
1304 if (!data->rxring)
1305 return -ENOMEM;
1306
1307 data->txring = dma_alloc_coherent(&data->pdev->dev, txring_size,
1308 &data->txdma, GFP_KERNEL);
1309 if (!data->txring) {
1310 dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
1311 data->rxdma);
1312 return -ENOMEM;
1313 }
1314
1315 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1316 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1317 data->rxring[i].blen = TSI108_RXBUF_SIZE;
1318 data->rxring[i].vlan = 0;
1319 }
1320
1321 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1322
1323 data->rxtail = 0;
1324 data->rxhead = 0;
1325
1326 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1327 struct sk_buff *skb;
1328
1329 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1330 if (!skb) {
1331 /* Bah. No memory for now, but maybe we'll get
1332 * some more later.
1333 * For now, we'll live with the smaller ring.
1334 */
1335 printk(KERN_WARNING
1336 "%s: Could only allocate %d receive skb(s).\n",
1337 dev->name, i);
1338 data->rxhead = i;
1339 break;
1340 }
1341
1342 data->rxskbs[i] = skb;
1343 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1344 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1345 }
1346
1347 data->rxfree = i;
1348 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1349
1350 for (i = 0; i < TSI108_TXRING_LEN; i++) {
1351 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1352 data->txring[i].misc = 0;
1353 }
1354
1355 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1356 data->txtail = 0;
1357 data->txhead = 0;
1358 data->txfree = TSI108_TXRING_LEN;
1359 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1360 tsi108_init_phy(dev);
1361
1362 napi_enable(&data->napi);
1363
1364 timer_setup(&data->timer, tsi108_timed_checker, 0);
1365 mod_timer(&data->timer, jiffies + 1);
1366
1367 tsi108_restart_rx(data, dev);
1368
1369 TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1370
1371 TSI_WRITE(TSI108_EC_INTMASK,
1372 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1373 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1374 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1375 TSI108_INT_SFN | TSI108_INT_STATCARRY));
1376
1377 TSI_WRITE(TSI108_MAC_CFG1,
1378 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1379 netif_start_queue(dev);
1380 return 0;
1381 }
1382
1383 static int tsi108_close(struct net_device *dev)
1384 {
1385 struct tsi108_prv_data *data = netdev_priv(dev);
1386
1387 netif_stop_queue(dev);
1388 napi_disable(&data->napi);
1389
1390 del_timer_sync(&data->timer);
1391
1392 tsi108_stop_ethernet(dev);
1393 tsi108_kill_phy(dev);
1394 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1395 TSI_WRITE(TSI108_MAC_CFG1, 0);
1396
1397 /* Check for any pending TX packets, and drop them. */
1398
1399 while (!data->txfree || data->txhead != data->txtail) {
1400 int tx = data->txtail;
1401 struct sk_buff *skb;
1402 skb = data->txskbs[tx];
1403 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1404 data->txfree++;
1405 dev_kfree_skb(skb);
1406 }
1407
1408 free_irq(data->irq_num, dev);
1409
1410 /* Discard the RX ring. */
1411
1412 while (data->rxfree) {
1413 int rx = data->rxtail;
1414 struct sk_buff *skb;
1415
1416 skb = data->rxskbs[rx];
1417 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1418 data->rxfree--;
1419 dev_kfree_skb(skb);
1420 }
1421
1422 dma_free_coherent(&data->pdev->dev,
1423 TSI108_RXRING_LEN * sizeof(rx_desc),
1424 data->rxring, data->rxdma);
1425 dma_free_coherent(&data->pdev->dev,
1426 TSI108_TXRING_LEN * sizeof(tx_desc),
1427 data->txring, data->txdma);
1428
1429 return 0;
1430 }
1431
1432 static void tsi108_init_mac(struct net_device *dev)
1433 {
1434 struct tsi108_prv_data *data = netdev_priv(dev);
1435
1436 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1437 TSI108_MAC_CFG2_PADCRC);
1438
1439 TSI_WRITE(TSI108_EC_TXTHRESH,
1440 (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1441 (192 << TSI108_EC_TXTHRESH_STOPFILL));
1442
1443 TSI_WRITE(TSI108_STAT_CARRYMASK1,
1444 ~(TSI108_STAT_CARRY1_RXBYTES |
1445 TSI108_STAT_CARRY1_RXPKTS |
1446 TSI108_STAT_CARRY1_RXFCS |
1447 TSI108_STAT_CARRY1_RXMCAST |
1448 TSI108_STAT_CARRY1_RXALIGN |
1449 TSI108_STAT_CARRY1_RXLENGTH |
1450 TSI108_STAT_CARRY1_RXRUNT |
1451 TSI108_STAT_CARRY1_RXJUMBO |
1452 TSI108_STAT_CARRY1_RXFRAG |
1453 TSI108_STAT_CARRY1_RXJABBER |
1454 TSI108_STAT_CARRY1_RXDROP));
1455
1456 TSI_WRITE(TSI108_STAT_CARRYMASK2,
1457 ~(TSI108_STAT_CARRY2_TXBYTES |
1458 TSI108_STAT_CARRY2_TXPKTS |
1459 TSI108_STAT_CARRY2_TXEXDEF |
1460 TSI108_STAT_CARRY2_TXEXCOL |
1461 TSI108_STAT_CARRY2_TXTCOL |
1462 TSI108_STAT_CARRY2_TXPAUSE));
1463
1464 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1465 TSI_WRITE(TSI108_MAC_CFG1, 0);
1466
1467 TSI_WRITE(TSI108_EC_RXCFG,
1468 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1469
1470 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1471 TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1472 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1473 TSI108_EC_TXQ_CFG_SFNPORT));
1474
1475 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1476 TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1477 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1478 TSI108_EC_RXQ_CFG_SFNPORT));
1479
1480 TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1481 TSI108_EC_TXQ_BUFCFG_BURST256 |
1482 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1483 TSI108_EC_TXQ_BUFCFG_SFNPORT));
1484
1485 TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1486 TSI108_EC_RXQ_BUFCFG_BURST256 |
1487 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1488 TSI108_EC_RXQ_BUFCFG_SFNPORT));
1489
1490 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1491 }
1492
1493 static int tsi108_get_link_ksettings(struct net_device *dev,
1494 struct ethtool_link_ksettings *cmd)
1495 {
1496 struct tsi108_prv_data *data = netdev_priv(dev);
1497 unsigned long flags;
1498
1499 spin_lock_irqsave(&data->txlock, flags);
1500 mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
1501 spin_unlock_irqrestore(&data->txlock, flags);
1502
1503 return 0;
1504 }
1505
1506 static int tsi108_set_link_ksettings(struct net_device *dev,
1507 const struct ethtool_link_ksettings *cmd)
1508 {
1509 struct tsi108_prv_data *data = netdev_priv(dev);
1510 unsigned long flags;
1511 int rc;
1512
1513 spin_lock_irqsave(&data->txlock, flags);
1514 rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
1515 spin_unlock_irqrestore(&data->txlock, flags);
1516
1517 return rc;
1518 }
1519
1520 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1521 {
1522 struct tsi108_prv_data *data = netdev_priv(dev);
1523 if (!netif_running(dev))
1524 return -EINVAL;
1525 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1526 }
1527
1528 static const struct ethtool_ops tsi108_ethtool_ops = {
1529 .get_link = ethtool_op_get_link,
1530 .get_link_ksettings = tsi108_get_link_ksettings,
1531 .set_link_ksettings = tsi108_set_link_ksettings,
1532 };
1533
1534 static const struct net_device_ops tsi108_netdev_ops = {
1535 .ndo_open = tsi108_open,
1536 .ndo_stop = tsi108_close,
1537 .ndo_start_xmit = tsi108_send_packet,
1538 .ndo_set_rx_mode = tsi108_set_rx_mode,
1539 .ndo_get_stats = tsi108_get_stats,
1540 .ndo_do_ioctl = tsi108_do_ioctl,
1541 .ndo_set_mac_address = tsi108_set_mac,
1542 .ndo_validate_addr = eth_validate_addr,
1543 };
1544
1545 static int
1546 tsi108_init_one(struct platform_device *pdev)
1547 {
1548 struct net_device *dev = NULL;
1549 struct tsi108_prv_data *data = NULL;
1550 hw_info *einfo;
1551 int err = 0;
1552
1553 einfo = dev_get_platdata(&pdev->dev);
1554
1555 if (NULL == einfo) {
1556 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1557 pdev->id);
1558 return -ENODEV;
1559 }
1560
1561 /* Create an ethernet device instance */
1562
1563 dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1564 if (!dev)
1565 return -ENOMEM;
1566
1567 printk("tsi108_eth%d: probe...\n", pdev->id);
1568 data = netdev_priv(dev);
1569 data->dev = dev;
1570 data->pdev = pdev;
1571
1572 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1573 pdev->id, einfo->regs, einfo->phyregs,
1574 einfo->phy, einfo->irq_num);
1575
1576 data->regs = ioremap(einfo->regs, 0x400);
1577 if (NULL == data->regs) {
1578 err = -ENOMEM;
1579 goto regs_fail;
1580 }
1581
1582 data->phyregs = ioremap(einfo->phyregs, 0x400);
1583 if (NULL == data->phyregs) {
1584 err = -ENOMEM;
1585 goto phyregs_fail;
1586 }
1587 /* MII setup */
1588 data->mii_if.dev = dev;
1589 data->mii_if.mdio_read = tsi108_mdio_read;
1590 data->mii_if.mdio_write = tsi108_mdio_write;
1591 data->mii_if.phy_id = einfo->phy;
1592 data->mii_if.phy_id_mask = 0x1f;
1593 data->mii_if.reg_num_mask = 0x1f;
1594
1595 data->phy = einfo->phy;
1596 data->phy_type = einfo->phy_type;
1597 data->irq_num = einfo->irq_num;
1598 data->id = pdev->id;
1599 netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1600 dev->netdev_ops = &tsi108_netdev_ops;
1601 dev->ethtool_ops = &tsi108_ethtool_ops;
1602
1603 /* Apparently, the Linux networking code won't use scatter-gather
1604 * if the hardware doesn't do checksums. However, it's faster
1605 * to checksum in place and use SG, as (among other reasons)
1606 * the cache won't be dirtied (which then has to be flushed
1607 * before DMA). The checksumming is done by the driver (via
1608 * a new function skb_csum_dev() in net/core/skbuff.c).
1609 */
1610
1611 dev->features = NETIF_F_HIGHDMA;
1612
1613 spin_lock_init(&data->txlock);
1614 spin_lock_init(&data->misclock);
1615
1616 tsi108_reset_ether(data);
1617 tsi108_kill_phy(dev);
1618
1619 if ((err = tsi108_get_mac(dev)) != 0) {
1620 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
1621 dev->name);
1622 goto register_fail;
1623 }
1624
1625 tsi108_init_mac(dev);
1626 err = register_netdev(dev);
1627 if (err) {
1628 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1629 dev->name);
1630 goto register_fail;
1631 }
1632
1633 platform_set_drvdata(pdev, dev);
1634 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1635 dev->name, dev->dev_addr);
1636 #ifdef DEBUG
1637 data->msg_enable = DEBUG;
1638 dump_eth_one(dev);
1639 #endif
1640
1641 return 0;
1642
1643 register_fail:
1644 iounmap(data->phyregs);
1645
1646 phyregs_fail:
1647 iounmap(data->regs);
1648
1649 regs_fail:
1650 free_netdev(dev);
1651 return err;
1652 }
1653
1654 /* There's no way to either get interrupts from the PHY when
1655 * something changes, or to have the Tsi108 automatically communicate
1656 * with the PHY to reconfigure itself.
1657 *
1658 * Thus, we have to do it using a timer.
1659 */
1660
1661 static void tsi108_timed_checker(struct timer_list *t)
1662 {
1663 struct tsi108_prv_data *data = from_timer(data, t, timer);
1664 struct net_device *dev = data->dev;
1665
1666 tsi108_check_phy(dev);
1667 tsi108_check_rxring(dev);
1668 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1669 }
1670
1671 static int tsi108_ether_remove(struct platform_device *pdev)
1672 {
1673 struct net_device *dev = platform_get_drvdata(pdev);
1674 struct tsi108_prv_data *priv = netdev_priv(dev);
1675
1676 unregister_netdev(dev);
1677 tsi108_stop_ethernet(dev);
1678 iounmap(priv->regs);
1679 iounmap(priv->phyregs);
1680 free_netdev(dev);
1681
1682 return 0;
1683 }
1684 module_platform_driver(tsi_eth_driver);
1685
1686 MODULE_AUTHOR("Tundra Semiconductor Corporation");
1687 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1688 MODULE_LICENSE("GPL");
1689 MODULE_ALIAS("platform:tsi-ethernet");
Linux with added FPC-III support