2 * Copyright (C) 2016 MediaTek Inc.
4 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <linux/clk.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/iopoll.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/of_address.h>
23 #include <linux/of_irq.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <linux/platform_device.h>
30 /* u2-port0 should be powered on and enabled; */
31 int ssusb_check_clocks(struct ssusb_mtk
*ssusb
, u32 ex_clks
)
33 void __iomem
*ibase
= ssusb
->ippc_base
;
37 check_val
= ex_clks
| SSUSB_SYS125_RST_B_STS
| SSUSB_SYSPLL_STABLE
|
40 ret
= readl_poll_timeout(ibase
+ U3D_SSUSB_IP_PW_STS1
, value
,
41 (check_val
== (value
& check_val
)), 100, 20000);
43 dev_err(ssusb
->dev
, "clks of sts1 are not stable!\n");
47 ret
= readl_poll_timeout(ibase
+ U3D_SSUSB_IP_PW_STS2
, value
,
48 (value
& SSUSB_U2_MAC_SYS_RST_B_STS
), 100, 10000);
50 dev_err(ssusb
->dev
, "mac2 clock is not stable\n");
57 static int ssusb_phy_init(struct ssusb_mtk
*ssusb
)
62 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
63 ret
= phy_init(ssusb
->phys
[i
]);
71 phy_exit(ssusb
->phys
[i
- 1]);
76 static int ssusb_phy_exit(struct ssusb_mtk
*ssusb
)
80 for (i
= 0; i
< ssusb
->num_phys
; i
++)
81 phy_exit(ssusb
->phys
[i
]);
86 static int ssusb_phy_power_on(struct ssusb_mtk
*ssusb
)
91 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
92 ret
= phy_power_on(ssusb
->phys
[i
]);
100 phy_power_off(ssusb
->phys
[i
- 1]);
105 static void ssusb_phy_power_off(struct ssusb_mtk
*ssusb
)
109 for (i
= 0; i
< ssusb
->num_phys
; i
++)
110 phy_power_off(ssusb
->phys
[i
]);
113 static int ssusb_rscs_init(struct ssusb_mtk
*ssusb
)
117 ret
= regulator_enable(ssusb
->vusb33
);
119 dev_err(ssusb
->dev
, "failed to enable vusb33\n");
123 ret
= clk_prepare_enable(ssusb
->sys_clk
);
125 dev_err(ssusb
->dev
, "failed to enable sys_clk\n");
129 ret
= clk_prepare_enable(ssusb
->ref_clk
);
131 dev_err(ssusb
->dev
, "failed to enable ref_clk\n");
135 ret
= ssusb_phy_init(ssusb
);
137 dev_err(ssusb
->dev
, "failed to init phy\n");
141 ret
= ssusb_phy_power_on(ssusb
);
143 dev_err(ssusb
->dev
, "failed to power on phy\n");
150 ssusb_phy_exit(ssusb
);
152 clk_disable_unprepare(ssusb
->ref_clk
);
154 clk_disable_unprepare(ssusb
->sys_clk
);
156 regulator_disable(ssusb
->vusb33
);
162 static void ssusb_rscs_exit(struct ssusb_mtk
*ssusb
)
164 clk_disable_unprepare(ssusb
->sys_clk
);
165 clk_disable_unprepare(ssusb
->ref_clk
);
166 regulator_disable(ssusb
->vusb33
);
167 ssusb_phy_power_off(ssusb
);
168 ssusb_phy_exit(ssusb
);
171 static void ssusb_ip_sw_reset(struct ssusb_mtk
*ssusb
)
173 /* reset whole ip (xhci & u3d) */
174 mtu3_setbits(ssusb
->ippc_base
, U3D_SSUSB_IP_PW_CTRL0
, SSUSB_IP_SW_RST
);
176 mtu3_clrbits(ssusb
->ippc_base
, U3D_SSUSB_IP_PW_CTRL0
, SSUSB_IP_SW_RST
);
179 static int get_iddig_pinctrl(struct ssusb_mtk
*ssusb
)
181 struct otg_switch_mtk
*otg_sx
= &ssusb
->otg_switch
;
183 otg_sx
->id_pinctrl
= devm_pinctrl_get(ssusb
->dev
);
184 if (IS_ERR(otg_sx
->id_pinctrl
)) {
185 dev_err(ssusb
->dev
, "Cannot find id pinctrl!\n");
186 return PTR_ERR(otg_sx
->id_pinctrl
);
190 pinctrl_lookup_state(otg_sx
->id_pinctrl
, "id_float");
191 if (IS_ERR(otg_sx
->id_float
)) {
192 dev_err(ssusb
->dev
, "Cannot find pinctrl id_float!\n");
193 return PTR_ERR(otg_sx
->id_float
);
197 pinctrl_lookup_state(otg_sx
->id_pinctrl
, "id_ground");
198 if (IS_ERR(otg_sx
->id_ground
)) {
199 dev_err(ssusb
->dev
, "Cannot find pinctrl id_ground!\n");
200 return PTR_ERR(otg_sx
->id_ground
);
206 static int get_ssusb_rscs(struct platform_device
*pdev
, struct ssusb_mtk
*ssusb
)
208 struct device_node
*node
= pdev
->dev
.of_node
;
209 struct otg_switch_mtk
*otg_sx
= &ssusb
->otg_switch
;
210 struct device
*dev
= &pdev
->dev
;
211 struct regulator
*vbus
;
212 struct resource
*res
;
216 ssusb
->vusb33
= devm_regulator_get(&pdev
->dev
, "vusb33");
217 if (IS_ERR(ssusb
->vusb33
)) {
218 dev_err(dev
, "failed to get vusb33\n");
219 return PTR_ERR(ssusb
->vusb33
);
222 ssusb
->sys_clk
= devm_clk_get(dev
, "sys_ck");
223 if (IS_ERR(ssusb
->sys_clk
)) {
224 dev_err(dev
, "failed to get sys clock\n");
225 return PTR_ERR(ssusb
->sys_clk
);
229 * reference clock is usually a "fixed-clock", make it optional
230 * for backward compatibility and ignore the error if it does
233 ssusb
->ref_clk
= devm_clk_get(dev
, "ref_ck");
234 if (IS_ERR(ssusb
->ref_clk
)) {
235 if (PTR_ERR(ssusb
->ref_clk
) == -EPROBE_DEFER
)
236 return -EPROBE_DEFER
;
238 ssusb
->ref_clk
= NULL
;
241 ssusb
->num_phys
= of_count_phandle_with_args(node
,
242 "phys", "#phy-cells");
243 if (ssusb
->num_phys
> 0) {
244 ssusb
->phys
= devm_kcalloc(dev
, ssusb
->num_phys
,
245 sizeof(*ssusb
->phys
), GFP_KERNEL
);
252 for (i
= 0; i
< ssusb
->num_phys
; i
++) {
253 ssusb
->phys
[i
] = devm_of_phy_get_by_index(dev
, node
, i
);
254 if (IS_ERR(ssusb
->phys
[i
])) {
255 dev_err(dev
, "failed to get phy-%d\n", i
);
256 return PTR_ERR(ssusb
->phys
[i
]);
260 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "ippc");
261 ssusb
->ippc_base
= devm_ioremap_resource(dev
, res
);
262 if (IS_ERR(ssusb
->ippc_base
))
263 return PTR_ERR(ssusb
->ippc_base
);
265 ssusb
->dr_mode
= usb_get_dr_mode(dev
);
266 if (ssusb
->dr_mode
== USB_DR_MODE_UNKNOWN
) {
267 dev_err(dev
, "dr_mode is error\n");
271 if (ssusb
->dr_mode
== USB_DR_MODE_PERIPHERAL
)
274 /* if host role is supported */
275 ret
= ssusb_wakeup_of_property_parse(ssusb
, node
);
279 if (ssusb
->dr_mode
!= USB_DR_MODE_OTG
)
282 /* if dual-role mode is supported */
283 vbus
= devm_regulator_get(&pdev
->dev
, "vbus");
285 dev_err(dev
, "failed to get vbus\n");
286 return PTR_ERR(vbus
);
290 otg_sx
->is_u3_drd
= of_property_read_bool(node
, "mediatek,usb3-drd");
291 otg_sx
->manual_drd_enabled
=
292 of_property_read_bool(node
, "enable-manual-drd");
294 if (of_property_read_bool(node
, "extcon")) {
295 otg_sx
->edev
= extcon_get_edev_by_phandle(ssusb
->dev
, 0);
296 if (IS_ERR(otg_sx
->edev
)) {
297 dev_err(ssusb
->dev
, "couldn't get extcon device\n");
298 return -EPROBE_DEFER
;
300 if (otg_sx
->manual_drd_enabled
) {
301 ret
= get_iddig_pinctrl(ssusb
);
307 dev_info(dev
, "dr_mode: %d, is_u3_dr: %d\n",
308 ssusb
->dr_mode
, otg_sx
->is_u3_drd
);
313 static int mtu3_probe(struct platform_device
*pdev
)
315 struct device_node
*node
= pdev
->dev
.of_node
;
316 struct device
*dev
= &pdev
->dev
;
317 struct ssusb_mtk
*ssusb
;
320 /* all elements are set to ZERO as default value */
321 ssusb
= devm_kzalloc(dev
, sizeof(*ssusb
), GFP_KERNEL
);
325 ret
= dma_set_mask_and_coherent(dev
, DMA_BIT_MASK(32));
327 dev_err(dev
, "No suitable DMA config available\n");
331 platform_set_drvdata(pdev
, ssusb
);
334 ret
= get_ssusb_rscs(pdev
, ssusb
);
338 /* enable power domain */
339 pm_runtime_enable(dev
);
340 pm_runtime_get_sync(dev
);
341 device_enable_async_suspend(dev
);
343 ret
= ssusb_rscs_init(ssusb
);
347 ssusb_ip_sw_reset(ssusb
);
349 if (IS_ENABLED(CONFIG_USB_MTU3_HOST
))
350 ssusb
->dr_mode
= USB_DR_MODE_HOST
;
351 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET
))
352 ssusb
->dr_mode
= USB_DR_MODE_PERIPHERAL
;
354 /* default as host */
355 ssusb
->is_host
= !(ssusb
->dr_mode
== USB_DR_MODE_PERIPHERAL
);
357 switch (ssusb
->dr_mode
) {
358 case USB_DR_MODE_PERIPHERAL
:
359 ret
= ssusb_gadget_init(ssusb
);
361 dev_err(dev
, "failed to initialize gadget\n");
365 case USB_DR_MODE_HOST
:
366 ret
= ssusb_host_init(ssusb
, node
);
368 dev_err(dev
, "failed to initialize host\n");
372 case USB_DR_MODE_OTG
:
373 ret
= ssusb_gadget_init(ssusb
);
375 dev_err(dev
, "failed to initialize gadget\n");
379 ret
= ssusb_host_init(ssusb
, node
);
381 dev_err(dev
, "failed to initialize host\n");
385 ssusb_otg_switch_init(ssusb
);
388 dev_err(dev
, "unsupported mode: %d\n", ssusb
->dr_mode
);
396 ssusb_gadget_exit(ssusb
);
398 ssusb_rscs_exit(ssusb
);
400 pm_runtime_put_sync(dev
);
401 pm_runtime_disable(dev
);
406 static int mtu3_remove(struct platform_device
*pdev
)
408 struct ssusb_mtk
*ssusb
= platform_get_drvdata(pdev
);
410 switch (ssusb
->dr_mode
) {
411 case USB_DR_MODE_PERIPHERAL
:
412 ssusb_gadget_exit(ssusb
);
414 case USB_DR_MODE_HOST
:
415 ssusb_host_exit(ssusb
);
417 case USB_DR_MODE_OTG
:
418 ssusb_otg_switch_exit(ssusb
);
419 ssusb_gadget_exit(ssusb
);
420 ssusb_host_exit(ssusb
);
426 ssusb_rscs_exit(ssusb
);
427 pm_runtime_put_sync(&pdev
->dev
);
428 pm_runtime_disable(&pdev
->dev
);
434 * when support dual-role mode, we reject suspend when
435 * it works as device mode;
437 static int __maybe_unused
mtu3_suspend(struct device
*dev
)
439 struct platform_device
*pdev
= to_platform_device(dev
);
440 struct ssusb_mtk
*ssusb
= platform_get_drvdata(pdev
);
442 dev_dbg(dev
, "%s\n", __func__
);
444 /* REVISIT: disconnect it for only device mode? */
448 ssusb_host_disable(ssusb
, true);
449 ssusb_phy_power_off(ssusb
);
450 clk_disable_unprepare(ssusb
->sys_clk
);
451 clk_disable_unprepare(ssusb
->ref_clk
);
452 ssusb_wakeup_enable(ssusb
);
457 static int __maybe_unused
mtu3_resume(struct device
*dev
)
459 struct platform_device
*pdev
= to_platform_device(dev
);
460 struct ssusb_mtk
*ssusb
= platform_get_drvdata(pdev
);
462 dev_dbg(dev
, "%s\n", __func__
);
467 ssusb_wakeup_disable(ssusb
);
468 clk_prepare_enable(ssusb
->sys_clk
);
469 clk_prepare_enable(ssusb
->ref_clk
);
470 ssusb_phy_power_on(ssusb
);
471 ssusb_host_enable(ssusb
);
476 static const struct dev_pm_ops mtu3_pm_ops
= {
477 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend
, mtu3_resume
)
480 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
484 static const struct of_device_id mtu3_of_match
[] = {
485 {.compatible
= "mediatek,mt8173-mtu3",},
489 MODULE_DEVICE_TABLE(of
, mtu3_of_match
);
493 static struct platform_driver mtu3_driver
= {
495 .remove
= mtu3_remove
,
497 .name
= MTU3_DRIVER_NAME
,
499 .of_match_table
= of_match_ptr(mtu3_of_match
),
502 module_platform_driver(mtu3_driver
);
504 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
505 MODULE_LICENSE("GPL v2");
506 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");