2 * include/asm/processor.h
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
7 #ifndef __ASM_SPARC64_PROCESSOR_H
8 #define __ASM_SPARC64_PROCESSOR_H
11 * Sparc64 implementation of macro that returns current
12 * instruction pointer ("program counter").
14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
17 #include <asm/pstate.h>
18 #include <asm/ptrace.h>
21 /* The sparc has no problems with write protection */
23 #define wp_works_ok__is_a_macro /* for versions in ksyms.c */
26 * User lives in his very own context, and cannot reference us. Note
27 * that TASK_SIZE is a misnomer, it really gives maximum user virtual
28 * address that the kernel will allocate out.
30 * XXX No longer using virtual page tables, kill this upper limit...
34 #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3))
36 #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3))
39 #define TASK_SIZE ((unsigned long)-VPTE_SIZE)
40 #define TASK_SIZE_OF(tsk) \
41 (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
42 (1UL << 32UL) : TASK_SIZE)
45 #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
46 #define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL))
48 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
49 STACK_TOP32 : STACK_TOP64)
51 #define STACK_TOP_MAX STACK_TOP64
61 /* The Sparc processor specific thread struct. */
62 /* XXX This should die, everything can go into thread_info now. */
63 struct thread_struct
{
64 #ifdef CONFIG_DEBUG_SPINLOCK
65 /* How many spinlocks held by this thread.
66 * Used with spin lock debugging to catch tasks
67 * sleeping illegally with locks held.
70 unsigned int smp_lock_pc
;
72 int dummy
; /* f'in gcc bug... */
76 #endif /* !(__ASSEMBLY__) */
78 #ifndef CONFIG_DEBUG_SPINLOCK
79 #define INIT_THREAD { \
82 #else /* CONFIG_DEBUG_SPINLOCK */
83 #define INIT_THREAD { \
84 /* smp_lock_count, smp_lock_pc, */ \
87 #endif /* !(CONFIG_DEBUG_SPINLOCK) */
91 #include <linux/types.h>
93 /* Return saved PC of a blocked thread. */
95 extern unsigned long thread_saved_pc(struct task_struct
*);
97 /* On Uniprocessor, even in RMO processes see TSO semantics */
99 #define TSTATE_INITIAL_MM TSTATE_TSO
101 #define TSTATE_INITIAL_MM TSTATE_RMO
104 /* Do necessary setup to start up a newly executed thread. */
105 #define start_thread(regs, pc, sp) \
107 unsigned long __asi = ASI_PNF; \
108 regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
109 regs->tpc = ((pc & (~3)) - 4); \
110 regs->tnpc = regs->tpc + 4; \
112 set_thread_wstate(1 << 3); \
113 if (current_thread_info()->utraps) { \
114 if (*(current_thread_info()->utraps) < 2) \
115 kfree(current_thread_info()->utraps); \
117 (*(current_thread_info()->utraps))--; \
118 current_thread_info()->utraps = NULL; \
120 __asm__ __volatile__( \
121 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
122 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
123 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
124 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
125 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
126 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
127 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
128 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
129 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
130 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
131 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
132 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
133 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
134 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
135 "stx %1, [%0 + %2 + 0x70]\n\t" \
136 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
137 "wrpr %%g0, (1 << 3), %%wstate\n\t" \
139 : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
140 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
143 #define start_thread32(regs, pc, sp) \
145 unsigned long __asi = ASI_PNF; \
146 pc &= 0x00000000ffffffffUL; \
147 sp &= 0x00000000ffffffffUL; \
148 regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
149 regs->tpc = ((pc & (~3)) - 4); \
150 regs->tnpc = regs->tpc + 4; \
152 set_thread_wstate(2 << 3); \
153 if (current_thread_info()->utraps) { \
154 if (*(current_thread_info()->utraps) < 2) \
155 kfree(current_thread_info()->utraps); \
157 (*(current_thread_info()->utraps))--; \
158 current_thread_info()->utraps = NULL; \
160 __asm__ __volatile__( \
161 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
162 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
163 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
164 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
165 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
166 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
167 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
168 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
169 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
170 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
171 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
172 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
173 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
174 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
175 "stx %1, [%0 + %2 + 0x70]\n\t" \
176 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
177 "wrpr %%g0, (2 << 3), %%wstate\n\t" \
179 : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
180 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
183 /* Free all resources held by a thread. */
184 #define release_thread(tsk) do { } while (0)
186 /* Prepare to copy thread state - unlazy all lazy status */
187 #define prepare_to_copy(tsk) do { } while (0)
189 extern pid_t
kernel_thread(int (*fn
)(void *), void * arg
, unsigned long flags
);
191 extern unsigned long get_wchan(struct task_struct
*task
);
193 #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
194 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
195 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
197 #define cpu_relax() barrier()
199 /* Prefetch support. This is tuned for UltraSPARC-III and later.
200 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
201 * a shallower prefetch queue than later chips.
203 #define ARCH_HAS_PREFETCH
204 #define ARCH_HAS_PREFETCHW
205 #define ARCH_HAS_SPINLOCK_PREFETCH
207 static inline void prefetch(const void *x
)
209 /* We do not use the read prefetch mnemonic because that
210 * prefetches into the prefetch-cache which only is accessible
211 * by floating point operations in UltraSPARC-III and later.
212 * By contrast, "#one_write" prefetches into the L2 cache
215 __asm__
__volatile__("prefetch [%0], #one_write"
220 static inline void prefetchw(const void *x
)
222 /* The most optimal prefetch to use for writes is
223 * "#n_writes". This brings the cacheline into the
224 * L2 cache in "owned" state.
226 __asm__
__volatile__("prefetch [%0], #n_writes"
231 #define spin_lock_prefetch(x) prefetchw(x)
233 #define HAVE_ARCH_PICK_MMAP_LAYOUT
235 #endif /* !(__ASSEMBLY__) */
237 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */