x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / arch / x86 / kernel / traps.c
blobaa0022a3faf5961a1c46642558bac98405decf06
1 /*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
9 /*
10 * Handle hardware traps and faults.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/export.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/sched/task_stack.h>
33 #include <linux/timer.h>
34 #include <linux/init.h>
35 #include <linux/bug.h>
36 #include <linux/nmi.h>
37 #include <linux/mm.h>
38 #include <linux/smp.h>
39 #include <linux/io.h>
41 #if defined(CONFIG_EDAC)
42 #include <linux/edac.h>
43 #endif
45 #include <asm/stacktrace.h>
46 #include <asm/processor.h>
47 #include <asm/debugreg.h>
48 #include <linux/atomic.h>
49 #include <asm/text-patching.h>
50 #include <asm/ftrace.h>
51 #include <asm/traps.h>
52 #include <asm/desc.h>
53 #include <asm/fpu/internal.h>
54 #include <asm/cpu_entry_area.h>
55 #include <asm/mce.h>
56 #include <asm/fixmap.h>
57 #include <asm/mach_traps.h>
58 #include <asm/alternative.h>
59 #include <asm/fpu/xstate.h>
60 #include <asm/trace/mpx.h>
61 #include <asm/nospec-branch.h>
62 #include <asm/mpx.h>
63 #include <asm/vm86.h>
65 #ifdef CONFIG_X86_64
66 #include <asm/x86_init.h>
67 #include <asm/pgalloc.h>
68 #include <asm/proto.h>
69 #else
70 #include <asm/processor-flags.h>
71 #include <asm/setup.h>
72 #include <asm/proto.h>
73 #endif
75 DECLARE_BITMAP(used_vectors, NR_VECTORS);
77 static inline void cond_local_irq_enable(struct pt_regs *regs)
79 if (regs->flags & X86_EFLAGS_IF)
80 local_irq_enable();
83 static inline void cond_local_irq_disable(struct pt_regs *regs)
85 if (regs->flags & X86_EFLAGS_IF)
86 local_irq_disable();
90 * In IST context, we explicitly disable preemption. This serves two
91 * purposes: it makes it much less likely that we would accidentally
92 * schedule in IST context and it will force a warning if we somehow
93 * manage to schedule by accident.
95 void ist_enter(struct pt_regs *regs)
97 if (user_mode(regs)) {
98 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
99 } else {
101 * We might have interrupted pretty much anything. In
102 * fact, if we're a machine check, we can even interrupt
103 * NMI processing. We don't want in_nmi() to return true,
104 * but we need to notify RCU.
106 rcu_nmi_enter();
109 preempt_disable();
111 /* This code is a bit fragile. Test it. */
112 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
115 void ist_exit(struct pt_regs *regs)
117 preempt_enable_no_resched();
119 if (!user_mode(regs))
120 rcu_nmi_exit();
124 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
125 * @regs: regs passed to the IST exception handler
127 * IST exception handlers normally cannot schedule. As a special
128 * exception, if the exception interrupted userspace code (i.e.
129 * user_mode(regs) would return true) and the exception was not
130 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
131 * begins a non-atomic section within an ist_enter()/ist_exit() region.
132 * Callers are responsible for enabling interrupts themselves inside
133 * the non-atomic section, and callers must call ist_end_non_atomic()
134 * before ist_exit().
136 void ist_begin_non_atomic(struct pt_regs *regs)
138 BUG_ON(!user_mode(regs));
141 * Sanity check: we need to be on the normal thread stack. This
142 * will catch asm bugs and any attempt to use ist_preempt_enable
143 * from double_fault.
145 BUG_ON(!on_thread_stack());
147 preempt_enable_no_resched();
151 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
153 * Ends a non-atomic section started with ist_begin_non_atomic().
155 void ist_end_non_atomic(void)
157 preempt_disable();
160 int is_valid_bugaddr(unsigned long addr)
162 unsigned short ud;
164 if (addr < TASK_SIZE_MAX)
165 return 0;
167 if (probe_kernel_address((unsigned short *)addr, ud))
168 return 0;
170 return ud == INSN_UD0 || ud == INSN_UD2;
173 int fixup_bug(struct pt_regs *regs, int trapnr)
175 if (trapnr != X86_TRAP_UD)
176 return 0;
178 switch (report_bug(regs->ip, regs)) {
179 case BUG_TRAP_TYPE_NONE:
180 case BUG_TRAP_TYPE_BUG:
181 break;
183 case BUG_TRAP_TYPE_WARN:
184 regs->ip += LEN_UD2;
185 return 1;
188 return 0;
191 static nokprobe_inline int
192 do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
193 struct pt_regs *regs, long error_code)
195 if (v8086_mode(regs)) {
197 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
198 * On nmi (interrupt 2), do_trap should not be called.
200 if (trapnr < X86_TRAP_UD) {
201 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
202 error_code, trapnr))
203 return 0;
205 return -1;
208 if (!user_mode(regs)) {
209 if (fixup_exception(regs, trapnr))
210 return 0;
212 tsk->thread.error_code = error_code;
213 tsk->thread.trap_nr = trapnr;
214 die(str, regs, error_code);
217 return -1;
220 static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
221 siginfo_t *info)
223 unsigned long siaddr;
224 int sicode;
226 switch (trapnr) {
227 default:
228 return SEND_SIG_PRIV;
230 case X86_TRAP_DE:
231 sicode = FPE_INTDIV;
232 siaddr = uprobe_get_trap_addr(regs);
233 break;
234 case X86_TRAP_UD:
235 sicode = ILL_ILLOPN;
236 siaddr = uprobe_get_trap_addr(regs);
237 break;
238 case X86_TRAP_AC:
239 sicode = BUS_ADRALN;
240 siaddr = 0;
241 break;
244 info->si_signo = signr;
245 info->si_errno = 0;
246 info->si_code = sicode;
247 info->si_addr = (void __user *)siaddr;
248 return info;
251 static void
252 do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
253 long error_code, siginfo_t *info)
255 struct task_struct *tsk = current;
258 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
259 return;
261 * We want error_code and trap_nr set for userspace faults and
262 * kernelspace faults which result in die(), but not
263 * kernelspace faults which are fixed up. die() gives the
264 * process no chance to handle the signal and notice the
265 * kernel fault information, so that won't result in polluting
266 * the information about previously queued, but not yet
267 * delivered, faults. See also do_general_protection below.
269 tsk->thread.error_code = error_code;
270 tsk->thread.trap_nr = trapnr;
272 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
273 printk_ratelimit()) {
274 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
275 tsk->comm, tsk->pid, str,
276 regs->ip, regs->sp, error_code);
277 print_vma_addr(KERN_CONT " in ", regs->ip);
278 pr_cont("\n");
281 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
283 NOKPROBE_SYMBOL(do_trap);
285 static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
286 unsigned long trapnr, int signr)
288 siginfo_t info;
290 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
293 * WARN*()s end up here; fix them up before we call the
294 * notifier chain.
296 if (!user_mode(regs) && fixup_bug(regs, trapnr))
297 return;
299 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
300 NOTIFY_STOP) {
301 cond_local_irq_enable(regs);
302 do_trap(trapnr, signr, str, regs, error_code,
303 fill_trap_info(regs, signr, trapnr, &info));
307 #define DO_ERROR(trapnr, signr, str, name) \
308 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
310 do_error_trap(regs, error_code, str, trapnr, signr); \
313 DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
314 DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
315 DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
316 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
317 DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
318 DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
319 DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
320 DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
322 #ifdef CONFIG_VMAP_STACK
323 __visible void __noreturn handle_stack_overflow(const char *message,
324 struct pt_regs *regs,
325 unsigned long fault_address)
327 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
328 (void *)fault_address, current->stack,
329 (char *)current->stack + THREAD_SIZE - 1);
330 die(message, regs, 0);
332 /* Be absolutely certain we don't return. */
333 panic(message);
335 #endif
337 #ifdef CONFIG_X86_64
338 /* Runs on IST stack */
339 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
341 static const char str[] = "double fault";
342 struct task_struct *tsk = current;
343 #ifdef CONFIG_VMAP_STACK
344 unsigned long cr2;
345 #endif
347 #ifdef CONFIG_X86_ESPFIX64
348 extern unsigned char native_irq_return_iret[];
351 * If IRET takes a non-IST fault on the espfix64 stack, then we
352 * end up promoting it to a doublefault. In that case, take
353 * advantage of the fact that we're not using the normal (TSS.sp0)
354 * stack right now. We can write a fake #GP(0) frame at TSS.sp0
355 * and then modify our own IRET frame so that, when we return,
356 * we land directly at the #GP(0) vector with the stack already
357 * set up according to its expectations.
359 * The net result is that our #GP handler will think that we
360 * entered from usermode with the bad user context.
362 * No need for ist_enter here because we don't use RCU.
364 if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY &&
365 regs->cs == __KERNEL_CS &&
366 regs->ip == (unsigned long)native_irq_return_iret)
368 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
371 * regs->sp points to the failing IRET frame on the
372 * ESPFIX64 stack. Copy it to the entry stack. This fills
373 * in gpregs->ss through gpregs->ip.
376 memmove(&gpregs->ip, (void *)regs->sp, 5*8);
377 gpregs->orig_ax = 0; /* Missing (lost) #GP error code */
380 * Adjust our frame so that we return straight to the #GP
381 * vector with the expected RSP value. This is safe because
382 * we won't enable interupts or schedule before we invoke
383 * general_protection, so nothing will clobber the stack
384 * frame we just set up.
386 regs->ip = (unsigned long)general_protection;
387 regs->sp = (unsigned long)&gpregs->orig_ax;
390 * This situation can be triggered by userspace via
391 * modify_ldt(2) and the return does not take the regular
392 * user space exit, so a CPU buffer clear is required when
393 * MDS mitigation is enabled.
395 mds_user_clear_cpu_buffers();
396 return;
398 #endif
400 ist_enter(regs);
401 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
403 tsk->thread.error_code = error_code;
404 tsk->thread.trap_nr = X86_TRAP_DF;
406 #ifdef CONFIG_VMAP_STACK
408 * If we overflow the stack into a guard page, the CPU will fail
409 * to deliver #PF and will send #DF instead. Similarly, if we
410 * take any non-IST exception while too close to the bottom of
411 * the stack, the processor will get a page fault while
412 * delivering the exception and will generate a double fault.
414 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
415 * Page-Fault Exception (#PF):
417 * Processors update CR2 whenever a page fault is detected. If a
418 * second page fault occurs while an earlier page fault is being
419 * delivered, the faulting linear address of the second fault will
420 * overwrite the contents of CR2 (replacing the previous
421 * address). These updates to CR2 occur even if the page fault
422 * results in a double fault or occurs during the delivery of a
423 * double fault.
425 * The logic below has a small possibility of incorrectly diagnosing
426 * some errors as stack overflows. For example, if the IDT or GDT
427 * gets corrupted such that #GP delivery fails due to a bad descriptor
428 * causing #GP and we hit this condition while CR2 coincidentally
429 * points to the stack guard page, we'll think we overflowed the
430 * stack. Given that we're going to panic one way or another
431 * if this happens, this isn't necessarily worth fixing.
433 * If necessary, we could improve the test by only diagnosing
434 * a stack overflow if the saved RSP points within 47 bytes of
435 * the bottom of the stack: if RSP == tsk_stack + 48 and we
436 * take an exception, the stack is already aligned and there
437 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
438 * possible error code, so a stack overflow would *not* double
439 * fault. With any less space left, exception delivery could
440 * fail, and, as a practical matter, we've overflowed the
441 * stack even if the actual trigger for the double fault was
442 * something else.
444 cr2 = read_cr2();
445 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
446 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
447 #endif
449 #ifdef CONFIG_DOUBLEFAULT
450 df_debug(regs, error_code);
451 #endif
453 * This is always a kernel trap and never fixable (and thus must
454 * never return).
456 for (;;)
457 die(str, regs, error_code);
459 #endif
461 dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
463 const struct mpx_bndcsr *bndcsr;
464 siginfo_t *info;
466 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
467 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
468 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
469 return;
470 cond_local_irq_enable(regs);
472 if (!user_mode(regs))
473 die("bounds", regs, error_code);
475 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
476 /* The exception is not from Intel MPX */
477 goto exit_trap;
481 * We need to look at BNDSTATUS to resolve this exception.
482 * A NULL here might mean that it is in its 'init state',
483 * which is all zeros which indicates MPX was not
484 * responsible for the exception.
486 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
487 if (!bndcsr)
488 goto exit_trap;
490 trace_bounds_exception_mpx(bndcsr);
492 * The error code field of the BNDSTATUS register communicates status
493 * information of a bound range exception #BR or operation involving
494 * bound directory.
496 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
497 case 2: /* Bound directory has invalid entry. */
498 if (mpx_handle_bd_fault())
499 goto exit_trap;
500 break; /* Success, it was handled */
501 case 1: /* Bound violation. */
502 info = mpx_generate_siginfo(regs);
503 if (IS_ERR(info)) {
505 * We failed to decode the MPX instruction. Act as if
506 * the exception was not caused by MPX.
508 goto exit_trap;
511 * Success, we decoded the instruction and retrieved
512 * an 'info' containing the address being accessed
513 * which caused the exception. This information
514 * allows and application to possibly handle the
515 * #BR exception itself.
517 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
518 kfree(info);
519 break;
520 case 0: /* No exception caused by Intel MPX operations. */
521 goto exit_trap;
522 default:
523 die("bounds", regs, error_code);
526 return;
528 exit_trap:
530 * This path out is for all the cases where we could not
531 * handle the exception in some way (like allocating a
532 * table or telling userspace about it. We will also end
533 * up here if the kernel has MPX turned off at compile
534 * time..
536 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
539 dotraplinkage void
540 do_general_protection(struct pt_regs *regs, long error_code)
542 struct task_struct *tsk;
544 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
545 cond_local_irq_enable(regs);
547 if (v8086_mode(regs)) {
548 local_irq_enable();
549 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
550 return;
553 tsk = current;
554 if (!user_mode(regs)) {
555 if (fixup_exception(regs, X86_TRAP_GP))
556 return;
558 tsk->thread.error_code = error_code;
559 tsk->thread.trap_nr = X86_TRAP_GP;
560 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
561 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
562 die("general protection fault", regs, error_code);
563 return;
566 tsk->thread.error_code = error_code;
567 tsk->thread.trap_nr = X86_TRAP_GP;
569 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
570 printk_ratelimit()) {
571 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
572 tsk->comm, task_pid_nr(tsk),
573 regs->ip, regs->sp, error_code);
574 print_vma_addr(KERN_CONT " in ", regs->ip);
575 pr_cont("\n");
578 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
580 NOKPROBE_SYMBOL(do_general_protection);
582 dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
584 #ifdef CONFIG_DYNAMIC_FTRACE
586 * ftrace must be first, everything else may cause a recursive crash.
587 * See note by declaration of modifying_ftrace_code in ftrace.c
589 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
590 ftrace_int3_handler(regs))
591 return;
592 #endif
593 if (poke_int3_handler(regs))
594 return;
597 * Use ist_enter despite the fact that we don't use an IST stack.
598 * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
599 * mode or even during context tracking state changes.
601 * This means that we can't schedule. That's okay.
603 ist_enter(regs);
604 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
605 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
606 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
607 SIGTRAP) == NOTIFY_STOP)
608 goto exit;
609 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
611 #ifdef CONFIG_KPROBES
612 if (kprobe_int3_handler(regs))
613 goto exit;
614 #endif
616 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
617 SIGTRAP) == NOTIFY_STOP)
618 goto exit;
620 cond_local_irq_enable(regs);
621 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
622 cond_local_irq_disable(regs);
624 exit:
625 ist_exit(regs);
627 NOKPROBE_SYMBOL(do_int3);
629 #ifdef CONFIG_X86_64
631 * Help handler running on a per-cpu (IST or entry trampoline) stack
632 * to switch to the normal thread stack if the interrupted code was in
633 * user mode. The actual stack switch is done in entry_64.S
635 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
637 struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
638 if (regs != eregs)
639 *regs = *eregs;
640 return regs;
642 NOKPROBE_SYMBOL(sync_regs);
644 struct bad_iret_stack {
645 void *error_entry_ret;
646 struct pt_regs regs;
649 asmlinkage __visible notrace
650 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
653 * This is called from entry_64.S early in handling a fault
654 * caused by a bad iret to user mode. To handle the fault
655 * correctly, we want to move our stack frame to where it would
656 * be had we entered directly on the entry stack (rather than
657 * just below the IRET frame) and we want to pretend that the
658 * exception came from the IRET target.
660 struct bad_iret_stack *new_stack =
661 (struct bad_iret_stack *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
663 /* Copy the IRET target to the new stack. */
664 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
666 /* Copy the remainder of the stack from the current stack. */
667 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
669 BUG_ON(!user_mode(&new_stack->regs));
670 return new_stack;
672 NOKPROBE_SYMBOL(fixup_bad_iret);
673 #endif
675 static bool is_sysenter_singlestep(struct pt_regs *regs)
678 * We don't try for precision here. If we're anywhere in the region of
679 * code that can be single-stepped in the SYSENTER entry path, then
680 * assume that this is a useless single-step trap due to SYSENTER
681 * being invoked with TF set. (We don't know in advance exactly
682 * which instructions will be hit because BTF could plausibly
683 * be set.)
685 #ifdef CONFIG_X86_32
686 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
687 (unsigned long)__end_SYSENTER_singlestep_region -
688 (unsigned long)__begin_SYSENTER_singlestep_region;
689 #elif defined(CONFIG_IA32_EMULATION)
690 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
691 (unsigned long)__end_entry_SYSENTER_compat -
692 (unsigned long)entry_SYSENTER_compat;
693 #else
694 return false;
695 #endif
699 * Our handling of the processor debug registers is non-trivial.
700 * We do not clear them on entry and exit from the kernel. Therefore
701 * it is possible to get a watchpoint trap here from inside the kernel.
702 * However, the code in ./ptrace.c has ensured that the user can
703 * only set watchpoints on userspace addresses. Therefore the in-kernel
704 * watchpoint trap can only occur in code which is reading/writing
705 * from user space. Such code must not hold kernel locks (since it
706 * can equally take a page fault), therefore it is safe to call
707 * force_sig_info even though that claims and releases locks.
709 * Code in ./signal.c ensures that the debug control register
710 * is restored before we deliver any signal, and therefore that
711 * user code runs with the correct debug control register even though
712 * we clear it here.
714 * Being careful here means that we don't have to be as careful in a
715 * lot of more complicated places (task switching can be a bit lazy
716 * about restoring all the debug state, and ptrace doesn't have to
717 * find every occurrence of the TF bit that could be saved away even
718 * by user code)
720 * May run on IST stack.
722 dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
724 struct task_struct *tsk = current;
725 int user_icebp = 0;
726 unsigned long dr6;
727 int si_code;
729 ist_enter(regs);
731 get_debugreg(dr6, 6);
733 * The Intel SDM says:
735 * Certain debug exceptions may clear bits 0-3. The remaining
736 * contents of the DR6 register are never cleared by the
737 * processor. To avoid confusion in identifying debug
738 * exceptions, debug handlers should clear the register before
739 * returning to the interrupted task.
741 * Keep it simple: clear DR6 immediately.
743 set_debugreg(0, 6);
745 /* Filter out all the reserved bits which are preset to 1 */
746 dr6 &= ~DR6_RESERVED;
749 * The SDM says "The processor clears the BTF flag when it
750 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
751 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
753 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
755 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
756 is_sysenter_singlestep(regs))) {
757 dr6 &= ~DR_STEP;
758 if (!dr6)
759 goto exit;
761 * else we might have gotten a single-step trap and hit a
762 * watchpoint at the same time, in which case we should fall
763 * through and handle the watchpoint.
768 * If dr6 has no reason to give us about the origin of this trap,
769 * then it's very likely the result of an icebp/int01 trap.
770 * User wants a sigtrap for that.
772 if (!dr6 && user_mode(regs))
773 user_icebp = 1;
775 /* Store the virtualized DR6 value */
776 tsk->thread.debugreg6 = dr6;
778 #ifdef CONFIG_KPROBES
779 if (kprobe_debug_handler(regs))
780 goto exit;
781 #endif
783 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
784 SIGTRAP) == NOTIFY_STOP)
785 goto exit;
788 * Let others (NMI) know that the debug stack is in use
789 * as we may switch to the interrupt stack.
791 debug_stack_usage_inc();
793 /* It's safe to allow irq's after DR6 has been saved */
794 cond_local_irq_enable(regs);
796 if (v8086_mode(regs)) {
797 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
798 X86_TRAP_DB);
799 cond_local_irq_disable(regs);
800 debug_stack_usage_dec();
801 goto exit;
804 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
806 * Historical junk that used to handle SYSENTER single-stepping.
807 * This should be unreachable now. If we survive for a while
808 * without anyone hitting this warning, we'll turn this into
809 * an oops.
811 tsk->thread.debugreg6 &= ~DR_STEP;
812 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
813 regs->flags &= ~X86_EFLAGS_TF;
815 si_code = get_si_code(tsk->thread.debugreg6);
816 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
817 send_sigtrap(tsk, regs, error_code, si_code);
818 cond_local_irq_disable(regs);
819 debug_stack_usage_dec();
821 exit:
822 ist_exit(regs);
824 NOKPROBE_SYMBOL(do_debug);
827 * Note that we play around with the 'TS' bit in an attempt to get
828 * the correct behaviour even in the presence of the asynchronous
829 * IRQ13 behaviour
831 static void math_error(struct pt_regs *regs, int error_code, int trapnr)
833 struct task_struct *task = current;
834 struct fpu *fpu = &task->thread.fpu;
835 siginfo_t info;
836 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
837 "simd exception";
839 cond_local_irq_enable(regs);
841 if (!user_mode(regs)) {
842 if (fixup_exception(regs, trapnr))
843 return;
845 task->thread.error_code = error_code;
846 task->thread.trap_nr = trapnr;
848 if (notify_die(DIE_TRAP, str, regs, error_code,
849 trapnr, SIGFPE) != NOTIFY_STOP)
850 die(str, regs, error_code);
851 return;
855 * Save the info for the exception handler and clear the error.
857 fpu__save(fpu);
859 task->thread.trap_nr = trapnr;
860 task->thread.error_code = error_code;
861 info.si_signo = SIGFPE;
862 info.si_errno = 0;
863 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
865 info.si_code = fpu__exception_code(fpu, trapnr);
867 /* Retry when we get spurious exceptions: */
868 if (!info.si_code)
869 return;
871 force_sig_info(SIGFPE, &info, task);
874 dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
876 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
877 math_error(regs, error_code, X86_TRAP_MF);
880 dotraplinkage void
881 do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
883 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
884 math_error(regs, error_code, X86_TRAP_XF);
887 dotraplinkage void
888 do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
890 cond_local_irq_enable(regs);
893 dotraplinkage void
894 do_device_not_available(struct pt_regs *regs, long error_code)
896 unsigned long cr0;
898 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
900 #ifdef CONFIG_MATH_EMULATION
901 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
902 struct math_emu_info info = { };
904 cond_local_irq_enable(regs);
906 info.regs = regs;
907 math_emulate(&info);
908 return;
910 #endif
912 /* This should not happen. */
913 cr0 = read_cr0();
914 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
915 /* Try to fix it up and carry on. */
916 write_cr0(cr0 & ~X86_CR0_TS);
917 } else {
919 * Something terrible happened, and we're better off trying
920 * to kill the task than getting stuck in a never-ending
921 * loop of #NM faults.
923 die("unexpected #NM exception", regs, error_code);
926 NOKPROBE_SYMBOL(do_device_not_available);
928 #ifdef CONFIG_X86_32
929 dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
931 siginfo_t info;
933 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
934 local_irq_enable();
936 info.si_signo = SIGILL;
937 info.si_errno = 0;
938 info.si_code = ILL_BADSTK;
939 info.si_addr = NULL;
940 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
941 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
942 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
943 &info);
946 #endif
948 void __init trap_init(void)
950 /* Init cpu_entry_area before IST entries are set up */
951 setup_cpu_entry_areas();
953 idt_setup_traps();
956 * Set the IDT descriptor to a fixed read-only location, so that the
957 * "sidt" instruction will not leak the location of the kernel, and
958 * to defend the IDT against arbitrary memory write vulnerabilities.
959 * It will be reloaded in cpu_init() */
960 cea_set_pte(CPU_ENTRY_AREA_RO_IDT_VADDR, __pa_symbol(idt_table),
961 PAGE_KERNEL_RO);
962 idt_descr.address = CPU_ENTRY_AREA_RO_IDT;
965 * Should be a barrier for any external CPU state:
967 cpu_init();
969 idt_setup_ist_traps();
971 x86_init.irqs.trap_init();
973 idt_setup_debugidt_traps();