?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
x86/speculation/mds: Fix documentation typo
[linux/fpc-iii.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
blob26e8fab736f1f2e4b14eaa2495157a9750af61c8
1 /*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23 #include <linux/init.h>
24 #include <linux/platform_device.h>
25 #include <linux/io.h>
26 #include <linux/slab.h>
27 #include <linux/err.h>
28 #include <linux/gpio.h>
29 #include <linux/irqdomain.h>
30 #include <linux/of_device.h>
31 #include <linux/spinlock.h>
32
33 #include <dt-bindings/pinctrl/samsung.h>
34
35 #include "../core.h"
36 #include "pinctrl-samsung.h"
37
38 /* maximum number of the memory resources */
39 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2
40
41 /* list of all possible config options supported */
42 static struct pin_config {
43 const char *property;
44 enum pincfg_type param;
45 } cfg_params[] = {
46 { "samsung,pin-pud", PINCFG_TYPE_PUD },
47 { "samsung,pin-drv", PINCFG_TYPE_DRV },
48 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
49 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
50 { "samsung,pin-val", PINCFG_TYPE_DAT },
51 };
52
53 static unsigned int pin_base;
54
55 static int samsung_get_group_count(struct pinctrl_dev *pctldev)
56 {
57 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
58
59 return pmx->nr_groups;
60 }
61
62 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
63 unsigned group)
64 {
65 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
66
67 return pmx->pin_groups[group].name;
68 }
69
70 static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
71 unsigned group,
72 const unsigned **pins,
73 unsigned *num_pins)
74 {
75 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
76
77 *pins = pmx->pin_groups[group].pins;
78 *num_pins = pmx->pin_groups[group].num_pins;
79
80 return 0;
81 }
82
83 static int reserve_map(struct device *dev, struct pinctrl_map **map,
84 unsigned *reserved_maps, unsigned *num_maps,
85 unsigned reserve)
86 {
87 unsigned old_num = *reserved_maps;
88 unsigned new_num = *num_maps + reserve;
89 struct pinctrl_map *new_map;
90
91 if (old_num >= new_num)
92 return 0;
93
94 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
95 if (!new_map)
96 return -ENOMEM;
97
98 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
99
100 *map = new_map;
101 *reserved_maps = new_num;
102
103 return 0;
104 }
105
106 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
107 unsigned *num_maps, const char *group,
108 const char *function)
109 {
110 if (WARN_ON(*num_maps == *reserved_maps))
111 return -ENOSPC;
112
113 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
114 (*map)[*num_maps].data.mux.group = group;
115 (*map)[*num_maps].data.mux.function = function;
116 (*num_maps)++;
117
118 return 0;
119 }
120
121 static int add_map_configs(struct device *dev, struct pinctrl_map **map,
122 unsigned *reserved_maps, unsigned *num_maps,
123 const char *group, unsigned long *configs,
124 unsigned num_configs)
125 {
126 unsigned long *dup_configs;
127
128 if (WARN_ON(*num_maps == *reserved_maps))
129 return -ENOSPC;
130
131 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
132 GFP_KERNEL);
133 if (!dup_configs)
134 return -ENOMEM;
135
136 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
137 (*map)[*num_maps].data.configs.group_or_pin = group;
138 (*map)[*num_maps].data.configs.configs = dup_configs;
139 (*map)[*num_maps].data.configs.num_configs = num_configs;
140 (*num_maps)++;
141
142 return 0;
143 }
144
145 static int add_config(struct device *dev, unsigned long **configs,
146 unsigned *num_configs, unsigned long config)
147 {
148 unsigned old_num = *num_configs;
149 unsigned new_num = old_num + 1;
150 unsigned long *new_configs;
151
152 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
153 GFP_KERNEL);
154 if (!new_configs)
155 return -ENOMEM;
156
157 new_configs[old_num] = config;
158
159 *configs = new_configs;
160 *num_configs = new_num;
161
162 return 0;
163 }
164
165 static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
166 struct pinctrl_map *map,
167 unsigned num_maps)
168 {
169 int i;
170
171 for (i = 0; i < num_maps; i++)
172 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
173 kfree(map[i].data.configs.configs);
174
175 kfree(map);
176 }
177
178 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
179 struct device *dev,
180 struct device_node *np,
181 struct pinctrl_map **map,
182 unsigned *reserved_maps,
183 unsigned *num_maps)
184 {
185 int ret, i;
186 u32 val;
187 unsigned long config;
188 unsigned long *configs = NULL;
189 unsigned num_configs = 0;
190 unsigned reserve;
191 struct property *prop;
192 const char *group;
193 bool has_func = false;
194
195 ret = of_property_read_u32(np, "samsung,pin-function", &val);
196 if (!ret)
197 has_func = true;
198
199 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
200 ret = of_property_read_u32(np, cfg_params[i].property, &val);
201 if (!ret) {
202 config = PINCFG_PACK(cfg_params[i].param, val);
203 ret = add_config(dev, &configs, &num_configs, config);
204 if (ret < 0)
205 goto exit;
206 /* EINVAL=missing, which is fine since it's optional */
207 } else if (ret != -EINVAL) {
208 dev_err(dev, "could not parse property %s\n",
209 cfg_params[i].property);
210 }
211 }
212
213 reserve = 0;
214 if (has_func)
215 reserve++;
216 if (num_configs)
217 reserve++;
218 ret = of_property_count_strings(np, "samsung,pins");
219 if (ret < 0) {
220 dev_err(dev, "could not parse property samsung,pins\n");
221 goto exit;
222 }
223 reserve *= ret;
224
225 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
226 if (ret < 0)
227 goto exit;
228
229 of_property_for_each_string(np, "samsung,pins", prop, group) {
230 if (has_func) {
231 ret = add_map_mux(map, reserved_maps,
232 num_maps, group, np->full_name);
233 if (ret < 0)
234 goto exit;
235 }
236
237 if (num_configs) {
238 ret = add_map_configs(dev, map, reserved_maps,
239 num_maps, group, configs,
240 num_configs);
241 if (ret < 0)
242 goto exit;
243 }
244 }
245
246 ret = 0;
247
248 exit:
249 kfree(configs);
250 return ret;
251 }
252
253 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
254 struct device_node *np_config,
255 struct pinctrl_map **map,
256 unsigned *num_maps)
257 {
258 struct samsung_pinctrl_drv_data *drvdata;
259 unsigned reserved_maps;
260 struct device_node *np;
261 int ret;
262
263 drvdata = pinctrl_dev_get_drvdata(pctldev);
264
265 reserved_maps = 0;
266 *map = NULL;
267 *num_maps = 0;
268
269 if (!of_get_child_count(np_config))
270 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
271 np_config, map,
272 &reserved_maps,
273 num_maps);
274
275 for_each_child_of_node(np_config, np) {
276 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
277 &reserved_maps, num_maps);
278 if (ret < 0) {
279 samsung_dt_free_map(pctldev, *map, *num_maps);
280 return ret;
281 }
282 }
283
284 return 0;
285 }
286
287 /* list of pinctrl callbacks for the pinctrl core */
288 static const struct pinctrl_ops samsung_pctrl_ops = {
289 .get_groups_count = samsung_get_group_count,
290 .get_group_name = samsung_get_group_name,
291 .get_group_pins = samsung_get_group_pins,
292 .dt_node_to_map = samsung_dt_node_to_map,
293 .dt_free_map = samsung_dt_free_map,
294 };
295
296 /* check if the selector is a valid pin function selector */
297 static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
298 {
299 struct samsung_pinctrl_drv_data *drvdata;
300
301 drvdata = pinctrl_dev_get_drvdata(pctldev);
302 return drvdata->nr_functions;
303 }
304
305 /* return the name of the pin function specified */
306 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
307 unsigned selector)
308 {
309 struct samsung_pinctrl_drv_data *drvdata;
310
311 drvdata = pinctrl_dev_get_drvdata(pctldev);
312 return drvdata->pmx_functions[selector].name;
313 }
314
315 /* return the groups associated for the specified function selector */
316 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
317 unsigned selector, const char * const **groups,
318 unsigned * const num_groups)
319 {
320 struct samsung_pinctrl_drv_data *drvdata;
321
322 drvdata = pinctrl_dev_get_drvdata(pctldev);
323 *groups = drvdata->pmx_functions[selector].groups;
324 *num_groups = drvdata->pmx_functions[selector].num_groups;
325 return 0;
326 }
327
328 /*
329 * given a pin number that is local to a pin controller, find out the pin bank
330 * and the register base of the pin bank.
331 */
332 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
333 unsigned pin, void __iomem **reg, u32 *offset,
334 struct samsung_pin_bank **bank)
335 {
336 struct samsung_pin_bank *b;
337
338 b = drvdata->pin_banks;
339
340 while ((pin >= b->pin_base) &&
341 ((b->pin_base + b->nr_pins - 1) < pin))
342 b++;
343
344 *reg = b->pctl_base + b->pctl_offset;
345 *offset = pin - b->pin_base;
346 if (bank)
347 *bank = b;
348 }
349
350 /* enable or disable a pinmux function */
351 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
352 unsigned group)
353 {
354 struct samsung_pinctrl_drv_data *drvdata;
355 const struct samsung_pin_bank_type *type;
356 struct samsung_pin_bank *bank;
357 void __iomem *reg;
358 u32 mask, shift, data, pin_offset;
359 unsigned long flags;
360 const struct samsung_pmx_func *func;
361 const struct samsung_pin_group *grp;
362
363 drvdata = pinctrl_dev_get_drvdata(pctldev);
364 func = &drvdata->pmx_functions[selector];
365 grp = &drvdata->pin_groups[group];
366
367 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
368 &reg, &pin_offset, &bank);
369 type = bank->type;
370 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
371 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
372 if (shift >= 32) {
373 /* Some banks have two config registers */
374 shift -= 32;
375 reg += 4;
376 }
377
378 spin_lock_irqsave(&bank->slock, flags);
379
380 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
381 data &= ~(mask << shift);
382 data |= func->val << shift;
383 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
384
385 spin_unlock_irqrestore(&bank->slock, flags);
386 }
387
388 /* enable a specified pinmux by writing to registers */
389 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
390 unsigned selector,
391 unsigned group)
392 {
393 samsung_pinmux_setup(pctldev, selector, group);
394 return 0;
395 }
396
397 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
398 static const struct pinmux_ops samsung_pinmux_ops = {
399 .get_functions_count = samsung_get_functions_count,
400 .get_function_name = samsung_pinmux_get_fname,
401 .get_function_groups = samsung_pinmux_get_groups,
402 .set_mux = samsung_pinmux_set_mux,
403 };
404
405 /* set or get the pin config settings for a specified pin */
406 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
407 unsigned long *config, bool set)
408 {
409 struct samsung_pinctrl_drv_data *drvdata;
410 const struct samsung_pin_bank_type *type;
411 struct samsung_pin_bank *bank;
412 void __iomem *reg_base;
413 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
414 u32 data, width, pin_offset, mask, shift;
415 u32 cfg_value, cfg_reg;
416 unsigned long flags;
417
418 drvdata = pinctrl_dev_get_drvdata(pctldev);
419 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
420 &pin_offset, &bank);
421 type = bank->type;
422
423 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
424 return -EINVAL;
425
426 width = type->fld_width[cfg_type];
427 cfg_reg = type->reg_offset[cfg_type];
428
429 spin_lock_irqsave(&bank->slock, flags);
430
431 mask = (1 << width) - 1;
432 shift = pin_offset * width;
433 data = readl(reg_base + cfg_reg);
434
435 if (set) {
436 cfg_value = PINCFG_UNPACK_VALUE(*config);
437 data &= ~(mask << shift);
438 data |= (cfg_value << shift);
439 writel(data, reg_base + cfg_reg);
440 } else {
441 data >>= shift;
442 data &= mask;
443 *config = PINCFG_PACK(cfg_type, data);
444 }
445
446 spin_unlock_irqrestore(&bank->slock, flags);
447
448 return 0;
449 }
450
451 /* set the pin config settings for a specified pin */
452 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
453 unsigned long *configs, unsigned num_configs)
454 {
455 int i, ret;
456
457 for (i = 0; i < num_configs; i++) {
458 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
459 if (ret < 0)
460 return ret;
461 } /* for each config */
462
463 return 0;
464 }
465
466 /* get the pin config settings for a specified pin */
467 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
468 unsigned long *config)
469 {
470 return samsung_pinconf_rw(pctldev, pin, config, false);
471 }
472
473 /* set the pin config settings for a specified pin group */
474 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
475 unsigned group, unsigned long *configs,
476 unsigned num_configs)
477 {
478 struct samsung_pinctrl_drv_data *drvdata;
479 const unsigned int *pins;
480 unsigned int cnt;
481
482 drvdata = pinctrl_dev_get_drvdata(pctldev);
483 pins = drvdata->pin_groups[group].pins;
484
485 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
486 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
487
488 return 0;
489 }
490
491 /* get the pin config settings for a specified pin group */
492 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
493 unsigned int group, unsigned long *config)
494 {
495 struct samsung_pinctrl_drv_data *drvdata;
496 const unsigned int *pins;
497
498 drvdata = pinctrl_dev_get_drvdata(pctldev);
499 pins = drvdata->pin_groups[group].pins;
500 samsung_pinconf_get(pctldev, pins[0], config);
501 return 0;
502 }
503
504 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
505 static const struct pinconf_ops samsung_pinconf_ops = {
506 .pin_config_get = samsung_pinconf_get,
507 .pin_config_set = samsung_pinconf_set,
508 .pin_config_group_get = samsung_pinconf_group_get,
509 .pin_config_group_set = samsung_pinconf_group_set,
510 };
511
512 /*
513 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
514 * to avoid race condition.
515 */
516 static void samsung_gpio_set_value(struct gpio_chip *gc,
517 unsigned offset, int value)
518 {
519 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
520 const struct samsung_pin_bank_type *type = bank->type;
521 void __iomem *reg;
522 u32 data;
523
524 reg = bank->pctl_base + bank->pctl_offset;
525
526 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
527 data &= ~(1 << offset);
528 if (value)
529 data |= 1 << offset;
530 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
531 }
532
533 /* gpiolib gpio_set callback function */
534 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
535 {
536 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
537 unsigned long flags;
538
539 spin_lock_irqsave(&bank->slock, flags);
540 samsung_gpio_set_value(gc, offset, value);
541 spin_unlock_irqrestore(&bank->slock, flags);
542 }
543
544 /* gpiolib gpio_get callback function */
545 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
546 {
547 void __iomem *reg;
548 u32 data;
549 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
550 const struct samsung_pin_bank_type *type = bank->type;
551
552 reg = bank->pctl_base + bank->pctl_offset;
553
554 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
555 data >>= offset;
556 data &= 1;
557 return data;
558 }
559
560 /*
561 * The samsung_gpio_set_direction() should be called with "bank->slock" held
562 * to avoid race condition.
563 * The calls to gpio_direction_output() and gpio_direction_input()
564 * leads to this function call.
565 */
566 static int samsung_gpio_set_direction(struct gpio_chip *gc,
567 unsigned offset, bool input)
568 {
569 const struct samsung_pin_bank_type *type;
570 struct samsung_pin_bank *bank;
571 void __iomem *reg;
572 u32 data, mask, shift;
573
574 bank = gpiochip_get_data(gc);
575 type = bank->type;
576
577 reg = bank->pctl_base + bank->pctl_offset
578 + type->reg_offset[PINCFG_TYPE_FUNC];
579
580 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
581 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
582 if (shift >= 32) {
583 /* Some banks have two config registers */
584 shift -= 32;
585 reg += 4;
586 }
587
588 data = readl(reg);
589 data &= ~(mask << shift);
590 if (!input)
591 data |= EXYNOS_PIN_FUNC_OUTPUT << shift;
592 writel(data, reg);
593
594 return 0;
595 }
596
597 /* gpiolib gpio_direction_input callback function. */
598 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
599 {
600 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
601 unsigned long flags;
602 int ret;
603
604 spin_lock_irqsave(&bank->slock, flags);
605 ret = samsung_gpio_set_direction(gc, offset, true);
606 spin_unlock_irqrestore(&bank->slock, flags);
607 return ret;
608 }
609
610 /* gpiolib gpio_direction_output callback function. */
611 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
612 int value)
613 {
614 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
615 unsigned long flags;
616 int ret;
617
618 spin_lock_irqsave(&bank->slock, flags);
619 samsung_gpio_set_value(gc, offset, value);
620 ret = samsung_gpio_set_direction(gc, offset, false);
621 spin_unlock_irqrestore(&bank->slock, flags);
622
623 return ret;
624 }
625
626 /*
627 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
628 * and a virtual IRQ, if not already present.
629 */
630 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
631 {
632 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
633 unsigned int virq;
634
635 if (!bank->irq_domain)
636 return -ENXIO;
637
638 virq = irq_create_mapping(bank->irq_domain, offset);
639
640 return (virq) ? : -ENXIO;
641 }
642
643 static struct samsung_pin_group *samsung_pinctrl_create_groups(
644 struct device *dev,
645 struct samsung_pinctrl_drv_data *drvdata,
646 unsigned int *cnt)
647 {
648 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
649 struct samsung_pin_group *groups, *grp;
650 const struct pinctrl_pin_desc *pdesc;
651 int i;
652
653 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
654 GFP_KERNEL);
655 if (!groups)
656 return ERR_PTR(-EINVAL);
657 grp = groups;
658
659 pdesc = ctrldesc->pins;
660 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
661 grp->name = pdesc->name;
662 grp->pins = &pdesc->number;
663 grp->num_pins = 1;
664 }
665
666 *cnt = ctrldesc->npins;
667 return groups;
668 }
669
670 static int samsung_pinctrl_create_function(struct device *dev,
671 struct samsung_pinctrl_drv_data *drvdata,
672 struct device_node *func_np,
673 struct samsung_pmx_func *func)
674 {
675 int npins;
676 int ret;
677 int i;
678
679 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
680 return 0;
681
682 npins = of_property_count_strings(func_np, "samsung,pins");
683 if (npins < 1) {
684 dev_err(dev, "invalid pin list in %pOFn node", func_np);
685 return -EINVAL;
686 }
687
688 func->name = func_np->full_name;
689
690 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
691 if (!func->groups)
692 return -ENOMEM;
693
694 for (i = 0; i < npins; ++i) {
695 const char *gname;
696
697 ret = of_property_read_string_index(func_np, "samsung,pins",
698 i, &gname);
699 if (ret) {
700 dev_err(dev,
701 "failed to read pin name %d from %pOFn node\n",
702 i, func_np);
703 return ret;
704 }
705
706 func->groups[i] = gname;
707 }
708
709 func->num_groups = npins;
710 return 1;
711 }
712
713 static struct samsung_pmx_func *samsung_pinctrl_create_functions(
714 struct device *dev,
715 struct samsung_pinctrl_drv_data *drvdata,
716 unsigned int *cnt)
717 {
718 struct samsung_pmx_func *functions, *func;
719 struct device_node *dev_np = dev->of_node;
720 struct device_node *cfg_np;
721 unsigned int func_cnt = 0;
722 int ret;
723
724 /*
725 * Iterate over all the child nodes of the pin controller node
726 * and create pin groups and pin function lists.
727 */
728 for_each_child_of_node(dev_np, cfg_np) {
729 struct device_node *func_np;
730
731 if (!of_get_child_count(cfg_np)) {
732 if (!of_find_property(cfg_np,
733 "samsung,pin-function", NULL))
734 continue;
735 ++func_cnt;
736 continue;
737 }
738
739 for_each_child_of_node(cfg_np, func_np) {
740 if (!of_find_property(func_np,
741 "samsung,pin-function", NULL))
742 continue;
743 ++func_cnt;
744 }
745 }
746
747 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
748 GFP_KERNEL);
749 if (!functions)
750 return ERR_PTR(-ENOMEM);
751 func = functions;
752
753 /*
754 * Iterate over all the child nodes of the pin controller node
755 * and create pin groups and pin function lists.
756 */
757 func_cnt = 0;
758 for_each_child_of_node(dev_np, cfg_np) {
759 struct device_node *func_np;
760
761 if (!of_get_child_count(cfg_np)) {
762 ret = samsung_pinctrl_create_function(dev, drvdata,
763 cfg_np, func);
764 if (ret < 0)
765 return ERR_PTR(ret);
766 if (ret > 0) {
767 ++func;
768 ++func_cnt;
769 }
770 continue;
771 }
772
773 for_each_child_of_node(cfg_np, func_np) {
774 ret = samsung_pinctrl_create_function(dev, drvdata,
775 func_np, func);
776 if (ret < 0)
777 return ERR_PTR(ret);
778 if (ret > 0) {
779 ++func;
780 ++func_cnt;
781 }
782 }
783 }
784
785 *cnt = func_cnt;
786 return functions;
787 }
788
789 /*
790 * Parse the information about all the available pin groups and pin functions
791 * from device node of the pin-controller. A pin group is formed with all
792 * the pins listed in the "samsung,pins" property.
793 */
794
795 static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
796 struct samsung_pinctrl_drv_data *drvdata)
797 {
798 struct device *dev = &pdev->dev;
799 struct samsung_pin_group *groups;
800 struct samsung_pmx_func *functions;
801 unsigned int grp_cnt = 0, func_cnt = 0;
802
803 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
804 if (IS_ERR(groups)) {
805 dev_err(dev, "failed to parse pin groups\n");
806 return PTR_ERR(groups);
807 }
808
809 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
810 if (IS_ERR(functions)) {
811 dev_err(dev, "failed to parse pin functions\n");
812 return PTR_ERR(functions);
813 }
814
815 drvdata->pin_groups = groups;
816 drvdata->nr_groups = grp_cnt;
817 drvdata->pmx_functions = functions;
818 drvdata->nr_functions = func_cnt;
819
820 return 0;
821 }
822
823 /* register the pinctrl interface with the pinctrl subsystem */
824 static int samsung_pinctrl_register(struct platform_device *pdev,
825 struct samsung_pinctrl_drv_data *drvdata)
826 {
827 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
828 struct pinctrl_pin_desc *pindesc, *pdesc;
829 struct samsung_pin_bank *pin_bank;
830 char *pin_names;
831 int pin, bank, ret;
832
833 ctrldesc->name = "samsung-pinctrl";
834 ctrldesc->owner = THIS_MODULE;
835 ctrldesc->pctlops = &samsung_pctrl_ops;
836 ctrldesc->pmxops = &samsung_pinmux_ops;
837 ctrldesc->confops = &samsung_pinconf_ops;
838
839 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
840 drvdata->nr_pins, GFP_KERNEL);
841 if (!pindesc)
842 return -ENOMEM;
843 ctrldesc->pins = pindesc;
844 ctrldesc->npins = drvdata->nr_pins;
845
846 /* dynamically populate the pin number and pin name for pindesc */
847 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
848 pdesc->number = pin + drvdata->pin_base;
849
850 /*
851 * allocate space for storing the dynamically generated names for all
852 * the pins which belong to this pin-controller.
853 */
854 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
855 drvdata->nr_pins, GFP_KERNEL);
856 if (!pin_names)
857 return -ENOMEM;
858
859 /* for each pin, the name of the pin is pin-bank name + pin number */
860 for (bank = 0; bank < drvdata->nr_banks; bank++) {
861 pin_bank = &drvdata->pin_banks[bank];
862 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
863 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
864 pdesc = pindesc + pin_bank->pin_base + pin;
865 pdesc->name = pin_names;
866 pin_names += PIN_NAME_LENGTH;
867 }
868 }
869
870 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
871 if (ret)
872 return ret;
873
874 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
875 drvdata);
876 if (IS_ERR(drvdata->pctl_dev)) {
877 dev_err(&pdev->dev, "could not register pinctrl driver\n");
878 return PTR_ERR(drvdata->pctl_dev);
879 }
880
881 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
882 pin_bank = &drvdata->pin_banks[bank];
883 pin_bank->grange.name = pin_bank->name;
884 pin_bank->grange.id = bank;
885 pin_bank->grange.pin_base = drvdata->pin_base
886 + pin_bank->pin_base;
887 pin_bank->grange.base = pin_bank->grange.pin_base;
888 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
889 pin_bank->grange.gc = &pin_bank->gpio_chip;
890 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
891 }
892
893 return 0;
894 }
895
896 /* unregister the pinctrl interface with the pinctrl subsystem */
897 static int samsung_pinctrl_unregister(struct platform_device *pdev,
898 struct samsung_pinctrl_drv_data *drvdata)
899 {
900 struct samsung_pin_bank *bank = drvdata->pin_banks;
901 int i;
902
903 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
904 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange);
905
906 return 0;
907 }
908
909 static const struct gpio_chip samsung_gpiolib_chip = {
910 .request = gpiochip_generic_request,
911 .free = gpiochip_generic_free,
912 .set = samsung_gpio_set,
913 .get = samsung_gpio_get,
914 .direction_input = samsung_gpio_direction_input,
915 .direction_output = samsung_gpio_direction_output,
916 .to_irq = samsung_gpio_to_irq,
917 .owner = THIS_MODULE,
918 };
919
920 /* register the gpiolib interface with the gpiolib subsystem */
921 static int samsung_gpiolib_register(struct platform_device *pdev,
922 struct samsung_pinctrl_drv_data *drvdata)
923 {
924 struct samsung_pin_bank *bank = drvdata->pin_banks;
925 struct gpio_chip *gc;
926 int ret;
927 int i;
928
929 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
930 bank->gpio_chip = samsung_gpiolib_chip;
931
932 gc = &bank->gpio_chip;
933 gc->base = bank->grange.base;
934 gc->ngpio = bank->nr_pins;
935 gc->parent = &pdev->dev;
936 gc->of_node = bank->of_node;
937 gc->label = bank->name;
938
939 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank);
940 if (ret) {
941 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
942 gc->label, ret);
943 return ret;
944 }
945 }
946
947 return 0;
948 }
949
950 static const struct samsung_pin_ctrl *
951 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev)
952 {
953 struct device_node *node = pdev->dev.of_node;
954 const struct samsung_pinctrl_of_match_data *of_data;
955 int id;
956
957 id = of_alias_get_id(node, "pinctrl");
958 if (id < 0) {
959 dev_err(&pdev->dev, "failed to get alias id\n");
960 return NULL;
961 }
962
963 of_data = of_device_get_match_data(&pdev->dev);
964 if (id >= of_data->num_ctrl) {
965 dev_err(&pdev->dev, "invalid alias id %d\n", id);
966 return NULL;
967 }
968
969 return &(of_data->ctrl[id]);
970 }
971
972 /* retrieve the soc specific data */
973 static const struct samsung_pin_ctrl *
974 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
975 struct platform_device *pdev)
976 {
977 struct device_node *node = pdev->dev.of_node;
978 struct device_node *np;
979 const struct samsung_pin_bank_data *bdata;
980 const struct samsung_pin_ctrl *ctrl;
981 struct samsung_pin_bank *bank;
982 struct resource *res;
983 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
984 unsigned int i;
985
986 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev);
987 if (!ctrl)
988 return ERR_PTR(-ENOENT);
989
990 d->suspend = ctrl->suspend;
991 d->resume = ctrl->resume;
992 d->nr_banks = ctrl->nr_banks;
993 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
994 sizeof(*d->pin_banks), GFP_KERNEL);
995 if (!d->pin_banks)
996 return ERR_PTR(-ENOMEM);
997
998 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES)
999 return ERR_PTR(-EINVAL);
1000
1001 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) {
1002 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1003 if (!res) {
1004 dev_err(&pdev->dev, "failed to get mem%d resource\n", i);
1005 return ERR_PTR(-EINVAL);
1006 }
1007 virt_base[i] = devm_ioremap(&pdev->dev, res->start,
1008 resource_size(res));
1009 if (!virt_base[i]) {
1010 dev_err(&pdev->dev, "failed to ioremap %pR\n", res);
1011 return ERR_PTR(-EIO);
1012 }
1013 }
1014
1015 bank = d->pin_banks;
1016 bdata = ctrl->pin_banks;
1017 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
1018 bank->type = bdata->type;
1019 bank->pctl_offset = bdata->pctl_offset;
1020 bank->nr_pins = bdata->nr_pins;
1021 bank->eint_func = bdata->eint_func;
1022 bank->eint_type = bdata->eint_type;
1023 bank->eint_mask = bdata->eint_mask;
1024 bank->eint_offset = bdata->eint_offset;
1025 bank->name = bdata->name;
1026
1027 spin_lock_init(&bank->slock);
1028 bank->drvdata = d;
1029 bank->pin_base = d->nr_pins;
1030 d->nr_pins += bank->nr_pins;
1031
1032 bank->eint_base = virt_base[0];
1033 bank->pctl_base = virt_base[bdata->pctl_res_idx];
1034 }
1035 /*
1036 * Legacy platforms should provide only one resource with IO memory.
1037 * Store it as virt_base because legacy driver needs to access it
1038 * through samsung_pinctrl_drv_data.
1039 */
1040 d->virt_base = virt_base[0];
1041
1042 for_each_child_of_node(node, np) {
1043 if (!of_find_property(np, "gpio-controller", NULL))
1044 continue;
1045 bank = d->pin_banks;
1046 for (i = 0; i < d->nr_banks; ++i, ++bank) {
1047 if (!strcmp(bank->name, np->name)) {
1048 bank->of_node = np;
1049 break;
1050 }
1051 }
1052 }
1053
1054 d->pin_base = pin_base;
1055 pin_base += d->nr_pins;
1056
1057 return ctrl;
1058 }
1059
1060 static int samsung_pinctrl_probe(struct platform_device *pdev)
1061 {
1062 struct samsung_pinctrl_drv_data *drvdata;
1063 const struct samsung_pin_ctrl *ctrl;
1064 struct device *dev = &pdev->dev;
1065 struct resource *res;
1066 int ret;
1067
1068 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1069 if (!drvdata)
1070 return -ENOMEM;
1071
1072 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
1073 if (IS_ERR(ctrl)) {
1074 dev_err(&pdev->dev, "driver data not available\n");
1075 return PTR_ERR(ctrl);
1076 }
1077 drvdata->dev = dev;
1078
1079 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1080 if (res)
1081 drvdata->irq = res->start;
1082
1083 if (ctrl->retention_data) {
1084 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata,
1085 ctrl->retention_data);
1086 if (IS_ERR(drvdata->retention_ctrl))
1087 return PTR_ERR(drvdata->retention_ctrl);
1088 }
1089
1090 ret = samsung_pinctrl_register(pdev, drvdata);
1091 if (ret)
1092 return ret;
1093
1094 ret = samsung_gpiolib_register(pdev, drvdata);
1095 if (ret) {
1096 samsung_pinctrl_unregister(pdev, drvdata);
1097 return ret;
1098 }
1099
1100 if (ctrl->eint_gpio_init)
1101 ctrl->eint_gpio_init(drvdata);
1102 if (ctrl->eint_wkup_init)
1103 ctrl->eint_wkup_init(drvdata);
1104
1105 platform_set_drvdata(pdev, drvdata);
1106
1107 return 0;
1108 }
1109
1110 /**
1111 * samsung_pinctrl_suspend - save pinctrl state for suspend
1112 *
1113 * Save data for all banks handled by this device.
1114 */
1115 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
1116 {
1117 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1118 int i;
1119
1120 for (i = 0; i < drvdata->nr_banks; i++) {
1121 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1122 void __iomem *reg = bank->pctl_base + bank->pctl_offset;
1123 const u8 *offs = bank->type->reg_offset;
1124 const u8 *widths = bank->type->fld_width;
1125 enum pincfg_type type;
1126
1127 /* Registers without a powerdown config aren't lost */
1128 if (!widths[PINCFG_TYPE_CON_PDN])
1129 continue;
1130
1131 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1132 if (widths[type])
1133 bank->pm_save[type] = readl(reg + offs[type]);
1134
1135 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1136 /* Some banks have two config registers */
1137 bank->pm_save[PINCFG_TYPE_NUM] =
1138 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1139 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1140 bank->name, reg,
1141 bank->pm_save[PINCFG_TYPE_FUNC],
1142 bank->pm_save[PINCFG_TYPE_NUM]);
1143 } else {
1144 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1145 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1146 }
1147 }
1148
1149 if (drvdata->suspend)
1150 drvdata->suspend(drvdata);
1151 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
1152 drvdata->retention_ctrl->enable(drvdata);
1153
1154 return 0;
1155 }
1156
1157 /**
1158 * samsung_pinctrl_resume - restore pinctrl state from suspend
1159 *
1160 * Restore one of the banks that was saved during suspend.
1161 *
1162 * We don't bother doing anything complicated to avoid glitching lines since
1163 * we're called before pad retention is turned off.
1164 */
1165 static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
1166 {
1167 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1168 int i;
1169
1170 if (drvdata->resume)
1171 drvdata->resume(drvdata);
1172
1173 for (i = 0; i < drvdata->nr_banks; i++) {
1174 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1175 void __iomem *reg = bank->pctl_base + bank->pctl_offset;
1176 const u8 *offs = bank->type->reg_offset;
1177 const u8 *widths = bank->type->fld_width;
1178 enum pincfg_type type;
1179
1180 /* Registers without a powerdown config aren't lost */
1181 if (!widths[PINCFG_TYPE_CON_PDN])
1182 continue;
1183
1184 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1185 /* Some banks have two config registers */
1186 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1187 bank->name, reg,
1188 readl(reg + offs[PINCFG_TYPE_FUNC]),
1189 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1190 bank->pm_save[PINCFG_TYPE_FUNC],
1191 bank->pm_save[PINCFG_TYPE_NUM]);
1192 writel(bank->pm_save[PINCFG_TYPE_NUM],
1193 reg + offs[PINCFG_TYPE_FUNC] + 4);
1194 } else {
1195 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1196 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1197 bank->pm_save[PINCFG_TYPE_FUNC]);
1198 }
1199 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1200 if (widths[type])
1201 writel(bank->pm_save[type], reg + offs[type]);
1202 }
1203
1204 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable)
1205 drvdata->retention_ctrl->disable(drvdata);
1206
1207 return 0;
1208 }
1209
1210 static const struct of_device_id samsung_pinctrl_dt_match[] = {
1211 #ifdef CONFIG_PINCTRL_EXYNOS_ARM
1212 { .compatible = "samsung,exynos3250-pinctrl",
1213 .data = &exynos3250_of_data },
1214 { .compatible = "samsung,exynos4210-pinctrl",
1215 .data = &exynos4210_of_data },
1216 { .compatible = "samsung,exynos4x12-pinctrl",
1217 .data = &exynos4x12_of_data },
1218 { .compatible = "samsung,exynos5250-pinctrl",
1219 .data = &exynos5250_of_data },
1220 { .compatible = "samsung,exynos5260-pinctrl",
1221 .data = &exynos5260_of_data },
1222 { .compatible = "samsung,exynos5410-pinctrl",
1223 .data = &exynos5410_of_data },
1224 { .compatible = "samsung,exynos5420-pinctrl",
1225 .data = &exynos5420_of_data },
1226 { .compatible = "samsung,s5pv210-pinctrl",
1227 .data = &s5pv210_of_data },
1228 #endif
1229 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64
1230 { .compatible = "samsung,exynos5433-pinctrl",
1231 .data = &exynos5433_of_data },
1232 { .compatible = "samsung,exynos7-pinctrl",
1233 .data = &exynos7_of_data },
1234 #endif
1235 #ifdef CONFIG_PINCTRL_S3C64XX
1236 { .compatible = "samsung,s3c64xx-pinctrl",
1237 .data = &s3c64xx_of_data },
1238 #endif
1239 #ifdef CONFIG_PINCTRL_S3C24XX
1240 { .compatible = "samsung,s3c2412-pinctrl",
1241 .data = &s3c2412_of_data },
1242 { .compatible = "samsung,s3c2416-pinctrl",
1243 .data = &s3c2416_of_data },
1244 { .compatible = "samsung,s3c2440-pinctrl",
1245 .data = &s3c2440_of_data },
1246 { .compatible = "samsung,s3c2450-pinctrl",
1247 .data = &s3c2450_of_data },
1248 #endif
1249 {},
1250 };
1251
1252 static const struct dev_pm_ops samsung_pinctrl_pm_ops = {
1253 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend,
1254 samsung_pinctrl_resume)
1255 };
1256
1257 static struct platform_driver samsung_pinctrl_driver = {
1258 .probe = samsung_pinctrl_probe,
1259 .driver = {
1260 .name = "samsung-pinctrl",
1261 .of_match_table = samsung_pinctrl_dt_match,
1262 .suppress_bind_attrs = true,
1263 .pm = &samsung_pinctrl_pm_ops,
1264 },
1265 };
1266
1267 static int __init samsung_pinctrl_drv_register(void)
1268 {
1269 return platform_driver_register(&samsung_pinctrl_driver);
1270 }
1271 postcore_initcall(samsung_pinctrl_drv_register);
Linux with added FPC-III support