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net: dsa: b53: Fix ARL register definitions
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blobf570b8c5d857cce6e8d3d53e4d9cc861b8214558
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.20-125"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("cciss");
85
86 static int hpsa_simple_mode;
87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88 MODULE_PARM_DESC(hpsa_simple_mode,
89 "Use 'simple mode' rather than 'performant mode'");
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id hpsa_pci_device_id[] = {
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150 {0,}
151 };
152
153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
154
155 /* board_id = Subsystem Device ID & Vendor ID
156 * product = Marketing Name for the board
157 * access = Address of the struct of function pointers
158 */
159 static struct board_type products[] = {
160 {0x40700E11, "Smart Array 5300", &SA5A_access},
161 {0x40800E11, "Smart Array 5i", &SA5B_access},
162 {0x40820E11, "Smart Array 532", &SA5B_access},
163 {0x40830E11, "Smart Array 5312", &SA5B_access},
164 {0x409A0E11, "Smart Array 641", &SA5A_access},
165 {0x409B0E11, "Smart Array 642", &SA5A_access},
166 {0x409C0E11, "Smart Array 6400", &SA5A_access},
167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168 {0x40910E11, "Smart Array 6i", &SA5A_access},
169 {0x3225103C, "Smart Array P600", &SA5A_access},
170 {0x3223103C, "Smart Array P800", &SA5A_access},
171 {0x3234103C, "Smart Array P400", &SA5A_access},
172 {0x3235103C, "Smart Array P400i", &SA5A_access},
173 {0x3211103C, "Smart Array E200i", &SA5A_access},
174 {0x3212103C, "Smart Array E200", &SA5A_access},
175 {0x3213103C, "Smart Array E200i", &SA5A_access},
176 {0x3214103C, "Smart Array E200i", &SA5A_access},
177 {0x3215103C, "Smart Array E200i", &SA5A_access},
178 {0x3237103C, "Smart Array E500", &SA5A_access},
179 {0x323D103C, "Smart Array P700m", &SA5A_access},
180 {0x3241103C, "Smart Array P212", &SA5_access},
181 {0x3243103C, "Smart Array P410", &SA5_access},
182 {0x3245103C, "Smart Array P410i", &SA5_access},
183 {0x3247103C, "Smart Array P411", &SA5_access},
184 {0x3249103C, "Smart Array P812", &SA5_access},
185 {0x324A103C, "Smart Array P712m", &SA5_access},
186 {0x324B103C, "Smart Array P711m", &SA5_access},
187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
188 {0x3350103C, "Smart Array P222", &SA5_access},
189 {0x3351103C, "Smart Array P420", &SA5_access},
190 {0x3352103C, "Smart Array P421", &SA5_access},
191 {0x3353103C, "Smart Array P822", &SA5_access},
192 {0x3354103C, "Smart Array P420i", &SA5_access},
193 {0x3355103C, "Smart Array P220i", &SA5_access},
194 {0x3356103C, "Smart Array P721m", &SA5_access},
195 {0x1920103C, "Smart Array P430i", &SA5_access},
196 {0x1921103C, "Smart Array P830i", &SA5_access},
197 {0x1922103C, "Smart Array P430", &SA5_access},
198 {0x1923103C, "Smart Array P431", &SA5_access},
199 {0x1924103C, "Smart Array P830", &SA5_access},
200 {0x1925103C, "Smart Array P831", &SA5_access},
201 {0x1926103C, "Smart Array P731m", &SA5_access},
202 {0x1928103C, "Smart Array P230i", &SA5_access},
203 {0x1929103C, "Smart Array P530", &SA5_access},
204 {0x21BD103C, "Smart Array P244br", &SA5_access},
205 {0x21BE103C, "Smart Array P741m", &SA5_access},
206 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207 {0x21C0103C, "Smart Array P440ar", &SA5_access},
208 {0x21C1103C, "Smart Array P840ar", &SA5_access},
209 {0x21C2103C, "Smart Array P440", &SA5_access},
210 {0x21C3103C, "Smart Array P441", &SA5_access},
211 {0x21C4103C, "Smart Array", &SA5_access},
212 {0x21C5103C, "Smart Array P841", &SA5_access},
213 {0x21C6103C, "Smart HBA H244br", &SA5_access},
214 {0x21C7103C, "Smart HBA H240", &SA5_access},
215 {0x21C8103C, "Smart HBA H241", &SA5_access},
216 {0x21C9103C, "Smart Array", &SA5_access},
217 {0x21CA103C, "Smart Array P246br", &SA5_access},
218 {0x21CB103C, "Smart Array P840", &SA5_access},
219 {0x21CC103C, "Smart Array", &SA5_access},
220 {0x21CD103C, "Smart Array", &SA5_access},
221 {0x21CE103C, "Smart HBA", &SA5_access},
222 {0x05809005, "SmartHBA-SA", &SA5_access},
223 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
234 };
235
236 static struct scsi_transport_template *hpsa_sas_transport_template;
237 static int hpsa_add_sas_host(struct ctlr_info *h);
238 static void hpsa_delete_sas_host(struct ctlr_info *h);
239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240 struct hpsa_scsi_dev_t *device);
241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242 static struct hpsa_scsi_dev_t
243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244 struct sas_rphy *rphy);
245
246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247 static const struct scsi_cmnd hpsa_cmd_busy;
248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249 static const struct scsi_cmnd hpsa_cmd_idle;
250 static int number_of_controllers;
251
252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
255
256 #ifdef CONFIG_COMPAT
257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
258 void __user *arg);
259 #endif
260
261 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
262 static struct CommandList *cmd_alloc(struct ctlr_info *h);
263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
265 struct scsi_cmnd *scmd);
266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
268 int cmd_type);
269 static void hpsa_free_cmd_pool(struct ctlr_info *h);
270 #define VPD_PAGE (1 << 8)
271 #define HPSA_SIMPLE_ERROR_BITS 0x03
272
273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
274 static void hpsa_scan_start(struct Scsi_Host *);
275 static int hpsa_scan_finished(struct Scsi_Host *sh,
276 unsigned long elapsed_time);
277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
278
279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
280 static int hpsa_slave_alloc(struct scsi_device *sdev);
281 static int hpsa_slave_configure(struct scsi_device *sdev);
282 static void hpsa_slave_destroy(struct scsi_device *sdev);
283
284 static void hpsa_update_scsi_devices(struct ctlr_info *h);
285 static int check_for_unit_attention(struct ctlr_info *h,
286 struct CommandList *c);
287 static void check_ioctl_unit_attention(struct ctlr_info *h,
288 struct CommandList *c);
289 /* performant mode helper functions */
290 static void calc_bucket_map(int *bucket, int num_buckets,
291 int nsgs, int min_blocks, u32 *bucket_map);
292 static void hpsa_free_performant_mode(struct ctlr_info *h);
293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
294 static inline u32 next_command(struct ctlr_info *h, u8 q);
295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
296 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
297 u64 *cfg_offset);
298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
299 unsigned long *memory_bar);
300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
301 bool *legacy_board);
302 static int wait_for_device_to_become_ready(struct ctlr_info *h,
303 unsigned char lunaddr[],
304 int reply_queue);
305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
306 int wait_for_ready);
307 static inline void finish_cmd(struct CommandList *c);
308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
309 #define BOARD_NOT_READY 0
310 #define BOARD_READY 1
311 static void hpsa_drain_accel_commands(struct ctlr_info *h);
312 static void hpsa_flush_cache(struct ctlr_info *h);
313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
316 static void hpsa_command_resubmit_worker(struct work_struct *work);
317 static u32 lockup_detected(struct ctlr_info *h);
318 static int detect_controller_lockup(struct ctlr_info *h);
319 static void hpsa_disable_rld_caching(struct ctlr_info *h);
320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
321 struct ReportExtendedLUNdata *buf, int bufsize);
322 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
323 unsigned char scsi3addr[], u8 page);
324 static int hpsa_luns_changed(struct ctlr_info *h);
325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
326 struct hpsa_scsi_dev_t *dev,
327 unsigned char *scsi3addr);
328
329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
330 {
331 unsigned long *priv = shost_priv(sdev->host);
332 return (struct ctlr_info *) *priv;
333 }
334
335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
336 {
337 unsigned long *priv = shost_priv(sh);
338 return (struct ctlr_info *) *priv;
339 }
340
341 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
342 {
343 return c->scsi_cmd == SCSI_CMD_IDLE;
344 }
345
346 static inline bool hpsa_is_pending_event(struct CommandList *c)
347 {
348 return c->reset_pending;
349 }
350
351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
352 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
353 u8 *sense_key, u8 *asc, u8 *ascq)
354 {
355 struct scsi_sense_hdr sshdr;
356 bool rc;
357
358 *sense_key = -1;
359 *asc = -1;
360 *ascq = -1;
361
362 if (sense_data_len < 1)
363 return;
364
365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
366 if (rc) {
367 *sense_key = sshdr.sense_key;
368 *asc = sshdr.asc;
369 *ascq = sshdr.ascq;
370 }
371 }
372
373 static int check_for_unit_attention(struct ctlr_info *h,
374 struct CommandList *c)
375 {
376 u8 sense_key, asc, ascq;
377 int sense_len;
378
379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
380 sense_len = sizeof(c->err_info->SenseInfo);
381 else
382 sense_len = c->err_info->SenseLen;
383
384 decode_sense_data(c->err_info->SenseInfo, sense_len,
385 &sense_key, &asc, &ascq);
386 if (sense_key != UNIT_ATTENTION || asc == 0xff)
387 return 0;
388
389 switch (asc) {
390 case STATE_CHANGED:
391 dev_warn(&h->pdev->dev,
392 "%s: a state change detected, command retried\n",
393 h->devname);
394 break;
395 case LUN_FAILED:
396 dev_warn(&h->pdev->dev,
397 "%s: LUN failure detected\n", h->devname);
398 break;
399 case REPORT_LUNS_CHANGED:
400 dev_warn(&h->pdev->dev,
401 "%s: report LUN data changed\n", h->devname);
402 /*
403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
404 * target (array) devices.
405 */
406 break;
407 case POWER_OR_RESET:
408 dev_warn(&h->pdev->dev,
409 "%s: a power on or device reset detected\n",
410 h->devname);
411 break;
412 case UNIT_ATTENTION_CLEARED:
413 dev_warn(&h->pdev->dev,
414 "%s: unit attention cleared by another initiator\n",
415 h->devname);
416 break;
417 default:
418 dev_warn(&h->pdev->dev,
419 "%s: unknown unit attention detected\n",
420 h->devname);
421 break;
422 }
423 return 1;
424 }
425
426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
427 {
428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
429 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
431 return 0;
432 dev_warn(&h->pdev->dev, HPSA "device busy");
433 return 1;
434 }
435
436 static u32 lockup_detected(struct ctlr_info *h);
437 static ssize_t host_show_lockup_detected(struct device *dev,
438 struct device_attribute *attr, char *buf)
439 {
440 int ld;
441 struct ctlr_info *h;
442 struct Scsi_Host *shost = class_to_shost(dev);
443
444 h = shost_to_hba(shost);
445 ld = lockup_detected(h);
446
447 return sprintf(buf, "ld=%d\n", ld);
448 }
449
450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf, size_t count)
453 {
454 int status, len;
455 struct ctlr_info *h;
456 struct Scsi_Host *shost = class_to_shost(dev);
457 char tmpbuf[10];
458
459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
460 return -EACCES;
461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
462 strncpy(tmpbuf, buf, len);
463 tmpbuf[len] = '\0';
464 if (sscanf(tmpbuf, "%d", &status) != 1)
465 return -EINVAL;
466 h = shost_to_hba(shost);
467 h->acciopath_status = !!status;
468 dev_warn(&h->pdev->dev,
469 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
470 h->acciopath_status ? "enabled" : "disabled");
471 return count;
472 }
473
474 static ssize_t host_store_raid_offload_debug(struct device *dev,
475 struct device_attribute *attr,
476 const char *buf, size_t count)
477 {
478 int debug_level, len;
479 struct ctlr_info *h;
480 struct Scsi_Host *shost = class_to_shost(dev);
481 char tmpbuf[10];
482
483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
484 return -EACCES;
485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
486 strncpy(tmpbuf, buf, len);
487 tmpbuf[len] = '\0';
488 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
489 return -EINVAL;
490 if (debug_level < 0)
491 debug_level = 0;
492 h = shost_to_hba(shost);
493 h->raid_offload_debug = debug_level;
494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
495 h->raid_offload_debug);
496 return count;
497 }
498
499 static ssize_t host_store_rescan(struct device *dev,
500 struct device_attribute *attr,
501 const char *buf, size_t count)
502 {
503 struct ctlr_info *h;
504 struct Scsi_Host *shost = class_to_shost(dev);
505 h = shost_to_hba(shost);
506 hpsa_scan_start(h->scsi_host);
507 return count;
508 }
509
510 static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
512 {
513 struct ctlr_info *h;
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
516
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
519 return 0;
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523 }
524
525 static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
527 {
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
530
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
533 }
534
535 static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
537 {
538 struct ctlr_info *h;
539 struct Scsi_Host *shost = class_to_shost(dev);
540
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
545 }
546
547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
549 {
550 struct ctlr_info *h;
551 struct Scsi_Host *shost = class_to_shost(dev);
552
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
556 }
557
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
581 };
582
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
598 */
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
601 };
602
603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604 {
605 int i;
606
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
609 return 1;
610 return 0;
611 }
612
613 static int ctlr_is_hard_resettable(u32 board_id)
614 {
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
617 }
618
619 static int ctlr_is_soft_resettable(u32 board_id)
620 {
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
623 }
624
625 static int ctlr_is_resettable(u32 board_id)
626 {
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
629 }
630
631 static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
633 {
634 struct ctlr_info *h;
635 struct Scsi_Host *shost = class_to_shost(dev);
636
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639 }
640
641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642 {
643 return (scsi3addr[3] & 0xC0) == 0x40;
644 }
645
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648 };
649 #define HPSA_RAID_0 0
650 #define HPSA_RAID_4 1
651 #define HPSA_RAID_1 2 /* also used for RAID 10 */
652 #define HPSA_RAID_5 3 /* also used for RAID 50 */
653 #define HPSA_RAID_51 4
654 #define HPSA_RAID_6 5 /* also used for RAID 60 */
655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660 {
661 return !device->physical_device;
662 }
663
664 static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666 {
667 ssize_t l = 0;
668 unsigned char rlevel;
669 struct ctlr_info *h;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
672 unsigned long flags;
673
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
678 if (!hdev) {
679 spin_unlock_irqrestore(&h->lock, flags);
680 return -ENODEV;
681 }
682
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687 return l;
688 }
689
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695 return l;
696 }
697
698 static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
700 {
701 struct ctlr_info *h;
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
704 unsigned long flags;
705 unsigned char lunid[8];
706
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
711 if (!hdev) {
712 spin_unlock_irqrestore(&h->lock, flags);
713 return -ENODEV;
714 }
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
718 }
719
720 static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
722 {
723 struct ctlr_info *h;
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
726 unsigned long flags;
727 unsigned char sn[16];
728
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
733 if (!hdev) {
734 spin_unlock_irqrestore(&h->lock, flags);
735 return -ENODEV;
736 }
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
746 }
747
748 static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
750 {
751 struct ctlr_info *h;
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
754 unsigned long flags;
755 u64 sas_address;
756
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
763 return -ENODEV;
764 }
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
767
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769 }
770
771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
773 {
774 struct ctlr_info *h;
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
777 unsigned long flags;
778 int offload_enabled;
779
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
784 if (!hdev) {
785 spin_unlock_irqrestore(&h->lock, flags);
786 return -ENODEV;
787 }
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
790
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
793 else
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
796 }
797
798 #define MAX_PATHS 8
799 static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
801 {
802 struct ctlr_info *h;
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
805 unsigned long flags;
806 int i;
807 int output_len = 0;
808 u8 box;
809 u8 bay;
810 u8 path_map_index = 0;
811 char *active;
812 unsigned char phys_connector[2];
813
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
818 if (!hdev) {
819 spin_unlock_irqrestore(&h->devlock, flags);
820 return -ENODEV;
821 }
822
823 bay = hdev->bay;
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
827 active = "Active";
828 else if (hdev->path_map & path_map_index)
829 active = "Inactive";
830 else
831 continue;
832
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
839
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "%s\n", active);
844 continue;
845 }
846
847 box = hdev->box[i];
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
856 "PORT: %.2s ",
857 phys_connector);
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "BAY: %hhu %s\n",
864 bay, active);
865 } else {
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
869 box, bay, active);
870 }
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 box, active);
875 } else
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
878 }
879
880 spin_unlock_irqrestore(&h->devlock, flags);
881 return output_len;
882 }
883
884 static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
886 {
887 struct ctlr_info *h;
888 struct Scsi_Host *shost = class_to_shost(dev);
889
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
892 }
893
894 static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
896 {
897 struct ctlr_info *h;
898 struct Scsi_Host *shost = class_to_shost(dev);
899
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902 }
903
904 static DEVICE_ATTR_RO(raid_level);
905 static DEVICE_ATTR_RO(lunid);
906 static DEVICE_ATTR_RO(unique_id);
907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908 static DEVICE_ATTR_RO(sas_address);
909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911 static DEVICE_ATTR_RO(path_info);
912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917 static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921 static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923 static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925 static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927 static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929 static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
931
932 static struct device_attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level,
934 &dev_attr_lunid,
935 &dev_attr_unique_id,
936 &dev_attr_hp_ssd_smart_path_enabled,
937 &dev_attr_path_info,
938 &dev_attr_sas_address,
939 NULL,
940 };
941
942 static struct device_attribute *hpsa_shost_attrs[] = {
943 &dev_attr_rescan,
944 &dev_attr_firmware_revision,
945 &dev_attr_commands_outstanding,
946 &dev_attr_transport_mode,
947 &dev_attr_resettable,
948 &dev_attr_hp_ssd_smart_path_status,
949 &dev_attr_raid_offload_debug,
950 &dev_attr_lockup_detected,
951 &dev_attr_ctlr_num,
952 &dev_attr_legacy_board,
953 NULL,
954 };
955
956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
957 HPSA_MAX_CONCURRENT_PASSTHRUS)
958
959 static struct scsi_host_template hpsa_driver_template = {
960 .module = THIS_MODULE,
961 .name = HPSA,
962 .proc_name = HPSA,
963 .queuecommand = hpsa_scsi_queue_command,
964 .scan_start = hpsa_scan_start,
965 .scan_finished = hpsa_scan_finished,
966 .change_queue_depth = hpsa_change_queue_depth,
967 .this_id = -1,
968 .use_clustering = ENABLE_CLUSTERING,
969 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
970 .ioctl = hpsa_ioctl,
971 .slave_alloc = hpsa_slave_alloc,
972 .slave_configure = hpsa_slave_configure,
973 .slave_destroy = hpsa_slave_destroy,
974 #ifdef CONFIG_COMPAT
975 .compat_ioctl = hpsa_compat_ioctl,
976 #endif
977 .sdev_attrs = hpsa_sdev_attrs,
978 .shost_attrs = hpsa_shost_attrs,
979 .max_sectors = 2048,
980 .no_write_same = 1,
981 };
982
983 static inline u32 next_command(struct ctlr_info *h, u8 q)
984 {
985 u32 a;
986 struct reply_queue_buffer *rq = &h->reply_queue[q];
987
988 if (h->transMethod & CFGTBL_Trans_io_accel1)
989 return h->access.command_completed(h, q);
990
991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
992 return h->access.command_completed(h, q);
993
994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
995 a = rq->head[rq->current_entry];
996 rq->current_entry++;
997 atomic_dec(&h->commands_outstanding);
998 } else {
999 a = FIFO_EMPTY;
1000 }
1001 /* Check for wraparound */
1002 if (rq->current_entry == h->max_commands) {
1003 rq->current_entry = 0;
1004 rq->wraparound ^= 1;
1005 }
1006 return a;
1007 }
1008
1009 /*
1010 * There are some special bits in the bus address of the
1011 * command that we have to set for the controller to know
1012 * how to process the command:
1013 *
1014 * Normal performant mode:
1015 * bit 0: 1 means performant mode, 0 means simple mode.
1016 * bits 1-3 = block fetch table entry
1017 * bits 4-6 = command type (== 0)
1018 *
1019 * ioaccel1 mode:
1020 * bit 0 = "performant mode" bit.
1021 * bits 1-3 = block fetch table entry
1022 * bits 4-6 = command type (== 110)
1023 * (command type is needed because ioaccel1 mode
1024 * commands are submitted through the same register as normal
1025 * mode commands, so this is how the controller knows whether
1026 * the command is normal mode or ioaccel1 mode.)
1027 *
1028 * ioaccel2 mode:
1029 * bit 0 = "performant mode" bit.
1030 * bits 1-4 = block fetch table entry (note extra bit)
1031 * bits 4-6 = not needed, because ioaccel2 mode has
1032 * a separate special register for submitting commands.
1033 */
1034
1035 /*
1036 * set_performant_mode: Modify the tag for cciss performant
1037 * set bit 0 for pull model, bits 3-1 for block fetch
1038 * register number
1039 */
1040 #define DEFAULT_REPLY_QUEUE (-1)
1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1042 int reply_queue)
1043 {
1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1046 if (unlikely(!h->msix_vectors))
1047 return;
1048 c->Header.ReplyQueue = reply_queue;
1049 }
1050 }
1051
1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1053 struct CommandList *c,
1054 int reply_queue)
1055 {
1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1057
1058 /*
1059 * Tell the controller to post the reply to the queue for this
1060 * processor. This seems to give the best I/O throughput.
1061 */
1062 cp->ReplyQueue = reply_queue;
1063 /*
1064 * Set the bits in the address sent down to include:
1065 * - performant mode bit (bit 0)
1066 * - pull count (bits 1-3)
1067 * - command type (bits 4-6)
1068 */
1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1070 IOACCEL1_BUSADDR_CMDTYPE;
1071 }
1072
1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1074 struct CommandList *c,
1075 int reply_queue)
1076 {
1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1078 &h->ioaccel2_cmd_pool[c->cmdindex];
1079
1080 /* Tell the controller to post the reply to the queue for this
1081 * processor. This seems to give the best I/O throughput.
1082 */
1083 cp->reply_queue = reply_queue;
1084 /* Set the bits in the address sent down to include:
1085 * - performant mode bit not used in ioaccel mode 2
1086 * - pull count (bits 0-3)
1087 * - command type isn't needed for ioaccel2
1088 */
1089 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1090 }
1091
1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1093 struct CommandList *c,
1094 int reply_queue)
1095 {
1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1097
1098 /*
1099 * Tell the controller to post the reply to the queue for this
1100 * processor. This seems to give the best I/O throughput.
1101 */
1102 cp->reply_queue = reply_queue;
1103 /*
1104 * Set the bits in the address sent down to include:
1105 * - performant mode bit not used in ioaccel mode 2
1106 * - pull count (bits 0-3)
1107 * - command type isn't needed for ioaccel2
1108 */
1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1110 }
1111
1112 static int is_firmware_flash_cmd(u8 *cdb)
1113 {
1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1115 }
1116
1117 /*
1118 * During firmware flash, the heartbeat register may not update as frequently
1119 * as it should. So we dial down lockup detection during firmware flash. and
1120 * dial it back up when firmware flash completes.
1121 */
1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1126 struct CommandList *c)
1127 {
1128 if (!is_firmware_flash_cmd(c->Request.CDB))
1129 return;
1130 atomic_inc(&h->firmware_flash_in_progress);
1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1132 }
1133
1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1135 struct CommandList *c)
1136 {
1137 if (is_firmware_flash_cmd(c->Request.CDB) &&
1138 atomic_dec_and_test(&h->firmware_flash_in_progress))
1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1140 }
1141
1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1143 struct CommandList *c, int reply_queue)
1144 {
1145 dial_down_lockup_detection_during_fw_flash(h, c);
1146 atomic_inc(&h->commands_outstanding);
1147
1148 reply_queue = h->reply_map[raw_smp_processor_id()];
1149 switch (c->cmd_type) {
1150 case CMD_IOACCEL1:
1151 set_ioaccel1_performant_mode(h, c, reply_queue);
1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1153 break;
1154 case CMD_IOACCEL2:
1155 set_ioaccel2_performant_mode(h, c, reply_queue);
1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1157 break;
1158 case IOACCEL2_TMF:
1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1161 break;
1162 default:
1163 set_performant_mode(h, c, reply_queue);
1164 h->access.submit_command(h, c);
1165 }
1166 }
1167
1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1169 {
1170 if (unlikely(hpsa_is_pending_event(c)))
1171 return finish_cmd(c);
1172
1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1174 }
1175
1176 static inline int is_hba_lunid(unsigned char scsi3addr[])
1177 {
1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1179 }
1180
1181 static inline int is_scsi_rev_5(struct ctlr_info *h)
1182 {
1183 if (!h->hba_inquiry_data)
1184 return 0;
1185 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1186 return 1;
1187 return 0;
1188 }
1189
1190 static int hpsa_find_target_lun(struct ctlr_info *h,
1191 unsigned char scsi3addr[], int bus, int *target, int *lun)
1192 {
1193 /* finds an unused bus, target, lun for a new physical device
1194 * assumes h->devlock is held
1195 */
1196 int i, found = 0;
1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1198
1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1200
1201 for (i = 0; i < h->ndevices; i++) {
1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1203 __set_bit(h->dev[i]->target, lun_taken);
1204 }
1205
1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1207 if (i < HPSA_MAX_DEVICES) {
1208 /* *bus = 1; */
1209 *target = i;
1210 *lun = 0;
1211 found = 1;
1212 }
1213 return !found;
1214 }
1215
1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1217 struct hpsa_scsi_dev_t *dev, char *description)
1218 {
1219 #define LABEL_SIZE 25
1220 char label[LABEL_SIZE];
1221
1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1223 return;
1224
1225 switch (dev->devtype) {
1226 case TYPE_RAID:
1227 snprintf(label, LABEL_SIZE, "controller");
1228 break;
1229 case TYPE_ENCLOSURE:
1230 snprintf(label, LABEL_SIZE, "enclosure");
1231 break;
1232 case TYPE_DISK:
1233 case TYPE_ZBC:
1234 if (dev->external)
1235 snprintf(label, LABEL_SIZE, "external");
1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1237 snprintf(label, LABEL_SIZE, "%s",
1238 raid_label[PHYSICAL_DRIVE]);
1239 else
1240 snprintf(label, LABEL_SIZE, "RAID-%s",
1241 dev->raid_level > RAID_UNKNOWN ? "?" :
1242 raid_label[dev->raid_level]);
1243 break;
1244 case TYPE_ROM:
1245 snprintf(label, LABEL_SIZE, "rom");
1246 break;
1247 case TYPE_TAPE:
1248 snprintf(label, LABEL_SIZE, "tape");
1249 break;
1250 case TYPE_MEDIUM_CHANGER:
1251 snprintf(label, LABEL_SIZE, "changer");
1252 break;
1253 default:
1254 snprintf(label, LABEL_SIZE, "UNKNOWN");
1255 break;
1256 }
1257
1258 dev_printk(level, &h->pdev->dev,
1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1261 description,
1262 scsi_device_type(dev->devtype),
1263 dev->vendor,
1264 dev->model,
1265 label,
1266 dev->offload_config ? '+' : '-',
1267 dev->offload_to_be_enabled ? '+' : '-',
1268 dev->expose_device);
1269 }
1270
1271 /* Add an entry into h->dev[] array. */
1272 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1273 struct hpsa_scsi_dev_t *device,
1274 struct hpsa_scsi_dev_t *added[], int *nadded)
1275 {
1276 /* assumes h->devlock is held */
1277 int n = h->ndevices;
1278 int i;
1279 unsigned char addr1[8], addr2[8];
1280 struct hpsa_scsi_dev_t *sd;
1281
1282 if (n >= HPSA_MAX_DEVICES) {
1283 dev_err(&h->pdev->dev, "too many devices, some will be "
1284 "inaccessible.\n");
1285 return -1;
1286 }
1287
1288 /* physical devices do not have lun or target assigned until now. */
1289 if (device->lun != -1)
1290 /* Logical device, lun is already assigned. */
1291 goto lun_assigned;
1292
1293 /* If this device a non-zero lun of a multi-lun device
1294 * byte 4 of the 8-byte LUN addr will contain the logical
1295 * unit no, zero otherwise.
1296 */
1297 if (device->scsi3addr[4] == 0) {
1298 /* This is not a non-zero lun of a multi-lun device */
1299 if (hpsa_find_target_lun(h, device->scsi3addr,
1300 device->bus, &device->target, &device->lun) != 0)
1301 return -1;
1302 goto lun_assigned;
1303 }
1304
1305 /* This is a non-zero lun of a multi-lun device.
1306 * Search through our list and find the device which
1307 * has the same 8 byte LUN address, excepting byte 4 and 5.
1308 * Assign the same bus and target for this new LUN.
1309 * Use the logical unit number from the firmware.
1310 */
1311 memcpy(addr1, device->scsi3addr, 8);
1312 addr1[4] = 0;
1313 addr1[5] = 0;
1314 for (i = 0; i < n; i++) {
1315 sd = h->dev[i];
1316 memcpy(addr2, sd->scsi3addr, 8);
1317 addr2[4] = 0;
1318 addr2[5] = 0;
1319 /* differ only in byte 4 and 5? */
1320 if (memcmp(addr1, addr2, 8) == 0) {
1321 device->bus = sd->bus;
1322 device->target = sd->target;
1323 device->lun = device->scsi3addr[4];
1324 break;
1325 }
1326 }
1327 if (device->lun == -1) {
1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1329 " suspect firmware bug or unsupported hardware "
1330 "configuration.\n");
1331 return -1;
1332 }
1333
1334 lun_assigned:
1335
1336 h->dev[n] = device;
1337 h->ndevices++;
1338 added[*nadded] = device;
1339 (*nadded)++;
1340 hpsa_show_dev_msg(KERN_INFO, h, device,
1341 device->expose_device ? "added" : "masked");
1342 return 0;
1343 }
1344
1345 /*
1346 * Called during a scan operation.
1347 *
1348 * Update an entry in h->dev[] array.
1349 */
1350 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1351 int entry, struct hpsa_scsi_dev_t *new_entry)
1352 {
1353 /* assumes h->devlock is held */
1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1355
1356 /* Raid level changed. */
1357 h->dev[entry]->raid_level = new_entry->raid_level;
1358
1359 /*
1360 * ioacccel_handle may have changed for a dual domain disk
1361 */
1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1363
1364 /* Raid offload parameters changed. Careful about the ordering. */
1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1366 /*
1367 * if drive is newly offload_enabled, we want to copy the
1368 * raid map data first. If previously offload_enabled and
1369 * offload_config were set, raid map data had better be
1370 * the same as it was before. If raid map data has changed
1371 * then it had better be the case that
1372 * h->dev[entry]->offload_enabled is currently 0.
1373 */
1374 h->dev[entry]->raid_map = new_entry->raid_map;
1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1376 }
1377 if (new_entry->offload_to_be_enabled) {
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1380 }
1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1382 h->dev[entry]->offload_config = new_entry->offload_config;
1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1384 h->dev[entry]->queue_depth = new_entry->queue_depth;
1385
1386 /*
1387 * We can turn off ioaccel offload now, but need to delay turning
1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1389 * can't do that until all the devices are updated.
1390 */
1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1392
1393 /*
1394 * turn ioaccel off immediately if told to do so.
1395 */
1396 if (!new_entry->offload_to_be_enabled)
1397 h->dev[entry]->offload_enabled = 0;
1398
1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1400 }
1401
1402 /* Replace an entry from h->dev[] array. */
1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1404 int entry, struct hpsa_scsi_dev_t *new_entry,
1405 struct hpsa_scsi_dev_t *added[], int *nadded,
1406 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1407 {
1408 /* assumes h->devlock is held */
1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1410 removed[*nremoved] = h->dev[entry];
1411 (*nremoved)++;
1412
1413 /*
1414 * New physical devices won't have target/lun assigned yet
1415 * so we need to preserve the values in the slot we are replacing.
1416 */
1417 if (new_entry->target == -1) {
1418 new_entry->target = h->dev[entry]->target;
1419 new_entry->lun = h->dev[entry]->lun;
1420 }
1421
1422 h->dev[entry] = new_entry;
1423 added[*nadded] = new_entry;
1424 (*nadded)++;
1425
1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1427 }
1428
1429 /* Remove an entry from h->dev[] array. */
1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1431 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1432 {
1433 /* assumes h->devlock is held */
1434 int i;
1435 struct hpsa_scsi_dev_t *sd;
1436
1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1438
1439 sd = h->dev[entry];
1440 removed[*nremoved] = h->dev[entry];
1441 (*nremoved)++;
1442
1443 for (i = entry; i < h->ndevices-1; i++)
1444 h->dev[i] = h->dev[i+1];
1445 h->ndevices--;
1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1447 }
1448
1449 #define SCSI3ADDR_EQ(a, b) ( \
1450 (a)[7] == (b)[7] && \
1451 (a)[6] == (b)[6] && \
1452 (a)[5] == (b)[5] && \
1453 (a)[4] == (b)[4] && \
1454 (a)[3] == (b)[3] && \
1455 (a)[2] == (b)[2] && \
1456 (a)[1] == (b)[1] && \
1457 (a)[0] == (b)[0])
1458
1459 static void fixup_botched_add(struct ctlr_info *h,
1460 struct hpsa_scsi_dev_t *added)
1461 {
1462 /* called when scsi_add_device fails in order to re-adjust
1463 * h->dev[] to match the mid layer's view.
1464 */
1465 unsigned long flags;
1466 int i, j;
1467
1468 spin_lock_irqsave(&h->lock, flags);
1469 for (i = 0; i < h->ndevices; i++) {
1470 if (h->dev[i] == added) {
1471 for (j = i; j < h->ndevices-1; j++)
1472 h->dev[j] = h->dev[j+1];
1473 h->ndevices--;
1474 break;
1475 }
1476 }
1477 spin_unlock_irqrestore(&h->lock, flags);
1478 kfree(added);
1479 }
1480
1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1482 struct hpsa_scsi_dev_t *dev2)
1483 {
1484 /* we compare everything except lun and target as these
1485 * are not yet assigned. Compare parts likely
1486 * to differ first
1487 */
1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1489 sizeof(dev1->scsi3addr)) != 0)
1490 return 0;
1491 if (memcmp(dev1->device_id, dev2->device_id,
1492 sizeof(dev1->device_id)) != 0)
1493 return 0;
1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1495 return 0;
1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1497 return 0;
1498 if (dev1->devtype != dev2->devtype)
1499 return 0;
1500 if (dev1->bus != dev2->bus)
1501 return 0;
1502 return 1;
1503 }
1504
1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1506 struct hpsa_scsi_dev_t *dev2)
1507 {
1508 /* Device attributes that can change, but don't mean
1509 * that the device is a different device, nor that the OS
1510 * needs to be told anything about the change.
1511 */
1512 if (dev1->raid_level != dev2->raid_level)
1513 return 1;
1514 if (dev1->offload_config != dev2->offload_config)
1515 return 1;
1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1517 return 1;
1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1519 if (dev1->queue_depth != dev2->queue_depth)
1520 return 1;
1521 /*
1522 * This can happen for dual domain devices. An active
1523 * path change causes the ioaccel handle to change
1524 *
1525 * for example note the handle differences between p0 and p1
1526 * Device WWN ,WWN hash,Handle
1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1529 */
1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1531 return 1;
1532 return 0;
1533 }
1534
1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1536 * and return needle location in *index. If scsi3addr matches, but not
1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1538 * location in *index.
1539 * In the case of a minor device attribute change, such as RAID level, just
1540 * return DEVICE_UPDATED, along with the updated device's location in index.
1541 * If needle not found, return DEVICE_NOT_FOUND.
1542 */
1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1545 int *index)
1546 {
1547 int i;
1548 #define DEVICE_NOT_FOUND 0
1549 #define DEVICE_CHANGED 1
1550 #define DEVICE_SAME 2
1551 #define DEVICE_UPDATED 3
1552 if (needle == NULL)
1553 return DEVICE_NOT_FOUND;
1554
1555 for (i = 0; i < haystack_size; i++) {
1556 if (haystack[i] == NULL) /* previously removed. */
1557 continue;
1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1559 *index = i;
1560 if (device_is_the_same(needle, haystack[i])) {
1561 if (device_updated(needle, haystack[i]))
1562 return DEVICE_UPDATED;
1563 return DEVICE_SAME;
1564 } else {
1565 /* Keep offline devices offline */
1566 if (needle->volume_offline)
1567 return DEVICE_NOT_FOUND;
1568 return DEVICE_CHANGED;
1569 }
1570 }
1571 }
1572 *index = -1;
1573 return DEVICE_NOT_FOUND;
1574 }
1575
1576 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1577 unsigned char scsi3addr[])
1578 {
1579 struct offline_device_entry *device;
1580 unsigned long flags;
1581
1582 /* Check to see if device is already on the list */
1583 spin_lock_irqsave(&h->offline_device_lock, flags);
1584 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1585 if (memcmp(device->scsi3addr, scsi3addr,
1586 sizeof(device->scsi3addr)) == 0) {
1587 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1588 return;
1589 }
1590 }
1591 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1592
1593 /* Device is not on the list, add it. */
1594 device = kmalloc(sizeof(*device), GFP_KERNEL);
1595 if (!device)
1596 return;
1597
1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1599 spin_lock_irqsave(&h->offline_device_lock, flags);
1600 list_add_tail(&device->offline_list, &h->offline_device_list);
1601 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1602 }
1603
1604 /* Print a message explaining various offline volume states */
1605 static void hpsa_show_volume_status(struct ctlr_info *h,
1606 struct hpsa_scsi_dev_t *sd)
1607 {
1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1613 switch (sd->volume_offline) {
1614 case HPSA_LV_OK:
1615 break;
1616 case HPSA_LV_UNDERGOING_ERASE:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_NOT_AVAILABLE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_UNDERGOING_RPI:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_PENDING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_ENCRYPTED_NO_KEY:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_UNDERGOING_ENCRYPTION:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_PENDING_ENCRYPTION:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 }
1683 }
1684
1685 /*
1686 * Figure the list of physical drive pointers for a logical drive with
1687 * raid offload configured.
1688 */
1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1690 struct hpsa_scsi_dev_t *dev[], int ndevices,
1691 struct hpsa_scsi_dev_t *logical_drive)
1692 {
1693 struct raid_map_data *map = &logical_drive->raid_map;
1694 struct raid_map_disk_data *dd = &map->data[0];
1695 int i, j;
1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1697 le16_to_cpu(map->metadata_disks_per_row);
1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1699 le16_to_cpu(map->layout_map_count) *
1700 total_disks_per_row;
1701 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1702 total_disks_per_row;
1703 int qdepth;
1704
1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1707
1708 logical_drive->nphysical_disks = nraid_map_entries;
1709
1710 qdepth = 0;
1711 for (i = 0; i < nraid_map_entries; i++) {
1712 logical_drive->phys_disk[i] = NULL;
1713 if (!logical_drive->offload_config)
1714 continue;
1715 for (j = 0; j < ndevices; j++) {
1716 if (dev[j] == NULL)
1717 continue;
1718 if (dev[j]->devtype != TYPE_DISK &&
1719 dev[j]->devtype != TYPE_ZBC)
1720 continue;
1721 if (is_logical_device(dev[j]))
1722 continue;
1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1724 continue;
1725
1726 logical_drive->phys_disk[i] = dev[j];
1727 if (i < nphys_disk)
1728 qdepth = min(h->nr_cmds, qdepth +
1729 logical_drive->phys_disk[i]->queue_depth);
1730 break;
1731 }
1732
1733 /*
1734 * This can happen if a physical drive is removed and
1735 * the logical drive is degraded. In that case, the RAID
1736 * map data will refer to a physical disk which isn't actually
1737 * present. And in that case offload_enabled should already
1738 * be 0, but we'll turn it off here just in case
1739 */
1740 if (!logical_drive->phys_disk[i]) {
1741 dev_warn(&h->pdev->dev,
1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1743 __func__,
1744 h->scsi_host->host_no, logical_drive->bus,
1745 logical_drive->target, logical_drive->lun);
1746 logical_drive->offload_enabled = 0;
1747 logical_drive->offload_to_be_enabled = 0;
1748 logical_drive->queue_depth = 8;
1749 }
1750 }
1751 if (nraid_map_entries)
1752 /*
1753 * This is correct for reads, too high for full stripe writes,
1754 * way too high for partial stripe writes
1755 */
1756 logical_drive->queue_depth = qdepth;
1757 else {
1758 if (logical_drive->external)
1759 logical_drive->queue_depth = EXTERNAL_QD;
1760 else
1761 logical_drive->queue_depth = h->nr_cmds;
1762 }
1763 }
1764
1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1766 struct hpsa_scsi_dev_t *dev[], int ndevices)
1767 {
1768 int i;
1769
1770 for (i = 0; i < ndevices; i++) {
1771 if (dev[i] == NULL)
1772 continue;
1773 if (dev[i]->devtype != TYPE_DISK &&
1774 dev[i]->devtype != TYPE_ZBC)
1775 continue;
1776 if (!is_logical_device(dev[i]))
1777 continue;
1778
1779 /*
1780 * If offload is currently enabled, the RAID map and
1781 * phys_disk[] assignment *better* not be changing
1782 * because we would be changing ioaccel phsy_disk[] pointers
1783 * on a ioaccel volume processing I/O requests.
1784 *
1785 * If an ioaccel volume status changed, initially because it was
1786 * re-configured and thus underwent a transformation, or
1787 * a drive failed, we would have received a state change
1788 * request and ioaccel should have been turned off. When the
1789 * transformation completes, we get another state change
1790 * request to turn ioaccel back on. In this case, we need
1791 * to update the ioaccel information.
1792 *
1793 * Thus: If it is not currently enabled, but will be after
1794 * the scan completes, make sure the ioaccel pointers
1795 * are up to date.
1796 */
1797
1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1800 }
1801 }
1802
1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1804 {
1805 int rc = 0;
1806
1807 if (!h->scsi_host)
1808 return 1;
1809
1810 if (is_logical_device(device)) /* RAID */
1811 rc = scsi_add_device(h->scsi_host, device->bus,
1812 device->target, device->lun);
1813 else /* HBA */
1814 rc = hpsa_add_sas_device(h->sas_host, device);
1815
1816 return rc;
1817 }
1818
1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1820 struct hpsa_scsi_dev_t *dev)
1821 {
1822 int i;
1823 int count = 0;
1824
1825 for (i = 0; i < h->nr_cmds; i++) {
1826 struct CommandList *c = h->cmd_pool + i;
1827 int refcount = atomic_inc_return(&c->refcount);
1828
1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1830 dev->scsi3addr)) {
1831 unsigned long flags;
1832
1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1834 if (!hpsa_is_cmd_idle(c))
1835 ++count;
1836 spin_unlock_irqrestore(&h->lock, flags);
1837 }
1838
1839 cmd_free(h, c);
1840 }
1841
1842 return count;
1843 }
1844
1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1846 struct hpsa_scsi_dev_t *device)
1847 {
1848 int cmds = 0;
1849 int waits = 0;
1850
1851 while (1) {
1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1853 if (cmds == 0)
1854 break;
1855 if (++waits > 20)
1856 break;
1857 msleep(1000);
1858 }
1859
1860 if (waits > 20)
1861 dev_warn(&h->pdev->dev,
1862 "%s: removing device with %d outstanding commands!\n",
1863 __func__, cmds);
1864 }
1865
1866 static void hpsa_remove_device(struct ctlr_info *h,
1867 struct hpsa_scsi_dev_t *device)
1868 {
1869 struct scsi_device *sdev = NULL;
1870
1871 if (!h->scsi_host)
1872 return;
1873
1874 /*
1875 * Allow for commands to drain
1876 */
1877 device->removed = 1;
1878 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1879
1880 if (is_logical_device(device)) { /* RAID */
1881 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1882 device->target, device->lun);
1883 if (sdev) {
1884 scsi_remove_device(sdev);
1885 scsi_device_put(sdev);
1886 } else {
1887 /*
1888 * We don't expect to get here. Future commands
1889 * to this device will get a selection timeout as
1890 * if the device were gone.
1891 */
1892 hpsa_show_dev_msg(KERN_WARNING, h, device,
1893 "didn't find device for removal.");
1894 }
1895 } else { /* HBA */
1896
1897 hpsa_remove_sas_device(device);
1898 }
1899 }
1900
1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1902 struct hpsa_scsi_dev_t *sd[], int nsds)
1903 {
1904 /* sd contains scsi3 addresses and devtypes, and inquiry
1905 * data. This function takes what's in sd to be the current
1906 * reality and updates h->dev[] to reflect that reality.
1907 */
1908 int i, entry, device_change, changes = 0;
1909 struct hpsa_scsi_dev_t *csd;
1910 unsigned long flags;
1911 struct hpsa_scsi_dev_t **added, **removed;
1912 int nadded, nremoved;
1913
1914 /*
1915 * A reset can cause a device status to change
1916 * re-schedule the scan to see what happened.
1917 */
1918 spin_lock_irqsave(&h->reset_lock, flags);
1919 if (h->reset_in_progress) {
1920 h->drv_req_rescan = 1;
1921 spin_unlock_irqrestore(&h->reset_lock, flags);
1922 return;
1923 }
1924 spin_unlock_irqrestore(&h->reset_lock, flags);
1925
1926 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL);
1927 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL);
1928
1929 if (!added || !removed) {
1930 dev_warn(&h->pdev->dev, "out of memory in "
1931 "adjust_hpsa_scsi_table\n");
1932 goto free_and_out;
1933 }
1934
1935 spin_lock_irqsave(&h->devlock, flags);
1936
1937 /* find any devices in h->dev[] that are not in
1938 * sd[] and remove them from h->dev[], and for any
1939 * devices which have changed, remove the old device
1940 * info and add the new device info.
1941 * If minor device attributes change, just update
1942 * the existing device structure.
1943 */
1944 i = 0;
1945 nremoved = 0;
1946 nadded = 0;
1947 while (i < h->ndevices) {
1948 csd = h->dev[i];
1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1950 if (device_change == DEVICE_NOT_FOUND) {
1951 changes++;
1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1953 continue; /* remove ^^^, hence i not incremented */
1954 } else if (device_change == DEVICE_CHANGED) {
1955 changes++;
1956 hpsa_scsi_replace_entry(h, i, sd[entry],
1957 added, &nadded, removed, &nremoved);
1958 /* Set it to NULL to prevent it from being freed
1959 * at the bottom of hpsa_update_scsi_devices()
1960 */
1961 sd[entry] = NULL;
1962 } else if (device_change == DEVICE_UPDATED) {
1963 hpsa_scsi_update_entry(h, i, sd[entry]);
1964 }
1965 i++;
1966 }
1967
1968 /* Now, make sure every device listed in sd[] is also
1969 * listed in h->dev[], adding them if they aren't found
1970 */
1971
1972 for (i = 0; i < nsds; i++) {
1973 if (!sd[i]) /* if already added above. */
1974 continue;
1975
1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1977 * as the SCSI mid-layer does not handle such devices well.
1978 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1979 * at 160Hz, and prevents the system from coming up.
1980 */
1981 if (sd[i]->volume_offline) {
1982 hpsa_show_volume_status(h, sd[i]);
1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1984 continue;
1985 }
1986
1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1988 h->ndevices, &entry);
1989 if (device_change == DEVICE_NOT_FOUND) {
1990 changes++;
1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1992 break;
1993 sd[i] = NULL; /* prevent from being freed later. */
1994 } else if (device_change == DEVICE_CHANGED) {
1995 /* should never happen... */
1996 changes++;
1997 dev_warn(&h->pdev->dev,
1998 "device unexpectedly changed.\n");
1999 /* but if it does happen, we just ignore that device */
2000 }
2001 }
2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2003
2004 /*
2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2006 * any logical drives that need it enabled.
2007 *
2008 * The raid map should be current by now.
2009 *
2010 * We are updating the device list used for I/O requests.
2011 */
2012 for (i = 0; i < h->ndevices; i++) {
2013 if (h->dev[i] == NULL)
2014 continue;
2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2016 }
2017
2018 spin_unlock_irqrestore(&h->devlock, flags);
2019
2020 /* Monitor devices which are in one of several NOT READY states to be
2021 * brought online later. This must be done without holding h->devlock,
2022 * so don't touch h->dev[]
2023 */
2024 for (i = 0; i < nsds; i++) {
2025 if (!sd[i]) /* if already added above. */
2026 continue;
2027 if (sd[i]->volume_offline)
2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2029 }
2030
2031 /* Don't notify scsi mid layer of any changes the first time through
2032 * (or if there are no changes) scsi_scan_host will do it later the
2033 * first time through.
2034 */
2035 if (!changes)
2036 goto free_and_out;
2037
2038 /* Notify scsi mid layer of any removed devices */
2039 for (i = 0; i < nremoved; i++) {
2040 if (removed[i] == NULL)
2041 continue;
2042 if (removed[i]->expose_device)
2043 hpsa_remove_device(h, removed[i]);
2044 kfree(removed[i]);
2045 removed[i] = NULL;
2046 }
2047
2048 /* Notify scsi mid layer of any added devices */
2049 for (i = 0; i < nadded; i++) {
2050 int rc = 0;
2051
2052 if (added[i] == NULL)
2053 continue;
2054 if (!(added[i]->expose_device))
2055 continue;
2056 rc = hpsa_add_device(h, added[i]);
2057 if (!rc)
2058 continue;
2059 dev_warn(&h->pdev->dev,
2060 "addition failed %d, device not added.", rc);
2061 /* now we have to remove it from h->dev,
2062 * since it didn't get added to scsi mid layer
2063 */
2064 fixup_botched_add(h, added[i]);
2065 h->drv_req_rescan = 1;
2066 }
2067
2068 free_and_out:
2069 kfree(added);
2070 kfree(removed);
2071 }
2072
2073 /*
2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2075 * Assume's h->devlock is held.
2076 */
2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2078 int bus, int target, int lun)
2079 {
2080 int i;
2081 struct hpsa_scsi_dev_t *sd;
2082
2083 for (i = 0; i < h->ndevices; i++) {
2084 sd = h->dev[i];
2085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2086 return sd;
2087 }
2088 return NULL;
2089 }
2090
2091 static int hpsa_slave_alloc(struct scsi_device *sdev)
2092 {
2093 struct hpsa_scsi_dev_t *sd = NULL;
2094 unsigned long flags;
2095 struct ctlr_info *h;
2096
2097 h = sdev_to_hba(sdev);
2098 spin_lock_irqsave(&h->devlock, flags);
2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2100 struct scsi_target *starget;
2101 struct sas_rphy *rphy;
2102
2103 starget = scsi_target(sdev);
2104 rphy = target_to_rphy(starget);
2105 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2106 if (sd) {
2107 sd->target = sdev_id(sdev);
2108 sd->lun = sdev->lun;
2109 }
2110 }
2111 if (!sd)
2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2113 sdev_id(sdev), sdev->lun);
2114
2115 if (sd && sd->expose_device) {
2116 atomic_set(&sd->ioaccel_cmds_out, 0);
2117 sdev->hostdata = sd;
2118 } else
2119 sdev->hostdata = NULL;
2120 spin_unlock_irqrestore(&h->devlock, flags);
2121 return 0;
2122 }
2123
2124 /* configure scsi device based on internal per-device structure */
2125 static int hpsa_slave_configure(struct scsi_device *sdev)
2126 {
2127 struct hpsa_scsi_dev_t *sd;
2128 int queue_depth;
2129
2130 sd = sdev->hostdata;
2131 sdev->no_uld_attach = !sd || !sd->expose_device;
2132
2133 if (sd) {
2134 if (sd->external)
2135 queue_depth = EXTERNAL_QD;
2136 else
2137 queue_depth = sd->queue_depth != 0 ?
2138 sd->queue_depth : sdev->host->can_queue;
2139 } else
2140 queue_depth = sdev->host->can_queue;
2141
2142 scsi_change_queue_depth(sdev, queue_depth);
2143
2144 return 0;
2145 }
2146
2147 static void hpsa_slave_destroy(struct scsi_device *sdev)
2148 {
2149 /* nothing to do. */
2150 }
2151
2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2153 {
2154 int i;
2155
2156 if (!h->ioaccel2_cmd_sg_list)
2157 return;
2158 for (i = 0; i < h->nr_cmds; i++) {
2159 kfree(h->ioaccel2_cmd_sg_list[i]);
2160 h->ioaccel2_cmd_sg_list[i] = NULL;
2161 }
2162 kfree(h->ioaccel2_cmd_sg_list);
2163 h->ioaccel2_cmd_sg_list = NULL;
2164 }
2165
2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2167 {
2168 int i;
2169
2170 if (h->chainsize <= 0)
2171 return 0;
2172
2173 h->ioaccel2_cmd_sg_list =
2174 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list),
2175 GFP_KERNEL);
2176 if (!h->ioaccel2_cmd_sg_list)
2177 return -ENOMEM;
2178 for (i = 0; i < h->nr_cmds; i++) {
2179 h->ioaccel2_cmd_sg_list[i] =
2180 kmalloc_array(h->maxsgentries,
2181 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2182 GFP_KERNEL);
2183 if (!h->ioaccel2_cmd_sg_list[i])
2184 goto clean;
2185 }
2186 return 0;
2187
2188 clean:
2189 hpsa_free_ioaccel2_sg_chain_blocks(h);
2190 return -ENOMEM;
2191 }
2192
2193 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2194 {
2195 int i;
2196
2197 if (!h->cmd_sg_list)
2198 return;
2199 for (i = 0; i < h->nr_cmds; i++) {
2200 kfree(h->cmd_sg_list[i]);
2201 h->cmd_sg_list[i] = NULL;
2202 }
2203 kfree(h->cmd_sg_list);
2204 h->cmd_sg_list = NULL;
2205 }
2206
2207 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2208 {
2209 int i;
2210
2211 if (h->chainsize <= 0)
2212 return 0;
2213
2214 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list),
2215 GFP_KERNEL);
2216 if (!h->cmd_sg_list)
2217 return -ENOMEM;
2218
2219 for (i = 0; i < h->nr_cmds; i++) {
2220 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2221 sizeof(*h->cmd_sg_list[i]),
2222 GFP_KERNEL);
2223 if (!h->cmd_sg_list[i])
2224 goto clean;
2225
2226 }
2227 return 0;
2228
2229 clean:
2230 hpsa_free_sg_chain_blocks(h);
2231 return -ENOMEM;
2232 }
2233
2234 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2235 struct io_accel2_cmd *cp, struct CommandList *c)
2236 {
2237 struct ioaccel2_sg_element *chain_block;
2238 u64 temp64;
2239 u32 chain_size;
2240
2241 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2242 chain_size = le32_to_cpu(cp->sg[0].length);
2243 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2244 PCI_DMA_TODEVICE);
2245 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2246 /* prevent subsequent unmapping */
2247 cp->sg->address = 0;
2248 return -1;
2249 }
2250 cp->sg->address = cpu_to_le64(temp64);
2251 return 0;
2252 }
2253
2254 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2255 struct io_accel2_cmd *cp)
2256 {
2257 struct ioaccel2_sg_element *chain_sg;
2258 u64 temp64;
2259 u32 chain_size;
2260
2261 chain_sg = cp->sg;
2262 temp64 = le64_to_cpu(chain_sg->address);
2263 chain_size = le32_to_cpu(cp->sg[0].length);
2264 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2265 }
2266
2267 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2268 struct CommandList *c)
2269 {
2270 struct SGDescriptor *chain_sg, *chain_block;
2271 u64 temp64;
2272 u32 chain_len;
2273
2274 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2275 chain_block = h->cmd_sg_list[c->cmdindex];
2276 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2277 chain_len = sizeof(*chain_sg) *
2278 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2279 chain_sg->Len = cpu_to_le32(chain_len);
2280 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2281 PCI_DMA_TODEVICE);
2282 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2283 /* prevent subsequent unmapping */
2284 chain_sg->Addr = cpu_to_le64(0);
2285 return -1;
2286 }
2287 chain_sg->Addr = cpu_to_le64(temp64);
2288 return 0;
2289 }
2290
2291 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2292 struct CommandList *c)
2293 {
2294 struct SGDescriptor *chain_sg;
2295
2296 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2297 return;
2298
2299 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2300 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2301 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2302 }
2303
2304
2305 /* Decode the various types of errors on ioaccel2 path.
2306 * Return 1 for any error that should generate a RAID path retry.
2307 * Return 0 for errors that don't require a RAID path retry.
2308 */
2309 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2310 struct CommandList *c,
2311 struct scsi_cmnd *cmd,
2312 struct io_accel2_cmd *c2,
2313 struct hpsa_scsi_dev_t *dev)
2314 {
2315 int data_len;
2316 int retry = 0;
2317 u32 ioaccel2_resid = 0;
2318
2319 switch (c2->error_data.serv_response) {
2320 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2321 switch (c2->error_data.status) {
2322 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2323 if (cmd)
2324 cmd->result = 0;
2325 break;
2326 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2327 cmd->result |= SAM_STAT_CHECK_CONDITION;
2328 if (c2->error_data.data_present !=
2329 IOACCEL2_SENSE_DATA_PRESENT) {
2330 memset(cmd->sense_buffer, 0,
2331 SCSI_SENSE_BUFFERSIZE);
2332 break;
2333 }
2334 /* copy the sense data */
2335 data_len = c2->error_data.sense_data_len;
2336 if (data_len > SCSI_SENSE_BUFFERSIZE)
2337 data_len = SCSI_SENSE_BUFFERSIZE;
2338 if (data_len > sizeof(c2->error_data.sense_data_buff))
2339 data_len =
2340 sizeof(c2->error_data.sense_data_buff);
2341 memcpy(cmd->sense_buffer,
2342 c2->error_data.sense_data_buff, data_len);
2343 retry = 1;
2344 break;
2345 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2346 retry = 1;
2347 break;
2348 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2349 retry = 1;
2350 break;
2351 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2352 retry = 1;
2353 break;
2354 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2355 retry = 1;
2356 break;
2357 default:
2358 retry = 1;
2359 break;
2360 }
2361 break;
2362 case IOACCEL2_SERV_RESPONSE_FAILURE:
2363 switch (c2->error_data.status) {
2364 case IOACCEL2_STATUS_SR_IO_ERROR:
2365 case IOACCEL2_STATUS_SR_IO_ABORTED:
2366 case IOACCEL2_STATUS_SR_OVERRUN:
2367 retry = 1;
2368 break;
2369 case IOACCEL2_STATUS_SR_UNDERRUN:
2370 cmd->result = (DID_OK << 16); /* host byte */
2371 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2372 ioaccel2_resid = get_unaligned_le32(
2373 &c2->error_data.resid_cnt[0]);
2374 scsi_set_resid(cmd, ioaccel2_resid);
2375 break;
2376 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2377 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2378 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2379 /*
2380 * Did an HBA disk disappear? We will eventually
2381 * get a state change event from the controller but
2382 * in the meantime, we need to tell the OS that the
2383 * HBA disk is no longer there and stop I/O
2384 * from going down. This allows the potential re-insert
2385 * of the disk to get the same device node.
2386 */
2387 if (dev->physical_device && dev->expose_device) {
2388 cmd->result = DID_NO_CONNECT << 16;
2389 dev->removed = 1;
2390 h->drv_req_rescan = 1;
2391 dev_warn(&h->pdev->dev,
2392 "%s: device is gone!\n", __func__);
2393 } else
2394 /*
2395 * Retry by sending down the RAID path.
2396 * We will get an event from ctlr to
2397 * trigger rescan regardless.
2398 */
2399 retry = 1;
2400 break;
2401 default:
2402 retry = 1;
2403 }
2404 break;
2405 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2406 break;
2407 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2408 break;
2409 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2410 retry = 1;
2411 break;
2412 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2413 break;
2414 default:
2415 retry = 1;
2416 break;
2417 }
2418
2419 return retry; /* retry on raid path? */
2420 }
2421
2422 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2423 struct CommandList *c)
2424 {
2425 bool do_wake = false;
2426
2427 /*
2428 * Reset c->scsi_cmd here so that the reset handler will know
2429 * this command has completed. Then, check to see if the handler is
2430 * waiting for this command, and, if so, wake it.
2431 */
2432 c->scsi_cmd = SCSI_CMD_IDLE;
2433 mb(); /* Declare command idle before checking for pending events. */
2434 if (c->reset_pending) {
2435 unsigned long flags;
2436 struct hpsa_scsi_dev_t *dev;
2437
2438 /*
2439 * There appears to be a reset pending; lock the lock and
2440 * reconfirm. If so, then decrement the count of outstanding
2441 * commands and wake the reset command if this is the last one.
2442 */
2443 spin_lock_irqsave(&h->lock, flags);
2444 dev = c->reset_pending; /* Re-fetch under the lock. */
2445 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2446 do_wake = true;
2447 c->reset_pending = NULL;
2448 spin_unlock_irqrestore(&h->lock, flags);
2449 }
2450
2451 if (do_wake)
2452 wake_up_all(&h->event_sync_wait_queue);
2453 }
2454
2455 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2456 struct CommandList *c)
2457 {
2458 hpsa_cmd_resolve_events(h, c);
2459 cmd_tagged_free(h, c);
2460 }
2461
2462 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2463 struct CommandList *c, struct scsi_cmnd *cmd)
2464 {
2465 hpsa_cmd_resolve_and_free(h, c);
2466 if (cmd && cmd->scsi_done)
2467 cmd->scsi_done(cmd);
2468 }
2469
2470 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2471 {
2472 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2473 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2474 }
2475
2476 static void process_ioaccel2_completion(struct ctlr_info *h,
2477 struct CommandList *c, struct scsi_cmnd *cmd,
2478 struct hpsa_scsi_dev_t *dev)
2479 {
2480 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2481
2482 /* check for good status */
2483 if (likely(c2->error_data.serv_response == 0 &&
2484 c2->error_data.status == 0)) {
2485 cmd->result = 0;
2486 return hpsa_cmd_free_and_done(h, c, cmd);
2487 }
2488
2489 /*
2490 * Any RAID offload error results in retry which will use
2491 * the normal I/O path so the controller can handle whatever is
2492 * wrong.
2493 */
2494 if (is_logical_device(dev) &&
2495 c2->error_data.serv_response ==
2496 IOACCEL2_SERV_RESPONSE_FAILURE) {
2497 if (c2->error_data.status ==
2498 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2499 dev->offload_enabled = 0;
2500 dev->offload_to_be_enabled = 0;
2501 }
2502
2503 return hpsa_retry_cmd(h, c);
2504 }
2505
2506 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2507 return hpsa_retry_cmd(h, c);
2508
2509 return hpsa_cmd_free_and_done(h, c, cmd);
2510 }
2511
2512 /* Returns 0 on success, < 0 otherwise. */
2513 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2514 struct CommandList *cp)
2515 {
2516 u8 tmf_status = cp->err_info->ScsiStatus;
2517
2518 switch (tmf_status) {
2519 case CISS_TMF_COMPLETE:
2520 /*
2521 * CISS_TMF_COMPLETE never happens, instead,
2522 * ei->CommandStatus == 0 for this case.
2523 */
2524 case CISS_TMF_SUCCESS:
2525 return 0;
2526 case CISS_TMF_INVALID_FRAME:
2527 case CISS_TMF_NOT_SUPPORTED:
2528 case CISS_TMF_FAILED:
2529 case CISS_TMF_WRONG_LUN:
2530 case CISS_TMF_OVERLAPPED_TAG:
2531 break;
2532 default:
2533 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2534 tmf_status);
2535 break;
2536 }
2537 return -tmf_status;
2538 }
2539
2540 static void complete_scsi_command(struct CommandList *cp)
2541 {
2542 struct scsi_cmnd *cmd;
2543 struct ctlr_info *h;
2544 struct ErrorInfo *ei;
2545 struct hpsa_scsi_dev_t *dev;
2546 struct io_accel2_cmd *c2;
2547
2548 u8 sense_key;
2549 u8 asc; /* additional sense code */
2550 u8 ascq; /* additional sense code qualifier */
2551 unsigned long sense_data_size;
2552
2553 ei = cp->err_info;
2554 cmd = cp->scsi_cmd;
2555 h = cp->h;
2556
2557 if (!cmd->device) {
2558 cmd->result = DID_NO_CONNECT << 16;
2559 return hpsa_cmd_free_and_done(h, cp, cmd);
2560 }
2561
2562 dev = cmd->device->hostdata;
2563 if (!dev) {
2564 cmd->result = DID_NO_CONNECT << 16;
2565 return hpsa_cmd_free_and_done(h, cp, cmd);
2566 }
2567 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2568
2569 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2570 if ((cp->cmd_type == CMD_SCSI) &&
2571 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2572 hpsa_unmap_sg_chain_block(h, cp);
2573
2574 if ((cp->cmd_type == CMD_IOACCEL2) &&
2575 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2576 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2577
2578 cmd->result = (DID_OK << 16); /* host byte */
2579 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2580
2581 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2582 if (dev->physical_device && dev->expose_device &&
2583 dev->removed) {
2584 cmd->result = DID_NO_CONNECT << 16;
2585 return hpsa_cmd_free_and_done(h, cp, cmd);
2586 }
2587 if (likely(cp->phys_disk != NULL))
2588 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2589 }
2590
2591 /*
2592 * We check for lockup status here as it may be set for
2593 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2594 * fail_all_oustanding_cmds()
2595 */
2596 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2597 /* DID_NO_CONNECT will prevent a retry */
2598 cmd->result = DID_NO_CONNECT << 16;
2599 return hpsa_cmd_free_and_done(h, cp, cmd);
2600 }
2601
2602 if ((unlikely(hpsa_is_pending_event(cp))))
2603 if (cp->reset_pending)
2604 return hpsa_cmd_free_and_done(h, cp, cmd);
2605
2606 if (cp->cmd_type == CMD_IOACCEL2)
2607 return process_ioaccel2_completion(h, cp, cmd, dev);
2608
2609 scsi_set_resid(cmd, ei->ResidualCnt);
2610 if (ei->CommandStatus == 0)
2611 return hpsa_cmd_free_and_done(h, cp, cmd);
2612
2613 /* For I/O accelerator commands, copy over some fields to the normal
2614 * CISS header used below for error handling.
2615 */
2616 if (cp->cmd_type == CMD_IOACCEL1) {
2617 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2618 cp->Header.SGList = scsi_sg_count(cmd);
2619 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2620 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2621 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2622 cp->Header.tag = c->tag;
2623 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2624 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2625
2626 /* Any RAID offload error results in retry which will use
2627 * the normal I/O path so the controller can handle whatever's
2628 * wrong.
2629 */
2630 if (is_logical_device(dev)) {
2631 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2632 dev->offload_enabled = 0;
2633 return hpsa_retry_cmd(h, cp);
2634 }
2635 }
2636
2637 /* an error has occurred */
2638 switch (ei->CommandStatus) {
2639
2640 case CMD_TARGET_STATUS:
2641 cmd->result |= ei->ScsiStatus;
2642 /* copy the sense data */
2643 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2644 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2645 else
2646 sense_data_size = sizeof(ei->SenseInfo);
2647 if (ei->SenseLen < sense_data_size)
2648 sense_data_size = ei->SenseLen;
2649 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2650 if (ei->ScsiStatus)
2651 decode_sense_data(ei->SenseInfo, sense_data_size,
2652 &sense_key, &asc, &ascq);
2653 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2654 if (sense_key == ABORTED_COMMAND) {
2655 cmd->result |= DID_SOFT_ERROR << 16;
2656 break;
2657 }
2658 break;
2659 }
2660 /* Problem was not a check condition
2661 * Pass it up to the upper layers...
2662 */
2663 if (ei->ScsiStatus) {
2664 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2665 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2666 "Returning result: 0x%x\n",
2667 cp, ei->ScsiStatus,
2668 sense_key, asc, ascq,
2669 cmd->result);
2670 } else { /* scsi status is zero??? How??? */
2671 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2672 "Returning no connection.\n", cp),
2673
2674 /* Ordinarily, this case should never happen,
2675 * but there is a bug in some released firmware
2676 * revisions that allows it to happen if, for
2677 * example, a 4100 backplane loses power and
2678 * the tape drive is in it. We assume that
2679 * it's a fatal error of some kind because we
2680 * can't show that it wasn't. We will make it
2681 * look like selection timeout since that is
2682 * the most common reason for this to occur,
2683 * and it's severe enough.
2684 */
2685
2686 cmd->result = DID_NO_CONNECT << 16;
2687 }
2688 break;
2689
2690 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2691 break;
2692 case CMD_DATA_OVERRUN:
2693 dev_warn(&h->pdev->dev,
2694 "CDB %16phN data overrun\n", cp->Request.CDB);
2695 break;
2696 case CMD_INVALID: {
2697 /* print_bytes(cp, sizeof(*cp), 1, 0);
2698 print_cmd(cp); */
2699 /* We get CMD_INVALID if you address a non-existent device
2700 * instead of a selection timeout (no response). You will
2701 * see this if you yank out a drive, then try to access it.
2702 * This is kind of a shame because it means that any other
2703 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2704 * missing target. */
2705 cmd->result = DID_NO_CONNECT << 16;
2706 }
2707 break;
2708 case CMD_PROTOCOL_ERR:
2709 cmd->result = DID_ERROR << 16;
2710 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2711 cp->Request.CDB);
2712 break;
2713 case CMD_HARDWARE_ERR:
2714 cmd->result = DID_ERROR << 16;
2715 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2716 cp->Request.CDB);
2717 break;
2718 case CMD_CONNECTION_LOST:
2719 cmd->result = DID_ERROR << 16;
2720 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2721 cp->Request.CDB);
2722 break;
2723 case CMD_ABORTED:
2724 cmd->result = DID_ABORT << 16;
2725 break;
2726 case CMD_ABORT_FAILED:
2727 cmd->result = DID_ERROR << 16;
2728 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2729 cp->Request.CDB);
2730 break;
2731 case CMD_UNSOLICITED_ABORT:
2732 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2733 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2734 cp->Request.CDB);
2735 break;
2736 case CMD_TIMEOUT:
2737 cmd->result = DID_TIME_OUT << 16;
2738 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2739 cp->Request.CDB);
2740 break;
2741 case CMD_UNABORTABLE:
2742 cmd->result = DID_ERROR << 16;
2743 dev_warn(&h->pdev->dev, "Command unabortable\n");
2744 break;
2745 case CMD_TMF_STATUS:
2746 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2747 cmd->result = DID_ERROR << 16;
2748 break;
2749 case CMD_IOACCEL_DISABLED:
2750 /* This only handles the direct pass-through case since RAID
2751 * offload is handled above. Just attempt a retry.
2752 */
2753 cmd->result = DID_SOFT_ERROR << 16;
2754 dev_warn(&h->pdev->dev,
2755 "cp %p had HP SSD Smart Path error\n", cp);
2756 break;
2757 default:
2758 cmd->result = DID_ERROR << 16;
2759 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2760 cp, ei->CommandStatus);
2761 }
2762
2763 return hpsa_cmd_free_and_done(h, cp, cmd);
2764 }
2765
2766 static void hpsa_pci_unmap(struct pci_dev *pdev,
2767 struct CommandList *c, int sg_used, int data_direction)
2768 {
2769 int i;
2770
2771 for (i = 0; i < sg_used; i++)
2772 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2773 le32_to_cpu(c->SG[i].Len),
2774 data_direction);
2775 }
2776
2777 static int hpsa_map_one(struct pci_dev *pdev,
2778 struct CommandList *cp,
2779 unsigned char *buf,
2780 size_t buflen,
2781 int data_direction)
2782 {
2783 u64 addr64;
2784
2785 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2786 cp->Header.SGList = 0;
2787 cp->Header.SGTotal = cpu_to_le16(0);
2788 return 0;
2789 }
2790
2791 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2792 if (dma_mapping_error(&pdev->dev, addr64)) {
2793 /* Prevent subsequent unmap of something never mapped */
2794 cp->Header.SGList = 0;
2795 cp->Header.SGTotal = cpu_to_le16(0);
2796 return -1;
2797 }
2798 cp->SG[0].Addr = cpu_to_le64(addr64);
2799 cp->SG[0].Len = cpu_to_le32(buflen);
2800 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2801 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2802 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2803 return 0;
2804 }
2805
2806 #define NO_TIMEOUT ((unsigned long) -1)
2807 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2808 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2809 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2810 {
2811 DECLARE_COMPLETION_ONSTACK(wait);
2812
2813 c->waiting = &wait;
2814 __enqueue_cmd_and_start_io(h, c, reply_queue);
2815 if (timeout_msecs == NO_TIMEOUT) {
2816 /* TODO: get rid of this no-timeout thing */
2817 wait_for_completion_io(&wait);
2818 return IO_OK;
2819 }
2820 if (!wait_for_completion_io_timeout(&wait,
2821 msecs_to_jiffies(timeout_msecs))) {
2822 dev_warn(&h->pdev->dev, "Command timed out.\n");
2823 return -ETIMEDOUT;
2824 }
2825 return IO_OK;
2826 }
2827
2828 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2829 int reply_queue, unsigned long timeout_msecs)
2830 {
2831 if (unlikely(lockup_detected(h))) {
2832 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2833 return IO_OK;
2834 }
2835 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2836 }
2837
2838 static u32 lockup_detected(struct ctlr_info *h)
2839 {
2840 int cpu;
2841 u32 rc, *lockup_detected;
2842
2843 cpu = get_cpu();
2844 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2845 rc = *lockup_detected;
2846 put_cpu();
2847 return rc;
2848 }
2849
2850 #define MAX_DRIVER_CMD_RETRIES 25
2851 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2852 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2853 {
2854 int backoff_time = 10, retry_count = 0;
2855 int rc;
2856
2857 do {
2858 memset(c->err_info, 0, sizeof(*c->err_info));
2859 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2860 timeout_msecs);
2861 if (rc)
2862 break;
2863 retry_count++;
2864 if (retry_count > 3) {
2865 msleep(backoff_time);
2866 if (backoff_time < 1000)
2867 backoff_time *= 2;
2868 }
2869 } while ((check_for_unit_attention(h, c) ||
2870 check_for_busy(h, c)) &&
2871 retry_count <= MAX_DRIVER_CMD_RETRIES);
2872 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2873 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2874 rc = -EIO;
2875 return rc;
2876 }
2877
2878 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2879 struct CommandList *c)
2880 {
2881 const u8 *cdb = c->Request.CDB;
2882 const u8 *lun = c->Header.LUN.LunAddrBytes;
2883
2884 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2885 txt, lun, cdb);
2886 }
2887
2888 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2889 struct CommandList *cp)
2890 {
2891 const struct ErrorInfo *ei = cp->err_info;
2892 struct device *d = &cp->h->pdev->dev;
2893 u8 sense_key, asc, ascq;
2894 int sense_len;
2895
2896 switch (ei->CommandStatus) {
2897 case CMD_TARGET_STATUS:
2898 if (ei->SenseLen > sizeof(ei->SenseInfo))
2899 sense_len = sizeof(ei->SenseInfo);
2900 else
2901 sense_len = ei->SenseLen;
2902 decode_sense_data(ei->SenseInfo, sense_len,
2903 &sense_key, &asc, &ascq);
2904 hpsa_print_cmd(h, "SCSI status", cp);
2905 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2906 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2907 sense_key, asc, ascq);
2908 else
2909 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2910 if (ei->ScsiStatus == 0)
2911 dev_warn(d, "SCSI status is abnormally zero. "
2912 "(probably indicates selection timeout "
2913 "reported incorrectly due to a known "
2914 "firmware bug, circa July, 2001.)\n");
2915 break;
2916 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2917 break;
2918 case CMD_DATA_OVERRUN:
2919 hpsa_print_cmd(h, "overrun condition", cp);
2920 break;
2921 case CMD_INVALID: {
2922 /* controller unfortunately reports SCSI passthru's
2923 * to non-existent targets as invalid commands.
2924 */
2925 hpsa_print_cmd(h, "invalid command", cp);
2926 dev_warn(d, "probably means device no longer present\n");
2927 }
2928 break;
2929 case CMD_PROTOCOL_ERR:
2930 hpsa_print_cmd(h, "protocol error", cp);
2931 break;
2932 case CMD_HARDWARE_ERR:
2933 hpsa_print_cmd(h, "hardware error", cp);
2934 break;
2935 case CMD_CONNECTION_LOST:
2936 hpsa_print_cmd(h, "connection lost", cp);
2937 break;
2938 case CMD_ABORTED:
2939 hpsa_print_cmd(h, "aborted", cp);
2940 break;
2941 case CMD_ABORT_FAILED:
2942 hpsa_print_cmd(h, "abort failed", cp);
2943 break;
2944 case CMD_UNSOLICITED_ABORT:
2945 hpsa_print_cmd(h, "unsolicited abort", cp);
2946 break;
2947 case CMD_TIMEOUT:
2948 hpsa_print_cmd(h, "timed out", cp);
2949 break;
2950 case CMD_UNABORTABLE:
2951 hpsa_print_cmd(h, "unabortable", cp);
2952 break;
2953 case CMD_CTLR_LOCKUP:
2954 hpsa_print_cmd(h, "controller lockup detected", cp);
2955 break;
2956 default:
2957 hpsa_print_cmd(h, "unknown status", cp);
2958 dev_warn(d, "Unknown command status %x\n",
2959 ei->CommandStatus);
2960 }
2961 }
2962
2963 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2964 u8 page, u8 *buf, size_t bufsize)
2965 {
2966 int rc = IO_OK;
2967 struct CommandList *c;
2968 struct ErrorInfo *ei;
2969
2970 c = cmd_alloc(h);
2971 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
2972 page, scsi3addr, TYPE_CMD)) {
2973 rc = -1;
2974 goto out;
2975 }
2976 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2977 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2978 if (rc)
2979 goto out;
2980 ei = c->err_info;
2981 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2982 hpsa_scsi_interpret_error(h, c);
2983 rc = -1;
2984 }
2985 out:
2986 cmd_free(h, c);
2987 return rc;
2988 }
2989
2990 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
2991 u8 *scsi3addr)
2992 {
2993 u8 *buf;
2994 u64 sa = 0;
2995 int rc = 0;
2996
2997 buf = kzalloc(1024, GFP_KERNEL);
2998 if (!buf)
2999 return 0;
3000
3001 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3002 buf, 1024);
3003
3004 if (rc)
3005 goto out;
3006
3007 sa = get_unaligned_be64(buf+12);
3008
3009 out:
3010 kfree(buf);
3011 return sa;
3012 }
3013
3014 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3015 u16 page, unsigned char *buf,
3016 unsigned char bufsize)
3017 {
3018 int rc = IO_OK;
3019 struct CommandList *c;
3020 struct ErrorInfo *ei;
3021
3022 c = cmd_alloc(h);
3023
3024 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3025 page, scsi3addr, TYPE_CMD)) {
3026 rc = -1;
3027 goto out;
3028 }
3029 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3030 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3031 if (rc)
3032 goto out;
3033 ei = c->err_info;
3034 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3035 hpsa_scsi_interpret_error(h, c);
3036 rc = -1;
3037 }
3038 out:
3039 cmd_free(h, c);
3040 return rc;
3041 }
3042
3043 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3044 u8 reset_type, int reply_queue)
3045 {
3046 int rc = IO_OK;
3047 struct CommandList *c;
3048 struct ErrorInfo *ei;
3049
3050 c = cmd_alloc(h);
3051
3052
3053 /* fill_cmd can't fail here, no data buffer to map. */
3054 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
3055 scsi3addr, TYPE_MSG);
3056 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3057 if (rc) {
3058 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3059 goto out;
3060 }
3061 /* no unmap needed here because no data xfer. */
3062
3063 ei = c->err_info;
3064 if (ei->CommandStatus != 0) {
3065 hpsa_scsi_interpret_error(h, c);
3066 rc = -1;
3067 }
3068 out:
3069 cmd_free(h, c);
3070 return rc;
3071 }
3072
3073 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3074 struct hpsa_scsi_dev_t *dev,
3075 unsigned char *scsi3addr)
3076 {
3077 int i;
3078 bool match = false;
3079 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3080 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3081
3082 if (hpsa_is_cmd_idle(c))
3083 return false;
3084
3085 switch (c->cmd_type) {
3086 case CMD_SCSI:
3087 case CMD_IOCTL_PEND:
3088 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3089 sizeof(c->Header.LUN.LunAddrBytes));
3090 break;
3091
3092 case CMD_IOACCEL1:
3093 case CMD_IOACCEL2:
3094 if (c->phys_disk == dev) {
3095 /* HBA mode match */
3096 match = true;
3097 } else {
3098 /* Possible RAID mode -- check each phys dev. */
3099 /* FIXME: Do we need to take out a lock here? If
3100 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3101 * instead. */
3102 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3103 /* FIXME: an alternate test might be
3104 *
3105 * match = dev->phys_disk[i]->ioaccel_handle
3106 * == c2->scsi_nexus; */
3107 match = dev->phys_disk[i] == c->phys_disk;
3108 }
3109 }
3110 break;
3111
3112 case IOACCEL2_TMF:
3113 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3114 match = dev->phys_disk[i]->ioaccel_handle ==
3115 le32_to_cpu(ac->it_nexus);
3116 }
3117 break;
3118
3119 case 0: /* The command is in the middle of being initialized. */
3120 match = false;
3121 break;
3122
3123 default:
3124 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3125 c->cmd_type);
3126 BUG();
3127 }
3128
3129 return match;
3130 }
3131
3132 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3133 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3134 {
3135 int i;
3136 int rc = 0;
3137
3138 /* We can really only handle one reset at a time */
3139 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3140 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3141 return -EINTR;
3142 }
3143
3144 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3145
3146 for (i = 0; i < h->nr_cmds; i++) {
3147 struct CommandList *c = h->cmd_pool + i;
3148 int refcount = atomic_inc_return(&c->refcount);
3149
3150 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3151 unsigned long flags;
3152
3153 /*
3154 * Mark the target command as having a reset pending,
3155 * then lock a lock so that the command cannot complete
3156 * while we're considering it. If the command is not
3157 * idle then count it; otherwise revoke the event.
3158 */
3159 c->reset_pending = dev;
3160 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3161 if (!hpsa_is_cmd_idle(c))
3162 atomic_inc(&dev->reset_cmds_out);
3163 else
3164 c->reset_pending = NULL;
3165 spin_unlock_irqrestore(&h->lock, flags);
3166 }
3167
3168 cmd_free(h, c);
3169 }
3170
3171 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3172 if (!rc)
3173 wait_event(h->event_sync_wait_queue,
3174 atomic_read(&dev->reset_cmds_out) == 0 ||
3175 lockup_detected(h));
3176
3177 if (unlikely(lockup_detected(h))) {
3178 dev_warn(&h->pdev->dev,
3179 "Controller lockup detected during reset wait\n");
3180 rc = -ENODEV;
3181 }
3182
3183 if (unlikely(rc))
3184 atomic_set(&dev->reset_cmds_out, 0);
3185 else
3186 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3187
3188 mutex_unlock(&h->reset_mutex);
3189 return rc;
3190 }
3191
3192 static void hpsa_get_raid_level(struct ctlr_info *h,
3193 unsigned char *scsi3addr, unsigned char *raid_level)
3194 {
3195 int rc;
3196 unsigned char *buf;
3197
3198 *raid_level = RAID_UNKNOWN;
3199 buf = kzalloc(64, GFP_KERNEL);
3200 if (!buf)
3201 return;
3202
3203 if (!hpsa_vpd_page_supported(h, scsi3addr,
3204 HPSA_VPD_LV_DEVICE_GEOMETRY))
3205 goto exit;
3206
3207 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3208 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3209
3210 if (rc == 0)
3211 *raid_level = buf[8];
3212 if (*raid_level > RAID_UNKNOWN)
3213 *raid_level = RAID_UNKNOWN;
3214 exit:
3215 kfree(buf);
3216 return;
3217 }
3218
3219 #define HPSA_MAP_DEBUG
3220 #ifdef HPSA_MAP_DEBUG
3221 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3222 struct raid_map_data *map_buff)
3223 {
3224 struct raid_map_disk_data *dd = &map_buff->data[0];
3225 int map, row, col;
3226 u16 map_cnt, row_cnt, disks_per_row;
3227
3228 if (rc != 0)
3229 return;
3230
3231 /* Show details only if debugging has been activated. */
3232 if (h->raid_offload_debug < 2)
3233 return;
3234
3235 dev_info(&h->pdev->dev, "structure_size = %u\n",
3236 le32_to_cpu(map_buff->structure_size));
3237 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3238 le32_to_cpu(map_buff->volume_blk_size));
3239 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3240 le64_to_cpu(map_buff->volume_blk_cnt));
3241 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3242 map_buff->phys_blk_shift);
3243 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3244 map_buff->parity_rotation_shift);
3245 dev_info(&h->pdev->dev, "strip_size = %u\n",
3246 le16_to_cpu(map_buff->strip_size));
3247 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3248 le64_to_cpu(map_buff->disk_starting_blk));
3249 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3250 le64_to_cpu(map_buff->disk_blk_cnt));
3251 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3252 le16_to_cpu(map_buff->data_disks_per_row));
3253 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3254 le16_to_cpu(map_buff->metadata_disks_per_row));
3255 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3256 le16_to_cpu(map_buff->row_cnt));
3257 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3258 le16_to_cpu(map_buff->layout_map_count));
3259 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3260 le16_to_cpu(map_buff->flags));
3261 dev_info(&h->pdev->dev, "encryption = %s\n",
3262 le16_to_cpu(map_buff->flags) &
3263 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3264 dev_info(&h->pdev->dev, "dekindex = %u\n",
3265 le16_to_cpu(map_buff->dekindex));
3266 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3267 for (map = 0; map < map_cnt; map++) {
3268 dev_info(&h->pdev->dev, "Map%u:\n", map);
3269 row_cnt = le16_to_cpu(map_buff->row_cnt);
3270 for (row = 0; row < row_cnt; row++) {
3271 dev_info(&h->pdev->dev, " Row%u:\n", row);
3272 disks_per_row =
3273 le16_to_cpu(map_buff->data_disks_per_row);
3274 for (col = 0; col < disks_per_row; col++, dd++)
3275 dev_info(&h->pdev->dev,
3276 " D%02u: h=0x%04x xor=%u,%u\n",
3277 col, dd->ioaccel_handle,
3278 dd->xor_mult[0], dd->xor_mult[1]);
3279 disks_per_row =
3280 le16_to_cpu(map_buff->metadata_disks_per_row);
3281 for (col = 0; col < disks_per_row; col++, dd++)
3282 dev_info(&h->pdev->dev,
3283 " M%02u: h=0x%04x xor=%u,%u\n",
3284 col, dd->ioaccel_handle,
3285 dd->xor_mult[0], dd->xor_mult[1]);
3286 }
3287 }
3288 }
3289 #else
3290 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3291 __attribute__((unused)) int rc,
3292 __attribute__((unused)) struct raid_map_data *map_buff)
3293 {
3294 }
3295 #endif
3296
3297 static int hpsa_get_raid_map(struct ctlr_info *h,
3298 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3299 {
3300 int rc = 0;
3301 struct CommandList *c;
3302 struct ErrorInfo *ei;
3303
3304 c = cmd_alloc(h);
3305
3306 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3307 sizeof(this_device->raid_map), 0,
3308 scsi3addr, TYPE_CMD)) {
3309 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3310 cmd_free(h, c);
3311 return -1;
3312 }
3313 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3314 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3315 if (rc)
3316 goto out;
3317 ei = c->err_info;
3318 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3319 hpsa_scsi_interpret_error(h, c);
3320 rc = -1;
3321 goto out;
3322 }
3323 cmd_free(h, c);
3324
3325 /* @todo in the future, dynamically allocate RAID map memory */
3326 if (le32_to_cpu(this_device->raid_map.structure_size) >
3327 sizeof(this_device->raid_map)) {
3328 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3329 rc = -1;
3330 }
3331 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3332 return rc;
3333 out:
3334 cmd_free(h, c);
3335 return rc;
3336 }
3337
3338 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3339 unsigned char scsi3addr[], u16 bmic_device_index,
3340 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3341 {
3342 int rc = IO_OK;
3343 struct CommandList *c;
3344 struct ErrorInfo *ei;
3345
3346 c = cmd_alloc(h);
3347
3348 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3349 0, RAID_CTLR_LUNID, TYPE_CMD);
3350 if (rc)
3351 goto out;
3352
3353 c->Request.CDB[2] = bmic_device_index & 0xff;
3354 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3355
3356 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3357 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3358 if (rc)
3359 goto out;
3360 ei = c->err_info;
3361 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3362 hpsa_scsi_interpret_error(h, c);
3363 rc = -1;
3364 }
3365 out:
3366 cmd_free(h, c);
3367 return rc;
3368 }
3369
3370 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3371 struct bmic_identify_controller *buf, size_t bufsize)
3372 {
3373 int rc = IO_OK;
3374 struct CommandList *c;
3375 struct ErrorInfo *ei;
3376
3377 c = cmd_alloc(h);
3378
3379 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3380 0, RAID_CTLR_LUNID, TYPE_CMD);
3381 if (rc)
3382 goto out;
3383
3384 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3385 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3386 if (rc)
3387 goto out;
3388 ei = c->err_info;
3389 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3390 hpsa_scsi_interpret_error(h, c);
3391 rc = -1;
3392 }
3393 out:
3394 cmd_free(h, c);
3395 return rc;
3396 }
3397
3398 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3399 unsigned char scsi3addr[], u16 bmic_device_index,
3400 struct bmic_identify_physical_device *buf, size_t bufsize)
3401 {
3402 int rc = IO_OK;
3403 struct CommandList *c;
3404 struct ErrorInfo *ei;
3405
3406 c = cmd_alloc(h);
3407 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3408 0, RAID_CTLR_LUNID, TYPE_CMD);
3409 if (rc)
3410 goto out;
3411
3412 c->Request.CDB[2] = bmic_device_index & 0xff;
3413 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3414
3415 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3416 NO_TIMEOUT);
3417 ei = c->err_info;
3418 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3419 hpsa_scsi_interpret_error(h, c);
3420 rc = -1;
3421 }
3422 out:
3423 cmd_free(h, c);
3424
3425 return rc;
3426 }
3427
3428 /*
3429 * get enclosure information
3430 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3431 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3432 * Uses id_physical_device to determine the box_index.
3433 */
3434 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3435 unsigned char *scsi3addr,
3436 struct ReportExtendedLUNdata *rlep, int rle_index,
3437 struct hpsa_scsi_dev_t *encl_dev)
3438 {
3439 int rc = -1;
3440 struct CommandList *c = NULL;
3441 struct ErrorInfo *ei = NULL;
3442 struct bmic_sense_storage_box_params *bssbp = NULL;
3443 struct bmic_identify_physical_device *id_phys = NULL;
3444 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3445 u16 bmic_device_index = 0;
3446
3447 encl_dev->eli =
3448 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3449
3450 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3451
3452 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3453 rc = IO_OK;
3454 goto out;
3455 }
3456
3457 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3458 rc = IO_OK;
3459 goto out;
3460 }
3461
3462 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3463 if (!bssbp)
3464 goto out;
3465
3466 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3467 if (!id_phys)
3468 goto out;
3469
3470 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3471 id_phys, sizeof(*id_phys));
3472 if (rc) {
3473 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3474 __func__, encl_dev->external, bmic_device_index);
3475 goto out;
3476 }
3477
3478 c = cmd_alloc(h);
3479
3480 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3481 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3482
3483 if (rc)
3484 goto out;
3485
3486 if (id_phys->phys_connector[1] == 'E')
3487 c->Request.CDB[5] = id_phys->box_index;
3488 else
3489 c->Request.CDB[5] = 0;
3490
3491 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3492 NO_TIMEOUT);
3493 if (rc)
3494 goto out;
3495
3496 ei = c->err_info;
3497 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3498 rc = -1;
3499 goto out;
3500 }
3501
3502 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3503 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3504 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3505
3506 rc = IO_OK;
3507 out:
3508 kfree(bssbp);
3509 kfree(id_phys);
3510
3511 if (c)
3512 cmd_free(h, c);
3513
3514 if (rc != IO_OK)
3515 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3516 "Error, could not get enclosure information");
3517 }
3518
3519 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3520 unsigned char *scsi3addr)
3521 {
3522 struct ReportExtendedLUNdata *physdev;
3523 u32 nphysicals;
3524 u64 sa = 0;
3525 int i;
3526
3527 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3528 if (!physdev)
3529 return 0;
3530
3531 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3532 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3533 kfree(physdev);
3534 return 0;
3535 }
3536 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3537
3538 for (i = 0; i < nphysicals; i++)
3539 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3540 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3541 break;
3542 }
3543
3544 kfree(physdev);
3545
3546 return sa;
3547 }
3548
3549 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3550 struct hpsa_scsi_dev_t *dev)
3551 {
3552 int rc;
3553 u64 sa = 0;
3554
3555 if (is_hba_lunid(scsi3addr)) {
3556 struct bmic_sense_subsystem_info *ssi;
3557
3558 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3559 if (!ssi)
3560 return;
3561
3562 rc = hpsa_bmic_sense_subsystem_information(h,
3563 scsi3addr, 0, ssi, sizeof(*ssi));
3564 if (rc == 0) {
3565 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3566 h->sas_address = sa;
3567 }
3568
3569 kfree(ssi);
3570 } else
3571 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3572
3573 dev->sas_address = sa;
3574 }
3575
3576 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3577 struct ReportExtendedLUNdata *physdev)
3578 {
3579 u32 nphysicals;
3580 int i;
3581
3582 if (h->discovery_polling)
3583 return;
3584
3585 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3586
3587 for (i = 0; i < nphysicals; i++) {
3588 if (physdev->LUN[i].device_type ==
3589 BMIC_DEVICE_TYPE_CONTROLLER
3590 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3591 dev_info(&h->pdev->dev,
3592 "External controller present, activate discovery polling and disable rld caching\n");
3593 hpsa_disable_rld_caching(h);
3594 h->discovery_polling = 1;
3595 break;
3596 }
3597 }
3598 }
3599
3600 /* Get a device id from inquiry page 0x83 */
3601 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3602 unsigned char scsi3addr[], u8 page)
3603 {
3604 int rc;
3605 int i;
3606 int pages;
3607 unsigned char *buf, bufsize;
3608
3609 buf = kzalloc(256, GFP_KERNEL);
3610 if (!buf)
3611 return false;
3612
3613 /* Get the size of the page list first */
3614 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3615 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3616 buf, HPSA_VPD_HEADER_SZ);
3617 if (rc != 0)
3618 goto exit_unsupported;
3619 pages = buf[3];
3620 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3621 bufsize = pages + HPSA_VPD_HEADER_SZ;
3622 else
3623 bufsize = 255;
3624
3625 /* Get the whole VPD page list */
3626 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3627 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3628 buf, bufsize);
3629 if (rc != 0)
3630 goto exit_unsupported;
3631
3632 pages = buf[3];
3633 for (i = 1; i <= pages; i++)
3634 if (buf[3 + i] == page)
3635 goto exit_supported;
3636 exit_unsupported:
3637 kfree(buf);
3638 return false;
3639 exit_supported:
3640 kfree(buf);
3641 return true;
3642 }
3643
3644 /*
3645 * Called during a scan operation.
3646 * Sets ioaccel status on the new device list, not the existing device list
3647 *
3648 * The device list used during I/O will be updated later in
3649 * adjust_hpsa_scsi_table.
3650 */
3651 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3652 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3653 {
3654 int rc;
3655 unsigned char *buf;
3656 u8 ioaccel_status;
3657
3658 this_device->offload_config = 0;
3659 this_device->offload_enabled = 0;
3660 this_device->offload_to_be_enabled = 0;
3661
3662 buf = kzalloc(64, GFP_KERNEL);
3663 if (!buf)
3664 return;
3665 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3666 goto out;
3667 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3668 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3669 if (rc != 0)
3670 goto out;
3671
3672 #define IOACCEL_STATUS_BYTE 4
3673 #define OFFLOAD_CONFIGURED_BIT 0x01
3674 #define OFFLOAD_ENABLED_BIT 0x02
3675 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3676 this_device->offload_config =
3677 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3678 if (this_device->offload_config) {
3679 this_device->offload_to_be_enabled =
3680 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3681 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3682 this_device->offload_to_be_enabled = 0;
3683 }
3684
3685 out:
3686 kfree(buf);
3687 return;
3688 }
3689
3690 /* Get the device id from inquiry page 0x83 */
3691 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3692 unsigned char *device_id, int index, int buflen)
3693 {
3694 int rc;
3695 unsigned char *buf;
3696
3697 /* Does controller have VPD for device id? */
3698 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3699 return 1; /* not supported */
3700
3701 buf = kzalloc(64, GFP_KERNEL);
3702 if (!buf)
3703 return -ENOMEM;
3704
3705 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3706 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3707 if (rc == 0) {
3708 if (buflen > 16)
3709 buflen = 16;
3710 memcpy(device_id, &buf[8], buflen);
3711 }
3712
3713 kfree(buf);
3714
3715 return rc; /*0 - got id, otherwise, didn't */
3716 }
3717
3718 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3719 void *buf, int bufsize,
3720 int extended_response)
3721 {
3722 int rc = IO_OK;
3723 struct CommandList *c;
3724 unsigned char scsi3addr[8];
3725 struct ErrorInfo *ei;
3726
3727 c = cmd_alloc(h);
3728
3729 /* address the controller */
3730 memset(scsi3addr, 0, sizeof(scsi3addr));
3731 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3732 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3733 rc = -EAGAIN;
3734 goto out;
3735 }
3736 if (extended_response)
3737 c->Request.CDB[1] = extended_response;
3738 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3739 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3740 if (rc)
3741 goto out;
3742 ei = c->err_info;
3743 if (ei->CommandStatus != 0 &&
3744 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3745 hpsa_scsi_interpret_error(h, c);
3746 rc = -EIO;
3747 } else {
3748 struct ReportLUNdata *rld = buf;
3749
3750 if (rld->extended_response_flag != extended_response) {
3751 if (!h->legacy_board) {
3752 dev_err(&h->pdev->dev,
3753 "report luns requested format %u, got %u\n",
3754 extended_response,
3755 rld->extended_response_flag);
3756 rc = -EINVAL;
3757 } else
3758 rc = -EOPNOTSUPP;
3759 }
3760 }
3761 out:
3762 cmd_free(h, c);
3763 return rc;
3764 }
3765
3766 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3767 struct ReportExtendedLUNdata *buf, int bufsize)
3768 {
3769 int rc;
3770 struct ReportLUNdata *lbuf;
3771
3772 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3773 HPSA_REPORT_PHYS_EXTENDED);
3774 if (!rc || rc != -EOPNOTSUPP)
3775 return rc;
3776
3777 /* REPORT PHYS EXTENDED is not supported */
3778 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3779 if (!lbuf)
3780 return -ENOMEM;
3781
3782 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3783 if (!rc) {
3784 int i;
3785 u32 nphys;
3786
3787 /* Copy ReportLUNdata header */
3788 memcpy(buf, lbuf, 8);
3789 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3790 for (i = 0; i < nphys; i++)
3791 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3792 }
3793 kfree(lbuf);
3794 return rc;
3795 }
3796
3797 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3798 struct ReportLUNdata *buf, int bufsize)
3799 {
3800 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3801 }
3802
3803 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3804 int bus, int target, int lun)
3805 {
3806 device->bus = bus;
3807 device->target = target;
3808 device->lun = lun;
3809 }
3810
3811 /* Use VPD inquiry to get details of volume status */
3812 static int hpsa_get_volume_status(struct ctlr_info *h,
3813 unsigned char scsi3addr[])
3814 {
3815 int rc;
3816 int status;
3817 int size;
3818 unsigned char *buf;
3819
3820 buf = kzalloc(64, GFP_KERNEL);
3821 if (!buf)
3822 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3823
3824 /* Does controller have VPD for logical volume status? */
3825 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3826 goto exit_failed;
3827
3828 /* Get the size of the VPD return buffer */
3829 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3830 buf, HPSA_VPD_HEADER_SZ);
3831 if (rc != 0)
3832 goto exit_failed;
3833 size = buf[3];
3834
3835 /* Now get the whole VPD buffer */
3836 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3837 buf, size + HPSA_VPD_HEADER_SZ);
3838 if (rc != 0)
3839 goto exit_failed;
3840 status = buf[4]; /* status byte */
3841
3842 kfree(buf);
3843 return status;
3844 exit_failed:
3845 kfree(buf);
3846 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3847 }
3848
3849 /* Determine offline status of a volume.
3850 * Return either:
3851 * 0 (not offline)
3852 * 0xff (offline for unknown reasons)
3853 * # (integer code indicating one of several NOT READY states
3854 * describing why a volume is to be kept offline)
3855 */
3856 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3857 unsigned char scsi3addr[])
3858 {
3859 struct CommandList *c;
3860 unsigned char *sense;
3861 u8 sense_key, asc, ascq;
3862 int sense_len;
3863 int rc, ldstat = 0;
3864 u16 cmd_status;
3865 u8 scsi_status;
3866 #define ASC_LUN_NOT_READY 0x04
3867 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3868 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3869
3870 c = cmd_alloc(h);
3871
3872 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3873 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3874 NO_TIMEOUT);
3875 if (rc) {
3876 cmd_free(h, c);
3877 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3878 }
3879 sense = c->err_info->SenseInfo;
3880 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3881 sense_len = sizeof(c->err_info->SenseInfo);
3882 else
3883 sense_len = c->err_info->SenseLen;
3884 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3885 cmd_status = c->err_info->CommandStatus;
3886 scsi_status = c->err_info->ScsiStatus;
3887 cmd_free(h, c);
3888
3889 /* Determine the reason for not ready state */
3890 ldstat = hpsa_get_volume_status(h, scsi3addr);
3891
3892 /* Keep volume offline in certain cases: */
3893 switch (ldstat) {
3894 case HPSA_LV_FAILED:
3895 case HPSA_LV_UNDERGOING_ERASE:
3896 case HPSA_LV_NOT_AVAILABLE:
3897 case HPSA_LV_UNDERGOING_RPI:
3898 case HPSA_LV_PENDING_RPI:
3899 case HPSA_LV_ENCRYPTED_NO_KEY:
3900 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3901 case HPSA_LV_UNDERGOING_ENCRYPTION:
3902 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3903 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3904 return ldstat;
3905 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3906 /* If VPD status page isn't available,
3907 * use ASC/ASCQ to determine state
3908 */
3909 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3910 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3911 return ldstat;
3912 break;
3913 default:
3914 break;
3915 }
3916 return HPSA_LV_OK;
3917 }
3918
3919 static int hpsa_update_device_info(struct ctlr_info *h,
3920 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3921 unsigned char *is_OBDR_device)
3922 {
3923
3924 #define OBDR_SIG_OFFSET 43
3925 #define OBDR_TAPE_SIG "$DR-10"
3926 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3927 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3928
3929 unsigned char *inq_buff;
3930 unsigned char *obdr_sig;
3931 int rc = 0;
3932
3933 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3934 if (!inq_buff) {
3935 rc = -ENOMEM;
3936 goto bail_out;
3937 }
3938
3939 /* Do an inquiry to the device to see what it is. */
3940 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3941 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3942 dev_err(&h->pdev->dev,
3943 "%s: inquiry failed, device will be skipped.\n",
3944 __func__);
3945 rc = HPSA_INQUIRY_FAILED;
3946 goto bail_out;
3947 }
3948
3949 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3950 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3951
3952 this_device->devtype = (inq_buff[0] & 0x1f);
3953 memcpy(this_device->scsi3addr, scsi3addr, 8);
3954 memcpy(this_device->vendor, &inq_buff[8],
3955 sizeof(this_device->vendor));
3956 memcpy(this_device->model, &inq_buff[16],
3957 sizeof(this_device->model));
3958 this_device->rev = inq_buff[2];
3959 memset(this_device->device_id, 0,
3960 sizeof(this_device->device_id));
3961 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3962 sizeof(this_device->device_id)) < 0)
3963 dev_err(&h->pdev->dev,
3964 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3965 h->ctlr, __func__,
3966 h->scsi_host->host_no,
3967 this_device->target, this_device->lun,
3968 scsi_device_type(this_device->devtype),
3969 this_device->model);
3970
3971 if ((this_device->devtype == TYPE_DISK ||
3972 this_device->devtype == TYPE_ZBC) &&
3973 is_logical_dev_addr_mode(scsi3addr)) {
3974 unsigned char volume_offline;
3975
3976 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3977 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3978 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3979 volume_offline = hpsa_volume_offline(h, scsi3addr);
3980 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3981 h->legacy_board) {
3982 /*
3983 * Legacy boards might not support volume status
3984 */
3985 dev_info(&h->pdev->dev,
3986 "C0:T%d:L%d Volume status not available, assuming online.\n",
3987 this_device->target, this_device->lun);
3988 volume_offline = 0;
3989 }
3990 this_device->volume_offline = volume_offline;
3991 if (volume_offline == HPSA_LV_FAILED) {
3992 rc = HPSA_LV_FAILED;
3993 dev_err(&h->pdev->dev,
3994 "%s: LV failed, device will be skipped.\n",
3995 __func__);
3996 goto bail_out;
3997 }
3998 } else {
3999 this_device->raid_level = RAID_UNKNOWN;
4000 this_device->offload_config = 0;
4001 this_device->offload_enabled = 0;
4002 this_device->offload_to_be_enabled = 0;
4003 this_device->hba_ioaccel_enabled = 0;
4004 this_device->volume_offline = 0;
4005 this_device->queue_depth = h->nr_cmds;
4006 }
4007
4008 if (this_device->external)
4009 this_device->queue_depth = EXTERNAL_QD;
4010
4011 if (is_OBDR_device) {
4012 /* See if this is a One-Button-Disaster-Recovery device
4013 * by looking for "$DR-10" at offset 43 in inquiry data.
4014 */
4015 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4016 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4017 strncmp(obdr_sig, OBDR_TAPE_SIG,
4018 OBDR_SIG_LEN) == 0);
4019 }
4020 kfree(inq_buff);
4021 return 0;
4022
4023 bail_out:
4024 kfree(inq_buff);
4025 return rc;
4026 }
4027
4028 /*
4029 * Helper function to assign bus, target, lun mapping of devices.
4030 * Logical drive target and lun are assigned at this time, but
4031 * physical device lun and target assignment are deferred (assigned
4032 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4033 */
4034 static void figure_bus_target_lun(struct ctlr_info *h,
4035 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4036 {
4037 u32 lunid = get_unaligned_le32(lunaddrbytes);
4038
4039 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4040 /* physical device, target and lun filled in later */
4041 if (is_hba_lunid(lunaddrbytes)) {
4042 int bus = HPSA_HBA_BUS;
4043
4044 if (!device->rev)
4045 bus = HPSA_LEGACY_HBA_BUS;
4046 hpsa_set_bus_target_lun(device,
4047 bus, 0, lunid & 0x3fff);
4048 } else
4049 /* defer target, lun assignment for physical devices */
4050 hpsa_set_bus_target_lun(device,
4051 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4052 return;
4053 }
4054 /* It's a logical device */
4055 if (device->external) {
4056 hpsa_set_bus_target_lun(device,
4057 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4058 lunid & 0x00ff);
4059 return;
4060 }
4061 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4062 0, lunid & 0x3fff);
4063 }
4064
4065 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4066 int i, int nphysicals, int nlocal_logicals)
4067 {
4068 /* In report logicals, local logicals are listed first,
4069 * then any externals.
4070 */
4071 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4072
4073 if (i == raid_ctlr_position)
4074 return 0;
4075
4076 if (i < logicals_start)
4077 return 0;
4078
4079 /* i is in logicals range, but still within local logicals */
4080 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4081 return 0;
4082
4083 return 1; /* it's an external lun */
4084 }
4085
4086 /*
4087 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4088 * logdev. The number of luns in physdev and logdev are returned in
4089 * *nphysicals and *nlogicals, respectively.
4090 * Returns 0 on success, -1 otherwise.
4091 */
4092 static int hpsa_gather_lun_info(struct ctlr_info *h,
4093 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4094 struct ReportLUNdata *logdev, u32 *nlogicals)
4095 {
4096 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4097 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4098 return -1;
4099 }
4100 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4101 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4102 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4103 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4104 *nphysicals = HPSA_MAX_PHYS_LUN;
4105 }
4106 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4107 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4108 return -1;
4109 }
4110 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4111 /* Reject Logicals in excess of our max capability. */
4112 if (*nlogicals > HPSA_MAX_LUN) {
4113 dev_warn(&h->pdev->dev,
4114 "maximum logical LUNs (%d) exceeded. "
4115 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4116 *nlogicals - HPSA_MAX_LUN);
4117 *nlogicals = HPSA_MAX_LUN;
4118 }
4119 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4120 dev_warn(&h->pdev->dev,
4121 "maximum logical + physical LUNs (%d) exceeded. "
4122 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4123 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4124 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4125 }
4126 return 0;
4127 }
4128
4129 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4130 int i, int nphysicals, int nlogicals,
4131 struct ReportExtendedLUNdata *physdev_list,
4132 struct ReportLUNdata *logdev_list)
4133 {
4134 /* Helper function, figure out where the LUN ID info is coming from
4135 * given index i, lists of physical and logical devices, where in
4136 * the list the raid controller is supposed to appear (first or last)
4137 */
4138
4139 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4140 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4141
4142 if (i == raid_ctlr_position)
4143 return RAID_CTLR_LUNID;
4144
4145 if (i < logicals_start)
4146 return &physdev_list->LUN[i -
4147 (raid_ctlr_position == 0)].lunid[0];
4148
4149 if (i < last_device)
4150 return &logdev_list->LUN[i - nphysicals -
4151 (raid_ctlr_position == 0)][0];
4152 BUG();
4153 return NULL;
4154 }
4155
4156 /* get physical drive ioaccel handle and queue depth */
4157 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4158 struct hpsa_scsi_dev_t *dev,
4159 struct ReportExtendedLUNdata *rlep, int rle_index,
4160 struct bmic_identify_physical_device *id_phys)
4161 {
4162 int rc;
4163 struct ext_report_lun_entry *rle;
4164
4165 rle = &rlep->LUN[rle_index];
4166
4167 dev->ioaccel_handle = rle->ioaccel_handle;
4168 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4169 dev->hba_ioaccel_enabled = 1;
4170 memset(id_phys, 0, sizeof(*id_phys));
4171 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4172 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4173 sizeof(*id_phys));
4174 if (!rc)
4175 /* Reserve space for FW operations */
4176 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4177 #define DRIVE_QUEUE_DEPTH 7
4178 dev->queue_depth =
4179 le16_to_cpu(id_phys->current_queue_depth_limit) -
4180 DRIVE_CMDS_RESERVED_FOR_FW;
4181 else
4182 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4183 }
4184
4185 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4186 struct ReportExtendedLUNdata *rlep, int rle_index,
4187 struct bmic_identify_physical_device *id_phys)
4188 {
4189 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4190
4191 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4192 this_device->hba_ioaccel_enabled = 1;
4193
4194 memcpy(&this_device->active_path_index,
4195 &id_phys->active_path_number,
4196 sizeof(this_device->active_path_index));
4197 memcpy(&this_device->path_map,
4198 &id_phys->redundant_path_present_map,
4199 sizeof(this_device->path_map));
4200 memcpy(&this_device->box,
4201 &id_phys->alternate_paths_phys_box_on_port,
4202 sizeof(this_device->box));
4203 memcpy(&this_device->phys_connector,
4204 &id_phys->alternate_paths_phys_connector,
4205 sizeof(this_device->phys_connector));
4206 memcpy(&this_device->bay,
4207 &id_phys->phys_bay_in_box,
4208 sizeof(this_device->bay));
4209 }
4210
4211 /* get number of local logical disks. */
4212 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4213 struct bmic_identify_controller *id_ctlr,
4214 u32 *nlocals)
4215 {
4216 int rc;
4217
4218 if (!id_ctlr) {
4219 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4220 __func__);
4221 return -ENOMEM;
4222 }
4223 memset(id_ctlr, 0, sizeof(*id_ctlr));
4224 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4225 if (!rc)
4226 if (id_ctlr->configured_logical_drive_count < 255)
4227 *nlocals = id_ctlr->configured_logical_drive_count;
4228 else
4229 *nlocals = le16_to_cpu(
4230 id_ctlr->extended_logical_unit_count);
4231 else
4232 *nlocals = -1;
4233 return rc;
4234 }
4235
4236 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4237 {
4238 struct bmic_identify_physical_device *id_phys;
4239 bool is_spare = false;
4240 int rc;
4241
4242 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4243 if (!id_phys)
4244 return false;
4245
4246 rc = hpsa_bmic_id_physical_device(h,
4247 lunaddrbytes,
4248 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4249 id_phys, sizeof(*id_phys));
4250 if (rc == 0)
4251 is_spare = (id_phys->more_flags >> 6) & 0x01;
4252
4253 kfree(id_phys);
4254 return is_spare;
4255 }
4256
4257 #define RPL_DEV_FLAG_NON_DISK 0x1
4258 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4259 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4260
4261 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4262
4263 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4264 struct ext_report_lun_entry *rle)
4265 {
4266 u8 device_flags;
4267 u8 device_type;
4268
4269 if (!MASKED_DEVICE(lunaddrbytes))
4270 return false;
4271
4272 device_flags = rle->device_flags;
4273 device_type = rle->device_type;
4274
4275 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4276 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4277 return false;
4278 return true;
4279 }
4280
4281 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4282 return false;
4283
4284 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4285 return false;
4286
4287 /*
4288 * Spares may be spun down, we do not want to
4289 * do an Inquiry to a RAID set spare drive as
4290 * that would have them spun up, that is a
4291 * performance hit because I/O to the RAID device
4292 * stops while the spin up occurs which can take
4293 * over 50 seconds.
4294 */
4295 if (hpsa_is_disk_spare(h, lunaddrbytes))
4296 return true;
4297
4298 return false;
4299 }
4300
4301 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4302 {
4303 /* the idea here is we could get notified
4304 * that some devices have changed, so we do a report
4305 * physical luns and report logical luns cmd, and adjust
4306 * our list of devices accordingly.
4307 *
4308 * The scsi3addr's of devices won't change so long as the
4309 * adapter is not reset. That means we can rescan and
4310 * tell which devices we already know about, vs. new
4311 * devices, vs. disappearing devices.
4312 */
4313 struct ReportExtendedLUNdata *physdev_list = NULL;
4314 struct ReportLUNdata *logdev_list = NULL;
4315 struct bmic_identify_physical_device *id_phys = NULL;
4316 struct bmic_identify_controller *id_ctlr = NULL;
4317 u32 nphysicals = 0;
4318 u32 nlogicals = 0;
4319 u32 nlocal_logicals = 0;
4320 u32 ndev_allocated = 0;
4321 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4322 int ncurrent = 0;
4323 int i, n_ext_target_devs, ndevs_to_allocate;
4324 int raid_ctlr_position;
4325 bool physical_device;
4326 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4327
4328 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL);
4329 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4330 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4331 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4332 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4333 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4334
4335 if (!currentsd || !physdev_list || !logdev_list ||
4336 !tmpdevice || !id_phys || !id_ctlr) {
4337 dev_err(&h->pdev->dev, "out of memory\n");
4338 goto out;
4339 }
4340 memset(lunzerobits, 0, sizeof(lunzerobits));
4341
4342 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4343
4344 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4345 logdev_list, &nlogicals)) {
4346 h->drv_req_rescan = 1;
4347 goto out;
4348 }
4349
4350 /* Set number of local logicals (non PTRAID) */
4351 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4352 dev_warn(&h->pdev->dev,
4353 "%s: Can't determine number of local logical devices.\n",
4354 __func__);
4355 }
4356
4357 /* We might see up to the maximum number of logical and physical disks
4358 * plus external target devices, and a device for the local RAID
4359 * controller.
4360 */
4361 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4362
4363 hpsa_ext_ctrl_present(h, physdev_list);
4364
4365 /* Allocate the per device structures */
4366 for (i = 0; i < ndevs_to_allocate; i++) {
4367 if (i >= HPSA_MAX_DEVICES) {
4368 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4369 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4370 ndevs_to_allocate - HPSA_MAX_DEVICES);
4371 break;
4372 }
4373
4374 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4375 if (!currentsd[i]) {
4376 h->drv_req_rescan = 1;
4377 goto out;
4378 }
4379 ndev_allocated++;
4380 }
4381
4382 if (is_scsi_rev_5(h))
4383 raid_ctlr_position = 0;
4384 else
4385 raid_ctlr_position = nphysicals + nlogicals;
4386
4387 /* adjust our table of devices */
4388 n_ext_target_devs = 0;
4389 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4390 u8 *lunaddrbytes, is_OBDR = 0;
4391 int rc = 0;
4392 int phys_dev_index = i - (raid_ctlr_position == 0);
4393 bool skip_device = false;
4394
4395 memset(tmpdevice, 0, sizeof(*tmpdevice));
4396
4397 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4398
4399 /* Figure out where the LUN ID info is coming from */
4400 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4401 i, nphysicals, nlogicals, physdev_list, logdev_list);
4402
4403 /* Determine if this is a lun from an external target array */
4404 tmpdevice->external =
4405 figure_external_status(h, raid_ctlr_position, i,
4406 nphysicals, nlocal_logicals);
4407
4408 /*
4409 * Skip over some devices such as a spare.
4410 */
4411 if (!tmpdevice->external && physical_device) {
4412 skip_device = hpsa_skip_device(h, lunaddrbytes,
4413 &physdev_list->LUN[phys_dev_index]);
4414 if (skip_device)
4415 continue;
4416 }
4417
4418 /* Get device type, vendor, model, device id, raid_map */
4419 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4420 &is_OBDR);
4421 if (rc == -ENOMEM) {
4422 dev_warn(&h->pdev->dev,
4423 "Out of memory, rescan deferred.\n");
4424 h->drv_req_rescan = 1;
4425 goto out;
4426 }
4427 if (rc) {
4428 h->drv_req_rescan = 1;
4429 continue;
4430 }
4431
4432 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4433 this_device = currentsd[ncurrent];
4434
4435 *this_device = *tmpdevice;
4436 this_device->physical_device = physical_device;
4437
4438 /*
4439 * Expose all devices except for physical devices that
4440 * are masked.
4441 */
4442 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4443 this_device->expose_device = 0;
4444 else
4445 this_device->expose_device = 1;
4446
4447
4448 /*
4449 * Get the SAS address for physical devices that are exposed.
4450 */
4451 if (this_device->physical_device && this_device->expose_device)
4452 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4453
4454 switch (this_device->devtype) {
4455 case TYPE_ROM:
4456 /* We don't *really* support actual CD-ROM devices,
4457 * just "One Button Disaster Recovery" tape drive
4458 * which temporarily pretends to be a CD-ROM drive.
4459 * So we check that the device is really an OBDR tape
4460 * device by checking for "$DR-10" in bytes 43-48 of
4461 * the inquiry data.
4462 */
4463 if (is_OBDR)
4464 ncurrent++;
4465 break;
4466 case TYPE_DISK:
4467 case TYPE_ZBC:
4468 if (this_device->physical_device) {
4469 /* The disk is in HBA mode. */
4470 /* Never use RAID mapper in HBA mode. */
4471 this_device->offload_enabled = 0;
4472 hpsa_get_ioaccel_drive_info(h, this_device,
4473 physdev_list, phys_dev_index, id_phys);
4474 hpsa_get_path_info(this_device,
4475 physdev_list, phys_dev_index, id_phys);
4476 }
4477 ncurrent++;
4478 break;
4479 case TYPE_TAPE:
4480 case TYPE_MEDIUM_CHANGER:
4481 ncurrent++;
4482 break;
4483 case TYPE_ENCLOSURE:
4484 if (!this_device->external)
4485 hpsa_get_enclosure_info(h, lunaddrbytes,
4486 physdev_list, phys_dev_index,
4487 this_device);
4488 ncurrent++;
4489 break;
4490 case TYPE_RAID:
4491 /* Only present the Smartarray HBA as a RAID controller.
4492 * If it's a RAID controller other than the HBA itself
4493 * (an external RAID controller, MSA500 or similar)
4494 * don't present it.
4495 */
4496 if (!is_hba_lunid(lunaddrbytes))
4497 break;
4498 ncurrent++;
4499 break;
4500 default:
4501 break;
4502 }
4503 if (ncurrent >= HPSA_MAX_DEVICES)
4504 break;
4505 }
4506
4507 if (h->sas_host == NULL) {
4508 int rc = 0;
4509
4510 rc = hpsa_add_sas_host(h);
4511 if (rc) {
4512 dev_warn(&h->pdev->dev,
4513 "Could not add sas host %d\n", rc);
4514 goto out;
4515 }
4516 }
4517
4518 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4519 out:
4520 kfree(tmpdevice);
4521 for (i = 0; i < ndev_allocated; i++)
4522 kfree(currentsd[i]);
4523 kfree(currentsd);
4524 kfree(physdev_list);
4525 kfree(logdev_list);
4526 kfree(id_ctlr);
4527 kfree(id_phys);
4528 }
4529
4530 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4531 struct scatterlist *sg)
4532 {
4533 u64 addr64 = (u64) sg_dma_address(sg);
4534 unsigned int len = sg_dma_len(sg);
4535
4536 desc->Addr = cpu_to_le64(addr64);
4537 desc->Len = cpu_to_le32(len);
4538 desc->Ext = 0;
4539 }
4540
4541 /*
4542 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4543 * dma mapping and fills in the scatter gather entries of the
4544 * hpsa command, cp.
4545 */
4546 static int hpsa_scatter_gather(struct ctlr_info *h,
4547 struct CommandList *cp,
4548 struct scsi_cmnd *cmd)
4549 {
4550 struct scatterlist *sg;
4551 int use_sg, i, sg_limit, chained, last_sg;
4552 struct SGDescriptor *curr_sg;
4553
4554 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4555
4556 use_sg = scsi_dma_map(cmd);
4557 if (use_sg < 0)
4558 return use_sg;
4559
4560 if (!use_sg)
4561 goto sglist_finished;
4562
4563 /*
4564 * If the number of entries is greater than the max for a single list,
4565 * then we have a chained list; we will set up all but one entry in the
4566 * first list (the last entry is saved for link information);
4567 * otherwise, we don't have a chained list and we'll set up at each of
4568 * the entries in the one list.
4569 */
4570 curr_sg = cp->SG;
4571 chained = use_sg > h->max_cmd_sg_entries;
4572 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4573 last_sg = scsi_sg_count(cmd) - 1;
4574 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4575 hpsa_set_sg_descriptor(curr_sg, sg);
4576 curr_sg++;
4577 }
4578
4579 if (chained) {
4580 /*
4581 * Continue with the chained list. Set curr_sg to the chained
4582 * list. Modify the limit to the total count less the entries
4583 * we've already set up. Resume the scan at the list entry
4584 * where the previous loop left off.
4585 */
4586 curr_sg = h->cmd_sg_list[cp->cmdindex];
4587 sg_limit = use_sg - sg_limit;
4588 for_each_sg(sg, sg, sg_limit, i) {
4589 hpsa_set_sg_descriptor(curr_sg, sg);
4590 curr_sg++;
4591 }
4592 }
4593
4594 /* Back the pointer up to the last entry and mark it as "last". */
4595 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4596
4597 if (use_sg + chained > h->maxSG)
4598 h->maxSG = use_sg + chained;
4599
4600 if (chained) {
4601 cp->Header.SGList = h->max_cmd_sg_entries;
4602 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4603 if (hpsa_map_sg_chain_block(h, cp)) {
4604 scsi_dma_unmap(cmd);
4605 return -1;
4606 }
4607 return 0;
4608 }
4609
4610 sglist_finished:
4611
4612 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4613 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4614 return 0;
4615 }
4616
4617 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4618 u8 *cdb, int cdb_len,
4619 const char *func)
4620 {
4621 dev_warn(&h->pdev->dev,
4622 "%s: Blocking zero-length request: CDB:%*phN\n",
4623 func, cdb_len, cdb);
4624 }
4625
4626 #define IO_ACCEL_INELIGIBLE 1
4627 /* zero-length transfers trigger hardware errors. */
4628 static bool is_zero_length_transfer(u8 *cdb)
4629 {
4630 u32 block_cnt;
4631
4632 /* Block zero-length transfer sizes on certain commands. */
4633 switch (cdb[0]) {
4634 case READ_10:
4635 case WRITE_10:
4636 case VERIFY: /* 0x2F */
4637 case WRITE_VERIFY: /* 0x2E */
4638 block_cnt = get_unaligned_be16(&cdb[7]);
4639 break;
4640 case READ_12:
4641 case WRITE_12:
4642 case VERIFY_12: /* 0xAF */
4643 case WRITE_VERIFY_12: /* 0xAE */
4644 block_cnt = get_unaligned_be32(&cdb[6]);
4645 break;
4646 case READ_16:
4647 case WRITE_16:
4648 case VERIFY_16: /* 0x8F */
4649 block_cnt = get_unaligned_be32(&cdb[10]);
4650 break;
4651 default:
4652 return false;
4653 }
4654
4655 return block_cnt == 0;
4656 }
4657
4658 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4659 {
4660 int is_write = 0;
4661 u32 block;
4662 u32 block_cnt;
4663
4664 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4665 switch (cdb[0]) {
4666 case WRITE_6:
4667 case WRITE_12:
4668 is_write = 1;
4669 case READ_6:
4670 case READ_12:
4671 if (*cdb_len == 6) {
4672 block = (((cdb[1] & 0x1F) << 16) |
4673 (cdb[2] << 8) |
4674 cdb[3]);
4675 block_cnt = cdb[4];
4676 if (block_cnt == 0)
4677 block_cnt = 256;
4678 } else {
4679 BUG_ON(*cdb_len != 12);
4680 block = get_unaligned_be32(&cdb[2]);
4681 block_cnt = get_unaligned_be32(&cdb[6]);
4682 }
4683 if (block_cnt > 0xffff)
4684 return IO_ACCEL_INELIGIBLE;
4685
4686 cdb[0] = is_write ? WRITE_10 : READ_10;
4687 cdb[1] = 0;
4688 cdb[2] = (u8) (block >> 24);
4689 cdb[3] = (u8) (block >> 16);
4690 cdb[4] = (u8) (block >> 8);
4691 cdb[5] = (u8) (block);
4692 cdb[6] = 0;
4693 cdb[7] = (u8) (block_cnt >> 8);
4694 cdb[8] = (u8) (block_cnt);
4695 cdb[9] = 0;
4696 *cdb_len = 10;
4697 break;
4698 }
4699 return 0;
4700 }
4701
4702 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4703 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4704 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4705 {
4706 struct scsi_cmnd *cmd = c->scsi_cmd;
4707 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4708 unsigned int len;
4709 unsigned int total_len = 0;
4710 struct scatterlist *sg;
4711 u64 addr64;
4712 int use_sg, i;
4713 struct SGDescriptor *curr_sg;
4714 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4715
4716 /* TODO: implement chaining support */
4717 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4718 atomic_dec(&phys_disk->ioaccel_cmds_out);
4719 return IO_ACCEL_INELIGIBLE;
4720 }
4721
4722 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4723
4724 if (is_zero_length_transfer(cdb)) {
4725 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4726 atomic_dec(&phys_disk->ioaccel_cmds_out);
4727 return IO_ACCEL_INELIGIBLE;
4728 }
4729
4730 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4731 atomic_dec(&phys_disk->ioaccel_cmds_out);
4732 return IO_ACCEL_INELIGIBLE;
4733 }
4734
4735 c->cmd_type = CMD_IOACCEL1;
4736
4737 /* Adjust the DMA address to point to the accelerated command buffer */
4738 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4739 (c->cmdindex * sizeof(*cp));
4740 BUG_ON(c->busaddr & 0x0000007F);
4741
4742 use_sg = scsi_dma_map(cmd);
4743 if (use_sg < 0) {
4744 atomic_dec(&phys_disk->ioaccel_cmds_out);
4745 return use_sg;
4746 }
4747
4748 if (use_sg) {
4749 curr_sg = cp->SG;
4750 scsi_for_each_sg(cmd, sg, use_sg, i) {
4751 addr64 = (u64) sg_dma_address(sg);
4752 len = sg_dma_len(sg);
4753 total_len += len;
4754 curr_sg->Addr = cpu_to_le64(addr64);
4755 curr_sg->Len = cpu_to_le32(len);
4756 curr_sg->Ext = cpu_to_le32(0);
4757 curr_sg++;
4758 }
4759 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4760
4761 switch (cmd->sc_data_direction) {
4762 case DMA_TO_DEVICE:
4763 control |= IOACCEL1_CONTROL_DATA_OUT;
4764 break;
4765 case DMA_FROM_DEVICE:
4766 control |= IOACCEL1_CONTROL_DATA_IN;
4767 break;
4768 case DMA_NONE:
4769 control |= IOACCEL1_CONTROL_NODATAXFER;
4770 break;
4771 default:
4772 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4773 cmd->sc_data_direction);
4774 BUG();
4775 break;
4776 }
4777 } else {
4778 control |= IOACCEL1_CONTROL_NODATAXFER;
4779 }
4780
4781 c->Header.SGList = use_sg;
4782 /* Fill out the command structure to submit */
4783 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4784 cp->transfer_len = cpu_to_le32(total_len);
4785 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4786 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4787 cp->control = cpu_to_le32(control);
4788 memcpy(cp->CDB, cdb, cdb_len);
4789 memcpy(cp->CISS_LUN, scsi3addr, 8);
4790 /* Tag was already set at init time. */
4791 enqueue_cmd_and_start_io(h, c);
4792 return 0;
4793 }
4794
4795 /*
4796 * Queue a command directly to a device behind the controller using the
4797 * I/O accelerator path.
4798 */
4799 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4800 struct CommandList *c)
4801 {
4802 struct scsi_cmnd *cmd = c->scsi_cmd;
4803 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4804
4805 if (!dev)
4806 return -1;
4807
4808 c->phys_disk = dev;
4809
4810 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4811 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4812 }
4813
4814 /*
4815 * Set encryption parameters for the ioaccel2 request
4816 */
4817 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4818 struct CommandList *c, struct io_accel2_cmd *cp)
4819 {
4820 struct scsi_cmnd *cmd = c->scsi_cmd;
4821 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4822 struct raid_map_data *map = &dev->raid_map;
4823 u64 first_block;
4824
4825 /* Are we doing encryption on this device */
4826 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4827 return;
4828 /* Set the data encryption key index. */
4829 cp->dekindex = map->dekindex;
4830
4831 /* Set the encryption enable flag, encoded into direction field. */
4832 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4833
4834 /* Set encryption tweak values based on logical block address
4835 * If block size is 512, tweak value is LBA.
4836 * For other block sizes, tweak is (LBA * block size)/ 512)
4837 */
4838 switch (cmd->cmnd[0]) {
4839 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4840 case READ_6:
4841 case WRITE_6:
4842 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4843 (cmd->cmnd[2] << 8) |
4844 cmd->cmnd[3]);
4845 break;
4846 case WRITE_10:
4847 case READ_10:
4848 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4849 case WRITE_12:
4850 case READ_12:
4851 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4852 break;
4853 case WRITE_16:
4854 case READ_16:
4855 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4856 break;
4857 default:
4858 dev_err(&h->pdev->dev,
4859 "ERROR: %s: size (0x%x) not supported for encryption\n",
4860 __func__, cmd->cmnd[0]);
4861 BUG();
4862 break;
4863 }
4864
4865 if (le32_to_cpu(map->volume_blk_size) != 512)
4866 first_block = first_block *
4867 le32_to_cpu(map->volume_blk_size)/512;
4868
4869 cp->tweak_lower = cpu_to_le32(first_block);
4870 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4871 }
4872
4873 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4874 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4875 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4876 {
4877 struct scsi_cmnd *cmd = c->scsi_cmd;
4878 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4879 struct ioaccel2_sg_element *curr_sg;
4880 int use_sg, i;
4881 struct scatterlist *sg;
4882 u64 addr64;
4883 u32 len;
4884 u32 total_len = 0;
4885
4886 if (!cmd->device)
4887 return -1;
4888
4889 if (!cmd->device->hostdata)
4890 return -1;
4891
4892 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4893
4894 if (is_zero_length_transfer(cdb)) {
4895 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4896 atomic_dec(&phys_disk->ioaccel_cmds_out);
4897 return IO_ACCEL_INELIGIBLE;
4898 }
4899
4900 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4901 atomic_dec(&phys_disk->ioaccel_cmds_out);
4902 return IO_ACCEL_INELIGIBLE;
4903 }
4904
4905 c->cmd_type = CMD_IOACCEL2;
4906 /* Adjust the DMA address to point to the accelerated command buffer */
4907 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4908 (c->cmdindex * sizeof(*cp));
4909 BUG_ON(c->busaddr & 0x0000007F);
4910
4911 memset(cp, 0, sizeof(*cp));
4912 cp->IU_type = IOACCEL2_IU_TYPE;
4913
4914 use_sg = scsi_dma_map(cmd);
4915 if (use_sg < 0) {
4916 atomic_dec(&phys_disk->ioaccel_cmds_out);
4917 return use_sg;
4918 }
4919
4920 if (use_sg) {
4921 curr_sg = cp->sg;
4922 if (use_sg > h->ioaccel_maxsg) {
4923 addr64 = le64_to_cpu(
4924 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4925 curr_sg->address = cpu_to_le64(addr64);
4926 curr_sg->length = 0;
4927 curr_sg->reserved[0] = 0;
4928 curr_sg->reserved[1] = 0;
4929 curr_sg->reserved[2] = 0;
4930 curr_sg->chain_indicator = IOACCEL2_CHAIN;
4931
4932 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4933 }
4934 scsi_for_each_sg(cmd, sg, use_sg, i) {
4935 addr64 = (u64) sg_dma_address(sg);
4936 len = sg_dma_len(sg);
4937 total_len += len;
4938 curr_sg->address = cpu_to_le64(addr64);
4939 curr_sg->length = cpu_to_le32(len);
4940 curr_sg->reserved[0] = 0;
4941 curr_sg->reserved[1] = 0;
4942 curr_sg->reserved[2] = 0;
4943 curr_sg->chain_indicator = 0;
4944 curr_sg++;
4945 }
4946
4947 /*
4948 * Set the last s/g element bit
4949 */
4950 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG;
4951
4952 switch (cmd->sc_data_direction) {
4953 case DMA_TO_DEVICE:
4954 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4955 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4956 break;
4957 case DMA_FROM_DEVICE:
4958 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4959 cp->direction |= IOACCEL2_DIR_DATA_IN;
4960 break;
4961 case DMA_NONE:
4962 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4963 cp->direction |= IOACCEL2_DIR_NO_DATA;
4964 break;
4965 default:
4966 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4967 cmd->sc_data_direction);
4968 BUG();
4969 break;
4970 }
4971 } else {
4972 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4973 cp->direction |= IOACCEL2_DIR_NO_DATA;
4974 }
4975
4976 /* Set encryption parameters, if necessary */
4977 set_encrypt_ioaccel2(h, c, cp);
4978
4979 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4980 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4981 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4982
4983 cp->data_len = cpu_to_le32(total_len);
4984 cp->err_ptr = cpu_to_le64(c->busaddr +
4985 offsetof(struct io_accel2_cmd, error_data));
4986 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4987
4988 /* fill in sg elements */
4989 if (use_sg > h->ioaccel_maxsg) {
4990 cp->sg_count = 1;
4991 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4992 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4993 atomic_dec(&phys_disk->ioaccel_cmds_out);
4994 scsi_dma_unmap(cmd);
4995 return -1;
4996 }
4997 } else
4998 cp->sg_count = (u8) use_sg;
4999
5000 enqueue_cmd_and_start_io(h, c);
5001 return 0;
5002 }
5003
5004 /*
5005 * Queue a command to the correct I/O accelerator path.
5006 */
5007 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5008 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5009 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5010 {
5011 if (!c->scsi_cmd->device)
5012 return -1;
5013
5014 if (!c->scsi_cmd->device->hostdata)
5015 return -1;
5016
5017 /* Try to honor the device's queue depth */
5018 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5019 phys_disk->queue_depth) {
5020 atomic_dec(&phys_disk->ioaccel_cmds_out);
5021 return IO_ACCEL_INELIGIBLE;
5022 }
5023 if (h->transMethod & CFGTBL_Trans_io_accel1)
5024 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5025 cdb, cdb_len, scsi3addr,
5026 phys_disk);
5027 else
5028 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5029 cdb, cdb_len, scsi3addr,
5030 phys_disk);
5031 }
5032
5033 static void raid_map_helper(struct raid_map_data *map,
5034 int offload_to_mirror, u32 *map_index, u32 *current_group)
5035 {
5036 if (offload_to_mirror == 0) {
5037 /* use physical disk in the first mirrored group. */
5038 *map_index %= le16_to_cpu(map->data_disks_per_row);
5039 return;
5040 }
5041 do {
5042 /* determine mirror group that *map_index indicates */
5043 *current_group = *map_index /
5044 le16_to_cpu(map->data_disks_per_row);
5045 if (offload_to_mirror == *current_group)
5046 continue;
5047 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5048 /* select map index from next group */
5049 *map_index += le16_to_cpu(map->data_disks_per_row);
5050 (*current_group)++;
5051 } else {
5052 /* select map index from first group */
5053 *map_index %= le16_to_cpu(map->data_disks_per_row);
5054 *current_group = 0;
5055 }
5056 } while (offload_to_mirror != *current_group);
5057 }
5058
5059 /*
5060 * Attempt to perform offload RAID mapping for a logical volume I/O.
5061 */
5062 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5063 struct CommandList *c)
5064 {
5065 struct scsi_cmnd *cmd = c->scsi_cmd;
5066 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5067 struct raid_map_data *map = &dev->raid_map;
5068 struct raid_map_disk_data *dd = &map->data[0];
5069 int is_write = 0;
5070 u32 map_index;
5071 u64 first_block, last_block;
5072 u32 block_cnt;
5073 u32 blocks_per_row;
5074 u64 first_row, last_row;
5075 u32 first_row_offset, last_row_offset;
5076 u32 first_column, last_column;
5077 u64 r0_first_row, r0_last_row;
5078 u32 r5or6_blocks_per_row;
5079 u64 r5or6_first_row, r5or6_last_row;
5080 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5081 u32 r5or6_first_column, r5or6_last_column;
5082 u32 total_disks_per_row;
5083 u32 stripesize;
5084 u32 first_group, last_group, current_group;
5085 u32 map_row;
5086 u32 disk_handle;
5087 u64 disk_block;
5088 u32 disk_block_cnt;
5089 u8 cdb[16];
5090 u8 cdb_len;
5091 u16 strip_size;
5092 #if BITS_PER_LONG == 32
5093 u64 tmpdiv;
5094 #endif
5095 int offload_to_mirror;
5096
5097 if (!dev)
5098 return -1;
5099
5100 /* check for valid opcode, get LBA and block count */
5101 switch (cmd->cmnd[0]) {
5102 case WRITE_6:
5103 is_write = 1;
5104 case READ_6:
5105 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5106 (cmd->cmnd[2] << 8) |
5107 cmd->cmnd[3]);
5108 block_cnt = cmd->cmnd[4];
5109 if (block_cnt == 0)
5110 block_cnt = 256;
5111 break;
5112 case WRITE_10:
5113 is_write = 1;
5114 case READ_10:
5115 first_block =
5116 (((u64) cmd->cmnd[2]) << 24) |
5117 (((u64) cmd->cmnd[3]) << 16) |
5118 (((u64) cmd->cmnd[4]) << 8) |
5119 cmd->cmnd[5];
5120 block_cnt =
5121 (((u32) cmd->cmnd[7]) << 8) |
5122 cmd->cmnd[8];
5123 break;
5124 case WRITE_12:
5125 is_write = 1;
5126 case READ_12:
5127 first_block =
5128 (((u64) cmd->cmnd[2]) << 24) |
5129 (((u64) cmd->cmnd[3]) << 16) |
5130 (((u64) cmd->cmnd[4]) << 8) |
5131 cmd->cmnd[5];
5132 block_cnt =
5133 (((u32) cmd->cmnd[6]) << 24) |
5134 (((u32) cmd->cmnd[7]) << 16) |
5135 (((u32) cmd->cmnd[8]) << 8) |
5136 cmd->cmnd[9];
5137 break;
5138 case WRITE_16:
5139 is_write = 1;
5140 case READ_16:
5141 first_block =
5142 (((u64) cmd->cmnd[2]) << 56) |
5143 (((u64) cmd->cmnd[3]) << 48) |
5144 (((u64) cmd->cmnd[4]) << 40) |
5145 (((u64) cmd->cmnd[5]) << 32) |
5146 (((u64) cmd->cmnd[6]) << 24) |
5147 (((u64) cmd->cmnd[7]) << 16) |
5148 (((u64) cmd->cmnd[8]) << 8) |
5149 cmd->cmnd[9];
5150 block_cnt =
5151 (((u32) cmd->cmnd[10]) << 24) |
5152 (((u32) cmd->cmnd[11]) << 16) |
5153 (((u32) cmd->cmnd[12]) << 8) |
5154 cmd->cmnd[13];
5155 break;
5156 default:
5157 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5158 }
5159 last_block = first_block + block_cnt - 1;
5160
5161 /* check for write to non-RAID-0 */
5162 if (is_write && dev->raid_level != 0)
5163 return IO_ACCEL_INELIGIBLE;
5164
5165 /* check for invalid block or wraparound */
5166 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5167 last_block < first_block)
5168 return IO_ACCEL_INELIGIBLE;
5169
5170 /* calculate stripe information for the request */
5171 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5172 le16_to_cpu(map->strip_size);
5173 strip_size = le16_to_cpu(map->strip_size);
5174 #if BITS_PER_LONG == 32
5175 tmpdiv = first_block;
5176 (void) do_div(tmpdiv, blocks_per_row);
5177 first_row = tmpdiv;
5178 tmpdiv = last_block;
5179 (void) do_div(tmpdiv, blocks_per_row);
5180 last_row = tmpdiv;
5181 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5182 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5183 tmpdiv = first_row_offset;
5184 (void) do_div(tmpdiv, strip_size);
5185 first_column = tmpdiv;
5186 tmpdiv = last_row_offset;
5187 (void) do_div(tmpdiv, strip_size);
5188 last_column = tmpdiv;
5189 #else
5190 first_row = first_block / blocks_per_row;
5191 last_row = last_block / blocks_per_row;
5192 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5193 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5194 first_column = first_row_offset / strip_size;
5195 last_column = last_row_offset / strip_size;
5196 #endif
5197
5198 /* if this isn't a single row/column then give to the controller */
5199 if ((first_row != last_row) || (first_column != last_column))
5200 return IO_ACCEL_INELIGIBLE;
5201
5202 /* proceeding with driver mapping */
5203 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5204 le16_to_cpu(map->metadata_disks_per_row);
5205 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5206 le16_to_cpu(map->row_cnt);
5207 map_index = (map_row * total_disks_per_row) + first_column;
5208
5209 switch (dev->raid_level) {
5210 case HPSA_RAID_0:
5211 break; /* nothing special to do */
5212 case HPSA_RAID_1:
5213 /* Handles load balance across RAID 1 members.
5214 * (2-drive R1 and R10 with even # of drives.)
5215 * Appropriate for SSDs, not optimal for HDDs
5216 */
5217 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5218 if (dev->offload_to_mirror)
5219 map_index += le16_to_cpu(map->data_disks_per_row);
5220 dev->offload_to_mirror = !dev->offload_to_mirror;
5221 break;
5222 case HPSA_RAID_ADM:
5223 /* Handles N-way mirrors (R1-ADM)
5224 * and R10 with # of drives divisible by 3.)
5225 */
5226 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5227
5228 offload_to_mirror = dev->offload_to_mirror;
5229 raid_map_helper(map, offload_to_mirror,
5230 &map_index, &current_group);
5231 /* set mirror group to use next time */
5232 offload_to_mirror =
5233 (offload_to_mirror >=
5234 le16_to_cpu(map->layout_map_count) - 1)
5235 ? 0 : offload_to_mirror + 1;
5236 dev->offload_to_mirror = offload_to_mirror;
5237 /* Avoid direct use of dev->offload_to_mirror within this
5238 * function since multiple threads might simultaneously
5239 * increment it beyond the range of dev->layout_map_count -1.
5240 */
5241 break;
5242 case HPSA_RAID_5:
5243 case HPSA_RAID_6:
5244 if (le16_to_cpu(map->layout_map_count) <= 1)
5245 break;
5246
5247 /* Verify first and last block are in same RAID group */
5248 r5or6_blocks_per_row =
5249 le16_to_cpu(map->strip_size) *
5250 le16_to_cpu(map->data_disks_per_row);
5251 BUG_ON(r5or6_blocks_per_row == 0);
5252 stripesize = r5or6_blocks_per_row *
5253 le16_to_cpu(map->layout_map_count);
5254 #if BITS_PER_LONG == 32
5255 tmpdiv = first_block;
5256 first_group = do_div(tmpdiv, stripesize);
5257 tmpdiv = first_group;
5258 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5259 first_group = tmpdiv;
5260 tmpdiv = last_block;
5261 last_group = do_div(tmpdiv, stripesize);
5262 tmpdiv = last_group;
5263 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5264 last_group = tmpdiv;
5265 #else
5266 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5267 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5268 #endif
5269 if (first_group != last_group)
5270 return IO_ACCEL_INELIGIBLE;
5271
5272 /* Verify request is in a single row of RAID 5/6 */
5273 #if BITS_PER_LONG == 32
5274 tmpdiv = first_block;
5275 (void) do_div(tmpdiv, stripesize);
5276 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5277 tmpdiv = last_block;
5278 (void) do_div(tmpdiv, stripesize);
5279 r5or6_last_row = r0_last_row = tmpdiv;
5280 #else
5281 first_row = r5or6_first_row = r0_first_row =
5282 first_block / stripesize;
5283 r5or6_last_row = r0_last_row = last_block / stripesize;
5284 #endif
5285 if (r5or6_first_row != r5or6_last_row)
5286 return IO_ACCEL_INELIGIBLE;
5287
5288
5289 /* Verify request is in a single column */
5290 #if BITS_PER_LONG == 32
5291 tmpdiv = first_block;
5292 first_row_offset = do_div(tmpdiv, stripesize);
5293 tmpdiv = first_row_offset;
5294 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5295 r5or6_first_row_offset = first_row_offset;
5296 tmpdiv = last_block;
5297 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5298 tmpdiv = r5or6_last_row_offset;
5299 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5300 tmpdiv = r5or6_first_row_offset;
5301 (void) do_div(tmpdiv, map->strip_size);
5302 first_column = r5or6_first_column = tmpdiv;
5303 tmpdiv = r5or6_last_row_offset;
5304 (void) do_div(tmpdiv, map->strip_size);
5305 r5or6_last_column = tmpdiv;
5306 #else
5307 first_row_offset = r5or6_first_row_offset =
5308 (u32)((first_block % stripesize) %
5309 r5or6_blocks_per_row);
5310
5311 r5or6_last_row_offset =
5312 (u32)((last_block % stripesize) %
5313 r5or6_blocks_per_row);
5314
5315 first_column = r5or6_first_column =
5316 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5317 r5or6_last_column =
5318 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5319 #endif
5320 if (r5or6_first_column != r5or6_last_column)
5321 return IO_ACCEL_INELIGIBLE;
5322
5323 /* Request is eligible */
5324 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5325 le16_to_cpu(map->row_cnt);
5326
5327 map_index = (first_group *
5328 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5329 (map_row * total_disks_per_row) + first_column;
5330 break;
5331 default:
5332 return IO_ACCEL_INELIGIBLE;
5333 }
5334
5335 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5336 return IO_ACCEL_INELIGIBLE;
5337
5338 c->phys_disk = dev->phys_disk[map_index];
5339 if (!c->phys_disk)
5340 return IO_ACCEL_INELIGIBLE;
5341
5342 disk_handle = dd[map_index].ioaccel_handle;
5343 disk_block = le64_to_cpu(map->disk_starting_blk) +
5344 first_row * le16_to_cpu(map->strip_size) +
5345 (first_row_offset - first_column *
5346 le16_to_cpu(map->strip_size));
5347 disk_block_cnt = block_cnt;
5348
5349 /* handle differing logical/physical block sizes */
5350 if (map->phys_blk_shift) {
5351 disk_block <<= map->phys_blk_shift;
5352 disk_block_cnt <<= map->phys_blk_shift;
5353 }
5354 BUG_ON(disk_block_cnt > 0xffff);
5355
5356 /* build the new CDB for the physical disk I/O */
5357 if (disk_block > 0xffffffff) {
5358 cdb[0] = is_write ? WRITE_16 : READ_16;
5359 cdb[1] = 0;
5360 cdb[2] = (u8) (disk_block >> 56);
5361 cdb[3] = (u8) (disk_block >> 48);
5362 cdb[4] = (u8) (disk_block >> 40);
5363 cdb[5] = (u8) (disk_block >> 32);
5364 cdb[6] = (u8) (disk_block >> 24);
5365 cdb[7] = (u8) (disk_block >> 16);
5366 cdb[8] = (u8) (disk_block >> 8);
5367 cdb[9] = (u8) (disk_block);
5368 cdb[10] = (u8) (disk_block_cnt >> 24);
5369 cdb[11] = (u8) (disk_block_cnt >> 16);
5370 cdb[12] = (u8) (disk_block_cnt >> 8);
5371 cdb[13] = (u8) (disk_block_cnt);
5372 cdb[14] = 0;
5373 cdb[15] = 0;
5374 cdb_len = 16;
5375 } else {
5376 cdb[0] = is_write ? WRITE_10 : READ_10;
5377 cdb[1] = 0;
5378 cdb[2] = (u8) (disk_block >> 24);
5379 cdb[3] = (u8) (disk_block >> 16);
5380 cdb[4] = (u8) (disk_block >> 8);
5381 cdb[5] = (u8) (disk_block);
5382 cdb[6] = 0;
5383 cdb[7] = (u8) (disk_block_cnt >> 8);
5384 cdb[8] = (u8) (disk_block_cnt);
5385 cdb[9] = 0;
5386 cdb_len = 10;
5387 }
5388 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5389 dev->scsi3addr,
5390 dev->phys_disk[map_index]);
5391 }
5392
5393 /*
5394 * Submit commands down the "normal" RAID stack path
5395 * All callers to hpsa_ciss_submit must check lockup_detected
5396 * beforehand, before (opt.) and after calling cmd_alloc
5397 */
5398 static int hpsa_ciss_submit(struct ctlr_info *h,
5399 struct CommandList *c, struct scsi_cmnd *cmd,
5400 unsigned char scsi3addr[])
5401 {
5402 cmd->host_scribble = (unsigned char *) c;
5403 c->cmd_type = CMD_SCSI;
5404 c->scsi_cmd = cmd;
5405 c->Header.ReplyQueue = 0; /* unused in simple mode */
5406 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5407 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5408
5409 /* Fill in the request block... */
5410
5411 c->Request.Timeout = 0;
5412 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5413 c->Request.CDBLen = cmd->cmd_len;
5414 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5415 switch (cmd->sc_data_direction) {
5416 case DMA_TO_DEVICE:
5417 c->Request.type_attr_dir =
5418 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5419 break;
5420 case DMA_FROM_DEVICE:
5421 c->Request.type_attr_dir =
5422 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5423 break;
5424 case DMA_NONE:
5425 c->Request.type_attr_dir =
5426 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5427 break;
5428 case DMA_BIDIRECTIONAL:
5429 /* This can happen if a buggy application does a scsi passthru
5430 * and sets both inlen and outlen to non-zero. ( see
5431 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5432 */
5433
5434 c->Request.type_attr_dir =
5435 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5436 /* This is technically wrong, and hpsa controllers should
5437 * reject it with CMD_INVALID, which is the most correct
5438 * response, but non-fibre backends appear to let it
5439 * slide by, and give the same results as if this field
5440 * were set correctly. Either way is acceptable for
5441 * our purposes here.
5442 */
5443
5444 break;
5445
5446 default:
5447 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5448 cmd->sc_data_direction);
5449 BUG();
5450 break;
5451 }
5452
5453 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5454 hpsa_cmd_resolve_and_free(h, c);
5455 return SCSI_MLQUEUE_HOST_BUSY;
5456 }
5457 enqueue_cmd_and_start_io(h, c);
5458 /* the cmd'll come back via intr handler in complete_scsi_command() */
5459 return 0;
5460 }
5461
5462 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5463 struct CommandList *c)
5464 {
5465 dma_addr_t cmd_dma_handle, err_dma_handle;
5466
5467 /* Zero out all of commandlist except the last field, refcount */
5468 memset(c, 0, offsetof(struct CommandList, refcount));
5469 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5470 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5471 c->err_info = h->errinfo_pool + index;
5472 memset(c->err_info, 0, sizeof(*c->err_info));
5473 err_dma_handle = h->errinfo_pool_dhandle
5474 + index * sizeof(*c->err_info);
5475 c->cmdindex = index;
5476 c->busaddr = (u32) cmd_dma_handle;
5477 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5478 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5479 c->h = h;
5480 c->scsi_cmd = SCSI_CMD_IDLE;
5481 }
5482
5483 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5484 {
5485 int i;
5486
5487 for (i = 0; i < h->nr_cmds; i++) {
5488 struct CommandList *c = h->cmd_pool + i;
5489
5490 hpsa_cmd_init(h, i, c);
5491 atomic_set(&c->refcount, 0);
5492 }
5493 }
5494
5495 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5496 struct CommandList *c)
5497 {
5498 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5499
5500 BUG_ON(c->cmdindex != index);
5501
5502 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5503 memset(c->err_info, 0, sizeof(*c->err_info));
5504 c->busaddr = (u32) cmd_dma_handle;
5505 }
5506
5507 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5508 struct CommandList *c, struct scsi_cmnd *cmd,
5509 unsigned char *scsi3addr)
5510 {
5511 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5512 int rc = IO_ACCEL_INELIGIBLE;
5513
5514 if (!dev)
5515 return SCSI_MLQUEUE_HOST_BUSY;
5516
5517 cmd->host_scribble = (unsigned char *) c;
5518
5519 if (dev->offload_enabled) {
5520 hpsa_cmd_init(h, c->cmdindex, c);
5521 c->cmd_type = CMD_SCSI;
5522 c->scsi_cmd = cmd;
5523 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5524 if (rc < 0) /* scsi_dma_map failed. */
5525 rc = SCSI_MLQUEUE_HOST_BUSY;
5526 } else if (dev->hba_ioaccel_enabled) {
5527 hpsa_cmd_init(h, c->cmdindex, c);
5528 c->cmd_type = CMD_SCSI;
5529 c->scsi_cmd = cmd;
5530 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5531 if (rc < 0) /* scsi_dma_map failed. */
5532 rc = SCSI_MLQUEUE_HOST_BUSY;
5533 }
5534 return rc;
5535 }
5536
5537 static void hpsa_command_resubmit_worker(struct work_struct *work)
5538 {
5539 struct scsi_cmnd *cmd;
5540 struct hpsa_scsi_dev_t *dev;
5541 struct CommandList *c = container_of(work, struct CommandList, work);
5542
5543 cmd = c->scsi_cmd;
5544 dev = cmd->device->hostdata;
5545 if (!dev) {
5546 cmd->result = DID_NO_CONNECT << 16;
5547 return hpsa_cmd_free_and_done(c->h, c, cmd);
5548 }
5549 if (c->reset_pending)
5550 return hpsa_cmd_free_and_done(c->h, c, cmd);
5551 if (c->cmd_type == CMD_IOACCEL2) {
5552 struct ctlr_info *h = c->h;
5553 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5554 int rc;
5555
5556 if (c2->error_data.serv_response ==
5557 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5558 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5559 if (rc == 0)
5560 return;
5561 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5562 /*
5563 * If we get here, it means dma mapping failed.
5564 * Try again via scsi mid layer, which will
5565 * then get SCSI_MLQUEUE_HOST_BUSY.
5566 */
5567 cmd->result = DID_IMM_RETRY << 16;
5568 return hpsa_cmd_free_and_done(h, c, cmd);
5569 }
5570 /* else, fall thru and resubmit down CISS path */
5571 }
5572 }
5573 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5574 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5575 /*
5576 * If we get here, it means dma mapping failed. Try
5577 * again via scsi mid layer, which will then get
5578 * SCSI_MLQUEUE_HOST_BUSY.
5579 *
5580 * hpsa_ciss_submit will have already freed c
5581 * if it encountered a dma mapping failure.
5582 */
5583 cmd->result = DID_IMM_RETRY << 16;
5584 cmd->scsi_done(cmd);
5585 }
5586 }
5587
5588 /* Running in struct Scsi_Host->host_lock less mode */
5589 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5590 {
5591 struct ctlr_info *h;
5592 struct hpsa_scsi_dev_t *dev;
5593 unsigned char scsi3addr[8];
5594 struct CommandList *c;
5595 int rc = 0;
5596
5597 /* Get the ptr to our adapter structure out of cmd->host. */
5598 h = sdev_to_hba(cmd->device);
5599
5600 BUG_ON(cmd->request->tag < 0);
5601
5602 dev = cmd->device->hostdata;
5603 if (!dev) {
5604 cmd->result = DID_NO_CONNECT << 16;
5605 cmd->scsi_done(cmd);
5606 return 0;
5607 }
5608
5609 if (dev->removed) {
5610 cmd->result = DID_NO_CONNECT << 16;
5611 cmd->scsi_done(cmd);
5612 return 0;
5613 }
5614
5615 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5616
5617 if (unlikely(lockup_detected(h))) {
5618 cmd->result = DID_NO_CONNECT << 16;
5619 cmd->scsi_done(cmd);
5620 return 0;
5621 }
5622 c = cmd_tagged_alloc(h, cmd);
5623
5624 /*
5625 * This is necessary because the SML doesn't zero out this field during
5626 * error recovery.
5627 */
5628 cmd->result = 0;
5629
5630 /*
5631 * Call alternate submit routine for I/O accelerated commands.
5632 * Retries always go down the normal I/O path.
5633 */
5634 if (likely(cmd->retries == 0 &&
5635 !blk_rq_is_passthrough(cmd->request) &&
5636 h->acciopath_status)) {
5637 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5638 if (rc == 0)
5639 return 0;
5640 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5641 hpsa_cmd_resolve_and_free(h, c);
5642 return SCSI_MLQUEUE_HOST_BUSY;
5643 }
5644 }
5645 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5646 }
5647
5648 static void hpsa_scan_complete(struct ctlr_info *h)
5649 {
5650 unsigned long flags;
5651
5652 spin_lock_irqsave(&h->scan_lock, flags);
5653 h->scan_finished = 1;
5654 wake_up(&h->scan_wait_queue);
5655 spin_unlock_irqrestore(&h->scan_lock, flags);
5656 }
5657
5658 static void hpsa_scan_start(struct Scsi_Host *sh)
5659 {
5660 struct ctlr_info *h = shost_to_hba(sh);
5661 unsigned long flags;
5662
5663 /*
5664 * Don't let rescans be initiated on a controller known to be locked
5665 * up. If the controller locks up *during* a rescan, that thread is
5666 * probably hosed, but at least we can prevent new rescan threads from
5667 * piling up on a locked up controller.
5668 */
5669 if (unlikely(lockup_detected(h)))
5670 return hpsa_scan_complete(h);
5671
5672 /*
5673 * If a scan is already waiting to run, no need to add another
5674 */
5675 spin_lock_irqsave(&h->scan_lock, flags);
5676 if (h->scan_waiting) {
5677 spin_unlock_irqrestore(&h->scan_lock, flags);
5678 return;
5679 }
5680
5681 spin_unlock_irqrestore(&h->scan_lock, flags);
5682
5683 /* wait until any scan already in progress is finished. */
5684 while (1) {
5685 spin_lock_irqsave(&h->scan_lock, flags);
5686 if (h->scan_finished)
5687 break;
5688 h->scan_waiting = 1;
5689 spin_unlock_irqrestore(&h->scan_lock, flags);
5690 wait_event(h->scan_wait_queue, h->scan_finished);
5691 /* Note: We don't need to worry about a race between this
5692 * thread and driver unload because the midlayer will
5693 * have incremented the reference count, so unload won't
5694 * happen if we're in here.
5695 */
5696 }
5697 h->scan_finished = 0; /* mark scan as in progress */
5698 h->scan_waiting = 0;
5699 spin_unlock_irqrestore(&h->scan_lock, flags);
5700
5701 if (unlikely(lockup_detected(h)))
5702 return hpsa_scan_complete(h);
5703
5704 /*
5705 * Do the scan after a reset completion
5706 */
5707 spin_lock_irqsave(&h->reset_lock, flags);
5708 if (h->reset_in_progress) {
5709 h->drv_req_rescan = 1;
5710 spin_unlock_irqrestore(&h->reset_lock, flags);
5711 hpsa_scan_complete(h);
5712 return;
5713 }
5714 spin_unlock_irqrestore(&h->reset_lock, flags);
5715
5716 hpsa_update_scsi_devices(h);
5717
5718 hpsa_scan_complete(h);
5719 }
5720
5721 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5722 {
5723 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5724
5725 if (!logical_drive)
5726 return -ENODEV;
5727
5728 if (qdepth < 1)
5729 qdepth = 1;
5730 else if (qdepth > logical_drive->queue_depth)
5731 qdepth = logical_drive->queue_depth;
5732
5733 return scsi_change_queue_depth(sdev, qdepth);
5734 }
5735
5736 static int hpsa_scan_finished(struct Scsi_Host *sh,
5737 unsigned long elapsed_time)
5738 {
5739 struct ctlr_info *h = shost_to_hba(sh);
5740 unsigned long flags;
5741 int finished;
5742
5743 spin_lock_irqsave(&h->scan_lock, flags);
5744 finished = h->scan_finished;
5745 spin_unlock_irqrestore(&h->scan_lock, flags);
5746 return finished;
5747 }
5748
5749 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5750 {
5751 struct Scsi_Host *sh;
5752
5753 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5754 if (sh == NULL) {
5755 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5756 return -ENOMEM;
5757 }
5758
5759 sh->io_port = 0;
5760 sh->n_io_port = 0;
5761 sh->this_id = -1;
5762 sh->max_channel = 3;
5763 sh->max_cmd_len = MAX_COMMAND_SIZE;
5764 sh->max_lun = HPSA_MAX_LUN;
5765 sh->max_id = HPSA_MAX_LUN;
5766 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5767 sh->cmd_per_lun = sh->can_queue;
5768 sh->sg_tablesize = h->maxsgentries;
5769 sh->transportt = hpsa_sas_transport_template;
5770 sh->hostdata[0] = (unsigned long) h;
5771 sh->irq = pci_irq_vector(h->pdev, 0);
5772 sh->unique_id = sh->irq;
5773
5774 h->scsi_host = sh;
5775 return 0;
5776 }
5777
5778 static int hpsa_scsi_add_host(struct ctlr_info *h)
5779 {
5780 int rv;
5781
5782 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5783 if (rv) {
5784 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5785 return rv;
5786 }
5787 scsi_scan_host(h->scsi_host);
5788 return 0;
5789 }
5790
5791 /*
5792 * The block layer has already gone to the trouble of picking out a unique,
5793 * small-integer tag for this request. We use an offset from that value as
5794 * an index to select our command block. (The offset allows us to reserve the
5795 * low-numbered entries for our own uses.)
5796 */
5797 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5798 {
5799 int idx = scmd->request->tag;
5800
5801 if (idx < 0)
5802 return idx;
5803
5804 /* Offset to leave space for internal cmds. */
5805 return idx += HPSA_NRESERVED_CMDS;
5806 }
5807
5808 /*
5809 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5810 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5811 */
5812 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5813 struct CommandList *c, unsigned char lunaddr[],
5814 int reply_queue)
5815 {
5816 int rc;
5817
5818 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5819 (void) fill_cmd(c, TEST_UNIT_READY, h,
5820 NULL, 0, 0, lunaddr, TYPE_CMD);
5821 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5822 if (rc)
5823 return rc;
5824 /* no unmap needed here because no data xfer. */
5825
5826 /* Check if the unit is already ready. */
5827 if (c->err_info->CommandStatus == CMD_SUCCESS)
5828 return 0;
5829
5830 /*
5831 * The first command sent after reset will receive "unit attention" to
5832 * indicate that the LUN has been reset...this is actually what we're
5833 * looking for (but, success is good too).
5834 */
5835 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5836 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5837 (c->err_info->SenseInfo[2] == NO_SENSE ||
5838 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5839 return 0;
5840
5841 return 1;
5842 }
5843
5844 /*
5845 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5846 * returns zero when the unit is ready, and non-zero when giving up.
5847 */
5848 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5849 struct CommandList *c,
5850 unsigned char lunaddr[], int reply_queue)
5851 {
5852 int rc;
5853 int count = 0;
5854 int waittime = 1; /* seconds */
5855
5856 /* Send test unit ready until device ready, or give up. */
5857 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5858
5859 /*
5860 * Wait for a bit. do this first, because if we send
5861 * the TUR right away, the reset will just abort it.
5862 */
5863 msleep(1000 * waittime);
5864
5865 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5866 if (!rc)
5867 break;
5868
5869 /* Increase wait time with each try, up to a point. */
5870 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5871 waittime *= 2;
5872
5873 dev_warn(&h->pdev->dev,
5874 "waiting %d secs for device to become ready.\n",
5875 waittime);
5876 }
5877
5878 return rc;
5879 }
5880
5881 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5882 unsigned char lunaddr[],
5883 int reply_queue)
5884 {
5885 int first_queue;
5886 int last_queue;
5887 int rq;
5888 int rc = 0;
5889 struct CommandList *c;
5890
5891 c = cmd_alloc(h);
5892
5893 /*
5894 * If no specific reply queue was requested, then send the TUR
5895 * repeatedly, requesting a reply on each reply queue; otherwise execute
5896 * the loop exactly once using only the specified queue.
5897 */
5898 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5899 first_queue = 0;
5900 last_queue = h->nreply_queues - 1;
5901 } else {
5902 first_queue = reply_queue;
5903 last_queue = reply_queue;
5904 }
5905
5906 for (rq = first_queue; rq <= last_queue; rq++) {
5907 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5908 if (rc)
5909 break;
5910 }
5911
5912 if (rc)
5913 dev_warn(&h->pdev->dev, "giving up on device.\n");
5914 else
5915 dev_warn(&h->pdev->dev, "device is ready.\n");
5916
5917 cmd_free(h, c);
5918 return rc;
5919 }
5920
5921 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5922 * complaining. Doing a host- or bus-reset can't do anything good here.
5923 */
5924 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5925 {
5926 int rc = SUCCESS;
5927 struct ctlr_info *h;
5928 struct hpsa_scsi_dev_t *dev;
5929 u8 reset_type;
5930 char msg[48];
5931 unsigned long flags;
5932
5933 /* find the controller to which the command to be aborted was sent */
5934 h = sdev_to_hba(scsicmd->device);
5935 if (h == NULL) /* paranoia */
5936 return FAILED;
5937
5938 spin_lock_irqsave(&h->reset_lock, flags);
5939 h->reset_in_progress = 1;
5940 spin_unlock_irqrestore(&h->reset_lock, flags);
5941
5942 if (lockup_detected(h)) {
5943 rc = FAILED;
5944 goto return_reset_status;
5945 }
5946
5947 dev = scsicmd->device->hostdata;
5948 if (!dev) {
5949 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5950 rc = FAILED;
5951 goto return_reset_status;
5952 }
5953
5954 if (dev->devtype == TYPE_ENCLOSURE) {
5955 rc = SUCCESS;
5956 goto return_reset_status;
5957 }
5958
5959 /* if controller locked up, we can guarantee command won't complete */
5960 if (lockup_detected(h)) {
5961 snprintf(msg, sizeof(msg),
5962 "cmd %d RESET FAILED, lockup detected",
5963 hpsa_get_cmd_index(scsicmd));
5964 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5965 rc = FAILED;
5966 goto return_reset_status;
5967 }
5968
5969 /* this reset request might be the result of a lockup; check */
5970 if (detect_controller_lockup(h)) {
5971 snprintf(msg, sizeof(msg),
5972 "cmd %d RESET FAILED, new lockup detected",
5973 hpsa_get_cmd_index(scsicmd));
5974 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5975 rc = FAILED;
5976 goto return_reset_status;
5977 }
5978
5979 /* Do not attempt on controller */
5980 if (is_hba_lunid(dev->scsi3addr)) {
5981 rc = SUCCESS;
5982 goto return_reset_status;
5983 }
5984
5985 if (is_logical_dev_addr_mode(dev->scsi3addr))
5986 reset_type = HPSA_DEVICE_RESET_MSG;
5987 else
5988 reset_type = HPSA_PHYS_TARGET_RESET;
5989
5990 sprintf(msg, "resetting %s",
5991 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5992 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5993
5994 /* send a reset to the SCSI LUN which the command was sent to */
5995 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5996 DEFAULT_REPLY_QUEUE);
5997 if (rc == 0)
5998 rc = SUCCESS;
5999 else
6000 rc = FAILED;
6001
6002 sprintf(msg, "reset %s %s",
6003 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
6004 rc == SUCCESS ? "completed successfully" : "failed");
6005 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
6006
6007 return_reset_status:
6008 spin_lock_irqsave(&h->reset_lock, flags);
6009 h->reset_in_progress = 0;
6010 spin_unlock_irqrestore(&h->reset_lock, flags);
6011 return rc;
6012 }
6013
6014 /*
6015 * For operations with an associated SCSI command, a command block is allocated
6016 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6017 * block request tag as an index into a table of entries. cmd_tagged_free() is
6018 * the complement, although cmd_free() may be called instead.
6019 */
6020 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6021 struct scsi_cmnd *scmd)
6022 {
6023 int idx = hpsa_get_cmd_index(scmd);
6024 struct CommandList *c = h->cmd_pool + idx;
6025
6026 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6027 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6028 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6029 /* The index value comes from the block layer, so if it's out of
6030 * bounds, it's probably not our bug.
6031 */
6032 BUG();
6033 }
6034
6035 atomic_inc(&c->refcount);
6036 if (unlikely(!hpsa_is_cmd_idle(c))) {
6037 /*
6038 * We expect that the SCSI layer will hand us a unique tag
6039 * value. Thus, there should never be a collision here between
6040 * two requests...because if the selected command isn't idle
6041 * then someone is going to be very disappointed.
6042 */
6043 dev_err(&h->pdev->dev,
6044 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6045 idx);
6046 if (c->scsi_cmd != NULL)
6047 scsi_print_command(c->scsi_cmd);
6048 scsi_print_command(scmd);
6049 }
6050
6051 hpsa_cmd_partial_init(h, idx, c);
6052 return c;
6053 }
6054
6055 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6056 {
6057 /*
6058 * Release our reference to the block. We don't need to do anything
6059 * else to free it, because it is accessed by index.
6060 */
6061 (void)atomic_dec(&c->refcount);
6062 }
6063
6064 /*
6065 * For operations that cannot sleep, a command block is allocated at init,
6066 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6067 * which ones are free or in use. Lock must be held when calling this.
6068 * cmd_free() is the complement.
6069 * This function never gives up and returns NULL. If it hangs,
6070 * another thread must call cmd_free() to free some tags.
6071 */
6072
6073 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6074 {
6075 struct CommandList *c;
6076 int refcount, i;
6077 int offset = 0;
6078
6079 /*
6080 * There is some *extremely* small but non-zero chance that that
6081 * multiple threads could get in here, and one thread could
6082 * be scanning through the list of bits looking for a free
6083 * one, but the free ones are always behind him, and other
6084 * threads sneak in behind him and eat them before he can
6085 * get to them, so that while there is always a free one, a
6086 * very unlucky thread might be starved anyway, never able to
6087 * beat the other threads. In reality, this happens so
6088 * infrequently as to be indistinguishable from never.
6089 *
6090 * Note that we start allocating commands before the SCSI host structure
6091 * is initialized. Since the search starts at bit zero, this
6092 * all works, since we have at least one command structure available;
6093 * however, it means that the structures with the low indexes have to be
6094 * reserved for driver-initiated requests, while requests from the block
6095 * layer will use the higher indexes.
6096 */
6097
6098 for (;;) {
6099 i = find_next_zero_bit(h->cmd_pool_bits,
6100 HPSA_NRESERVED_CMDS,
6101 offset);
6102 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6103 offset = 0;
6104 continue;
6105 }
6106 c = h->cmd_pool + i;
6107 refcount = atomic_inc_return(&c->refcount);
6108 if (unlikely(refcount > 1)) {
6109 cmd_free(h, c); /* already in use */
6110 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6111 continue;
6112 }
6113 set_bit(i & (BITS_PER_LONG - 1),
6114 h->cmd_pool_bits + (i / BITS_PER_LONG));
6115 break; /* it's ours now. */
6116 }
6117 hpsa_cmd_partial_init(h, i, c);
6118 return c;
6119 }
6120
6121 /*
6122 * This is the complementary operation to cmd_alloc(). Note, however, in some
6123 * corner cases it may also be used to free blocks allocated by
6124 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6125 * the clear-bit is harmless.
6126 */
6127 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6128 {
6129 if (atomic_dec_and_test(&c->refcount)) {
6130 int i;
6131
6132 i = c - h->cmd_pool;
6133 clear_bit(i & (BITS_PER_LONG - 1),
6134 h->cmd_pool_bits + (i / BITS_PER_LONG));
6135 }
6136 }
6137
6138 #ifdef CONFIG_COMPAT
6139
6140 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6141 void __user *arg)
6142 {
6143 IOCTL32_Command_struct __user *arg32 =
6144 (IOCTL32_Command_struct __user *) arg;
6145 IOCTL_Command_struct arg64;
6146 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6147 int err;
6148 u32 cp;
6149
6150 memset(&arg64, 0, sizeof(arg64));
6151 err = 0;
6152 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6153 sizeof(arg64.LUN_info));
6154 err |= copy_from_user(&arg64.Request, &arg32->Request,
6155 sizeof(arg64.Request));
6156 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6157 sizeof(arg64.error_info));
6158 err |= get_user(arg64.buf_size, &arg32->buf_size);
6159 err |= get_user(cp, &arg32->buf);
6160 arg64.buf = compat_ptr(cp);
6161 err |= copy_to_user(p, &arg64, sizeof(arg64));
6162
6163 if (err)
6164 return -EFAULT;
6165
6166 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6167 if (err)
6168 return err;
6169 err |= copy_in_user(&arg32->error_info, &p->error_info,
6170 sizeof(arg32->error_info));
6171 if (err)
6172 return -EFAULT;
6173 return err;
6174 }
6175
6176 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6177 int cmd, void __user *arg)
6178 {
6179 BIG_IOCTL32_Command_struct __user *arg32 =
6180 (BIG_IOCTL32_Command_struct __user *) arg;
6181 BIG_IOCTL_Command_struct arg64;
6182 BIG_IOCTL_Command_struct __user *p =
6183 compat_alloc_user_space(sizeof(arg64));
6184 int err;
6185 u32 cp;
6186
6187 memset(&arg64, 0, sizeof(arg64));
6188 err = 0;
6189 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6190 sizeof(arg64.LUN_info));
6191 err |= copy_from_user(&arg64.Request, &arg32->Request,
6192 sizeof(arg64.Request));
6193 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6194 sizeof(arg64.error_info));
6195 err |= get_user(arg64.buf_size, &arg32->buf_size);
6196 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6197 err |= get_user(cp, &arg32->buf);
6198 arg64.buf = compat_ptr(cp);
6199 err |= copy_to_user(p, &arg64, sizeof(arg64));
6200
6201 if (err)
6202 return -EFAULT;
6203
6204 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6205 if (err)
6206 return err;
6207 err |= copy_in_user(&arg32->error_info, &p->error_info,
6208 sizeof(arg32->error_info));
6209 if (err)
6210 return -EFAULT;
6211 return err;
6212 }
6213
6214 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6215 {
6216 switch (cmd) {
6217 case CCISS_GETPCIINFO:
6218 case CCISS_GETINTINFO:
6219 case CCISS_SETINTINFO:
6220 case CCISS_GETNODENAME:
6221 case CCISS_SETNODENAME:
6222 case CCISS_GETHEARTBEAT:
6223 case CCISS_GETBUSTYPES:
6224 case CCISS_GETFIRMVER:
6225 case CCISS_GETDRIVVER:
6226 case CCISS_REVALIDVOLS:
6227 case CCISS_DEREGDISK:
6228 case CCISS_REGNEWDISK:
6229 case CCISS_REGNEWD:
6230 case CCISS_RESCANDISK:
6231 case CCISS_GETLUNINFO:
6232 return hpsa_ioctl(dev, cmd, arg);
6233
6234 case CCISS_PASSTHRU32:
6235 return hpsa_ioctl32_passthru(dev, cmd, arg);
6236 case CCISS_BIG_PASSTHRU32:
6237 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6238
6239 default:
6240 return -ENOIOCTLCMD;
6241 }
6242 }
6243 #endif
6244
6245 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6246 {
6247 struct hpsa_pci_info pciinfo;
6248
6249 if (!argp)
6250 return -EINVAL;
6251 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6252 pciinfo.bus = h->pdev->bus->number;
6253 pciinfo.dev_fn = h->pdev->devfn;
6254 pciinfo.board_id = h->board_id;
6255 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6256 return -EFAULT;
6257 return 0;
6258 }
6259
6260 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6261 {
6262 DriverVer_type DriverVer;
6263 unsigned char vmaj, vmin, vsubmin;
6264 int rc;
6265
6266 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6267 &vmaj, &vmin, &vsubmin);
6268 if (rc != 3) {
6269 dev_info(&h->pdev->dev, "driver version string '%s' "
6270 "unrecognized.", HPSA_DRIVER_VERSION);
6271 vmaj = 0;
6272 vmin = 0;
6273 vsubmin = 0;
6274 }
6275 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6276 if (!argp)
6277 return -EINVAL;
6278 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6279 return -EFAULT;
6280 return 0;
6281 }
6282
6283 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6284 {
6285 IOCTL_Command_struct iocommand;
6286 struct CommandList *c;
6287 char *buff = NULL;
6288 u64 temp64;
6289 int rc = 0;
6290
6291 if (!argp)
6292 return -EINVAL;
6293 if (!capable(CAP_SYS_RAWIO))
6294 return -EPERM;
6295 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6296 return -EFAULT;
6297 if ((iocommand.buf_size < 1) &&
6298 (iocommand.Request.Type.Direction != XFER_NONE)) {
6299 return -EINVAL;
6300 }
6301 if (iocommand.buf_size > 0) {
6302 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6303 if (buff == NULL)
6304 return -ENOMEM;
6305 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6306 /* Copy the data into the buffer we created */
6307 if (copy_from_user(buff, iocommand.buf,
6308 iocommand.buf_size)) {
6309 rc = -EFAULT;
6310 goto out_kfree;
6311 }
6312 } else {
6313 memset(buff, 0, iocommand.buf_size);
6314 }
6315 }
6316 c = cmd_alloc(h);
6317
6318 /* Fill in the command type */
6319 c->cmd_type = CMD_IOCTL_PEND;
6320 c->scsi_cmd = SCSI_CMD_BUSY;
6321 /* Fill in Command Header */
6322 c->Header.ReplyQueue = 0; /* unused in simple mode */
6323 if (iocommand.buf_size > 0) { /* buffer to fill */
6324 c->Header.SGList = 1;
6325 c->Header.SGTotal = cpu_to_le16(1);
6326 } else { /* no buffers to fill */
6327 c->Header.SGList = 0;
6328 c->Header.SGTotal = cpu_to_le16(0);
6329 }
6330 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6331
6332 /* Fill in Request block */
6333 memcpy(&c->Request, &iocommand.Request,
6334 sizeof(c->Request));
6335
6336 /* Fill in the scatter gather information */
6337 if (iocommand.buf_size > 0) {
6338 temp64 = pci_map_single(h->pdev, buff,
6339 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6340 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6341 c->SG[0].Addr = cpu_to_le64(0);
6342 c->SG[0].Len = cpu_to_le32(0);
6343 rc = -ENOMEM;
6344 goto out;
6345 }
6346 c->SG[0].Addr = cpu_to_le64(temp64);
6347 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6348 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6349 }
6350 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6351 NO_TIMEOUT);
6352 if (iocommand.buf_size > 0)
6353 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6354 check_ioctl_unit_attention(h, c);
6355 if (rc) {
6356 rc = -EIO;
6357 goto out;
6358 }
6359
6360 /* Copy the error information out */
6361 memcpy(&iocommand.error_info, c->err_info,
6362 sizeof(iocommand.error_info));
6363 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6364 rc = -EFAULT;
6365 goto out;
6366 }
6367 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6368 iocommand.buf_size > 0) {
6369 /* Copy the data out of the buffer we created */
6370 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6371 rc = -EFAULT;
6372 goto out;
6373 }
6374 }
6375 out:
6376 cmd_free(h, c);
6377 out_kfree:
6378 kfree(buff);
6379 return rc;
6380 }
6381
6382 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6383 {
6384 BIG_IOCTL_Command_struct *ioc;
6385 struct CommandList *c;
6386 unsigned char **buff = NULL;
6387 int *buff_size = NULL;
6388 u64 temp64;
6389 BYTE sg_used = 0;
6390 int status = 0;
6391 u32 left;
6392 u32 sz;
6393 BYTE __user *data_ptr;
6394
6395 if (!argp)
6396 return -EINVAL;
6397 if (!capable(CAP_SYS_RAWIO))
6398 return -EPERM;
6399 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6400 if (!ioc) {
6401 status = -ENOMEM;
6402 goto cleanup1;
6403 }
6404 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6405 status = -EFAULT;
6406 goto cleanup1;
6407 }
6408 if ((ioc->buf_size < 1) &&
6409 (ioc->Request.Type.Direction != XFER_NONE)) {
6410 status = -EINVAL;
6411 goto cleanup1;
6412 }
6413 /* Check kmalloc limits using all SGs */
6414 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6415 status = -EINVAL;
6416 goto cleanup1;
6417 }
6418 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6419 status = -EINVAL;
6420 goto cleanup1;
6421 }
6422 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL);
6423 if (!buff) {
6424 status = -ENOMEM;
6425 goto cleanup1;
6426 }
6427 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6428 if (!buff_size) {
6429 status = -ENOMEM;
6430 goto cleanup1;
6431 }
6432 left = ioc->buf_size;
6433 data_ptr = ioc->buf;
6434 while (left) {
6435 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6436 buff_size[sg_used] = sz;
6437 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6438 if (buff[sg_used] == NULL) {
6439 status = -ENOMEM;
6440 goto cleanup1;
6441 }
6442 if (ioc->Request.Type.Direction & XFER_WRITE) {
6443 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6444 status = -EFAULT;
6445 goto cleanup1;
6446 }
6447 } else
6448 memset(buff[sg_used], 0, sz);
6449 left -= sz;
6450 data_ptr += sz;
6451 sg_used++;
6452 }
6453 c = cmd_alloc(h);
6454
6455 c->cmd_type = CMD_IOCTL_PEND;
6456 c->scsi_cmd = SCSI_CMD_BUSY;
6457 c->Header.ReplyQueue = 0;
6458 c->Header.SGList = (u8) sg_used;
6459 c->Header.SGTotal = cpu_to_le16(sg_used);
6460 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6461 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6462 if (ioc->buf_size > 0) {
6463 int i;
6464 for (i = 0; i < sg_used; i++) {
6465 temp64 = pci_map_single(h->pdev, buff[i],
6466 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6467 if (dma_mapping_error(&h->pdev->dev,
6468 (dma_addr_t) temp64)) {
6469 c->SG[i].Addr = cpu_to_le64(0);
6470 c->SG[i].Len = cpu_to_le32(0);
6471 hpsa_pci_unmap(h->pdev, c, i,
6472 PCI_DMA_BIDIRECTIONAL);
6473 status = -ENOMEM;
6474 goto cleanup0;
6475 }
6476 c->SG[i].Addr = cpu_to_le64(temp64);
6477 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6478 c->SG[i].Ext = cpu_to_le32(0);
6479 }
6480 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6481 }
6482 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6483 NO_TIMEOUT);
6484 if (sg_used)
6485 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6486 check_ioctl_unit_attention(h, c);
6487 if (status) {
6488 status = -EIO;
6489 goto cleanup0;
6490 }
6491
6492 /* Copy the error information out */
6493 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6494 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6495 status = -EFAULT;
6496 goto cleanup0;
6497 }
6498 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6499 int i;
6500
6501 /* Copy the data out of the buffer we created */
6502 BYTE __user *ptr = ioc->buf;
6503 for (i = 0; i < sg_used; i++) {
6504 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6505 status = -EFAULT;
6506 goto cleanup0;
6507 }
6508 ptr += buff_size[i];
6509 }
6510 }
6511 status = 0;
6512 cleanup0:
6513 cmd_free(h, c);
6514 cleanup1:
6515 if (buff) {
6516 int i;
6517
6518 for (i = 0; i < sg_used; i++)
6519 kfree(buff[i]);
6520 kfree(buff);
6521 }
6522 kfree(buff_size);
6523 kfree(ioc);
6524 return status;
6525 }
6526
6527 static void check_ioctl_unit_attention(struct ctlr_info *h,
6528 struct CommandList *c)
6529 {
6530 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6531 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6532 (void) check_for_unit_attention(h, c);
6533 }
6534
6535 /*
6536 * ioctl
6537 */
6538 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6539 {
6540 struct ctlr_info *h;
6541 void __user *argp = (void __user *)arg;
6542 int rc;
6543
6544 h = sdev_to_hba(dev);
6545
6546 switch (cmd) {
6547 case CCISS_DEREGDISK:
6548 case CCISS_REGNEWDISK:
6549 case CCISS_REGNEWD:
6550 hpsa_scan_start(h->scsi_host);
6551 return 0;
6552 case CCISS_GETPCIINFO:
6553 return hpsa_getpciinfo_ioctl(h, argp);
6554 case CCISS_GETDRIVVER:
6555 return hpsa_getdrivver_ioctl(h, argp);
6556 case CCISS_PASSTHRU:
6557 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6558 return -EAGAIN;
6559 rc = hpsa_passthru_ioctl(h, argp);
6560 atomic_inc(&h->passthru_cmds_avail);
6561 return rc;
6562 case CCISS_BIG_PASSTHRU:
6563 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6564 return -EAGAIN;
6565 rc = hpsa_big_passthru_ioctl(h, argp);
6566 atomic_inc(&h->passthru_cmds_avail);
6567 return rc;
6568 default:
6569 return -ENOTTY;
6570 }
6571 }
6572
6573 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6574 u8 reset_type)
6575 {
6576 struct CommandList *c;
6577
6578 c = cmd_alloc(h);
6579
6580 /* fill_cmd can't fail here, no data buffer to map */
6581 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6582 RAID_CTLR_LUNID, TYPE_MSG);
6583 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6584 c->waiting = NULL;
6585 enqueue_cmd_and_start_io(h, c);
6586 /* Don't wait for completion, the reset won't complete. Don't free
6587 * the command either. This is the last command we will send before
6588 * re-initializing everything, so it doesn't matter and won't leak.
6589 */
6590 return;
6591 }
6592
6593 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6594 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6595 int cmd_type)
6596 {
6597 int pci_dir = XFER_NONE;
6598
6599 c->cmd_type = CMD_IOCTL_PEND;
6600 c->scsi_cmd = SCSI_CMD_BUSY;
6601 c->Header.ReplyQueue = 0;
6602 if (buff != NULL && size > 0) {
6603 c->Header.SGList = 1;
6604 c->Header.SGTotal = cpu_to_le16(1);
6605 } else {
6606 c->Header.SGList = 0;
6607 c->Header.SGTotal = cpu_to_le16(0);
6608 }
6609 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6610
6611 if (cmd_type == TYPE_CMD) {
6612 switch (cmd) {
6613 case HPSA_INQUIRY:
6614 /* are we trying to read a vital product page */
6615 if (page_code & VPD_PAGE) {
6616 c->Request.CDB[1] = 0x01;
6617 c->Request.CDB[2] = (page_code & 0xff);
6618 }
6619 c->Request.CDBLen = 6;
6620 c->Request.type_attr_dir =
6621 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6622 c->Request.Timeout = 0;
6623 c->Request.CDB[0] = HPSA_INQUIRY;
6624 c->Request.CDB[4] = size & 0xFF;
6625 break;
6626 case RECEIVE_DIAGNOSTIC:
6627 c->Request.CDBLen = 6;
6628 c->Request.type_attr_dir =
6629 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6630 c->Request.Timeout = 0;
6631 c->Request.CDB[0] = cmd;
6632 c->Request.CDB[1] = 1;
6633 c->Request.CDB[2] = 1;
6634 c->Request.CDB[3] = (size >> 8) & 0xFF;
6635 c->Request.CDB[4] = size & 0xFF;
6636 break;
6637 case HPSA_REPORT_LOG:
6638 case HPSA_REPORT_PHYS:
6639 /* Talking to controller so It's a physical command
6640 mode = 00 target = 0. Nothing to write.
6641 */
6642 c->Request.CDBLen = 12;
6643 c->Request.type_attr_dir =
6644 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6645 c->Request.Timeout = 0;
6646 c->Request.CDB[0] = cmd;
6647 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6648 c->Request.CDB[7] = (size >> 16) & 0xFF;
6649 c->Request.CDB[8] = (size >> 8) & 0xFF;
6650 c->Request.CDB[9] = size & 0xFF;
6651 break;
6652 case BMIC_SENSE_DIAG_OPTIONS:
6653 c->Request.CDBLen = 16;
6654 c->Request.type_attr_dir =
6655 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6656 c->Request.Timeout = 0;
6657 /* Spec says this should be BMIC_WRITE */
6658 c->Request.CDB[0] = BMIC_READ;
6659 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6660 break;
6661 case BMIC_SET_DIAG_OPTIONS:
6662 c->Request.CDBLen = 16;
6663 c->Request.type_attr_dir =
6664 TYPE_ATTR_DIR(cmd_type,
6665 ATTR_SIMPLE, XFER_WRITE);
6666 c->Request.Timeout = 0;
6667 c->Request.CDB[0] = BMIC_WRITE;
6668 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6669 break;
6670 case HPSA_CACHE_FLUSH:
6671 c->Request.CDBLen = 12;
6672 c->Request.type_attr_dir =
6673 TYPE_ATTR_DIR(cmd_type,
6674 ATTR_SIMPLE, XFER_WRITE);
6675 c->Request.Timeout = 0;
6676 c->Request.CDB[0] = BMIC_WRITE;
6677 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6678 c->Request.CDB[7] = (size >> 8) & 0xFF;
6679 c->Request.CDB[8] = size & 0xFF;
6680 break;
6681 case TEST_UNIT_READY:
6682 c->Request.CDBLen = 6;
6683 c->Request.type_attr_dir =
6684 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6685 c->Request.Timeout = 0;
6686 break;
6687 case HPSA_GET_RAID_MAP:
6688 c->Request.CDBLen = 12;
6689 c->Request.type_attr_dir =
6690 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6691 c->Request.Timeout = 0;
6692 c->Request.CDB[0] = HPSA_CISS_READ;
6693 c->Request.CDB[1] = cmd;
6694 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6695 c->Request.CDB[7] = (size >> 16) & 0xFF;
6696 c->Request.CDB[8] = (size >> 8) & 0xFF;
6697 c->Request.CDB[9] = size & 0xFF;
6698 break;
6699 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6700 c->Request.CDBLen = 10;
6701 c->Request.type_attr_dir =
6702 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6703 c->Request.Timeout = 0;
6704 c->Request.CDB[0] = BMIC_READ;
6705 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6706 c->Request.CDB[7] = (size >> 16) & 0xFF;
6707 c->Request.CDB[8] = (size >> 8) & 0xFF;
6708 break;
6709 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6710 c->Request.CDBLen = 10;
6711 c->Request.type_attr_dir =
6712 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6713 c->Request.Timeout = 0;
6714 c->Request.CDB[0] = BMIC_READ;
6715 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6716 c->Request.CDB[7] = (size >> 16) & 0xFF;
6717 c->Request.CDB[8] = (size >> 8) & 0XFF;
6718 break;
6719 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6720 c->Request.CDBLen = 10;
6721 c->Request.type_attr_dir =
6722 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6723 c->Request.Timeout = 0;
6724 c->Request.CDB[0] = BMIC_READ;
6725 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6726 c->Request.CDB[7] = (size >> 16) & 0xFF;
6727 c->Request.CDB[8] = (size >> 8) & 0XFF;
6728 break;
6729 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6730 c->Request.CDBLen = 10;
6731 c->Request.type_attr_dir =
6732 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6733 c->Request.Timeout = 0;
6734 c->Request.CDB[0] = BMIC_READ;
6735 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6736 c->Request.CDB[7] = (size >> 16) & 0xFF;
6737 c->Request.CDB[8] = (size >> 8) & 0XFF;
6738 break;
6739 case BMIC_IDENTIFY_CONTROLLER:
6740 c->Request.CDBLen = 10;
6741 c->Request.type_attr_dir =
6742 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6743 c->Request.Timeout = 0;
6744 c->Request.CDB[0] = BMIC_READ;
6745 c->Request.CDB[1] = 0;
6746 c->Request.CDB[2] = 0;
6747 c->Request.CDB[3] = 0;
6748 c->Request.CDB[4] = 0;
6749 c->Request.CDB[5] = 0;
6750 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6751 c->Request.CDB[7] = (size >> 16) & 0xFF;
6752 c->Request.CDB[8] = (size >> 8) & 0XFF;
6753 c->Request.CDB[9] = 0;
6754 break;
6755 default:
6756 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6757 BUG();
6758 }
6759 } else if (cmd_type == TYPE_MSG) {
6760 switch (cmd) {
6761
6762 case HPSA_PHYS_TARGET_RESET:
6763 c->Request.CDBLen = 16;
6764 c->Request.type_attr_dir =
6765 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6766 c->Request.Timeout = 0; /* Don't time out */
6767 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6768 c->Request.CDB[0] = HPSA_RESET;
6769 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6770 /* Physical target reset needs no control bytes 4-7*/
6771 c->Request.CDB[4] = 0x00;
6772 c->Request.CDB[5] = 0x00;
6773 c->Request.CDB[6] = 0x00;
6774 c->Request.CDB[7] = 0x00;
6775 break;
6776 case HPSA_DEVICE_RESET_MSG:
6777 c->Request.CDBLen = 16;
6778 c->Request.type_attr_dir =
6779 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6780 c->Request.Timeout = 0; /* Don't time out */
6781 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6782 c->Request.CDB[0] = cmd;
6783 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6784 /* If bytes 4-7 are zero, it means reset the */
6785 /* LunID device */
6786 c->Request.CDB[4] = 0x00;
6787 c->Request.CDB[5] = 0x00;
6788 c->Request.CDB[6] = 0x00;
6789 c->Request.CDB[7] = 0x00;
6790 break;
6791 default:
6792 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6793 cmd);
6794 BUG();
6795 }
6796 } else {
6797 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6798 BUG();
6799 }
6800
6801 switch (GET_DIR(c->Request.type_attr_dir)) {
6802 case XFER_READ:
6803 pci_dir = PCI_DMA_FROMDEVICE;
6804 break;
6805 case XFER_WRITE:
6806 pci_dir = PCI_DMA_TODEVICE;
6807 break;
6808 case XFER_NONE:
6809 pci_dir = PCI_DMA_NONE;
6810 break;
6811 default:
6812 pci_dir = PCI_DMA_BIDIRECTIONAL;
6813 }
6814 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6815 return -1;
6816 return 0;
6817 }
6818
6819 /*
6820 * Map (physical) PCI mem into (virtual) kernel space
6821 */
6822 static void __iomem *remap_pci_mem(ulong base, ulong size)
6823 {
6824 ulong page_base = ((ulong) base) & PAGE_MASK;
6825 ulong page_offs = ((ulong) base) - page_base;
6826 void __iomem *page_remapped = ioremap_nocache(page_base,
6827 page_offs + size);
6828
6829 return page_remapped ? (page_remapped + page_offs) : NULL;
6830 }
6831
6832 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6833 {
6834 return h->access.command_completed(h, q);
6835 }
6836
6837 static inline bool interrupt_pending(struct ctlr_info *h)
6838 {
6839 return h->access.intr_pending(h);
6840 }
6841
6842 static inline long interrupt_not_for_us(struct ctlr_info *h)
6843 {
6844 return (h->access.intr_pending(h) == 0) ||
6845 (h->interrupts_enabled == 0);
6846 }
6847
6848 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6849 u32 raw_tag)
6850 {
6851 if (unlikely(tag_index >= h->nr_cmds)) {
6852 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6853 return 1;
6854 }
6855 return 0;
6856 }
6857
6858 static inline void finish_cmd(struct CommandList *c)
6859 {
6860 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6861 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6862 || c->cmd_type == CMD_IOACCEL2))
6863 complete_scsi_command(c);
6864 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6865 complete(c->waiting);
6866 }
6867
6868 /* process completion of an indexed ("direct lookup") command */
6869 static inline void process_indexed_cmd(struct ctlr_info *h,
6870 u32 raw_tag)
6871 {
6872 u32 tag_index;
6873 struct CommandList *c;
6874
6875 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6876 if (!bad_tag(h, tag_index, raw_tag)) {
6877 c = h->cmd_pool + tag_index;
6878 finish_cmd(c);
6879 }
6880 }
6881
6882 /* Some controllers, like p400, will give us one interrupt
6883 * after a soft reset, even if we turned interrupts off.
6884 * Only need to check for this in the hpsa_xxx_discard_completions
6885 * functions.
6886 */
6887 static int ignore_bogus_interrupt(struct ctlr_info *h)
6888 {
6889 if (likely(!reset_devices))
6890 return 0;
6891
6892 if (likely(h->interrupts_enabled))
6893 return 0;
6894
6895 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6896 "(known firmware bug.) Ignoring.\n");
6897
6898 return 1;
6899 }
6900
6901 /*
6902 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6903 * Relies on (h-q[x] == x) being true for x such that
6904 * 0 <= x < MAX_REPLY_QUEUES.
6905 */
6906 static struct ctlr_info *queue_to_hba(u8 *queue)
6907 {
6908 return container_of((queue - *queue), struct ctlr_info, q[0]);
6909 }
6910
6911 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6912 {
6913 struct ctlr_info *h = queue_to_hba(queue);
6914 u8 q = *(u8 *) queue;
6915 u32 raw_tag;
6916
6917 if (ignore_bogus_interrupt(h))
6918 return IRQ_NONE;
6919
6920 if (interrupt_not_for_us(h))
6921 return IRQ_NONE;
6922 h->last_intr_timestamp = get_jiffies_64();
6923 while (interrupt_pending(h)) {
6924 raw_tag = get_next_completion(h, q);
6925 while (raw_tag != FIFO_EMPTY)
6926 raw_tag = next_command(h, q);
6927 }
6928 return IRQ_HANDLED;
6929 }
6930
6931 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6932 {
6933 struct ctlr_info *h = queue_to_hba(queue);
6934 u32 raw_tag;
6935 u8 q = *(u8 *) queue;
6936
6937 if (ignore_bogus_interrupt(h))
6938 return IRQ_NONE;
6939
6940 h->last_intr_timestamp = get_jiffies_64();
6941 raw_tag = get_next_completion(h, q);
6942 while (raw_tag != FIFO_EMPTY)
6943 raw_tag = next_command(h, q);
6944 return IRQ_HANDLED;
6945 }
6946
6947 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6948 {
6949 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6950 u32 raw_tag;
6951 u8 q = *(u8 *) queue;
6952
6953 if (interrupt_not_for_us(h))
6954 return IRQ_NONE;
6955 h->last_intr_timestamp = get_jiffies_64();
6956 while (interrupt_pending(h)) {
6957 raw_tag = get_next_completion(h, q);
6958 while (raw_tag != FIFO_EMPTY) {
6959 process_indexed_cmd(h, raw_tag);
6960 raw_tag = next_command(h, q);
6961 }
6962 }
6963 return IRQ_HANDLED;
6964 }
6965
6966 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6967 {
6968 struct ctlr_info *h = queue_to_hba(queue);
6969 u32 raw_tag;
6970 u8 q = *(u8 *) queue;
6971
6972 h->last_intr_timestamp = get_jiffies_64();
6973 raw_tag = get_next_completion(h, q);
6974 while (raw_tag != FIFO_EMPTY) {
6975 process_indexed_cmd(h, raw_tag);
6976 raw_tag = next_command(h, q);
6977 }
6978 return IRQ_HANDLED;
6979 }
6980
6981 /* Send a message CDB to the firmware. Careful, this only works
6982 * in simple mode, not performant mode due to the tag lookup.
6983 * We only ever use this immediately after a controller reset.
6984 */
6985 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6986 unsigned char type)
6987 {
6988 struct Command {
6989 struct CommandListHeader CommandHeader;
6990 struct RequestBlock Request;
6991 struct ErrDescriptor ErrorDescriptor;
6992 };
6993 struct Command *cmd;
6994 static const size_t cmd_sz = sizeof(*cmd) +
6995 sizeof(cmd->ErrorDescriptor);
6996 dma_addr_t paddr64;
6997 __le32 paddr32;
6998 u32 tag;
6999 void __iomem *vaddr;
7000 int i, err;
7001
7002 vaddr = pci_ioremap_bar(pdev, 0);
7003 if (vaddr == NULL)
7004 return -ENOMEM;
7005
7006 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7007 * CCISS commands, so they must be allocated from the lower 4GiB of
7008 * memory.
7009 */
7010 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7011 if (err) {
7012 iounmap(vaddr);
7013 return err;
7014 }
7015
7016 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7017 if (cmd == NULL) {
7018 iounmap(vaddr);
7019 return -ENOMEM;
7020 }
7021
7022 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7023 * although there's no guarantee, we assume that the address is at
7024 * least 4-byte aligned (most likely, it's page-aligned).
7025 */
7026 paddr32 = cpu_to_le32(paddr64);
7027
7028 cmd->CommandHeader.ReplyQueue = 0;
7029 cmd->CommandHeader.SGList = 0;
7030 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7031 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7032 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7033
7034 cmd->Request.CDBLen = 16;
7035 cmd->Request.type_attr_dir =
7036 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7037 cmd->Request.Timeout = 0; /* Don't time out */
7038 cmd->Request.CDB[0] = opcode;
7039 cmd->Request.CDB[1] = type;
7040 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7041 cmd->ErrorDescriptor.Addr =
7042 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7043 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7044
7045 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7046
7047 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7048 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7049 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7050 break;
7051 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7052 }
7053
7054 iounmap(vaddr);
7055
7056 /* we leak the DMA buffer here ... no choice since the controller could
7057 * still complete the command.
7058 */
7059 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7060 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7061 opcode, type);
7062 return -ETIMEDOUT;
7063 }
7064
7065 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7066
7067 if (tag & HPSA_ERROR_BIT) {
7068 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7069 opcode, type);
7070 return -EIO;
7071 }
7072
7073 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7074 opcode, type);
7075 return 0;
7076 }
7077
7078 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7079
7080 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7081 void __iomem *vaddr, u32 use_doorbell)
7082 {
7083
7084 if (use_doorbell) {
7085 /* For everything after the P600, the PCI power state method
7086 * of resetting the controller doesn't work, so we have this
7087 * other way using the doorbell register.
7088 */
7089 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7090 writel(use_doorbell, vaddr + SA5_DOORBELL);
7091
7092 /* PMC hardware guys tell us we need a 10 second delay after
7093 * doorbell reset and before any attempt to talk to the board
7094 * at all to ensure that this actually works and doesn't fall
7095 * over in some weird corner cases.
7096 */
7097 msleep(10000);
7098 } else { /* Try to do it the PCI power state way */
7099
7100 /* Quoting from the Open CISS Specification: "The Power
7101 * Management Control/Status Register (CSR) controls the power
7102 * state of the device. The normal operating state is D0,
7103 * CSR=00h. The software off state is D3, CSR=03h. To reset
7104 * the controller, place the interface device in D3 then to D0,
7105 * this causes a secondary PCI reset which will reset the
7106 * controller." */
7107
7108 int rc = 0;
7109
7110 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7111
7112 /* enter the D3hot power management state */
7113 rc = pci_set_power_state(pdev, PCI_D3hot);
7114 if (rc)
7115 return rc;
7116
7117 msleep(500);
7118
7119 /* enter the D0 power management state */
7120 rc = pci_set_power_state(pdev, PCI_D0);
7121 if (rc)
7122 return rc;
7123
7124 /*
7125 * The P600 requires a small delay when changing states.
7126 * Otherwise we may think the board did not reset and we bail.
7127 * This for kdump only and is particular to the P600.
7128 */
7129 msleep(500);
7130 }
7131 return 0;
7132 }
7133
7134 static void init_driver_version(char *driver_version, int len)
7135 {
7136 memset(driver_version, 0, len);
7137 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7138 }
7139
7140 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7141 {
7142 char *driver_version;
7143 int i, size = sizeof(cfgtable->driver_version);
7144
7145 driver_version = kmalloc(size, GFP_KERNEL);
7146 if (!driver_version)
7147 return -ENOMEM;
7148
7149 init_driver_version(driver_version, size);
7150 for (i = 0; i < size; i++)
7151 writeb(driver_version[i], &cfgtable->driver_version[i]);
7152 kfree(driver_version);
7153 return 0;
7154 }
7155
7156 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7157 unsigned char *driver_ver)
7158 {
7159 int i;
7160
7161 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7162 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7163 }
7164
7165 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7166 {
7167
7168 char *driver_ver, *old_driver_ver;
7169 int rc, size = sizeof(cfgtable->driver_version);
7170
7171 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7172 if (!old_driver_ver)
7173 return -ENOMEM;
7174 driver_ver = old_driver_ver + size;
7175
7176 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7177 * should have been changed, otherwise we know the reset failed.
7178 */
7179 init_driver_version(old_driver_ver, size);
7180 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7181 rc = !memcmp(driver_ver, old_driver_ver, size);
7182 kfree(old_driver_ver);
7183 return rc;
7184 }
7185 /* This does a hard reset of the controller using PCI power management
7186 * states or the using the doorbell register.
7187 */
7188 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7189 {
7190 u64 cfg_offset;
7191 u32 cfg_base_addr;
7192 u64 cfg_base_addr_index;
7193 void __iomem *vaddr;
7194 unsigned long paddr;
7195 u32 misc_fw_support;
7196 int rc;
7197 struct CfgTable __iomem *cfgtable;
7198 u32 use_doorbell;
7199 u16 command_register;
7200
7201 /* For controllers as old as the P600, this is very nearly
7202 * the same thing as
7203 *
7204 * pci_save_state(pci_dev);
7205 * pci_set_power_state(pci_dev, PCI_D3hot);
7206 * pci_set_power_state(pci_dev, PCI_D0);
7207 * pci_restore_state(pci_dev);
7208 *
7209 * For controllers newer than the P600, the pci power state
7210 * method of resetting doesn't work so we have another way
7211 * using the doorbell register.
7212 */
7213
7214 if (!ctlr_is_resettable(board_id)) {
7215 dev_warn(&pdev->dev, "Controller not resettable\n");
7216 return -ENODEV;
7217 }
7218
7219 /* if controller is soft- but not hard resettable... */
7220 if (!ctlr_is_hard_resettable(board_id))
7221 return -ENOTSUPP; /* try soft reset later. */
7222
7223 /* Save the PCI command register */
7224 pci_read_config_word(pdev, 4, &command_register);
7225 pci_save_state(pdev);
7226
7227 /* find the first memory BAR, so we can find the cfg table */
7228 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7229 if (rc)
7230 return rc;
7231 vaddr = remap_pci_mem(paddr, 0x250);
7232 if (!vaddr)
7233 return -ENOMEM;
7234
7235 /* find cfgtable in order to check if reset via doorbell is supported */
7236 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7237 &cfg_base_addr_index, &cfg_offset);
7238 if (rc)
7239 goto unmap_vaddr;
7240 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7241 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7242 if (!cfgtable) {
7243 rc = -ENOMEM;
7244 goto unmap_vaddr;
7245 }
7246 rc = write_driver_ver_to_cfgtable(cfgtable);
7247 if (rc)
7248 goto unmap_cfgtable;
7249
7250 /* If reset via doorbell register is supported, use that.
7251 * There are two such methods. Favor the newest method.
7252 */
7253 misc_fw_support = readl(&cfgtable->misc_fw_support);
7254 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7255 if (use_doorbell) {
7256 use_doorbell = DOORBELL_CTLR_RESET2;
7257 } else {
7258 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7259 if (use_doorbell) {
7260 dev_warn(&pdev->dev,
7261 "Soft reset not supported. Firmware update is required.\n");
7262 rc = -ENOTSUPP; /* try soft reset */
7263 goto unmap_cfgtable;
7264 }
7265 }
7266
7267 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7268 if (rc)
7269 goto unmap_cfgtable;
7270
7271 pci_restore_state(pdev);
7272 pci_write_config_word(pdev, 4, command_register);
7273
7274 /* Some devices (notably the HP Smart Array 5i Controller)
7275 need a little pause here */
7276 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7277
7278 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7279 if (rc) {
7280 dev_warn(&pdev->dev,
7281 "Failed waiting for board to become ready after hard reset\n");
7282 goto unmap_cfgtable;
7283 }
7284
7285 rc = controller_reset_failed(vaddr);
7286 if (rc < 0)
7287 goto unmap_cfgtable;
7288 if (rc) {
7289 dev_warn(&pdev->dev, "Unable to successfully reset "
7290 "controller. Will try soft reset.\n");
7291 rc = -ENOTSUPP;
7292 } else {
7293 dev_info(&pdev->dev, "board ready after hard reset.\n");
7294 }
7295
7296 unmap_cfgtable:
7297 iounmap(cfgtable);
7298
7299 unmap_vaddr:
7300 iounmap(vaddr);
7301 return rc;
7302 }
7303
7304 /*
7305 * We cannot read the structure directly, for portability we must use
7306 * the io functions.
7307 * This is for debug only.
7308 */
7309 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7310 {
7311 #ifdef HPSA_DEBUG
7312 int i;
7313 char temp_name[17];
7314
7315 dev_info(dev, "Controller Configuration information\n");
7316 dev_info(dev, "------------------------------------\n");
7317 for (i = 0; i < 4; i++)
7318 temp_name[i] = readb(&(tb->Signature[i]));
7319 temp_name[4] = '\0';
7320 dev_info(dev, " Signature = %s\n", temp_name);
7321 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7322 dev_info(dev, " Transport methods supported = 0x%x\n",
7323 readl(&(tb->TransportSupport)));
7324 dev_info(dev, " Transport methods active = 0x%x\n",
7325 readl(&(tb->TransportActive)));
7326 dev_info(dev, " Requested transport Method = 0x%x\n",
7327 readl(&(tb->HostWrite.TransportRequest)));
7328 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7329 readl(&(tb->HostWrite.CoalIntDelay)));
7330 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7331 readl(&(tb->HostWrite.CoalIntCount)));
7332 dev_info(dev, " Max outstanding commands = %d\n",
7333 readl(&(tb->CmdsOutMax)));
7334 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7335 for (i = 0; i < 16; i++)
7336 temp_name[i] = readb(&(tb->ServerName[i]));
7337 temp_name[16] = '\0';
7338 dev_info(dev, " Server Name = %s\n", temp_name);
7339 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7340 readl(&(tb->HeartBeat)));
7341 #endif /* HPSA_DEBUG */
7342 }
7343
7344 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7345 {
7346 int i, offset, mem_type, bar_type;
7347
7348 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7349 return 0;
7350 offset = 0;
7351 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7352 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7353 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7354 offset += 4;
7355 else {
7356 mem_type = pci_resource_flags(pdev, i) &
7357 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7358 switch (mem_type) {
7359 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7360 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7361 offset += 4; /* 32 bit */
7362 break;
7363 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7364 offset += 8;
7365 break;
7366 default: /* reserved in PCI 2.2 */
7367 dev_warn(&pdev->dev,
7368 "base address is invalid\n");
7369 return -1;
7370 break;
7371 }
7372 }
7373 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7374 return i + 1;
7375 }
7376 return -1;
7377 }
7378
7379 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7380 {
7381 pci_free_irq_vectors(h->pdev);
7382 h->msix_vectors = 0;
7383 }
7384
7385 static void hpsa_setup_reply_map(struct ctlr_info *h)
7386 {
7387 const struct cpumask *mask;
7388 unsigned int queue, cpu;
7389
7390 for (queue = 0; queue < h->msix_vectors; queue++) {
7391 mask = pci_irq_get_affinity(h->pdev, queue);
7392 if (!mask)
7393 goto fallback;
7394
7395 for_each_cpu(cpu, mask)
7396 h->reply_map[cpu] = queue;
7397 }
7398 return;
7399
7400 fallback:
7401 for_each_possible_cpu(cpu)
7402 h->reply_map[cpu] = 0;
7403 }
7404
7405 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7406 * controllers that are capable. If not, we use legacy INTx mode.
7407 */
7408 static int hpsa_interrupt_mode(struct ctlr_info *h)
7409 {
7410 unsigned int flags = PCI_IRQ_LEGACY;
7411 int ret;
7412
7413 /* Some boards advertise MSI but don't really support it */
7414 switch (h->board_id) {
7415 case 0x40700E11:
7416 case 0x40800E11:
7417 case 0x40820E11:
7418 case 0x40830E11:
7419 break;
7420 default:
7421 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7422 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7423 if (ret > 0) {
7424 h->msix_vectors = ret;
7425 return 0;
7426 }
7427
7428 flags |= PCI_IRQ_MSI;
7429 break;
7430 }
7431
7432 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7433 if (ret < 0)
7434 return ret;
7435 return 0;
7436 }
7437
7438 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7439 bool *legacy_board)
7440 {
7441 int i;
7442 u32 subsystem_vendor_id, subsystem_device_id;
7443
7444 subsystem_vendor_id = pdev->subsystem_vendor;
7445 subsystem_device_id = pdev->subsystem_device;
7446 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7447 subsystem_vendor_id;
7448
7449 if (legacy_board)
7450 *legacy_board = false;
7451 for (i = 0; i < ARRAY_SIZE(products); i++)
7452 if (*board_id == products[i].board_id) {
7453 if (products[i].access != &SA5A_access &&
7454 products[i].access != &SA5B_access)
7455 return i;
7456 dev_warn(&pdev->dev,
7457 "legacy board ID: 0x%08x\n",
7458 *board_id);
7459 if (legacy_board)
7460 *legacy_board = true;
7461 return i;
7462 }
7463
7464 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7465 if (legacy_board)
7466 *legacy_board = true;
7467 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7468 }
7469
7470 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7471 unsigned long *memory_bar)
7472 {
7473 int i;
7474
7475 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7476 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7477 /* addressing mode bits already removed */
7478 *memory_bar = pci_resource_start(pdev, i);
7479 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7480 *memory_bar);
7481 return 0;
7482 }
7483 dev_warn(&pdev->dev, "no memory BAR found\n");
7484 return -ENODEV;
7485 }
7486
7487 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7488 int wait_for_ready)
7489 {
7490 int i, iterations;
7491 u32 scratchpad;
7492 if (wait_for_ready)
7493 iterations = HPSA_BOARD_READY_ITERATIONS;
7494 else
7495 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7496
7497 for (i = 0; i < iterations; i++) {
7498 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7499 if (wait_for_ready) {
7500 if (scratchpad == HPSA_FIRMWARE_READY)
7501 return 0;
7502 } else {
7503 if (scratchpad != HPSA_FIRMWARE_READY)
7504 return 0;
7505 }
7506 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7507 }
7508 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7509 return -ENODEV;
7510 }
7511
7512 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7513 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7514 u64 *cfg_offset)
7515 {
7516 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7517 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7518 *cfg_base_addr &= (u32) 0x0000ffff;
7519 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7520 if (*cfg_base_addr_index == -1) {
7521 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7522 return -ENODEV;
7523 }
7524 return 0;
7525 }
7526
7527 static void hpsa_free_cfgtables(struct ctlr_info *h)
7528 {
7529 if (h->transtable) {
7530 iounmap(h->transtable);
7531 h->transtable = NULL;
7532 }
7533 if (h->cfgtable) {
7534 iounmap(h->cfgtable);
7535 h->cfgtable = NULL;
7536 }
7537 }
7538
7539 /* Find and map CISS config table and transfer table
7540 + * several items must be unmapped (freed) later
7541 + * */
7542 static int hpsa_find_cfgtables(struct ctlr_info *h)
7543 {
7544 u64 cfg_offset;
7545 u32 cfg_base_addr;
7546 u64 cfg_base_addr_index;
7547 u32 trans_offset;
7548 int rc;
7549
7550 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7551 &cfg_base_addr_index, &cfg_offset);
7552 if (rc)
7553 return rc;
7554 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7555 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7556 if (!h->cfgtable) {
7557 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7558 return -ENOMEM;
7559 }
7560 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7561 if (rc)
7562 return rc;
7563 /* Find performant mode table. */
7564 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7565 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7566 cfg_base_addr_index)+cfg_offset+trans_offset,
7567 sizeof(*h->transtable));
7568 if (!h->transtable) {
7569 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7570 hpsa_free_cfgtables(h);
7571 return -ENOMEM;
7572 }
7573 return 0;
7574 }
7575
7576 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7577 {
7578 #define MIN_MAX_COMMANDS 16
7579 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7580
7581 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7582
7583 /* Limit commands in memory limited kdump scenario. */
7584 if (reset_devices && h->max_commands > 32)
7585 h->max_commands = 32;
7586
7587 if (h->max_commands < MIN_MAX_COMMANDS) {
7588 dev_warn(&h->pdev->dev,
7589 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7590 h->max_commands,
7591 MIN_MAX_COMMANDS);
7592 h->max_commands = MIN_MAX_COMMANDS;
7593 }
7594 }
7595
7596 /* If the controller reports that the total max sg entries is greater than 512,
7597 * then we know that chained SG blocks work. (Original smart arrays did not
7598 * support chained SG blocks and would return zero for max sg entries.)
7599 */
7600 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7601 {
7602 return h->maxsgentries > 512;
7603 }
7604
7605 /* Interrogate the hardware for some limits:
7606 * max commands, max SG elements without chaining, and with chaining,
7607 * SG chain block size, etc.
7608 */
7609 static void hpsa_find_board_params(struct ctlr_info *h)
7610 {
7611 hpsa_get_max_perf_mode_cmds(h);
7612 h->nr_cmds = h->max_commands;
7613 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7614 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7615 if (hpsa_supports_chained_sg_blocks(h)) {
7616 /* Limit in-command s/g elements to 32 save dma'able memory. */
7617 h->max_cmd_sg_entries = 32;
7618 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7619 h->maxsgentries--; /* save one for chain pointer */
7620 } else {
7621 /*
7622 * Original smart arrays supported at most 31 s/g entries
7623 * embedded inline in the command (trying to use more
7624 * would lock up the controller)
7625 */
7626 h->max_cmd_sg_entries = 31;
7627 h->maxsgentries = 31; /* default to traditional values */
7628 h->chainsize = 0;
7629 }
7630
7631 /* Find out what task management functions are supported and cache */
7632 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7633 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7634 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7635 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7636 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7637 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7638 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7639 }
7640
7641 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7642 {
7643 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7644 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7645 return false;
7646 }
7647 return true;
7648 }
7649
7650 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7651 {
7652 u32 driver_support;
7653
7654 driver_support = readl(&(h->cfgtable->driver_support));
7655 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7656 #ifdef CONFIG_X86
7657 driver_support |= ENABLE_SCSI_PREFETCH;
7658 #endif
7659 driver_support |= ENABLE_UNIT_ATTN;
7660 writel(driver_support, &(h->cfgtable->driver_support));
7661 }
7662
7663 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7664 * in a prefetch beyond physical memory.
7665 */
7666 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7667 {
7668 u32 dma_prefetch;
7669
7670 if (h->board_id != 0x3225103C)
7671 return;
7672 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7673 dma_prefetch |= 0x8000;
7674 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7675 }
7676
7677 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7678 {
7679 int i;
7680 u32 doorbell_value;
7681 unsigned long flags;
7682 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7683 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7684 spin_lock_irqsave(&h->lock, flags);
7685 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7686 spin_unlock_irqrestore(&h->lock, flags);
7687 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7688 goto done;
7689 /* delay and try again */
7690 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7691 }
7692 return -ENODEV;
7693 done:
7694 return 0;
7695 }
7696
7697 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7698 {
7699 int i;
7700 u32 doorbell_value;
7701 unsigned long flags;
7702
7703 /* under certain very rare conditions, this can take awhile.
7704 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7705 * as we enter this code.)
7706 */
7707 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7708 if (h->remove_in_progress)
7709 goto done;
7710 spin_lock_irqsave(&h->lock, flags);
7711 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7712 spin_unlock_irqrestore(&h->lock, flags);
7713 if (!(doorbell_value & CFGTBL_ChangeReq))
7714 goto done;
7715 /* delay and try again */
7716 msleep(MODE_CHANGE_WAIT_INTERVAL);
7717 }
7718 return -ENODEV;
7719 done:
7720 return 0;
7721 }
7722
7723 /* return -ENODEV or other reason on error, 0 on success */
7724 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7725 {
7726 u32 trans_support;
7727
7728 trans_support = readl(&(h->cfgtable->TransportSupport));
7729 if (!(trans_support & SIMPLE_MODE))
7730 return -ENOTSUPP;
7731
7732 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7733
7734 /* Update the field, and then ring the doorbell */
7735 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7736 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7737 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7738 if (hpsa_wait_for_mode_change_ack(h))
7739 goto error;
7740 print_cfg_table(&h->pdev->dev, h->cfgtable);
7741 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7742 goto error;
7743 h->transMethod = CFGTBL_Trans_Simple;
7744 return 0;
7745 error:
7746 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7747 return -ENODEV;
7748 }
7749
7750 /* free items allocated or mapped by hpsa_pci_init */
7751 static void hpsa_free_pci_init(struct ctlr_info *h)
7752 {
7753 hpsa_free_cfgtables(h); /* pci_init 4 */
7754 iounmap(h->vaddr); /* pci_init 3 */
7755 h->vaddr = NULL;
7756 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7757 /*
7758 * call pci_disable_device before pci_release_regions per
7759 * Documentation/PCI/pci.txt
7760 */
7761 pci_disable_device(h->pdev); /* pci_init 1 */
7762 pci_release_regions(h->pdev); /* pci_init 2 */
7763 }
7764
7765 /* several items must be freed later */
7766 static int hpsa_pci_init(struct ctlr_info *h)
7767 {
7768 int prod_index, err;
7769 bool legacy_board;
7770
7771 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7772 if (prod_index < 0)
7773 return prod_index;
7774 h->product_name = products[prod_index].product_name;
7775 h->access = *(products[prod_index].access);
7776 h->legacy_board = legacy_board;
7777 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7778 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7779
7780 err = pci_enable_device(h->pdev);
7781 if (err) {
7782 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7783 pci_disable_device(h->pdev);
7784 return err;
7785 }
7786
7787 err = pci_request_regions(h->pdev, HPSA);
7788 if (err) {
7789 dev_err(&h->pdev->dev,
7790 "failed to obtain PCI resources\n");
7791 pci_disable_device(h->pdev);
7792 return err;
7793 }
7794
7795 pci_set_master(h->pdev);
7796
7797 err = hpsa_interrupt_mode(h);
7798 if (err)
7799 goto clean1;
7800
7801 /* setup mapping between CPU and reply queue */
7802 hpsa_setup_reply_map(h);
7803
7804 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7805 if (err)
7806 goto clean2; /* intmode+region, pci */
7807 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7808 if (!h->vaddr) {
7809 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7810 err = -ENOMEM;
7811 goto clean2; /* intmode+region, pci */
7812 }
7813 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7814 if (err)
7815 goto clean3; /* vaddr, intmode+region, pci */
7816 err = hpsa_find_cfgtables(h);
7817 if (err)
7818 goto clean3; /* vaddr, intmode+region, pci */
7819 hpsa_find_board_params(h);
7820
7821 if (!hpsa_CISS_signature_present(h)) {
7822 err = -ENODEV;
7823 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7824 }
7825 hpsa_set_driver_support_bits(h);
7826 hpsa_p600_dma_prefetch_quirk(h);
7827 err = hpsa_enter_simple_mode(h);
7828 if (err)
7829 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7830 return 0;
7831
7832 clean4: /* cfgtables, vaddr, intmode+region, pci */
7833 hpsa_free_cfgtables(h);
7834 clean3: /* vaddr, intmode+region, pci */
7835 iounmap(h->vaddr);
7836 h->vaddr = NULL;
7837 clean2: /* intmode+region, pci */
7838 hpsa_disable_interrupt_mode(h);
7839 clean1:
7840 /*
7841 * call pci_disable_device before pci_release_regions per
7842 * Documentation/PCI/pci.txt
7843 */
7844 pci_disable_device(h->pdev);
7845 pci_release_regions(h->pdev);
7846 return err;
7847 }
7848
7849 static void hpsa_hba_inquiry(struct ctlr_info *h)
7850 {
7851 int rc;
7852
7853 #define HBA_INQUIRY_BYTE_COUNT 64
7854 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7855 if (!h->hba_inquiry_data)
7856 return;
7857 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7858 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7859 if (rc != 0) {
7860 kfree(h->hba_inquiry_data);
7861 h->hba_inquiry_data = NULL;
7862 }
7863 }
7864
7865 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7866 {
7867 int rc, i;
7868 void __iomem *vaddr;
7869
7870 if (!reset_devices)
7871 return 0;
7872
7873 /* kdump kernel is loading, we don't know in which state is
7874 * the pci interface. The dev->enable_cnt is equal zero
7875 * so we call enable+disable, wait a while and switch it on.
7876 */
7877 rc = pci_enable_device(pdev);
7878 if (rc) {
7879 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7880 return -ENODEV;
7881 }
7882 pci_disable_device(pdev);
7883 msleep(260); /* a randomly chosen number */
7884 rc = pci_enable_device(pdev);
7885 if (rc) {
7886 dev_warn(&pdev->dev, "failed to enable device.\n");
7887 return -ENODEV;
7888 }
7889
7890 pci_set_master(pdev);
7891
7892 vaddr = pci_ioremap_bar(pdev, 0);
7893 if (vaddr == NULL) {
7894 rc = -ENOMEM;
7895 goto out_disable;
7896 }
7897 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7898 iounmap(vaddr);
7899
7900 /* Reset the controller with a PCI power-cycle or via doorbell */
7901 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7902
7903 /* -ENOTSUPP here means we cannot reset the controller
7904 * but it's already (and still) up and running in
7905 * "performant mode". Or, it might be 640x, which can't reset
7906 * due to concerns about shared bbwc between 6402/6404 pair.
7907 */
7908 if (rc)
7909 goto out_disable;
7910
7911 /* Now try to get the controller to respond to a no-op */
7912 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7913 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7914 if (hpsa_noop(pdev) == 0)
7915 break;
7916 else
7917 dev_warn(&pdev->dev, "no-op failed%s\n",
7918 (i < 11 ? "; re-trying" : ""));
7919 }
7920
7921 out_disable:
7922
7923 pci_disable_device(pdev);
7924 return rc;
7925 }
7926
7927 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7928 {
7929 kfree(h->cmd_pool_bits);
7930 h->cmd_pool_bits = NULL;
7931 if (h->cmd_pool) {
7932 pci_free_consistent(h->pdev,
7933 h->nr_cmds * sizeof(struct CommandList),
7934 h->cmd_pool,
7935 h->cmd_pool_dhandle);
7936 h->cmd_pool = NULL;
7937 h->cmd_pool_dhandle = 0;
7938 }
7939 if (h->errinfo_pool) {
7940 pci_free_consistent(h->pdev,
7941 h->nr_cmds * sizeof(struct ErrorInfo),
7942 h->errinfo_pool,
7943 h->errinfo_pool_dhandle);
7944 h->errinfo_pool = NULL;
7945 h->errinfo_pool_dhandle = 0;
7946 }
7947 }
7948
7949 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7950 {
7951 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG),
7952 sizeof(unsigned long),
7953 GFP_KERNEL);
7954 h->cmd_pool = pci_alloc_consistent(h->pdev,
7955 h->nr_cmds * sizeof(*h->cmd_pool),
7956 &(h->cmd_pool_dhandle));
7957 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7958 h->nr_cmds * sizeof(*h->errinfo_pool),
7959 &(h->errinfo_pool_dhandle));
7960 if ((h->cmd_pool_bits == NULL)
7961 || (h->cmd_pool == NULL)
7962 || (h->errinfo_pool == NULL)) {
7963 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7964 goto clean_up;
7965 }
7966 hpsa_preinitialize_commands(h);
7967 return 0;
7968 clean_up:
7969 hpsa_free_cmd_pool(h);
7970 return -ENOMEM;
7971 }
7972
7973 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7974 static void hpsa_free_irqs(struct ctlr_info *h)
7975 {
7976 int i;
7977
7978 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7979 /* Single reply queue, only one irq to free */
7980 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7981 h->q[h->intr_mode] = 0;
7982 return;
7983 }
7984
7985 for (i = 0; i < h->msix_vectors; i++) {
7986 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7987 h->q[i] = 0;
7988 }
7989 for (; i < MAX_REPLY_QUEUES; i++)
7990 h->q[i] = 0;
7991 }
7992
7993 /* returns 0 on success; cleans up and returns -Enn on error */
7994 static int hpsa_request_irqs(struct ctlr_info *h,
7995 irqreturn_t (*msixhandler)(int, void *),
7996 irqreturn_t (*intxhandler)(int, void *))
7997 {
7998 int rc, i;
7999
8000 /*
8001 * initialize h->q[x] = x so that interrupt handlers know which
8002 * queue to process.
8003 */
8004 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8005 h->q[i] = (u8) i;
8006
8007 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
8008 /* If performant mode and MSI-X, use multiple reply queues */
8009 for (i = 0; i < h->msix_vectors; i++) {
8010 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8011 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8012 0, h->intrname[i],
8013 &h->q[i]);
8014 if (rc) {
8015 int j;
8016
8017 dev_err(&h->pdev->dev,
8018 "failed to get irq %d for %s\n",
8019 pci_irq_vector(h->pdev, i), h->devname);
8020 for (j = 0; j < i; j++) {
8021 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8022 h->q[j] = 0;
8023 }
8024 for (; j < MAX_REPLY_QUEUES; j++)
8025 h->q[j] = 0;
8026 return rc;
8027 }
8028 }
8029 } else {
8030 /* Use single reply pool */
8031 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8032 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8033 h->msix_vectors ? "x" : "");
8034 rc = request_irq(pci_irq_vector(h->pdev, 0),
8035 msixhandler, 0,
8036 h->intrname[0],
8037 &h->q[h->intr_mode]);
8038 } else {
8039 sprintf(h->intrname[h->intr_mode],
8040 "%s-intx", h->devname);
8041 rc = request_irq(pci_irq_vector(h->pdev, 0),
8042 intxhandler, IRQF_SHARED,
8043 h->intrname[0],
8044 &h->q[h->intr_mode]);
8045 }
8046 }
8047 if (rc) {
8048 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8049 pci_irq_vector(h->pdev, 0), h->devname);
8050 hpsa_free_irqs(h);
8051 return -ENODEV;
8052 }
8053 return 0;
8054 }
8055
8056 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8057 {
8058 int rc;
8059 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8060
8061 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8062 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8063 if (rc) {
8064 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8065 return rc;
8066 }
8067
8068 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8069 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8070 if (rc) {
8071 dev_warn(&h->pdev->dev, "Board failed to become ready "
8072 "after soft reset.\n");
8073 return rc;
8074 }
8075
8076 return 0;
8077 }
8078
8079 static void hpsa_free_reply_queues(struct ctlr_info *h)
8080 {
8081 int i;
8082
8083 for (i = 0; i < h->nreply_queues; i++) {
8084 if (!h->reply_queue[i].head)
8085 continue;
8086 pci_free_consistent(h->pdev,
8087 h->reply_queue_size,
8088 h->reply_queue[i].head,
8089 h->reply_queue[i].busaddr);
8090 h->reply_queue[i].head = NULL;
8091 h->reply_queue[i].busaddr = 0;
8092 }
8093 h->reply_queue_size = 0;
8094 }
8095
8096 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8097 {
8098 hpsa_free_performant_mode(h); /* init_one 7 */
8099 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8100 hpsa_free_cmd_pool(h); /* init_one 5 */
8101 hpsa_free_irqs(h); /* init_one 4 */
8102 scsi_host_put(h->scsi_host); /* init_one 3 */
8103 h->scsi_host = NULL; /* init_one 3 */
8104 hpsa_free_pci_init(h); /* init_one 2_5 */
8105 free_percpu(h->lockup_detected); /* init_one 2 */
8106 h->lockup_detected = NULL; /* init_one 2 */
8107 if (h->resubmit_wq) {
8108 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8109 h->resubmit_wq = NULL;
8110 }
8111 if (h->rescan_ctlr_wq) {
8112 destroy_workqueue(h->rescan_ctlr_wq);
8113 h->rescan_ctlr_wq = NULL;
8114 }
8115 kfree(h); /* init_one 1 */
8116 }
8117
8118 /* Called when controller lockup detected. */
8119 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8120 {
8121 int i, refcount;
8122 struct CommandList *c;
8123 int failcount = 0;
8124
8125 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8126 for (i = 0; i < h->nr_cmds; i++) {
8127 c = h->cmd_pool + i;
8128 refcount = atomic_inc_return(&c->refcount);
8129 if (refcount > 1) {
8130 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8131 finish_cmd(c);
8132 atomic_dec(&h->commands_outstanding);
8133 failcount++;
8134 }
8135 cmd_free(h, c);
8136 }
8137 dev_warn(&h->pdev->dev,
8138 "failed %d commands in fail_all\n", failcount);
8139 }
8140
8141 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8142 {
8143 int cpu;
8144
8145 for_each_online_cpu(cpu) {
8146 u32 *lockup_detected;
8147 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8148 *lockup_detected = value;
8149 }
8150 wmb(); /* be sure the per-cpu variables are out to memory */
8151 }
8152
8153 static void controller_lockup_detected(struct ctlr_info *h)
8154 {
8155 unsigned long flags;
8156 u32 lockup_detected;
8157
8158 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8159 spin_lock_irqsave(&h->lock, flags);
8160 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8161 if (!lockup_detected) {
8162 /* no heartbeat, but controller gave us a zero. */
8163 dev_warn(&h->pdev->dev,
8164 "lockup detected after %d but scratchpad register is zero\n",
8165 h->heartbeat_sample_interval / HZ);
8166 lockup_detected = 0xffffffff;
8167 }
8168 set_lockup_detected_for_all_cpus(h, lockup_detected);
8169 spin_unlock_irqrestore(&h->lock, flags);
8170 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8171 lockup_detected, h->heartbeat_sample_interval / HZ);
8172 if (lockup_detected == 0xffff0000) {
8173 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8174 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8175 }
8176 pci_disable_device(h->pdev);
8177 fail_all_outstanding_cmds(h);
8178 }
8179
8180 static int detect_controller_lockup(struct ctlr_info *h)
8181 {
8182 u64 now;
8183 u32 heartbeat;
8184 unsigned long flags;
8185
8186 now = get_jiffies_64();
8187 /* If we've received an interrupt recently, we're ok. */
8188 if (time_after64(h->last_intr_timestamp +
8189 (h->heartbeat_sample_interval), now))
8190 return false;
8191
8192 /*
8193 * If we've already checked the heartbeat recently, we're ok.
8194 * This could happen if someone sends us a signal. We
8195 * otherwise don't care about signals in this thread.
8196 */
8197 if (time_after64(h->last_heartbeat_timestamp +
8198 (h->heartbeat_sample_interval), now))
8199 return false;
8200
8201 /* If heartbeat has not changed since we last looked, we're not ok. */
8202 spin_lock_irqsave(&h->lock, flags);
8203 heartbeat = readl(&h->cfgtable->HeartBeat);
8204 spin_unlock_irqrestore(&h->lock, flags);
8205 if (h->last_heartbeat == heartbeat) {
8206 controller_lockup_detected(h);
8207 return true;
8208 }
8209
8210 /* We're ok. */
8211 h->last_heartbeat = heartbeat;
8212 h->last_heartbeat_timestamp = now;
8213 return false;
8214 }
8215
8216 /*
8217 * Set ioaccel status for all ioaccel volumes.
8218 *
8219 * Called from monitor controller worker (hpsa_event_monitor_worker)
8220 *
8221 * A Volume (or Volumes that comprise an Array set may be undergoing a
8222 * transformation, so we will be turning off ioaccel for all volumes that
8223 * make up the Array.
8224 */
8225 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8226 {
8227 int rc;
8228 int i;
8229 u8 ioaccel_status;
8230 unsigned char *buf;
8231 struct hpsa_scsi_dev_t *device;
8232
8233 if (!h)
8234 return;
8235
8236 buf = kmalloc(64, GFP_KERNEL);
8237 if (!buf)
8238 return;
8239
8240 /*
8241 * Run through current device list used during I/O requests.
8242 */
8243 for (i = 0; i < h->ndevices; i++) {
8244 device = h->dev[i];
8245
8246 if (!device)
8247 continue;
8248 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8249 HPSA_VPD_LV_IOACCEL_STATUS))
8250 continue;
8251
8252 memset(buf, 0, 64);
8253
8254 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8255 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8256 buf, 64);
8257 if (rc != 0)
8258 continue;
8259
8260 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8261 device->offload_config =
8262 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8263 if (device->offload_config)
8264 device->offload_to_be_enabled =
8265 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8266
8267 /*
8268 * Immediately turn off ioaccel for any volume the
8269 * controller tells us to. Some of the reasons could be:
8270 * transformation - change to the LVs of an Array.
8271 * degraded volume - component failure
8272 *
8273 * If ioaccel is to be re-enabled, re-enable later during the
8274 * scan operation so the driver can get a fresh raidmap
8275 * before turning ioaccel back on.
8276 *
8277 */
8278 if (!device->offload_to_be_enabled)
8279 device->offload_enabled = 0;
8280 }
8281
8282 kfree(buf);
8283 }
8284
8285 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8286 {
8287 char *event_type;
8288
8289 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8290 return;
8291
8292 /* Ask the controller to clear the events we're handling. */
8293 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8294 | CFGTBL_Trans_io_accel2)) &&
8295 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8296 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8297
8298 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8299 event_type = "state change";
8300 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8301 event_type = "configuration change";
8302 /* Stop sending new RAID offload reqs via the IO accelerator */
8303 scsi_block_requests(h->scsi_host);
8304 hpsa_set_ioaccel_status(h);
8305 hpsa_drain_accel_commands(h);
8306 /* Set 'accelerator path config change' bit */
8307 dev_warn(&h->pdev->dev,
8308 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8309 h->events, event_type);
8310 writel(h->events, &(h->cfgtable->clear_event_notify));
8311 /* Set the "clear event notify field update" bit 6 */
8312 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8313 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8314 hpsa_wait_for_clear_event_notify_ack(h);
8315 scsi_unblock_requests(h->scsi_host);
8316 } else {
8317 /* Acknowledge controller notification events. */
8318 writel(h->events, &(h->cfgtable->clear_event_notify));
8319 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8320 hpsa_wait_for_clear_event_notify_ack(h);
8321 }
8322 return;
8323 }
8324
8325 /* Check a register on the controller to see if there are configuration
8326 * changes (added/changed/removed logical drives, etc.) which mean that
8327 * we should rescan the controller for devices.
8328 * Also check flag for driver-initiated rescan.
8329 */
8330 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8331 {
8332 if (h->drv_req_rescan) {
8333 h->drv_req_rescan = 0;
8334 return 1;
8335 }
8336
8337 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8338 return 0;
8339
8340 h->events = readl(&(h->cfgtable->event_notify));
8341 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8342 }
8343
8344 /*
8345 * Check if any of the offline devices have become ready
8346 */
8347 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8348 {
8349 unsigned long flags;
8350 struct offline_device_entry *d;
8351 struct list_head *this, *tmp;
8352
8353 spin_lock_irqsave(&h->offline_device_lock, flags);
8354 list_for_each_safe(this, tmp, &h->offline_device_list) {
8355 d = list_entry(this, struct offline_device_entry,
8356 offline_list);
8357 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8358 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8359 spin_lock_irqsave(&h->offline_device_lock, flags);
8360 list_del(&d->offline_list);
8361 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8362 return 1;
8363 }
8364 spin_lock_irqsave(&h->offline_device_lock, flags);
8365 }
8366 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8367 return 0;
8368 }
8369
8370 static int hpsa_luns_changed(struct ctlr_info *h)
8371 {
8372 int rc = 1; /* assume there are changes */
8373 struct ReportLUNdata *logdev = NULL;
8374
8375 /* if we can't find out if lun data has changed,
8376 * assume that it has.
8377 */
8378
8379 if (!h->lastlogicals)
8380 return rc;
8381
8382 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8383 if (!logdev)
8384 return rc;
8385
8386 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8387 dev_warn(&h->pdev->dev,
8388 "report luns failed, can't track lun changes.\n");
8389 goto out;
8390 }
8391 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8392 dev_info(&h->pdev->dev,
8393 "Lun changes detected.\n");
8394 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8395 goto out;
8396 } else
8397 rc = 0; /* no changes detected. */
8398 out:
8399 kfree(logdev);
8400 return rc;
8401 }
8402
8403 static void hpsa_perform_rescan(struct ctlr_info *h)
8404 {
8405 struct Scsi_Host *sh = NULL;
8406 unsigned long flags;
8407
8408 /*
8409 * Do the scan after the reset
8410 */
8411 spin_lock_irqsave(&h->reset_lock, flags);
8412 if (h->reset_in_progress) {
8413 h->drv_req_rescan = 1;
8414 spin_unlock_irqrestore(&h->reset_lock, flags);
8415 return;
8416 }
8417 spin_unlock_irqrestore(&h->reset_lock, flags);
8418
8419 sh = scsi_host_get(h->scsi_host);
8420 if (sh != NULL) {
8421 hpsa_scan_start(sh);
8422 scsi_host_put(sh);
8423 h->drv_req_rescan = 0;
8424 }
8425 }
8426
8427 /*
8428 * watch for controller events
8429 */
8430 static void hpsa_event_monitor_worker(struct work_struct *work)
8431 {
8432 struct ctlr_info *h = container_of(to_delayed_work(work),
8433 struct ctlr_info, event_monitor_work);
8434 unsigned long flags;
8435
8436 spin_lock_irqsave(&h->lock, flags);
8437 if (h->remove_in_progress) {
8438 spin_unlock_irqrestore(&h->lock, flags);
8439 return;
8440 }
8441 spin_unlock_irqrestore(&h->lock, flags);
8442
8443 if (hpsa_ctlr_needs_rescan(h)) {
8444 hpsa_ack_ctlr_events(h);
8445 hpsa_perform_rescan(h);
8446 }
8447
8448 spin_lock_irqsave(&h->lock, flags);
8449 if (!h->remove_in_progress)
8450 schedule_delayed_work(&h->event_monitor_work,
8451 HPSA_EVENT_MONITOR_INTERVAL);
8452 spin_unlock_irqrestore(&h->lock, flags);
8453 }
8454
8455 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8456 {
8457 unsigned long flags;
8458 struct ctlr_info *h = container_of(to_delayed_work(work),
8459 struct ctlr_info, rescan_ctlr_work);
8460
8461 spin_lock_irqsave(&h->lock, flags);
8462 if (h->remove_in_progress) {
8463 spin_unlock_irqrestore(&h->lock, flags);
8464 return;
8465 }
8466 spin_unlock_irqrestore(&h->lock, flags);
8467
8468 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8469 hpsa_perform_rescan(h);
8470 } else if (h->discovery_polling) {
8471 if (hpsa_luns_changed(h)) {
8472 dev_info(&h->pdev->dev,
8473 "driver discovery polling rescan.\n");
8474 hpsa_perform_rescan(h);
8475 }
8476 }
8477 spin_lock_irqsave(&h->lock, flags);
8478 if (!h->remove_in_progress)
8479 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8480 h->heartbeat_sample_interval);
8481 spin_unlock_irqrestore(&h->lock, flags);
8482 }
8483
8484 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8485 {
8486 unsigned long flags;
8487 struct ctlr_info *h = container_of(to_delayed_work(work),
8488 struct ctlr_info, monitor_ctlr_work);
8489
8490 detect_controller_lockup(h);
8491 if (lockup_detected(h))
8492 return;
8493
8494 spin_lock_irqsave(&h->lock, flags);
8495 if (!h->remove_in_progress)
8496 schedule_delayed_work(&h->monitor_ctlr_work,
8497 h->heartbeat_sample_interval);
8498 spin_unlock_irqrestore(&h->lock, flags);
8499 }
8500
8501 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8502 char *name)
8503 {
8504 struct workqueue_struct *wq = NULL;
8505
8506 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8507 if (!wq)
8508 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8509
8510 return wq;
8511 }
8512
8513 static void hpda_free_ctlr_info(struct ctlr_info *h)
8514 {
8515 kfree(h->reply_map);
8516 kfree(h);
8517 }
8518
8519 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8520 {
8521 struct ctlr_info *h;
8522
8523 h = kzalloc(sizeof(*h), GFP_KERNEL);
8524 if (!h)
8525 return NULL;
8526
8527 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL);
8528 if (!h->reply_map) {
8529 kfree(h);
8530 return NULL;
8531 }
8532 return h;
8533 }
8534
8535 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8536 {
8537 int dac, rc;
8538 struct ctlr_info *h;
8539 int try_soft_reset = 0;
8540 unsigned long flags;
8541 u32 board_id;
8542
8543 if (number_of_controllers == 0)
8544 printk(KERN_INFO DRIVER_NAME "\n");
8545
8546 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8547 if (rc < 0) {
8548 dev_warn(&pdev->dev, "Board ID not found\n");
8549 return rc;
8550 }
8551
8552 rc = hpsa_init_reset_devices(pdev, board_id);
8553 if (rc) {
8554 if (rc != -ENOTSUPP)
8555 return rc;
8556 /* If the reset fails in a particular way (it has no way to do
8557 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8558 * a soft reset once we get the controller configured up to the
8559 * point that it can accept a command.
8560 */
8561 try_soft_reset = 1;
8562 rc = 0;
8563 }
8564
8565 reinit_after_soft_reset:
8566
8567 /* Command structures must be aligned on a 32-byte boundary because
8568 * the 5 lower bits of the address are used by the hardware. and by
8569 * the driver. See comments in hpsa.h for more info.
8570 */
8571 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8572 h = hpda_alloc_ctlr_info();
8573 if (!h) {
8574 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8575 return -ENOMEM;
8576 }
8577
8578 h->pdev = pdev;
8579
8580 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8581 INIT_LIST_HEAD(&h->offline_device_list);
8582 spin_lock_init(&h->lock);
8583 spin_lock_init(&h->offline_device_lock);
8584 spin_lock_init(&h->scan_lock);
8585 spin_lock_init(&h->reset_lock);
8586 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8587
8588 /* Allocate and clear per-cpu variable lockup_detected */
8589 h->lockup_detected = alloc_percpu(u32);
8590 if (!h->lockup_detected) {
8591 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8592 rc = -ENOMEM;
8593 goto clean1; /* aer/h */
8594 }
8595 set_lockup_detected_for_all_cpus(h, 0);
8596
8597 rc = hpsa_pci_init(h);
8598 if (rc)
8599 goto clean2; /* lu, aer/h */
8600
8601 /* relies on h-> settings made by hpsa_pci_init, including
8602 * interrupt_mode h->intr */
8603 rc = hpsa_scsi_host_alloc(h);
8604 if (rc)
8605 goto clean2_5; /* pci, lu, aer/h */
8606
8607 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8608 h->ctlr = number_of_controllers;
8609 number_of_controllers++;
8610
8611 /* configure PCI DMA stuff */
8612 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8613 if (rc == 0) {
8614 dac = 1;
8615 } else {
8616 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8617 if (rc == 0) {
8618 dac = 0;
8619 } else {
8620 dev_err(&pdev->dev, "no suitable DMA available\n");
8621 goto clean3; /* shost, pci, lu, aer/h */
8622 }
8623 }
8624
8625 /* make sure the board interrupts are off */
8626 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8627
8628 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8629 if (rc)
8630 goto clean3; /* shost, pci, lu, aer/h */
8631 rc = hpsa_alloc_cmd_pool(h);
8632 if (rc)
8633 goto clean4; /* irq, shost, pci, lu, aer/h */
8634 rc = hpsa_alloc_sg_chain_blocks(h);
8635 if (rc)
8636 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8637 init_waitqueue_head(&h->scan_wait_queue);
8638 init_waitqueue_head(&h->event_sync_wait_queue);
8639 mutex_init(&h->reset_mutex);
8640 h->scan_finished = 1; /* no scan currently in progress */
8641 h->scan_waiting = 0;
8642
8643 pci_set_drvdata(pdev, h);
8644 h->ndevices = 0;
8645
8646 spin_lock_init(&h->devlock);
8647 rc = hpsa_put_ctlr_into_performant_mode(h);
8648 if (rc)
8649 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8650
8651 /* create the resubmit workqueue */
8652 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8653 if (!h->rescan_ctlr_wq) {
8654 rc = -ENOMEM;
8655 goto clean7;
8656 }
8657
8658 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8659 if (!h->resubmit_wq) {
8660 rc = -ENOMEM;
8661 goto clean7; /* aer/h */
8662 }
8663
8664 /*
8665 * At this point, the controller is ready to take commands.
8666 * Now, if reset_devices and the hard reset didn't work, try
8667 * the soft reset and see if that works.
8668 */
8669 if (try_soft_reset) {
8670
8671 /* This is kind of gross. We may or may not get a completion
8672 * from the soft reset command, and if we do, then the value
8673 * from the fifo may or may not be valid. So, we wait 10 secs
8674 * after the reset throwing away any completions we get during
8675 * that time. Unregister the interrupt handler and register
8676 * fake ones to scoop up any residual completions.
8677 */
8678 spin_lock_irqsave(&h->lock, flags);
8679 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8680 spin_unlock_irqrestore(&h->lock, flags);
8681 hpsa_free_irqs(h);
8682 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8683 hpsa_intx_discard_completions);
8684 if (rc) {
8685 dev_warn(&h->pdev->dev,
8686 "Failed to request_irq after soft reset.\n");
8687 /*
8688 * cannot goto clean7 or free_irqs will be called
8689 * again. Instead, do its work
8690 */
8691 hpsa_free_performant_mode(h); /* clean7 */
8692 hpsa_free_sg_chain_blocks(h); /* clean6 */
8693 hpsa_free_cmd_pool(h); /* clean5 */
8694 /*
8695 * skip hpsa_free_irqs(h) clean4 since that
8696 * was just called before request_irqs failed
8697 */
8698 goto clean3;
8699 }
8700
8701 rc = hpsa_kdump_soft_reset(h);
8702 if (rc)
8703 /* Neither hard nor soft reset worked, we're hosed. */
8704 goto clean7;
8705
8706 dev_info(&h->pdev->dev, "Board READY.\n");
8707 dev_info(&h->pdev->dev,
8708 "Waiting for stale completions to drain.\n");
8709 h->access.set_intr_mask(h, HPSA_INTR_ON);
8710 msleep(10000);
8711 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8712
8713 rc = controller_reset_failed(h->cfgtable);
8714 if (rc)
8715 dev_info(&h->pdev->dev,
8716 "Soft reset appears to have failed.\n");
8717
8718 /* since the controller's reset, we have to go back and re-init
8719 * everything. Easiest to just forget what we've done and do it
8720 * all over again.
8721 */
8722 hpsa_undo_allocations_after_kdump_soft_reset(h);
8723 try_soft_reset = 0;
8724 if (rc)
8725 /* don't goto clean, we already unallocated */
8726 return -ENODEV;
8727
8728 goto reinit_after_soft_reset;
8729 }
8730
8731 /* Enable Accelerated IO path at driver layer */
8732 h->acciopath_status = 1;
8733 /* Disable discovery polling.*/
8734 h->discovery_polling = 0;
8735
8736
8737 /* Turn the interrupts on so we can service requests */
8738 h->access.set_intr_mask(h, HPSA_INTR_ON);
8739
8740 hpsa_hba_inquiry(h);
8741
8742 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8743 if (!h->lastlogicals)
8744 dev_info(&h->pdev->dev,
8745 "Can't track change to report lun data\n");
8746
8747 /* hook into SCSI subsystem */
8748 rc = hpsa_scsi_add_host(h);
8749 if (rc)
8750 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8751
8752 /* Monitor the controller for firmware lockups */
8753 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8754 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8755 schedule_delayed_work(&h->monitor_ctlr_work,
8756 h->heartbeat_sample_interval);
8757 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8758 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8759 h->heartbeat_sample_interval);
8760 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8761 schedule_delayed_work(&h->event_monitor_work,
8762 HPSA_EVENT_MONITOR_INTERVAL);
8763 return 0;
8764
8765 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8766 hpsa_free_performant_mode(h);
8767 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8768 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8769 hpsa_free_sg_chain_blocks(h);
8770 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8771 hpsa_free_cmd_pool(h);
8772 clean4: /* irq, shost, pci, lu, aer/h */
8773 hpsa_free_irqs(h);
8774 clean3: /* shost, pci, lu, aer/h */
8775 scsi_host_put(h->scsi_host);
8776 h->scsi_host = NULL;
8777 clean2_5: /* pci, lu, aer/h */
8778 hpsa_free_pci_init(h);
8779 clean2: /* lu, aer/h */
8780 if (h->lockup_detected) {
8781 free_percpu(h->lockup_detected);
8782 h->lockup_detected = NULL;
8783 }
8784 clean1: /* wq/aer/h */
8785 if (h->resubmit_wq) {
8786 destroy_workqueue(h->resubmit_wq);
8787 h->resubmit_wq = NULL;
8788 }
8789 if (h->rescan_ctlr_wq) {
8790 destroy_workqueue(h->rescan_ctlr_wq);
8791 h->rescan_ctlr_wq = NULL;
8792 }
8793 kfree(h);
8794 return rc;
8795 }
8796
8797 static void hpsa_flush_cache(struct ctlr_info *h)
8798 {
8799 char *flush_buf;
8800 struct CommandList *c;
8801 int rc;
8802
8803 if (unlikely(lockup_detected(h)))
8804 return;
8805 flush_buf = kzalloc(4, GFP_KERNEL);
8806 if (!flush_buf)
8807 return;
8808
8809 c = cmd_alloc(h);
8810
8811 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8812 RAID_CTLR_LUNID, TYPE_CMD)) {
8813 goto out;
8814 }
8815 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8816 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8817 if (rc)
8818 goto out;
8819 if (c->err_info->CommandStatus != 0)
8820 out:
8821 dev_warn(&h->pdev->dev,
8822 "error flushing cache on controller\n");
8823 cmd_free(h, c);
8824 kfree(flush_buf);
8825 }
8826
8827 /* Make controller gather fresh report lun data each time we
8828 * send down a report luns request
8829 */
8830 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8831 {
8832 u32 *options;
8833 struct CommandList *c;
8834 int rc;
8835
8836 /* Don't bother trying to set diag options if locked up */
8837 if (unlikely(h->lockup_detected))
8838 return;
8839
8840 options = kzalloc(sizeof(*options), GFP_KERNEL);
8841 if (!options)
8842 return;
8843
8844 c = cmd_alloc(h);
8845
8846 /* first, get the current diag options settings */
8847 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8848 RAID_CTLR_LUNID, TYPE_CMD))
8849 goto errout;
8850
8851 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8852 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8853 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8854 goto errout;
8855
8856 /* Now, set the bit for disabling the RLD caching */
8857 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8858
8859 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8860 RAID_CTLR_LUNID, TYPE_CMD))
8861 goto errout;
8862
8863 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8864 PCI_DMA_TODEVICE, NO_TIMEOUT);
8865 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8866 goto errout;
8867
8868 /* Now verify that it got set: */
8869 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8870 RAID_CTLR_LUNID, TYPE_CMD))
8871 goto errout;
8872
8873 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8874 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8875 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8876 goto errout;
8877
8878 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8879 goto out;
8880
8881 errout:
8882 dev_err(&h->pdev->dev,
8883 "Error: failed to disable report lun data caching.\n");
8884 out:
8885 cmd_free(h, c);
8886 kfree(options);
8887 }
8888
8889 static void __hpsa_shutdown(struct pci_dev *pdev)
8890 {
8891 struct ctlr_info *h;
8892
8893 h = pci_get_drvdata(pdev);
8894 /* Turn board interrupts off and send the flush cache command
8895 * sendcmd will turn off interrupt, and send the flush...
8896 * To write all data in the battery backed cache to disks
8897 */
8898 hpsa_flush_cache(h);
8899 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8900 hpsa_free_irqs(h); /* init_one 4 */
8901 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8902 }
8903
8904 static void hpsa_shutdown(struct pci_dev *pdev)
8905 {
8906 __hpsa_shutdown(pdev);
8907 pci_disable_device(pdev);
8908 }
8909
8910 static void hpsa_free_device_info(struct ctlr_info *h)
8911 {
8912 int i;
8913
8914 for (i = 0; i < h->ndevices; i++) {
8915 kfree(h->dev[i]);
8916 h->dev[i] = NULL;
8917 }
8918 }
8919
8920 static void hpsa_remove_one(struct pci_dev *pdev)
8921 {
8922 struct ctlr_info *h;
8923 unsigned long flags;
8924
8925 if (pci_get_drvdata(pdev) == NULL) {
8926 dev_err(&pdev->dev, "unable to remove device\n");
8927 return;
8928 }
8929 h = pci_get_drvdata(pdev);
8930
8931 /* Get rid of any controller monitoring work items */
8932 spin_lock_irqsave(&h->lock, flags);
8933 h->remove_in_progress = 1;
8934 spin_unlock_irqrestore(&h->lock, flags);
8935 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8936 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8937 cancel_delayed_work_sync(&h->event_monitor_work);
8938 destroy_workqueue(h->rescan_ctlr_wq);
8939 destroy_workqueue(h->resubmit_wq);
8940
8941 hpsa_delete_sas_host(h);
8942
8943 /*
8944 * Call before disabling interrupts.
8945 * scsi_remove_host can trigger I/O operations especially
8946 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8947 * operations which cannot complete and will hang the system.
8948 */
8949 if (h->scsi_host)
8950 scsi_remove_host(h->scsi_host); /* init_one 8 */
8951 /* includes hpsa_free_irqs - init_one 4 */
8952 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8953 __hpsa_shutdown(pdev);
8954
8955 hpsa_free_device_info(h); /* scan */
8956
8957 kfree(h->hba_inquiry_data); /* init_one 10 */
8958 h->hba_inquiry_data = NULL; /* init_one 10 */
8959 hpsa_free_ioaccel2_sg_chain_blocks(h);
8960 hpsa_free_performant_mode(h); /* init_one 7 */
8961 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8962 hpsa_free_cmd_pool(h); /* init_one 5 */
8963 kfree(h->lastlogicals);
8964
8965 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8966
8967 scsi_host_put(h->scsi_host); /* init_one 3 */
8968 h->scsi_host = NULL; /* init_one 3 */
8969
8970 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8971 hpsa_free_pci_init(h); /* init_one 2.5 */
8972
8973 free_percpu(h->lockup_detected); /* init_one 2 */
8974 h->lockup_detected = NULL; /* init_one 2 */
8975 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8976
8977 hpda_free_ctlr_info(h); /* init_one 1 */
8978 }
8979
8980 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8981 __attribute__((unused)) pm_message_t state)
8982 {
8983 return -ENOSYS;
8984 }
8985
8986 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8987 {
8988 return -ENOSYS;
8989 }
8990
8991 static struct pci_driver hpsa_pci_driver = {
8992 .name = HPSA,
8993 .probe = hpsa_init_one,
8994 .remove = hpsa_remove_one,
8995 .id_table = hpsa_pci_device_id, /* id_table */
8996 .shutdown = hpsa_shutdown,
8997 .suspend = hpsa_suspend,
8998 .resume = hpsa_resume,
8999 };
9000
9001 /* Fill in bucket_map[], given nsgs (the max number of
9002 * scatter gather elements supported) and bucket[],
9003 * which is an array of 8 integers. The bucket[] array
9004 * contains 8 different DMA transfer sizes (in 16
9005 * byte increments) which the controller uses to fetch
9006 * commands. This function fills in bucket_map[], which
9007 * maps a given number of scatter gather elements to one of
9008 * the 8 DMA transfer sizes. The point of it is to allow the
9009 * controller to only do as much DMA as needed to fetch the
9010 * command, with the DMA transfer size encoded in the lower
9011 * bits of the command address.
9012 */
9013 static void calc_bucket_map(int bucket[], int num_buckets,
9014 int nsgs, int min_blocks, u32 *bucket_map)
9015 {
9016 int i, j, b, size;
9017
9018 /* Note, bucket_map must have nsgs+1 entries. */
9019 for (i = 0; i <= nsgs; i++) {
9020 /* Compute size of a command with i SG entries */
9021 size = i + min_blocks;
9022 b = num_buckets; /* Assume the biggest bucket */
9023 /* Find the bucket that is just big enough */
9024 for (j = 0; j < num_buckets; j++) {
9025 if (bucket[j] >= size) {
9026 b = j;
9027 break;
9028 }
9029 }
9030 /* for a command with i SG entries, use bucket b. */
9031 bucket_map[i] = b;
9032 }
9033 }
9034
9035 /*
9036 * return -ENODEV on err, 0 on success (or no action)
9037 * allocates numerous items that must be freed later
9038 */
9039 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9040 {
9041 int i;
9042 unsigned long register_value;
9043 unsigned long transMethod = CFGTBL_Trans_Performant |
9044 (trans_support & CFGTBL_Trans_use_short_tags) |
9045 CFGTBL_Trans_enable_directed_msix |
9046 (trans_support & (CFGTBL_Trans_io_accel1 |
9047 CFGTBL_Trans_io_accel2));
9048 struct access_method access = SA5_performant_access;
9049
9050 /* This is a bit complicated. There are 8 registers on
9051 * the controller which we write to to tell it 8 different
9052 * sizes of commands which there may be. It's a way of
9053 * reducing the DMA done to fetch each command. Encoded into
9054 * each command's tag are 3 bits which communicate to the controller
9055 * which of the eight sizes that command fits within. The size of
9056 * each command depends on how many scatter gather entries there are.
9057 * Each SG entry requires 16 bytes. The eight registers are programmed
9058 * with the number of 16-byte blocks a command of that size requires.
9059 * The smallest command possible requires 5 such 16 byte blocks.
9060 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9061 * blocks. Note, this only extends to the SG entries contained
9062 * within the command block, and does not extend to chained blocks
9063 * of SG elements. bft[] contains the eight values we write to
9064 * the registers. They are not evenly distributed, but have more
9065 * sizes for small commands, and fewer sizes for larger commands.
9066 */
9067 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9068 #define MIN_IOACCEL2_BFT_ENTRY 5
9069 #define HPSA_IOACCEL2_HEADER_SZ 4
9070 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9071 13, 14, 15, 16, 17, 18, 19,
9072 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9073 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9074 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9075 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9076 16 * MIN_IOACCEL2_BFT_ENTRY);
9077 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9078 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9079 /* 5 = 1 s/g entry or 4k
9080 * 6 = 2 s/g entry or 8k
9081 * 8 = 4 s/g entry or 16k
9082 * 10 = 6 s/g entry or 24k
9083 */
9084
9085 /* If the controller supports either ioaccel method then
9086 * we can also use the RAID stack submit path that does not
9087 * perform the superfluous readl() after each command submission.
9088 */
9089 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9090 access = SA5_performant_access_no_read;
9091
9092 /* Controller spec: zero out this buffer. */
9093 for (i = 0; i < h->nreply_queues; i++)
9094 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9095
9096 bft[7] = SG_ENTRIES_IN_CMD + 4;
9097 calc_bucket_map(bft, ARRAY_SIZE(bft),
9098 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9099 for (i = 0; i < 8; i++)
9100 writel(bft[i], &h->transtable->BlockFetch[i]);
9101
9102 /* size of controller ring buffer */
9103 writel(h->max_commands, &h->transtable->RepQSize);
9104 writel(h->nreply_queues, &h->transtable->RepQCount);
9105 writel(0, &h->transtable->RepQCtrAddrLow32);
9106 writel(0, &h->transtable->RepQCtrAddrHigh32);
9107
9108 for (i = 0; i < h->nreply_queues; i++) {
9109 writel(0, &h->transtable->RepQAddr[i].upper);
9110 writel(h->reply_queue[i].busaddr,
9111 &h->transtable->RepQAddr[i].lower);
9112 }
9113
9114 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9115 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9116 /*
9117 * enable outbound interrupt coalescing in accelerator mode;
9118 */
9119 if (trans_support & CFGTBL_Trans_io_accel1) {
9120 access = SA5_ioaccel_mode1_access;
9121 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9122 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9123 } else
9124 if (trans_support & CFGTBL_Trans_io_accel2)
9125 access = SA5_ioaccel_mode2_access;
9126 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9127 if (hpsa_wait_for_mode_change_ack(h)) {
9128 dev_err(&h->pdev->dev,
9129 "performant mode problem - doorbell timeout\n");
9130 return -ENODEV;
9131 }
9132 register_value = readl(&(h->cfgtable->TransportActive));
9133 if (!(register_value & CFGTBL_Trans_Performant)) {
9134 dev_err(&h->pdev->dev,
9135 "performant mode problem - transport not active\n");
9136 return -ENODEV;
9137 }
9138 /* Change the access methods to the performant access methods */
9139 h->access = access;
9140 h->transMethod = transMethod;
9141
9142 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9143 (trans_support & CFGTBL_Trans_io_accel2)))
9144 return 0;
9145
9146 if (trans_support & CFGTBL_Trans_io_accel1) {
9147 /* Set up I/O accelerator mode */
9148 for (i = 0; i < h->nreply_queues; i++) {
9149 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9150 h->reply_queue[i].current_entry =
9151 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9152 }
9153 bft[7] = h->ioaccel_maxsg + 8;
9154 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9155 h->ioaccel1_blockFetchTable);
9156
9157 /* initialize all reply queue entries to unused */
9158 for (i = 0; i < h->nreply_queues; i++)
9159 memset(h->reply_queue[i].head,
9160 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9161 h->reply_queue_size);
9162
9163 /* set all the constant fields in the accelerator command
9164 * frames once at init time to save CPU cycles later.
9165 */
9166 for (i = 0; i < h->nr_cmds; i++) {
9167 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9168
9169 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9170 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9171 (i * sizeof(struct ErrorInfo)));
9172 cp->err_info_len = sizeof(struct ErrorInfo);
9173 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9174 cp->host_context_flags =
9175 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9176 cp->timeout_sec = 0;
9177 cp->ReplyQueue = 0;
9178 cp->tag =
9179 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9180 cp->host_addr =
9181 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9182 (i * sizeof(struct io_accel1_cmd)));
9183 }
9184 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9185 u64 cfg_offset, cfg_base_addr_index;
9186 u32 bft2_offset, cfg_base_addr;
9187 int rc;
9188
9189 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9190 &cfg_base_addr_index, &cfg_offset);
9191 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9192 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9193 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9194 4, h->ioaccel2_blockFetchTable);
9195 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9196 BUILD_BUG_ON(offsetof(struct CfgTable,
9197 io_accel_request_size_offset) != 0xb8);
9198 h->ioaccel2_bft2_regs =
9199 remap_pci_mem(pci_resource_start(h->pdev,
9200 cfg_base_addr_index) +
9201 cfg_offset + bft2_offset,
9202 ARRAY_SIZE(bft2) *
9203 sizeof(*h->ioaccel2_bft2_regs));
9204 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9205 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9206 }
9207 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9208 if (hpsa_wait_for_mode_change_ack(h)) {
9209 dev_err(&h->pdev->dev,
9210 "performant mode problem - enabling ioaccel mode\n");
9211 return -ENODEV;
9212 }
9213 return 0;
9214 }
9215
9216 /* Free ioaccel1 mode command blocks and block fetch table */
9217 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9218 {
9219 if (h->ioaccel_cmd_pool) {
9220 pci_free_consistent(h->pdev,
9221 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9222 h->ioaccel_cmd_pool,
9223 h->ioaccel_cmd_pool_dhandle);
9224 h->ioaccel_cmd_pool = NULL;
9225 h->ioaccel_cmd_pool_dhandle = 0;
9226 }
9227 kfree(h->ioaccel1_blockFetchTable);
9228 h->ioaccel1_blockFetchTable = NULL;
9229 }
9230
9231 /* Allocate ioaccel1 mode command blocks and block fetch table */
9232 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9233 {
9234 h->ioaccel_maxsg =
9235 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9236 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9237 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9238
9239 /* Command structures must be aligned on a 128-byte boundary
9240 * because the 7 lower bits of the address are used by the
9241 * hardware.
9242 */
9243 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9244 IOACCEL1_COMMANDLIST_ALIGNMENT);
9245 h->ioaccel_cmd_pool =
9246 pci_alloc_consistent(h->pdev,
9247 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9248 &(h->ioaccel_cmd_pool_dhandle));
9249
9250 h->ioaccel1_blockFetchTable =
9251 kmalloc(((h->ioaccel_maxsg + 1) *
9252 sizeof(u32)), GFP_KERNEL);
9253
9254 if ((h->ioaccel_cmd_pool == NULL) ||
9255 (h->ioaccel1_blockFetchTable == NULL))
9256 goto clean_up;
9257
9258 memset(h->ioaccel_cmd_pool, 0,
9259 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9260 return 0;
9261
9262 clean_up:
9263 hpsa_free_ioaccel1_cmd_and_bft(h);
9264 return -ENOMEM;
9265 }
9266
9267 /* Free ioaccel2 mode command blocks and block fetch table */
9268 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9269 {
9270 hpsa_free_ioaccel2_sg_chain_blocks(h);
9271
9272 if (h->ioaccel2_cmd_pool) {
9273 pci_free_consistent(h->pdev,
9274 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9275 h->ioaccel2_cmd_pool,
9276 h->ioaccel2_cmd_pool_dhandle);
9277 h->ioaccel2_cmd_pool = NULL;
9278 h->ioaccel2_cmd_pool_dhandle = 0;
9279 }
9280 kfree(h->ioaccel2_blockFetchTable);
9281 h->ioaccel2_blockFetchTable = NULL;
9282 }
9283
9284 /* Allocate ioaccel2 mode command blocks and block fetch table */
9285 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9286 {
9287 int rc;
9288
9289 /* Allocate ioaccel2 mode command blocks and block fetch table */
9290
9291 h->ioaccel_maxsg =
9292 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9293 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9294 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9295
9296 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9297 IOACCEL2_COMMANDLIST_ALIGNMENT);
9298 h->ioaccel2_cmd_pool =
9299 pci_alloc_consistent(h->pdev,
9300 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9301 &(h->ioaccel2_cmd_pool_dhandle));
9302
9303 h->ioaccel2_blockFetchTable =
9304 kmalloc(((h->ioaccel_maxsg + 1) *
9305 sizeof(u32)), GFP_KERNEL);
9306
9307 if ((h->ioaccel2_cmd_pool == NULL) ||
9308 (h->ioaccel2_blockFetchTable == NULL)) {
9309 rc = -ENOMEM;
9310 goto clean_up;
9311 }
9312
9313 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9314 if (rc)
9315 goto clean_up;
9316
9317 memset(h->ioaccel2_cmd_pool, 0,
9318 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9319 return 0;
9320
9321 clean_up:
9322 hpsa_free_ioaccel2_cmd_and_bft(h);
9323 return rc;
9324 }
9325
9326 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9327 static void hpsa_free_performant_mode(struct ctlr_info *h)
9328 {
9329 kfree(h->blockFetchTable);
9330 h->blockFetchTable = NULL;
9331 hpsa_free_reply_queues(h);
9332 hpsa_free_ioaccel1_cmd_and_bft(h);
9333 hpsa_free_ioaccel2_cmd_and_bft(h);
9334 }
9335
9336 /* return -ENODEV on error, 0 on success (or no action)
9337 * allocates numerous items that must be freed later
9338 */
9339 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9340 {
9341 u32 trans_support;
9342 unsigned long transMethod = CFGTBL_Trans_Performant |
9343 CFGTBL_Trans_use_short_tags;
9344 int i, rc;
9345
9346 if (hpsa_simple_mode)
9347 return 0;
9348
9349 trans_support = readl(&(h->cfgtable->TransportSupport));
9350 if (!(trans_support & PERFORMANT_MODE))
9351 return 0;
9352
9353 /* Check for I/O accelerator mode support */
9354 if (trans_support & CFGTBL_Trans_io_accel1) {
9355 transMethod |= CFGTBL_Trans_io_accel1 |
9356 CFGTBL_Trans_enable_directed_msix;
9357 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9358 if (rc)
9359 return rc;
9360 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9361 transMethod |= CFGTBL_Trans_io_accel2 |
9362 CFGTBL_Trans_enable_directed_msix;
9363 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9364 if (rc)
9365 return rc;
9366 }
9367
9368 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9369 hpsa_get_max_perf_mode_cmds(h);
9370 /* Performant mode ring buffer and supporting data structures */
9371 h->reply_queue_size = h->max_commands * sizeof(u64);
9372
9373 for (i = 0; i < h->nreply_queues; i++) {
9374 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9375 h->reply_queue_size,
9376 &(h->reply_queue[i].busaddr));
9377 if (!h->reply_queue[i].head) {
9378 rc = -ENOMEM;
9379 goto clean1; /* rq, ioaccel */
9380 }
9381 h->reply_queue[i].size = h->max_commands;
9382 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9383 h->reply_queue[i].current_entry = 0;
9384 }
9385
9386 /* Need a block fetch table for performant mode */
9387 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9388 sizeof(u32)), GFP_KERNEL);
9389 if (!h->blockFetchTable) {
9390 rc = -ENOMEM;
9391 goto clean1; /* rq, ioaccel */
9392 }
9393
9394 rc = hpsa_enter_performant_mode(h, trans_support);
9395 if (rc)
9396 goto clean2; /* bft, rq, ioaccel */
9397 return 0;
9398
9399 clean2: /* bft, rq, ioaccel */
9400 kfree(h->blockFetchTable);
9401 h->blockFetchTable = NULL;
9402 clean1: /* rq, ioaccel */
9403 hpsa_free_reply_queues(h);
9404 hpsa_free_ioaccel1_cmd_and_bft(h);
9405 hpsa_free_ioaccel2_cmd_and_bft(h);
9406 return rc;
9407 }
9408
9409 static int is_accelerated_cmd(struct CommandList *c)
9410 {
9411 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9412 }
9413
9414 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9415 {
9416 struct CommandList *c = NULL;
9417 int i, accel_cmds_out;
9418 int refcount;
9419
9420 do { /* wait for all outstanding ioaccel commands to drain out */
9421 accel_cmds_out = 0;
9422 for (i = 0; i < h->nr_cmds; i++) {
9423 c = h->cmd_pool + i;
9424 refcount = atomic_inc_return(&c->refcount);
9425 if (refcount > 1) /* Command is allocated */
9426 accel_cmds_out += is_accelerated_cmd(c);
9427 cmd_free(h, c);
9428 }
9429 if (accel_cmds_out <= 0)
9430 break;
9431 msleep(100);
9432 } while (1);
9433 }
9434
9435 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9436 struct hpsa_sas_port *hpsa_sas_port)
9437 {
9438 struct hpsa_sas_phy *hpsa_sas_phy;
9439 struct sas_phy *phy;
9440
9441 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9442 if (!hpsa_sas_phy)
9443 return NULL;
9444
9445 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9446 hpsa_sas_port->next_phy_index);
9447 if (!phy) {
9448 kfree(hpsa_sas_phy);
9449 return NULL;
9450 }
9451
9452 hpsa_sas_port->next_phy_index++;
9453 hpsa_sas_phy->phy = phy;
9454 hpsa_sas_phy->parent_port = hpsa_sas_port;
9455
9456 return hpsa_sas_phy;
9457 }
9458
9459 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9460 {
9461 struct sas_phy *phy = hpsa_sas_phy->phy;
9462
9463 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9464 if (hpsa_sas_phy->added_to_port)
9465 list_del(&hpsa_sas_phy->phy_list_entry);
9466 sas_phy_delete(phy);
9467 kfree(hpsa_sas_phy);
9468 }
9469
9470 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9471 {
9472 int rc;
9473 struct hpsa_sas_port *hpsa_sas_port;
9474 struct sas_phy *phy;
9475 struct sas_identify *identify;
9476
9477 hpsa_sas_port = hpsa_sas_phy->parent_port;
9478 phy = hpsa_sas_phy->phy;
9479
9480 identify = &phy->identify;
9481 memset(identify, 0, sizeof(*identify));
9482 identify->sas_address = hpsa_sas_port->sas_address;
9483 identify->device_type = SAS_END_DEVICE;
9484 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9485 identify->target_port_protocols = SAS_PROTOCOL_STP;
9486 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9487 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9488 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9489 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9490 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9491
9492 rc = sas_phy_add(hpsa_sas_phy->phy);
9493 if (rc)
9494 return rc;
9495
9496 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9497 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9498 &hpsa_sas_port->phy_list_head);
9499 hpsa_sas_phy->added_to_port = true;
9500
9501 return 0;
9502 }
9503
9504 static int
9505 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9506 struct sas_rphy *rphy)
9507 {
9508 struct sas_identify *identify;
9509
9510 identify = &rphy->identify;
9511 identify->sas_address = hpsa_sas_port->sas_address;
9512 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9513 identify->target_port_protocols = SAS_PROTOCOL_STP;
9514
9515 return sas_rphy_add(rphy);
9516 }
9517
9518 static struct hpsa_sas_port
9519 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9520 u64 sas_address)
9521 {
9522 int rc;
9523 struct hpsa_sas_port *hpsa_sas_port;
9524 struct sas_port *port;
9525
9526 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9527 if (!hpsa_sas_port)
9528 return NULL;
9529
9530 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9531 hpsa_sas_port->parent_node = hpsa_sas_node;
9532
9533 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9534 if (!port)
9535 goto free_hpsa_port;
9536
9537 rc = sas_port_add(port);
9538 if (rc)
9539 goto free_sas_port;
9540
9541 hpsa_sas_port->port = port;
9542 hpsa_sas_port->sas_address = sas_address;
9543 list_add_tail(&hpsa_sas_port->port_list_entry,
9544 &hpsa_sas_node->port_list_head);
9545
9546 return hpsa_sas_port;
9547
9548 free_sas_port:
9549 sas_port_free(port);
9550 free_hpsa_port:
9551 kfree(hpsa_sas_port);
9552
9553 return NULL;
9554 }
9555
9556 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9557 {
9558 struct hpsa_sas_phy *hpsa_sas_phy;
9559 struct hpsa_sas_phy *next;
9560
9561 list_for_each_entry_safe(hpsa_sas_phy, next,
9562 &hpsa_sas_port->phy_list_head, phy_list_entry)
9563 hpsa_free_sas_phy(hpsa_sas_phy);
9564
9565 sas_port_delete(hpsa_sas_port->port);
9566 list_del(&hpsa_sas_port->port_list_entry);
9567 kfree(hpsa_sas_port);
9568 }
9569
9570 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9571 {
9572 struct hpsa_sas_node *hpsa_sas_node;
9573
9574 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9575 if (hpsa_sas_node) {
9576 hpsa_sas_node->parent_dev = parent_dev;
9577 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9578 }
9579
9580 return hpsa_sas_node;
9581 }
9582
9583 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9584 {
9585 struct hpsa_sas_port *hpsa_sas_port;
9586 struct hpsa_sas_port *next;
9587
9588 if (!hpsa_sas_node)
9589 return;
9590
9591 list_for_each_entry_safe(hpsa_sas_port, next,
9592 &hpsa_sas_node->port_list_head, port_list_entry)
9593 hpsa_free_sas_port(hpsa_sas_port);
9594
9595 kfree(hpsa_sas_node);
9596 }
9597
9598 static struct hpsa_scsi_dev_t
9599 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9600 struct sas_rphy *rphy)
9601 {
9602 int i;
9603 struct hpsa_scsi_dev_t *device;
9604
9605 for (i = 0; i < h->ndevices; i++) {
9606 device = h->dev[i];
9607 if (!device->sas_port)
9608 continue;
9609 if (device->sas_port->rphy == rphy)
9610 return device;
9611 }
9612
9613 return NULL;
9614 }
9615
9616 static int hpsa_add_sas_host(struct ctlr_info *h)
9617 {
9618 int rc;
9619 struct device *parent_dev;
9620 struct hpsa_sas_node *hpsa_sas_node;
9621 struct hpsa_sas_port *hpsa_sas_port;
9622 struct hpsa_sas_phy *hpsa_sas_phy;
9623
9624 parent_dev = &h->scsi_host->shost_dev;
9625
9626 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9627 if (!hpsa_sas_node)
9628 return -ENOMEM;
9629
9630 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9631 if (!hpsa_sas_port) {
9632 rc = -ENODEV;
9633 goto free_sas_node;
9634 }
9635
9636 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9637 if (!hpsa_sas_phy) {
9638 rc = -ENODEV;
9639 goto free_sas_port;
9640 }
9641
9642 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9643 if (rc)
9644 goto free_sas_phy;
9645
9646 h->sas_host = hpsa_sas_node;
9647
9648 return 0;
9649
9650 free_sas_phy:
9651 hpsa_free_sas_phy(hpsa_sas_phy);
9652 free_sas_port:
9653 hpsa_free_sas_port(hpsa_sas_port);
9654 free_sas_node:
9655 hpsa_free_sas_node(hpsa_sas_node);
9656
9657 return rc;
9658 }
9659
9660 static void hpsa_delete_sas_host(struct ctlr_info *h)
9661 {
9662 hpsa_free_sas_node(h->sas_host);
9663 }
9664
9665 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9666 struct hpsa_scsi_dev_t *device)
9667 {
9668 int rc;
9669 struct hpsa_sas_port *hpsa_sas_port;
9670 struct sas_rphy *rphy;
9671
9672 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9673 if (!hpsa_sas_port)
9674 return -ENOMEM;
9675
9676 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9677 if (!rphy) {
9678 rc = -ENODEV;
9679 goto free_sas_port;
9680 }
9681
9682 hpsa_sas_port->rphy = rphy;
9683 device->sas_port = hpsa_sas_port;
9684
9685 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9686 if (rc)
9687 goto free_sas_port;
9688
9689 return 0;
9690
9691 free_sas_port:
9692 hpsa_free_sas_port(hpsa_sas_port);
9693 device->sas_port = NULL;
9694
9695 return rc;
9696 }
9697
9698 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9699 {
9700 if (device->sas_port) {
9701 hpsa_free_sas_port(device->sas_port);
9702 device->sas_port = NULL;
9703 }
9704 }
9705
9706 static int
9707 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9708 {
9709 return 0;
9710 }
9711
9712 static int
9713 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9714 {
9715 struct Scsi_Host *shost = phy_to_shost(rphy);
9716 struct ctlr_info *h;
9717 struct hpsa_scsi_dev_t *sd;
9718
9719 if (!shost)
9720 return -ENXIO;
9721
9722 h = shost_to_hba(shost);
9723
9724 if (!h)
9725 return -ENXIO;
9726
9727 sd = hpsa_find_device_by_sas_rphy(h, rphy);
9728 if (!sd)
9729 return -ENXIO;
9730
9731 *identifier = sd->eli;
9732
9733 return 0;
9734 }
9735
9736 static int
9737 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9738 {
9739 return -ENXIO;
9740 }
9741
9742 static int
9743 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9744 {
9745 return 0;
9746 }
9747
9748 static int
9749 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9750 {
9751 return 0;
9752 }
9753
9754 static int
9755 hpsa_sas_phy_setup(struct sas_phy *phy)
9756 {
9757 return 0;
9758 }
9759
9760 static void
9761 hpsa_sas_phy_release(struct sas_phy *phy)
9762 {
9763 }
9764
9765 static int
9766 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9767 {
9768 return -EINVAL;
9769 }
9770
9771 static struct sas_function_template hpsa_sas_transport_functions = {
9772 .get_linkerrors = hpsa_sas_get_linkerrors,
9773 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9774 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9775 .phy_reset = hpsa_sas_phy_reset,
9776 .phy_enable = hpsa_sas_phy_enable,
9777 .phy_setup = hpsa_sas_phy_setup,
9778 .phy_release = hpsa_sas_phy_release,
9779 .set_phy_speed = hpsa_sas_phy_speed,
9780 };
9781
9782 /*
9783 * This is it. Register the PCI driver information for the cards we control
9784 * the OS will call our registered routines when it finds one of our cards.
9785 */
9786 static int __init hpsa_init(void)
9787 {
9788 int rc;
9789
9790 hpsa_sas_transport_template =
9791 sas_attach_transport(&hpsa_sas_transport_functions);
9792 if (!hpsa_sas_transport_template)
9793 return -ENODEV;
9794
9795 rc = pci_register_driver(&hpsa_pci_driver);
9796
9797 if (rc)
9798 sas_release_transport(hpsa_sas_transport_template);
9799
9800 return rc;
9801 }
9802
9803 static void __exit hpsa_cleanup(void)
9804 {
9805 pci_unregister_driver(&hpsa_pci_driver);
9806 sas_release_transport(hpsa_sas_transport_template);
9807 }
9808
9809 static void __attribute__((unused)) verify_offsets(void)
9810 {
9811 #define VERIFY_OFFSET(member, offset) \
9812 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9813
9814 VERIFY_OFFSET(structure_size, 0);
9815 VERIFY_OFFSET(volume_blk_size, 4);
9816 VERIFY_OFFSET(volume_blk_cnt, 8);
9817 VERIFY_OFFSET(phys_blk_shift, 16);
9818 VERIFY_OFFSET(parity_rotation_shift, 17);
9819 VERIFY_OFFSET(strip_size, 18);
9820 VERIFY_OFFSET(disk_starting_blk, 20);
9821 VERIFY_OFFSET(disk_blk_cnt, 28);
9822 VERIFY_OFFSET(data_disks_per_row, 36);
9823 VERIFY_OFFSET(metadata_disks_per_row, 38);
9824 VERIFY_OFFSET(row_cnt, 40);
9825 VERIFY_OFFSET(layout_map_count, 42);
9826 VERIFY_OFFSET(flags, 44);
9827 VERIFY_OFFSET(dekindex, 46);
9828 /* VERIFY_OFFSET(reserved, 48 */
9829 VERIFY_OFFSET(data, 64);
9830
9831 #undef VERIFY_OFFSET
9832
9833 #define VERIFY_OFFSET(member, offset) \
9834 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9835
9836 VERIFY_OFFSET(IU_type, 0);
9837 VERIFY_OFFSET(direction, 1);
9838 VERIFY_OFFSET(reply_queue, 2);
9839 /* VERIFY_OFFSET(reserved1, 3); */
9840 VERIFY_OFFSET(scsi_nexus, 4);
9841 VERIFY_OFFSET(Tag, 8);
9842 VERIFY_OFFSET(cdb, 16);
9843 VERIFY_OFFSET(cciss_lun, 32);
9844 VERIFY_OFFSET(data_len, 40);
9845 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9846 VERIFY_OFFSET(sg_count, 45);
9847 /* VERIFY_OFFSET(reserved3 */
9848 VERIFY_OFFSET(err_ptr, 48);
9849 VERIFY_OFFSET(err_len, 56);
9850 /* VERIFY_OFFSET(reserved4 */
9851 VERIFY_OFFSET(sg, 64);
9852
9853 #undef VERIFY_OFFSET
9854
9855 #define VERIFY_OFFSET(member, offset) \
9856 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9857
9858 VERIFY_OFFSET(dev_handle, 0x00);
9859 VERIFY_OFFSET(reserved1, 0x02);
9860 VERIFY_OFFSET(function, 0x03);
9861 VERIFY_OFFSET(reserved2, 0x04);
9862 VERIFY_OFFSET(err_info, 0x0C);
9863 VERIFY_OFFSET(reserved3, 0x10);
9864 VERIFY_OFFSET(err_info_len, 0x12);
9865 VERIFY_OFFSET(reserved4, 0x13);
9866 VERIFY_OFFSET(sgl_offset, 0x14);
9867 VERIFY_OFFSET(reserved5, 0x15);
9868 VERIFY_OFFSET(transfer_len, 0x1C);
9869 VERIFY_OFFSET(reserved6, 0x20);
9870 VERIFY_OFFSET(io_flags, 0x24);
9871 VERIFY_OFFSET(reserved7, 0x26);
9872 VERIFY_OFFSET(LUN, 0x34);
9873 VERIFY_OFFSET(control, 0x3C);
9874 VERIFY_OFFSET(CDB, 0x40);
9875 VERIFY_OFFSET(reserved8, 0x50);
9876 VERIFY_OFFSET(host_context_flags, 0x60);
9877 VERIFY_OFFSET(timeout_sec, 0x62);
9878 VERIFY_OFFSET(ReplyQueue, 0x64);
9879 VERIFY_OFFSET(reserved9, 0x65);
9880 VERIFY_OFFSET(tag, 0x68);
9881 VERIFY_OFFSET(host_addr, 0x70);
9882 VERIFY_OFFSET(CISS_LUN, 0x78);
9883 VERIFY_OFFSET(SG, 0x78 + 8);
9884 #undef VERIFY_OFFSET
9885 }
9886
9887 module_init(hpsa_init);
9888 module_exit(hpsa_cleanup);
Linux with added FPC-III support