usb: xhci: Fix build warning seen with CONFIG_PM=n
[linux/fpc-iii.git] / drivers / mtd / nand / onenand / onenand_base.c
blob77bd32a683e180f4f438d56e382cecb1ac10d967
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright © 2005-2009 Samsung Electronics
4 * Copyright © 2007 Nokia Corporation
6 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Credits:
9 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
10 * auto-placement support, read-while load support, various fixes
12 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
13 * Flex-OneNAND support
14 * Amul Kumar Saha <amul.saha at samsung.com>
15 * OTP support
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/slab.h>
22 #include <linux/sched.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/jiffies.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/onenand.h>
28 #include <linux/mtd/partitions.h>
30 #include <asm/io.h>
33 * Multiblock erase if number of blocks to erase is 2 or more.
34 * Maximum number of blocks for simultaneous erase is 64.
36 #define MB_ERASE_MIN_BLK_COUNT 2
37 #define MB_ERASE_MAX_BLK_COUNT 64
39 /* Default Flex-OneNAND boundary and lock respectively */
40 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
42 module_param_array(flex_bdry, int, NULL, 0400);
43 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
44 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
45 "DIE_BDRY: SLC boundary of the die"
46 "LOCK: Locking information for SLC boundary"
47 " : 0->Set boundary in unlocked status"
48 " : 1->Set boundary in locked status");
50 /* Default OneNAND/Flex-OneNAND OTP options*/
51 static int otp;
53 module_param(otp, int, 0400);
54 MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
55 "Syntax : otp=LOCK_TYPE"
56 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
57 " : 0 -> Default (No Blocks Locked)"
58 " : 1 -> OTP Block lock"
59 " : 2 -> 1st Block lock"
60 " : 3 -> BOTH OTP Block and 1st Block lock");
63 * flexonenand_oob_128 - oob info for Flex-Onenand with 4KB page
64 * For now, we expose only 64 out of 80 ecc bytes
66 static int flexonenand_ooblayout_ecc(struct mtd_info *mtd, int section,
67 struct mtd_oob_region *oobregion)
69 if (section > 7)
70 return -ERANGE;
72 oobregion->offset = (section * 16) + 6;
73 oobregion->length = 10;
75 return 0;
78 static int flexonenand_ooblayout_free(struct mtd_info *mtd, int section,
79 struct mtd_oob_region *oobregion)
81 if (section > 7)
82 return -ERANGE;
84 oobregion->offset = (section * 16) + 2;
85 oobregion->length = 4;
87 return 0;
90 static const struct mtd_ooblayout_ops flexonenand_ooblayout_ops = {
91 .ecc = flexonenand_ooblayout_ecc,
92 .free = flexonenand_ooblayout_free,
96 * onenand_oob_128 - oob info for OneNAND with 4KB page
98 * Based on specification:
99 * 4Gb M-die OneNAND Flash (KFM4G16Q4M, KFN8G16Q4M). Rev. 1.3, Apr. 2010
102 static int onenand_ooblayout_128_ecc(struct mtd_info *mtd, int section,
103 struct mtd_oob_region *oobregion)
105 if (section > 7)
106 return -ERANGE;
108 oobregion->offset = (section * 16) + 7;
109 oobregion->length = 9;
111 return 0;
114 static int onenand_ooblayout_128_free(struct mtd_info *mtd, int section,
115 struct mtd_oob_region *oobregion)
117 if (section >= 8)
118 return -ERANGE;
121 * free bytes are using the spare area fields marked as
122 * "Managed by internal ECC logic for Logical Sector Number area"
124 oobregion->offset = (section * 16) + 2;
125 oobregion->length = 3;
127 return 0;
130 static const struct mtd_ooblayout_ops onenand_oob_128_ooblayout_ops = {
131 .ecc = onenand_ooblayout_128_ecc,
132 .free = onenand_ooblayout_128_free,
136 * onenand_oob_32_64 - oob info for large (2KB) page
138 static int onenand_ooblayout_32_64_ecc(struct mtd_info *mtd, int section,
139 struct mtd_oob_region *oobregion)
141 if (section > 3)
142 return -ERANGE;
144 oobregion->offset = (section * 16) + 8;
145 oobregion->length = 5;
147 return 0;
150 static int onenand_ooblayout_32_64_free(struct mtd_info *mtd, int section,
151 struct mtd_oob_region *oobregion)
153 int sections = (mtd->oobsize / 32) * 2;
155 if (section >= sections)
156 return -ERANGE;
158 if (section & 1) {
159 oobregion->offset = ((section - 1) * 16) + 14;
160 oobregion->length = 2;
161 } else {
162 oobregion->offset = (section * 16) + 2;
163 oobregion->length = 3;
166 return 0;
169 static const struct mtd_ooblayout_ops onenand_oob_32_64_ooblayout_ops = {
170 .ecc = onenand_ooblayout_32_64_ecc,
171 .free = onenand_ooblayout_32_64_free,
174 static const unsigned char ffchars[] = {
175 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
176 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
177 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
178 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
179 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
180 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
181 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
182 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
183 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
184 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
185 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
186 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
187 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
188 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
189 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
190 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
194 * onenand_readw - [OneNAND Interface] Read OneNAND register
195 * @param addr address to read
197 * Read OneNAND register
199 static unsigned short onenand_readw(void __iomem *addr)
201 return readw(addr);
205 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
206 * @param value value to write
207 * @param addr address to write
209 * Write OneNAND register with value
211 static void onenand_writew(unsigned short value, void __iomem *addr)
213 writew(value, addr);
217 * onenand_block_address - [DEFAULT] Get block address
218 * @param this onenand chip data structure
219 * @param block the block
220 * @return translated block address if DDP, otherwise same
222 * Setup Start Address 1 Register (F100h)
224 static int onenand_block_address(struct onenand_chip *this, int block)
226 /* Device Flash Core select, NAND Flash Block Address */
227 if (block & this->density_mask)
228 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
230 return block;
234 * onenand_bufferram_address - [DEFAULT] Get bufferram address
235 * @param this onenand chip data structure
236 * @param block the block
237 * @return set DBS value if DDP, otherwise 0
239 * Setup Start Address 2 Register (F101h) for DDP
241 static int onenand_bufferram_address(struct onenand_chip *this, int block)
243 /* Device BufferRAM Select */
244 if (block & this->density_mask)
245 return ONENAND_DDP_CHIP1;
247 return ONENAND_DDP_CHIP0;
251 * onenand_page_address - [DEFAULT] Get page address
252 * @param page the page address
253 * @param sector the sector address
254 * @return combined page and sector address
256 * Setup Start Address 8 Register (F107h)
258 static int onenand_page_address(int page, int sector)
260 /* Flash Page Address, Flash Sector Address */
261 int fpa, fsa;
263 fpa = page & ONENAND_FPA_MASK;
264 fsa = sector & ONENAND_FSA_MASK;
266 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
270 * onenand_buffer_address - [DEFAULT] Get buffer address
271 * @param dataram1 DataRAM index
272 * @param sectors the sector address
273 * @param count the number of sectors
274 * @return the start buffer value
276 * Setup Start Buffer Register (F200h)
278 static int onenand_buffer_address(int dataram1, int sectors, int count)
280 int bsa, bsc;
282 /* BufferRAM Sector Address */
283 bsa = sectors & ONENAND_BSA_MASK;
285 if (dataram1)
286 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
287 else
288 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
290 /* BufferRAM Sector Count */
291 bsc = count & ONENAND_BSC_MASK;
293 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
297 * flexonenand_block- For given address return block number
298 * @param this - OneNAND device structure
299 * @param addr - Address for which block number is needed
301 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
303 unsigned boundary, blk, die = 0;
305 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
306 die = 1;
307 addr -= this->diesize[0];
310 boundary = this->boundary[die];
312 blk = addr >> (this->erase_shift - 1);
313 if (blk > boundary)
314 blk = (blk + boundary + 1) >> 1;
316 blk += die ? this->density_mask : 0;
317 return blk;
320 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
322 if (!FLEXONENAND(this))
323 return addr >> this->erase_shift;
324 return flexonenand_block(this, addr);
328 * flexonenand_addr - Return address of the block
329 * @this: OneNAND device structure
330 * @block: Block number on Flex-OneNAND
332 * Return address of the block
334 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
336 loff_t ofs = 0;
337 int die = 0, boundary;
339 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
340 block -= this->density_mask;
341 die = 1;
342 ofs = this->diesize[0];
345 boundary = this->boundary[die];
346 ofs += (loff_t)block << (this->erase_shift - 1);
347 if (block > (boundary + 1))
348 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
349 return ofs;
352 loff_t onenand_addr(struct onenand_chip *this, int block)
354 if (!FLEXONENAND(this))
355 return (loff_t)block << this->erase_shift;
356 return flexonenand_addr(this, block);
358 EXPORT_SYMBOL(onenand_addr);
361 * onenand_get_density - [DEFAULT] Get OneNAND density
362 * @param dev_id OneNAND device ID
364 * Get OneNAND density from device ID
366 static inline int onenand_get_density(int dev_id)
368 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
369 return (density & ONENAND_DEVICE_DENSITY_MASK);
373 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
374 * @param mtd MTD device structure
375 * @param addr address whose erase region needs to be identified
377 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
379 int i;
381 for (i = 0; i < mtd->numeraseregions; i++)
382 if (addr < mtd->eraseregions[i].offset)
383 break;
384 return i - 1;
386 EXPORT_SYMBOL(flexonenand_region);
389 * onenand_command - [DEFAULT] Send command to OneNAND device
390 * @param mtd MTD device structure
391 * @param cmd the command to be sent
392 * @param addr offset to read from or write to
393 * @param len number of bytes to read or write
395 * Send command to OneNAND device. This function is used for middle/large page
396 * devices (1KB/2KB Bytes per page)
398 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
400 struct onenand_chip *this = mtd->priv;
401 int value, block, page;
403 /* Address translation */
404 switch (cmd) {
405 case ONENAND_CMD_UNLOCK:
406 case ONENAND_CMD_LOCK:
407 case ONENAND_CMD_LOCK_TIGHT:
408 case ONENAND_CMD_UNLOCK_ALL:
409 block = -1;
410 page = -1;
411 break;
413 case FLEXONENAND_CMD_PI_ACCESS:
414 /* addr contains die index */
415 block = addr * this->density_mask;
416 page = -1;
417 break;
419 case ONENAND_CMD_ERASE:
420 case ONENAND_CMD_MULTIBLOCK_ERASE:
421 case ONENAND_CMD_ERASE_VERIFY:
422 case ONENAND_CMD_BUFFERRAM:
423 case ONENAND_CMD_OTP_ACCESS:
424 block = onenand_block(this, addr);
425 page = -1;
426 break;
428 case FLEXONENAND_CMD_READ_PI:
429 cmd = ONENAND_CMD_READ;
430 block = addr * this->density_mask;
431 page = 0;
432 break;
434 default:
435 block = onenand_block(this, addr);
436 if (FLEXONENAND(this))
437 page = (int) (addr - onenand_addr(this, block))>>\
438 this->page_shift;
439 else
440 page = (int) (addr >> this->page_shift);
441 if (ONENAND_IS_2PLANE(this)) {
442 /* Make the even block number */
443 block &= ~1;
444 /* Is it the odd plane? */
445 if (addr & this->writesize)
446 block++;
447 page >>= 1;
449 page &= this->page_mask;
450 break;
453 /* NOTE: The setting order of the registers is very important! */
454 if (cmd == ONENAND_CMD_BUFFERRAM) {
455 /* Select DataRAM for DDP */
456 value = onenand_bufferram_address(this, block);
457 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
459 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
460 /* It is always BufferRAM0 */
461 ONENAND_SET_BUFFERRAM0(this);
462 else
463 /* Switch to the next data buffer */
464 ONENAND_SET_NEXT_BUFFERRAM(this);
466 return 0;
469 if (block != -1) {
470 /* Write 'DFS, FBA' of Flash */
471 value = onenand_block_address(this, block);
472 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
474 /* Select DataRAM for DDP */
475 value = onenand_bufferram_address(this, block);
476 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
479 if (page != -1) {
480 /* Now we use page size operation */
481 int sectors = 0, count = 0;
482 int dataram;
484 switch (cmd) {
485 case FLEXONENAND_CMD_RECOVER_LSB:
486 case ONENAND_CMD_READ:
487 case ONENAND_CMD_READOOB:
488 if (ONENAND_IS_4KB_PAGE(this))
489 /* It is always BufferRAM0 */
490 dataram = ONENAND_SET_BUFFERRAM0(this);
491 else
492 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
493 break;
495 default:
496 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
497 cmd = ONENAND_CMD_2X_PROG;
498 dataram = ONENAND_CURRENT_BUFFERRAM(this);
499 break;
502 /* Write 'FPA, FSA' of Flash */
503 value = onenand_page_address(page, sectors);
504 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
506 /* Write 'BSA, BSC' of DataRAM */
507 value = onenand_buffer_address(dataram, sectors, count);
508 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
511 /* Interrupt clear */
512 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
514 /* Write command */
515 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
517 return 0;
521 * onenand_read_ecc - return ecc status
522 * @param this onenand chip structure
524 static inline int onenand_read_ecc(struct onenand_chip *this)
526 int ecc, i, result = 0;
528 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
529 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
531 for (i = 0; i < 4; i++) {
532 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
533 if (likely(!ecc))
534 continue;
535 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
536 return ONENAND_ECC_2BIT_ALL;
537 else
538 result = ONENAND_ECC_1BIT_ALL;
541 return result;
545 * onenand_wait - [DEFAULT] wait until the command is done
546 * @param mtd MTD device structure
547 * @param state state to select the max. timeout value
549 * Wait for command done. This applies to all OneNAND command
550 * Read can take up to 30us, erase up to 2ms and program up to 350us
551 * according to general OneNAND specs
553 static int onenand_wait(struct mtd_info *mtd, int state)
555 struct onenand_chip * this = mtd->priv;
556 unsigned long timeout;
557 unsigned int flags = ONENAND_INT_MASTER;
558 unsigned int interrupt = 0;
559 unsigned int ctrl;
561 /* The 20 msec is enough */
562 timeout = jiffies + msecs_to_jiffies(20);
563 while (time_before(jiffies, timeout)) {
564 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
566 if (interrupt & flags)
567 break;
569 if (state != FL_READING && state != FL_PREPARING_ERASE)
570 cond_resched();
572 /* To get correct interrupt status in timeout case */
573 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
575 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
578 * In the Spec. it checks the controller status first
579 * However if you get the correct information in case of
580 * power off recovery (POR) test, it should read ECC status first
582 if (interrupt & ONENAND_INT_READ) {
583 int ecc = onenand_read_ecc(this);
584 if (ecc) {
585 if (ecc & ONENAND_ECC_2BIT_ALL) {
586 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
587 __func__, ecc);
588 mtd->ecc_stats.failed++;
589 return -EBADMSG;
590 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
591 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
592 __func__, ecc);
593 mtd->ecc_stats.corrected++;
596 } else if (state == FL_READING) {
597 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
598 __func__, ctrl, interrupt);
599 return -EIO;
602 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
603 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
604 __func__, ctrl, interrupt);
605 return -EIO;
608 if (!(interrupt & ONENAND_INT_MASTER)) {
609 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
610 __func__, ctrl, interrupt);
611 return -EIO;
614 /* If there's controller error, it's a real error */
615 if (ctrl & ONENAND_CTRL_ERROR) {
616 printk(KERN_ERR "%s: controller error = 0x%04x\n",
617 __func__, ctrl);
618 if (ctrl & ONENAND_CTRL_LOCK)
619 printk(KERN_ERR "%s: it's locked error.\n", __func__);
620 return -EIO;
623 return 0;
627 * onenand_interrupt - [DEFAULT] onenand interrupt handler
628 * @param irq onenand interrupt number
629 * @param dev_id interrupt data
631 * complete the work
633 static irqreturn_t onenand_interrupt(int irq, void *data)
635 struct onenand_chip *this = data;
637 /* To handle shared interrupt */
638 if (!this->complete.done)
639 complete(&this->complete);
641 return IRQ_HANDLED;
645 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
646 * @param mtd MTD device structure
647 * @param state state to select the max. timeout value
649 * Wait for command done.
651 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
653 struct onenand_chip *this = mtd->priv;
655 wait_for_completion(&this->complete);
657 return onenand_wait(mtd, state);
661 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
662 * @param mtd MTD device structure
663 * @param state state to select the max. timeout value
665 * Try interrupt based wait (It is used one-time)
667 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
669 struct onenand_chip *this = mtd->priv;
670 unsigned long remain, timeout;
672 /* We use interrupt wait first */
673 this->wait = onenand_interrupt_wait;
675 timeout = msecs_to_jiffies(100);
676 remain = wait_for_completion_timeout(&this->complete, timeout);
677 if (!remain) {
678 printk(KERN_INFO "OneNAND: There's no interrupt. "
679 "We use the normal wait\n");
681 /* Release the irq */
682 free_irq(this->irq, this);
684 this->wait = onenand_wait;
687 return onenand_wait(mtd, state);
691 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
692 * @param mtd MTD device structure
694 * There's two method to wait onenand work
695 * 1. polling - read interrupt status register
696 * 2. interrupt - use the kernel interrupt method
698 static void onenand_setup_wait(struct mtd_info *mtd)
700 struct onenand_chip *this = mtd->priv;
701 int syscfg;
703 init_completion(&this->complete);
705 if (this->irq <= 0) {
706 this->wait = onenand_wait;
707 return;
710 if (request_irq(this->irq, &onenand_interrupt,
711 IRQF_SHARED, "onenand", this)) {
712 /* If we can't get irq, use the normal wait */
713 this->wait = onenand_wait;
714 return;
717 /* Enable interrupt */
718 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
719 syscfg |= ONENAND_SYS_CFG1_IOBE;
720 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
722 this->wait = onenand_try_interrupt_wait;
726 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
727 * @param mtd MTD data structure
728 * @param area BufferRAM area
729 * @return offset given area
731 * Return BufferRAM offset given area
733 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
735 struct onenand_chip *this = mtd->priv;
737 if (ONENAND_CURRENT_BUFFERRAM(this)) {
738 /* Note: the 'this->writesize' is a real page size */
739 if (area == ONENAND_DATARAM)
740 return this->writesize;
741 if (area == ONENAND_SPARERAM)
742 return mtd->oobsize;
745 return 0;
749 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
750 * @param mtd MTD data structure
751 * @param area BufferRAM area
752 * @param buffer the databuffer to put/get data
753 * @param offset offset to read from or write to
754 * @param count number of bytes to read/write
756 * Read the BufferRAM area
758 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
759 unsigned char *buffer, int offset, size_t count)
761 struct onenand_chip *this = mtd->priv;
762 void __iomem *bufferram;
764 bufferram = this->base + area;
766 bufferram += onenand_bufferram_offset(mtd, area);
768 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
769 unsigned short word;
771 /* Align with word(16-bit) size */
772 count--;
774 /* Read word and save byte */
775 word = this->read_word(bufferram + offset + count);
776 buffer[count] = (word & 0xff);
779 memcpy(buffer, bufferram + offset, count);
781 return 0;
785 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
786 * @param mtd MTD data structure
787 * @param area BufferRAM area
788 * @param buffer the databuffer to put/get data
789 * @param offset offset to read from or write to
790 * @param count number of bytes to read/write
792 * Read the BufferRAM area with Sync. Burst Mode
794 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
795 unsigned char *buffer, int offset, size_t count)
797 struct onenand_chip *this = mtd->priv;
798 void __iomem *bufferram;
800 bufferram = this->base + area;
802 bufferram += onenand_bufferram_offset(mtd, area);
804 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
806 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
807 unsigned short word;
809 /* Align with word(16-bit) size */
810 count--;
812 /* Read word and save byte */
813 word = this->read_word(bufferram + offset + count);
814 buffer[count] = (word & 0xff);
817 memcpy(buffer, bufferram + offset, count);
819 this->mmcontrol(mtd, 0);
821 return 0;
825 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
826 * @param mtd MTD data structure
827 * @param area BufferRAM area
828 * @param buffer the databuffer to put/get data
829 * @param offset offset to read from or write to
830 * @param count number of bytes to read/write
832 * Write the BufferRAM area
834 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
835 const unsigned char *buffer, int offset, size_t count)
837 struct onenand_chip *this = mtd->priv;
838 void __iomem *bufferram;
840 bufferram = this->base + area;
842 bufferram += onenand_bufferram_offset(mtd, area);
844 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
845 unsigned short word;
846 int byte_offset;
848 /* Align with word(16-bit) size */
849 count--;
851 /* Calculate byte access offset */
852 byte_offset = offset + count;
854 /* Read word and save byte */
855 word = this->read_word(bufferram + byte_offset);
856 word = (word & ~0xff) | buffer[count];
857 this->write_word(word, bufferram + byte_offset);
860 memcpy(bufferram + offset, buffer, count);
862 return 0;
866 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
867 * @param mtd MTD data structure
868 * @param addr address to check
869 * @return blockpage address
871 * Get blockpage address at 2x program mode
873 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
875 struct onenand_chip *this = mtd->priv;
876 int blockpage, block, page;
878 /* Calculate the even block number */
879 block = (int) (addr >> this->erase_shift) & ~1;
880 /* Is it the odd plane? */
881 if (addr & this->writesize)
882 block++;
883 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
884 blockpage = (block << 7) | page;
886 return blockpage;
890 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
891 * @param mtd MTD data structure
892 * @param addr address to check
893 * @return 1 if there are valid data, otherwise 0
895 * Check bufferram if there is data we required
897 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
899 struct onenand_chip *this = mtd->priv;
900 int blockpage, found = 0;
901 unsigned int i;
903 if (ONENAND_IS_2PLANE(this))
904 blockpage = onenand_get_2x_blockpage(mtd, addr);
905 else
906 blockpage = (int) (addr >> this->page_shift);
908 /* Is there valid data? */
909 i = ONENAND_CURRENT_BUFFERRAM(this);
910 if (this->bufferram[i].blockpage == blockpage)
911 found = 1;
912 else {
913 /* Check another BufferRAM */
914 i = ONENAND_NEXT_BUFFERRAM(this);
915 if (this->bufferram[i].blockpage == blockpage) {
916 ONENAND_SET_NEXT_BUFFERRAM(this);
917 found = 1;
921 if (found && ONENAND_IS_DDP(this)) {
922 /* Select DataRAM for DDP */
923 int block = onenand_block(this, addr);
924 int value = onenand_bufferram_address(this, block);
925 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
928 return found;
932 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
933 * @param mtd MTD data structure
934 * @param addr address to update
935 * @param valid valid flag
937 * Update BufferRAM information
939 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
940 int valid)
942 struct onenand_chip *this = mtd->priv;
943 int blockpage;
944 unsigned int i;
946 if (ONENAND_IS_2PLANE(this))
947 blockpage = onenand_get_2x_blockpage(mtd, addr);
948 else
949 blockpage = (int) (addr >> this->page_shift);
951 /* Invalidate another BufferRAM */
952 i = ONENAND_NEXT_BUFFERRAM(this);
953 if (this->bufferram[i].blockpage == blockpage)
954 this->bufferram[i].blockpage = -1;
956 /* Update BufferRAM */
957 i = ONENAND_CURRENT_BUFFERRAM(this);
958 if (valid)
959 this->bufferram[i].blockpage = blockpage;
960 else
961 this->bufferram[i].blockpage = -1;
965 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
966 * @param mtd MTD data structure
967 * @param addr start address to invalidate
968 * @param len length to invalidate
970 * Invalidate BufferRAM information
972 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
973 unsigned int len)
975 struct onenand_chip *this = mtd->priv;
976 int i;
977 loff_t end_addr = addr + len;
979 /* Invalidate BufferRAM */
980 for (i = 0; i < MAX_BUFFERRAM; i++) {
981 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
982 if (buf_addr >= addr && buf_addr < end_addr)
983 this->bufferram[i].blockpage = -1;
988 * onenand_get_device - [GENERIC] Get chip for selected access
989 * @param mtd MTD device structure
990 * @param new_state the state which is requested
992 * Get the device and lock it for exclusive access
994 static int onenand_get_device(struct mtd_info *mtd, int new_state)
996 struct onenand_chip *this = mtd->priv;
997 DECLARE_WAITQUEUE(wait, current);
1000 * Grab the lock and see if the device is available
1002 while (1) {
1003 spin_lock(&this->chip_lock);
1004 if (this->state == FL_READY) {
1005 this->state = new_state;
1006 spin_unlock(&this->chip_lock);
1007 if (new_state != FL_PM_SUSPENDED && this->enable)
1008 this->enable(mtd);
1009 break;
1011 if (new_state == FL_PM_SUSPENDED) {
1012 spin_unlock(&this->chip_lock);
1013 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
1015 set_current_state(TASK_UNINTERRUPTIBLE);
1016 add_wait_queue(&this->wq, &wait);
1017 spin_unlock(&this->chip_lock);
1018 schedule();
1019 remove_wait_queue(&this->wq, &wait);
1022 return 0;
1026 * onenand_release_device - [GENERIC] release chip
1027 * @param mtd MTD device structure
1029 * Deselect, release chip lock and wake up anyone waiting on the device
1031 static void onenand_release_device(struct mtd_info *mtd)
1033 struct onenand_chip *this = mtd->priv;
1035 if (this->state != FL_PM_SUSPENDED && this->disable)
1036 this->disable(mtd);
1037 /* Release the chip */
1038 spin_lock(&this->chip_lock);
1039 this->state = FL_READY;
1040 wake_up(&this->wq);
1041 spin_unlock(&this->chip_lock);
1045 * onenand_transfer_auto_oob - [INTERN] oob auto-placement transfer
1046 * @param mtd MTD device structure
1047 * @param buf destination address
1048 * @param column oob offset to read from
1049 * @param thislen oob length to read
1051 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
1052 int thislen)
1054 struct onenand_chip *this = mtd->priv;
1055 int ret;
1057 this->read_bufferram(mtd, ONENAND_SPARERAM, this->oob_buf, 0,
1058 mtd->oobsize);
1059 ret = mtd_ooblayout_get_databytes(mtd, buf, this->oob_buf,
1060 column, thislen);
1061 if (ret)
1062 return ret;
1064 return 0;
1068 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1069 * @param mtd MTD device structure
1070 * @param addr address to recover
1071 * @param status return value from onenand_wait / onenand_bbt_wait
1073 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1074 * lower page address and MSB page has higher page address in paired pages.
1075 * If power off occurs during MSB page program, the paired LSB page data can
1076 * become corrupt. LSB page recovery read is a way to read LSB page though page
1077 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1078 * read after power up, issue LSB page recovery read.
1080 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1082 struct onenand_chip *this = mtd->priv;
1083 int i;
1085 /* Recovery is only for Flex-OneNAND */
1086 if (!FLEXONENAND(this))
1087 return status;
1089 /* check if we failed due to uncorrectable error */
1090 if (!mtd_is_eccerr(status) && status != ONENAND_BBT_READ_ECC_ERROR)
1091 return status;
1093 /* check if address lies in MLC region */
1094 i = flexonenand_region(mtd, addr);
1095 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1096 return status;
1098 /* We are attempting to reread, so decrement stats.failed
1099 * which was incremented by onenand_wait due to read failure
1101 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1102 __func__);
1103 mtd->ecc_stats.failed--;
1105 /* Issue the LSB page recovery command */
1106 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1107 return this->wait(mtd, FL_READING);
1111 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1112 * @param mtd MTD device structure
1113 * @param from offset to read from
1114 * @param ops: oob operation description structure
1116 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1117 * So, read-while-load is not present.
1119 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1120 struct mtd_oob_ops *ops)
1122 struct onenand_chip *this = mtd->priv;
1123 struct mtd_ecc_stats stats;
1124 size_t len = ops->len;
1125 size_t ooblen = ops->ooblen;
1126 u_char *buf = ops->datbuf;
1127 u_char *oobbuf = ops->oobbuf;
1128 int read = 0, column, thislen;
1129 int oobread = 0, oobcolumn, thisooblen, oobsize;
1130 int ret = 0;
1131 int writesize = this->writesize;
1133 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1134 (int)len);
1136 oobsize = mtd_oobavail(mtd, ops);
1137 oobcolumn = from & (mtd->oobsize - 1);
1139 /* Do not allow reads past end of device */
1140 if (from + len > mtd->size) {
1141 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1142 __func__);
1143 ops->retlen = 0;
1144 ops->oobretlen = 0;
1145 return -EINVAL;
1148 stats = mtd->ecc_stats;
1150 while (read < len) {
1151 cond_resched();
1153 thislen = min_t(int, writesize, len - read);
1155 column = from & (writesize - 1);
1156 if (column + thislen > writesize)
1157 thislen = writesize - column;
1159 if (!onenand_check_bufferram(mtd, from)) {
1160 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1162 ret = this->wait(mtd, FL_READING);
1163 if (unlikely(ret))
1164 ret = onenand_recover_lsb(mtd, from, ret);
1165 onenand_update_bufferram(mtd, from, !ret);
1166 if (mtd_is_eccerr(ret))
1167 ret = 0;
1168 if (ret)
1169 break;
1172 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1173 if (oobbuf) {
1174 thisooblen = oobsize - oobcolumn;
1175 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1177 if (ops->mode == MTD_OPS_AUTO_OOB)
1178 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1179 else
1180 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1181 oobread += thisooblen;
1182 oobbuf += thisooblen;
1183 oobcolumn = 0;
1186 read += thislen;
1187 if (read == len)
1188 break;
1190 from += thislen;
1191 buf += thislen;
1195 * Return success, if no ECC failures, else -EBADMSG
1196 * fs driver will take care of that, because
1197 * retlen == desired len and result == -EBADMSG
1199 ops->retlen = read;
1200 ops->oobretlen = oobread;
1202 if (ret)
1203 return ret;
1205 if (mtd->ecc_stats.failed - stats.failed)
1206 return -EBADMSG;
1208 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1209 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1213 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1214 * @param mtd MTD device structure
1215 * @param from offset to read from
1216 * @param ops: oob operation description structure
1218 * OneNAND read main and/or out-of-band data
1220 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1221 struct mtd_oob_ops *ops)
1223 struct onenand_chip *this = mtd->priv;
1224 struct mtd_ecc_stats stats;
1225 size_t len = ops->len;
1226 size_t ooblen = ops->ooblen;
1227 u_char *buf = ops->datbuf;
1228 u_char *oobbuf = ops->oobbuf;
1229 int read = 0, column, thislen;
1230 int oobread = 0, oobcolumn, thisooblen, oobsize;
1231 int ret = 0, boundary = 0;
1232 int writesize = this->writesize;
1234 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1235 (int)len);
1237 oobsize = mtd_oobavail(mtd, ops);
1238 oobcolumn = from & (mtd->oobsize - 1);
1240 /* Do not allow reads past end of device */
1241 if ((from + len) > mtd->size) {
1242 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1243 __func__);
1244 ops->retlen = 0;
1245 ops->oobretlen = 0;
1246 return -EINVAL;
1249 stats = mtd->ecc_stats;
1251 /* Read-while-load method */
1253 /* Do first load to bufferRAM */
1254 if (read < len) {
1255 if (!onenand_check_bufferram(mtd, from)) {
1256 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1257 ret = this->wait(mtd, FL_READING);
1258 onenand_update_bufferram(mtd, from, !ret);
1259 if (mtd_is_eccerr(ret))
1260 ret = 0;
1264 thislen = min_t(int, writesize, len - read);
1265 column = from & (writesize - 1);
1266 if (column + thislen > writesize)
1267 thislen = writesize - column;
1269 while (!ret) {
1270 /* If there is more to load then start next load */
1271 from += thislen;
1272 if (read + thislen < len) {
1273 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1275 * Chip boundary handling in DDP
1276 * Now we issued chip 1 read and pointed chip 1
1277 * bufferram so we have to point chip 0 bufferram.
1279 if (ONENAND_IS_DDP(this) &&
1280 unlikely(from == (this->chipsize >> 1))) {
1281 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1282 boundary = 1;
1283 } else
1284 boundary = 0;
1285 ONENAND_SET_PREV_BUFFERRAM(this);
1287 /* While load is going, read from last bufferRAM */
1288 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1290 /* Read oob area if needed */
1291 if (oobbuf) {
1292 thisooblen = oobsize - oobcolumn;
1293 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1295 if (ops->mode == MTD_OPS_AUTO_OOB)
1296 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1297 else
1298 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1299 oobread += thisooblen;
1300 oobbuf += thisooblen;
1301 oobcolumn = 0;
1304 /* See if we are done */
1305 read += thislen;
1306 if (read == len)
1307 break;
1308 /* Set up for next read from bufferRAM */
1309 if (unlikely(boundary))
1310 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1311 ONENAND_SET_NEXT_BUFFERRAM(this);
1312 buf += thislen;
1313 thislen = min_t(int, writesize, len - read);
1314 column = 0;
1315 cond_resched();
1316 /* Now wait for load */
1317 ret = this->wait(mtd, FL_READING);
1318 onenand_update_bufferram(mtd, from, !ret);
1319 if (mtd_is_eccerr(ret))
1320 ret = 0;
1324 * Return success, if no ECC failures, else -EBADMSG
1325 * fs driver will take care of that, because
1326 * retlen == desired len and result == -EBADMSG
1328 ops->retlen = read;
1329 ops->oobretlen = oobread;
1331 if (ret)
1332 return ret;
1334 if (mtd->ecc_stats.failed - stats.failed)
1335 return -EBADMSG;
1337 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */
1338 return mtd->ecc_stats.corrected != stats.corrected ? 1 : 0;
1342 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1343 * @param mtd MTD device structure
1344 * @param from offset to read from
1345 * @param ops: oob operation description structure
1347 * OneNAND read out-of-band data from the spare area
1349 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1350 struct mtd_oob_ops *ops)
1352 struct onenand_chip *this = mtd->priv;
1353 struct mtd_ecc_stats stats;
1354 int read = 0, thislen, column, oobsize;
1355 size_t len = ops->ooblen;
1356 unsigned int mode = ops->mode;
1357 u_char *buf = ops->oobbuf;
1358 int ret = 0, readcmd;
1360 from += ops->ooboffs;
1362 pr_debug("%s: from = 0x%08x, len = %i\n", __func__, (unsigned int)from,
1363 (int)len);
1365 /* Initialize return length value */
1366 ops->oobretlen = 0;
1368 if (mode == MTD_OPS_AUTO_OOB)
1369 oobsize = mtd->oobavail;
1370 else
1371 oobsize = mtd->oobsize;
1373 column = from & (mtd->oobsize - 1);
1375 if (unlikely(column >= oobsize)) {
1376 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1377 __func__);
1378 return -EINVAL;
1381 stats = mtd->ecc_stats;
1383 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1385 while (read < len) {
1386 cond_resched();
1388 thislen = oobsize - column;
1389 thislen = min_t(int, thislen, len);
1391 this->command(mtd, readcmd, from, mtd->oobsize);
1393 onenand_update_bufferram(mtd, from, 0);
1395 ret = this->wait(mtd, FL_READING);
1396 if (unlikely(ret))
1397 ret = onenand_recover_lsb(mtd, from, ret);
1399 if (ret && !mtd_is_eccerr(ret)) {
1400 printk(KERN_ERR "%s: read failed = 0x%x\n",
1401 __func__, ret);
1402 break;
1405 if (mode == MTD_OPS_AUTO_OOB)
1406 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1407 else
1408 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1410 read += thislen;
1412 if (read == len)
1413 break;
1415 buf += thislen;
1417 /* Read more? */
1418 if (read < len) {
1419 /* Page size */
1420 from += mtd->writesize;
1421 column = 0;
1425 ops->oobretlen = read;
1427 if (ret)
1428 return ret;
1430 if (mtd->ecc_stats.failed - stats.failed)
1431 return -EBADMSG;
1433 return 0;
1437 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1438 * @param mtd: MTD device structure
1439 * @param from: offset to read from
1440 * @param ops: oob operation description structure
1442 * Read main and/or out-of-band
1444 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1445 struct mtd_oob_ops *ops)
1447 struct onenand_chip *this = mtd->priv;
1448 int ret;
1450 switch (ops->mode) {
1451 case MTD_OPS_PLACE_OOB:
1452 case MTD_OPS_AUTO_OOB:
1453 break;
1454 case MTD_OPS_RAW:
1455 /* Not implemented yet */
1456 default:
1457 return -EINVAL;
1460 onenand_get_device(mtd, FL_READING);
1461 if (ops->datbuf)
1462 ret = ONENAND_IS_4KB_PAGE(this) ?
1463 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1464 onenand_read_ops_nolock(mtd, from, ops);
1465 else
1466 ret = onenand_read_oob_nolock(mtd, from, ops);
1467 onenand_release_device(mtd);
1469 return ret;
1473 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1474 * @param mtd MTD device structure
1475 * @param state state to select the max. timeout value
1477 * Wait for command done.
1479 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1481 struct onenand_chip *this = mtd->priv;
1482 unsigned long timeout;
1483 unsigned int interrupt, ctrl, ecc, addr1, addr8;
1485 /* The 20 msec is enough */
1486 timeout = jiffies + msecs_to_jiffies(20);
1487 while (time_before(jiffies, timeout)) {
1488 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1489 if (interrupt & ONENAND_INT_MASTER)
1490 break;
1492 /* To get correct interrupt status in timeout case */
1493 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1494 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1495 addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1);
1496 addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8);
1498 if (interrupt & ONENAND_INT_READ) {
1499 ecc = onenand_read_ecc(this);
1500 if (ecc & ONENAND_ECC_2BIT_ALL) {
1501 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x "
1502 "intr 0x%04x addr1 %#x addr8 %#x\n",
1503 __func__, ecc, ctrl, interrupt, addr1, addr8);
1504 return ONENAND_BBT_READ_ECC_ERROR;
1506 } else {
1507 printk(KERN_ERR "%s: read timeout! ctrl 0x%04x "
1508 "intr 0x%04x addr1 %#x addr8 %#x\n",
1509 __func__, ctrl, interrupt, addr1, addr8);
1510 return ONENAND_BBT_READ_FATAL_ERROR;
1513 /* Initial bad block case: 0x2400 or 0x0400 */
1514 if (ctrl & ONENAND_CTRL_ERROR) {
1515 printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x "
1516 "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8);
1517 return ONENAND_BBT_READ_ERROR;
1520 return 0;
1524 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1525 * @param mtd MTD device structure
1526 * @param from offset to read from
1527 * @param ops oob operation description structure
1529 * OneNAND read out-of-band data from the spare area for bbt scan
1531 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1532 struct mtd_oob_ops *ops)
1534 struct onenand_chip *this = mtd->priv;
1535 int read = 0, thislen, column;
1536 int ret = 0, readcmd;
1537 size_t len = ops->ooblen;
1538 u_char *buf = ops->oobbuf;
1540 pr_debug("%s: from = 0x%08x, len = %zi\n", __func__, (unsigned int)from,
1541 len);
1543 /* Initialize return value */
1544 ops->oobretlen = 0;
1546 /* Do not allow reads past end of device */
1547 if (unlikely((from + len) > mtd->size)) {
1548 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1549 __func__);
1550 return ONENAND_BBT_READ_FATAL_ERROR;
1553 /* Grab the lock and see if the device is available */
1554 onenand_get_device(mtd, FL_READING);
1556 column = from & (mtd->oobsize - 1);
1558 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1560 while (read < len) {
1561 cond_resched();
1563 thislen = mtd->oobsize - column;
1564 thislen = min_t(int, thislen, len);
1566 this->command(mtd, readcmd, from, mtd->oobsize);
1568 onenand_update_bufferram(mtd, from, 0);
1570 ret = this->bbt_wait(mtd, FL_READING);
1571 if (unlikely(ret))
1572 ret = onenand_recover_lsb(mtd, from, ret);
1574 if (ret)
1575 break;
1577 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1578 read += thislen;
1579 if (read == len)
1580 break;
1582 buf += thislen;
1584 /* Read more? */
1585 if (read < len) {
1586 /* Update Page size */
1587 from += this->writesize;
1588 column = 0;
1592 /* Deselect and wake up anyone waiting on the device */
1593 onenand_release_device(mtd);
1595 ops->oobretlen = read;
1596 return ret;
1599 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1601 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1602 * @param mtd MTD device structure
1603 * @param buf the databuffer to verify
1604 * @param to offset to read from
1606 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1608 struct onenand_chip *this = mtd->priv;
1609 u_char *oob_buf = this->oob_buf;
1610 int status, i, readcmd;
1612 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1614 this->command(mtd, readcmd, to, mtd->oobsize);
1615 onenand_update_bufferram(mtd, to, 0);
1616 status = this->wait(mtd, FL_READING);
1617 if (status)
1618 return status;
1620 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1621 for (i = 0; i < mtd->oobsize; i++)
1622 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1623 return -EBADMSG;
1625 return 0;
1629 * onenand_verify - [GENERIC] verify the chip contents after a write
1630 * @param mtd MTD device structure
1631 * @param buf the databuffer to verify
1632 * @param addr offset to read from
1633 * @param len number of bytes to read and compare
1635 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1637 struct onenand_chip *this = mtd->priv;
1638 int ret = 0;
1639 int thislen, column;
1641 column = addr & (this->writesize - 1);
1643 while (len != 0) {
1644 thislen = min_t(int, this->writesize - column, len);
1646 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1648 onenand_update_bufferram(mtd, addr, 0);
1650 ret = this->wait(mtd, FL_READING);
1651 if (ret)
1652 return ret;
1654 onenand_update_bufferram(mtd, addr, 1);
1656 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
1658 if (memcmp(buf, this->verify_buf + column, thislen))
1659 return -EBADMSG;
1661 len -= thislen;
1662 buf += thislen;
1663 addr += thislen;
1664 column = 0;
1667 return 0;
1669 #else
1670 #define onenand_verify(...) (0)
1671 #define onenand_verify_oob(...) (0)
1672 #endif
1674 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1676 static void onenand_panic_wait(struct mtd_info *mtd)
1678 struct onenand_chip *this = mtd->priv;
1679 unsigned int interrupt;
1680 int i;
1682 for (i = 0; i < 2000; i++) {
1683 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1684 if (interrupt & ONENAND_INT_MASTER)
1685 break;
1686 udelay(10);
1691 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1692 * @param mtd MTD device structure
1693 * @param to offset to write to
1694 * @param len number of bytes to write
1695 * @param retlen pointer to variable to store the number of written bytes
1696 * @param buf the data to write
1698 * Write with ECC
1700 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1701 size_t *retlen, const u_char *buf)
1703 struct onenand_chip *this = mtd->priv;
1704 int column, subpage;
1705 int written = 0;
1707 if (this->state == FL_PM_SUSPENDED)
1708 return -EBUSY;
1710 /* Wait for any existing operation to clear */
1711 onenand_panic_wait(mtd);
1713 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1714 (int)len);
1716 /* Reject writes, which are not page aligned */
1717 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1718 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1719 __func__);
1720 return -EINVAL;
1723 column = to & (mtd->writesize - 1);
1725 /* Loop until all data write */
1726 while (written < len) {
1727 int thislen = min_t(int, mtd->writesize - column, len - written);
1728 u_char *wbuf = (u_char *) buf;
1730 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1732 /* Partial page write */
1733 subpage = thislen < mtd->writesize;
1734 if (subpage) {
1735 memset(this->page_buf, 0xff, mtd->writesize);
1736 memcpy(this->page_buf + column, buf, thislen);
1737 wbuf = this->page_buf;
1740 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1741 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1743 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1745 onenand_panic_wait(mtd);
1747 /* In partial page write we don't update bufferram */
1748 onenand_update_bufferram(mtd, to, !subpage);
1749 if (ONENAND_IS_2PLANE(this)) {
1750 ONENAND_SET_BUFFERRAM1(this);
1751 onenand_update_bufferram(mtd, to + this->writesize, !subpage);
1754 written += thislen;
1756 if (written == len)
1757 break;
1759 column = 0;
1760 to += thislen;
1761 buf += thislen;
1764 *retlen = written;
1765 return 0;
1769 * onenand_fill_auto_oob - [INTERN] oob auto-placement transfer
1770 * @param mtd MTD device structure
1771 * @param oob_buf oob buffer
1772 * @param buf source address
1773 * @param column oob offset to write to
1774 * @param thislen oob length to write
1776 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1777 const u_char *buf, int column, int thislen)
1779 return mtd_ooblayout_set_databytes(mtd, buf, oob_buf, column, thislen);
1783 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1784 * @param mtd MTD device structure
1785 * @param to offset to write to
1786 * @param ops oob operation description structure
1788 * Write main and/or oob with ECC
1790 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1791 struct mtd_oob_ops *ops)
1793 struct onenand_chip *this = mtd->priv;
1794 int written = 0, column, thislen = 0, subpage = 0;
1795 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1796 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1797 size_t len = ops->len;
1798 size_t ooblen = ops->ooblen;
1799 const u_char *buf = ops->datbuf;
1800 const u_char *oob = ops->oobbuf;
1801 u_char *oobbuf;
1802 int ret = 0, cmd;
1804 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1805 (int)len);
1807 /* Initialize retlen, in case of early exit */
1808 ops->retlen = 0;
1809 ops->oobretlen = 0;
1811 /* Reject writes, which are not page aligned */
1812 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1813 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1814 __func__);
1815 return -EINVAL;
1818 /* Check zero length */
1819 if (!len)
1820 return 0;
1821 oobsize = mtd_oobavail(mtd, ops);
1822 oobcolumn = to & (mtd->oobsize - 1);
1824 column = to & (mtd->writesize - 1);
1826 /* Loop until all data write */
1827 while (1) {
1828 if (written < len) {
1829 u_char *wbuf = (u_char *) buf;
1831 thislen = min_t(int, mtd->writesize - column, len - written);
1832 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1834 cond_resched();
1836 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1838 /* Partial page write */
1839 subpage = thislen < mtd->writesize;
1840 if (subpage) {
1841 memset(this->page_buf, 0xff, mtd->writesize);
1842 memcpy(this->page_buf + column, buf, thislen);
1843 wbuf = this->page_buf;
1846 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1848 if (oob) {
1849 oobbuf = this->oob_buf;
1851 /* We send data to spare ram with oobsize
1852 * to prevent byte access */
1853 memset(oobbuf, 0xff, mtd->oobsize);
1854 if (ops->mode == MTD_OPS_AUTO_OOB)
1855 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1856 else
1857 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1859 oobwritten += thisooblen;
1860 oob += thisooblen;
1861 oobcolumn = 0;
1862 } else
1863 oobbuf = (u_char *) ffchars;
1865 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1866 } else
1867 ONENAND_SET_NEXT_BUFFERRAM(this);
1870 * 2 PLANE, MLC, and Flex-OneNAND do not support
1871 * write-while-program feature.
1873 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
1874 ONENAND_SET_PREV_BUFFERRAM(this);
1876 ret = this->wait(mtd, FL_WRITING);
1878 /* In partial page write we don't update bufferram */
1879 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1880 if (ret) {
1881 written -= prevlen;
1882 printk(KERN_ERR "%s: write failed %d\n",
1883 __func__, ret);
1884 break;
1887 if (written == len) {
1888 /* Only check verify write turn on */
1889 ret = onenand_verify(mtd, buf - len, to - len, len);
1890 if (ret)
1891 printk(KERN_ERR "%s: verify failed %d\n",
1892 __func__, ret);
1893 break;
1896 ONENAND_SET_NEXT_BUFFERRAM(this);
1899 this->ongoing = 0;
1900 cmd = ONENAND_CMD_PROG;
1902 /* Exclude 1st OTP and OTP blocks for cache program feature */
1903 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1904 likely(onenand_block(this, to) != 0) &&
1905 ONENAND_IS_4KB_PAGE(this) &&
1906 ((written + thislen) < len)) {
1907 cmd = ONENAND_CMD_2X_CACHE_PROG;
1908 this->ongoing = 1;
1911 this->command(mtd, cmd, to, mtd->writesize);
1914 * 2 PLANE, MLC, and Flex-OneNAND wait here
1916 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
1917 ret = this->wait(mtd, FL_WRITING);
1919 /* In partial page write we don't update bufferram */
1920 onenand_update_bufferram(mtd, to, !ret && !subpage);
1921 if (ret) {
1922 printk(KERN_ERR "%s: write failed %d\n",
1923 __func__, ret);
1924 break;
1927 /* Only check verify write turn on */
1928 ret = onenand_verify(mtd, buf, to, thislen);
1929 if (ret) {
1930 printk(KERN_ERR "%s: verify failed %d\n",
1931 __func__, ret);
1932 break;
1935 written += thislen;
1937 if (written == len)
1938 break;
1940 } else
1941 written += thislen;
1943 column = 0;
1944 prev_subpage = subpage;
1945 prev = to;
1946 prevlen = thislen;
1947 to += thislen;
1948 buf += thislen;
1949 first = 0;
1952 /* In error case, clear all bufferrams */
1953 if (written != len)
1954 onenand_invalidate_bufferram(mtd, 0, -1);
1956 ops->retlen = written;
1957 ops->oobretlen = oobwritten;
1959 return ret;
1964 * onenand_write_oob_nolock - [INTERN] OneNAND write out-of-band
1965 * @param mtd MTD device structure
1966 * @param to offset to write to
1967 * @param len number of bytes to write
1968 * @param retlen pointer to variable to store the number of written bytes
1969 * @param buf the data to write
1970 * @param mode operation mode
1972 * OneNAND write out-of-band
1974 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1975 struct mtd_oob_ops *ops)
1977 struct onenand_chip *this = mtd->priv;
1978 int column, ret = 0, oobsize;
1979 int written = 0, oobcmd;
1980 u_char *oobbuf;
1981 size_t len = ops->ooblen;
1982 const u_char *buf = ops->oobbuf;
1983 unsigned int mode = ops->mode;
1985 to += ops->ooboffs;
1987 pr_debug("%s: to = 0x%08x, len = %i\n", __func__, (unsigned int)to,
1988 (int)len);
1990 /* Initialize retlen, in case of early exit */
1991 ops->oobretlen = 0;
1993 if (mode == MTD_OPS_AUTO_OOB)
1994 oobsize = mtd->oobavail;
1995 else
1996 oobsize = mtd->oobsize;
1998 column = to & (mtd->oobsize - 1);
2000 if (unlikely(column >= oobsize)) {
2001 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2002 __func__);
2003 return -EINVAL;
2006 /* For compatibility with NAND: Do not allow write past end of page */
2007 if (unlikely(column + len > oobsize)) {
2008 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2009 __func__);
2010 return -EINVAL;
2013 oobbuf = this->oob_buf;
2015 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2017 /* Loop until all data write */
2018 while (written < len) {
2019 int thislen = min_t(int, oobsize, len - written);
2021 cond_resched();
2023 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2025 /* We send data to spare ram with oobsize
2026 * to prevent byte access */
2027 memset(oobbuf, 0xff, mtd->oobsize);
2028 if (mode == MTD_OPS_AUTO_OOB)
2029 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2030 else
2031 memcpy(oobbuf + column, buf, thislen);
2032 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2034 if (ONENAND_IS_4KB_PAGE(this)) {
2035 /* Set main area of DataRAM to 0xff*/
2036 memset(this->page_buf, 0xff, mtd->writesize);
2037 this->write_bufferram(mtd, ONENAND_DATARAM,
2038 this->page_buf, 0, mtd->writesize);
2041 this->command(mtd, oobcmd, to, mtd->oobsize);
2043 onenand_update_bufferram(mtd, to, 0);
2044 if (ONENAND_IS_2PLANE(this)) {
2045 ONENAND_SET_BUFFERRAM1(this);
2046 onenand_update_bufferram(mtd, to + this->writesize, 0);
2049 ret = this->wait(mtd, FL_WRITING);
2050 if (ret) {
2051 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2052 break;
2055 ret = onenand_verify_oob(mtd, oobbuf, to);
2056 if (ret) {
2057 printk(KERN_ERR "%s: verify failed %d\n",
2058 __func__, ret);
2059 break;
2062 written += thislen;
2063 if (written == len)
2064 break;
2066 to += mtd->writesize;
2067 buf += thislen;
2068 column = 0;
2071 ops->oobretlen = written;
2073 return ret;
2077 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2078 * @param mtd: MTD device structure
2079 * @param to: offset to write
2080 * @param ops: oob operation description structure
2082 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2083 struct mtd_oob_ops *ops)
2085 int ret;
2087 switch (ops->mode) {
2088 case MTD_OPS_PLACE_OOB:
2089 case MTD_OPS_AUTO_OOB:
2090 break;
2091 case MTD_OPS_RAW:
2092 /* Not implemented yet */
2093 default:
2094 return -EINVAL;
2097 onenand_get_device(mtd, FL_WRITING);
2098 if (ops->datbuf)
2099 ret = onenand_write_ops_nolock(mtd, to, ops);
2100 else
2101 ret = onenand_write_oob_nolock(mtd, to, ops);
2102 onenand_release_device(mtd);
2104 return ret;
2108 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2109 * @param mtd MTD device structure
2110 * @param ofs offset from device start
2111 * @param allowbbt 1, if its allowed to access the bbt area
2113 * Check, if the block is bad. Either by reading the bad block table or
2114 * calling of the scan function.
2116 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2118 struct onenand_chip *this = mtd->priv;
2119 struct bbm_info *bbm = this->bbm;
2121 /* Return info from the table */
2122 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2126 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2127 struct erase_info *instr)
2129 struct onenand_chip *this = mtd->priv;
2130 loff_t addr = instr->addr;
2131 int len = instr->len;
2132 unsigned int block_size = (1 << this->erase_shift);
2133 int ret = 0;
2135 while (len) {
2136 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2137 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2138 if (ret) {
2139 printk(KERN_ERR "%s: Failed verify, block %d\n",
2140 __func__, onenand_block(this, addr));
2141 instr->fail_addr = addr;
2142 return -1;
2144 len -= block_size;
2145 addr += block_size;
2147 return 0;
2151 * onenand_multiblock_erase - [INTERN] erase block(s) using multiblock erase
2152 * @param mtd MTD device structure
2153 * @param instr erase instruction
2154 * @param region erase region
2156 * Erase one or more blocks up to 64 block at a time
2158 static int onenand_multiblock_erase(struct mtd_info *mtd,
2159 struct erase_info *instr,
2160 unsigned int block_size)
2162 struct onenand_chip *this = mtd->priv;
2163 loff_t addr = instr->addr;
2164 int len = instr->len;
2165 int eb_count = 0;
2166 int ret = 0;
2167 int bdry_block = 0;
2169 if (ONENAND_IS_DDP(this)) {
2170 loff_t bdry_addr = this->chipsize >> 1;
2171 if (addr < bdry_addr && (addr + len) > bdry_addr)
2172 bdry_block = bdry_addr >> this->erase_shift;
2175 /* Pre-check bbs */
2176 while (len) {
2177 /* Check if we have a bad block, we do not erase bad blocks */
2178 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2179 printk(KERN_WARNING "%s: attempt to erase a bad block "
2180 "at addr 0x%012llx\n",
2181 __func__, (unsigned long long) addr);
2182 return -EIO;
2184 len -= block_size;
2185 addr += block_size;
2188 len = instr->len;
2189 addr = instr->addr;
2191 /* loop over 64 eb batches */
2192 while (len) {
2193 struct erase_info verify_instr = *instr;
2194 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2196 verify_instr.addr = addr;
2197 verify_instr.len = 0;
2199 /* do not cross chip boundary */
2200 if (bdry_block) {
2201 int this_block = (addr >> this->erase_shift);
2203 if (this_block < bdry_block) {
2204 max_eb_count = min(max_eb_count,
2205 (bdry_block - this_block));
2209 eb_count = 0;
2211 while (len > block_size && eb_count < (max_eb_count - 1)) {
2212 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2213 addr, block_size);
2214 onenand_invalidate_bufferram(mtd, addr, block_size);
2216 ret = this->wait(mtd, FL_PREPARING_ERASE);
2217 if (ret) {
2218 printk(KERN_ERR "%s: Failed multiblock erase, "
2219 "block %d\n", __func__,
2220 onenand_block(this, addr));
2221 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2222 return -EIO;
2225 len -= block_size;
2226 addr += block_size;
2227 eb_count++;
2230 /* last block of 64-eb series */
2231 cond_resched();
2232 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2233 onenand_invalidate_bufferram(mtd, addr, block_size);
2235 ret = this->wait(mtd, FL_ERASING);
2236 /* Check if it is write protected */
2237 if (ret) {
2238 printk(KERN_ERR "%s: Failed erase, block %d\n",
2239 __func__, onenand_block(this, addr));
2240 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2241 return -EIO;
2244 len -= block_size;
2245 addr += block_size;
2246 eb_count++;
2248 /* verify */
2249 verify_instr.len = eb_count * block_size;
2250 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2251 instr->fail_addr = verify_instr.fail_addr;
2252 return -EIO;
2256 return 0;
2261 * onenand_block_by_block_erase - [INTERN] erase block(s) using regular erase
2262 * @param mtd MTD device structure
2263 * @param instr erase instruction
2264 * @param region erase region
2265 * @param block_size erase block size
2267 * Erase one or more blocks one block at a time
2269 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2270 struct erase_info *instr,
2271 struct mtd_erase_region_info *region,
2272 unsigned int block_size)
2274 struct onenand_chip *this = mtd->priv;
2275 loff_t addr = instr->addr;
2276 int len = instr->len;
2277 loff_t region_end = 0;
2278 int ret = 0;
2280 if (region) {
2281 /* region is set for Flex-OneNAND */
2282 region_end = region->offset + region->erasesize * region->numblocks;
2285 /* Loop through the blocks */
2286 while (len) {
2287 cond_resched();
2289 /* Check if we have a bad block, we do not erase bad blocks */
2290 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2291 printk(KERN_WARNING "%s: attempt to erase a bad block "
2292 "at addr 0x%012llx\n",
2293 __func__, (unsigned long long) addr);
2294 return -EIO;
2297 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2299 onenand_invalidate_bufferram(mtd, addr, block_size);
2301 ret = this->wait(mtd, FL_ERASING);
2302 /* Check, if it is write protected */
2303 if (ret) {
2304 printk(KERN_ERR "%s: Failed erase, block %d\n",
2305 __func__, onenand_block(this, addr));
2306 instr->fail_addr = addr;
2307 return -EIO;
2310 len -= block_size;
2311 addr += block_size;
2313 if (region && addr == region_end) {
2314 if (!len)
2315 break;
2316 region++;
2318 block_size = region->erasesize;
2319 region_end = region->offset + region->erasesize * region->numblocks;
2321 if (len & (block_size - 1)) {
2322 /* FIXME: This should be handled at MTD partitioning level. */
2323 printk(KERN_ERR "%s: Unaligned address\n",
2324 __func__);
2325 return -EIO;
2329 return 0;
2333 * onenand_erase - [MTD Interface] erase block(s)
2334 * @param mtd MTD device structure
2335 * @param instr erase instruction
2337 * Erase one or more blocks
2339 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2341 struct onenand_chip *this = mtd->priv;
2342 unsigned int block_size;
2343 loff_t addr = instr->addr;
2344 loff_t len = instr->len;
2345 int ret = 0;
2346 struct mtd_erase_region_info *region = NULL;
2347 loff_t region_offset = 0;
2349 pr_debug("%s: start=0x%012llx, len=%llu\n", __func__,
2350 (unsigned long long)instr->addr,
2351 (unsigned long long)instr->len);
2353 if (FLEXONENAND(this)) {
2354 /* Find the eraseregion of this address */
2355 int i = flexonenand_region(mtd, addr);
2357 region = &mtd->eraseregions[i];
2358 block_size = region->erasesize;
2360 /* Start address within region must align on block boundary.
2361 * Erase region's start offset is always block start address.
2363 region_offset = region->offset;
2364 } else
2365 block_size = 1 << this->erase_shift;
2367 /* Start address must align on block boundary */
2368 if (unlikely((addr - region_offset) & (block_size - 1))) {
2369 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2370 return -EINVAL;
2373 /* Length must align on block boundary */
2374 if (unlikely(len & (block_size - 1))) {
2375 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2376 return -EINVAL;
2379 /* Grab the lock and see if the device is available */
2380 onenand_get_device(mtd, FL_ERASING);
2382 if (ONENAND_IS_4KB_PAGE(this) || region ||
2383 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2384 /* region is set for Flex-OneNAND (no mb erase) */
2385 ret = onenand_block_by_block_erase(mtd, instr,
2386 region, block_size);
2387 } else {
2388 ret = onenand_multiblock_erase(mtd, instr, block_size);
2391 /* Deselect and wake up anyone waiting on the device */
2392 onenand_release_device(mtd);
2394 return ret;
2398 * onenand_sync - [MTD Interface] sync
2399 * @param mtd MTD device structure
2401 * Sync is actually a wait for chip ready function
2403 static void onenand_sync(struct mtd_info *mtd)
2405 pr_debug("%s: called\n", __func__);
2407 /* Grab the lock and see if the device is available */
2408 onenand_get_device(mtd, FL_SYNCING);
2410 /* Release it and go back */
2411 onenand_release_device(mtd);
2415 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2416 * @param mtd MTD device structure
2417 * @param ofs offset relative to mtd start
2419 * Check whether the block is bad
2421 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2423 int ret;
2425 onenand_get_device(mtd, FL_READING);
2426 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2427 onenand_release_device(mtd);
2428 return ret;
2432 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2433 * @param mtd MTD device structure
2434 * @param ofs offset from device start
2436 * This is the default implementation, which can be overridden by
2437 * a hardware specific driver.
2439 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2441 struct onenand_chip *this = mtd->priv;
2442 struct bbm_info *bbm = this->bbm;
2443 u_char buf[2] = {0, 0};
2444 struct mtd_oob_ops ops = {
2445 .mode = MTD_OPS_PLACE_OOB,
2446 .ooblen = 2,
2447 .oobbuf = buf,
2448 .ooboffs = 0,
2450 int block;
2452 /* Get block number */
2453 block = onenand_block(this, ofs);
2454 if (bbm->bbt)
2455 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2457 /* We write two bytes, so we don't have to mess with 16-bit access */
2458 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
2459 /* FIXME : What to do when marking SLC block in partition
2460 * with MLC erasesize? For now, it is not advisable to
2461 * create partitions containing both SLC and MLC regions.
2463 return onenand_write_oob_nolock(mtd, ofs, &ops);
2467 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2468 * @param mtd MTD device structure
2469 * @param ofs offset relative to mtd start
2471 * Mark the block as bad
2473 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2475 struct onenand_chip *this = mtd->priv;
2476 int ret;
2478 ret = onenand_block_isbad(mtd, ofs);
2479 if (ret) {
2480 /* If it was bad already, return success and do nothing */
2481 if (ret > 0)
2482 return 0;
2483 return ret;
2486 onenand_get_device(mtd, FL_WRITING);
2487 ret = this->block_markbad(mtd, ofs);
2488 onenand_release_device(mtd);
2489 return ret;
2493 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2494 * @param mtd MTD device structure
2495 * @param ofs offset relative to mtd start
2496 * @param len number of bytes to lock or unlock
2497 * @param cmd lock or unlock command
2499 * Lock or unlock one or more blocks
2501 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2503 struct onenand_chip *this = mtd->priv;
2504 int start, end, block, value, status;
2505 int wp_status_mask;
2507 start = onenand_block(this, ofs);
2508 end = onenand_block(this, ofs + len) - 1;
2510 if (cmd == ONENAND_CMD_LOCK)
2511 wp_status_mask = ONENAND_WP_LS;
2512 else
2513 wp_status_mask = ONENAND_WP_US;
2515 /* Continuous lock scheme */
2516 if (this->options & ONENAND_HAS_CONT_LOCK) {
2517 /* Set start block address */
2518 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2519 /* Set end block address */
2520 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2521 /* Write lock command */
2522 this->command(mtd, cmd, 0, 0);
2524 /* There's no return value */
2525 this->wait(mtd, FL_LOCKING);
2527 /* Sanity check */
2528 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2529 & ONENAND_CTRL_ONGO)
2530 continue;
2532 /* Check lock status */
2533 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2534 if (!(status & wp_status_mask))
2535 printk(KERN_ERR "%s: wp status = 0x%x\n",
2536 __func__, status);
2538 return 0;
2541 /* Block lock scheme */
2542 for (block = start; block < end + 1; block++) {
2543 /* Set block address */
2544 value = onenand_block_address(this, block);
2545 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2546 /* Select DataRAM for DDP */
2547 value = onenand_bufferram_address(this, block);
2548 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2549 /* Set start block address */
2550 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2551 /* Write lock command */
2552 this->command(mtd, cmd, 0, 0);
2554 /* There's no return value */
2555 this->wait(mtd, FL_LOCKING);
2557 /* Sanity check */
2558 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2559 & ONENAND_CTRL_ONGO)
2560 continue;
2562 /* Check lock status */
2563 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2564 if (!(status & wp_status_mask))
2565 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2566 __func__, block, status);
2569 return 0;
2573 * onenand_lock - [MTD Interface] Lock block(s)
2574 * @param mtd MTD device structure
2575 * @param ofs offset relative to mtd start
2576 * @param len number of bytes to unlock
2578 * Lock one or more blocks
2580 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2582 int ret;
2584 onenand_get_device(mtd, FL_LOCKING);
2585 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2586 onenand_release_device(mtd);
2587 return ret;
2591 * onenand_unlock - [MTD Interface] Unlock block(s)
2592 * @param mtd MTD device structure
2593 * @param ofs offset relative to mtd start
2594 * @param len number of bytes to unlock
2596 * Unlock one or more blocks
2598 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2600 int ret;
2602 onenand_get_device(mtd, FL_LOCKING);
2603 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2604 onenand_release_device(mtd);
2605 return ret;
2609 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2610 * @param this onenand chip data structure
2612 * Check lock status
2614 static int onenand_check_lock_status(struct onenand_chip *this)
2616 unsigned int value, block, status;
2617 unsigned int end;
2619 end = this->chipsize >> this->erase_shift;
2620 for (block = 0; block < end; block++) {
2621 /* Set block address */
2622 value = onenand_block_address(this, block);
2623 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2624 /* Select DataRAM for DDP */
2625 value = onenand_bufferram_address(this, block);
2626 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2627 /* Set start block address */
2628 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2630 /* Check lock status */
2631 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2632 if (!(status & ONENAND_WP_US)) {
2633 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2634 __func__, block, status);
2635 return 0;
2639 return 1;
2643 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2644 * @param mtd MTD device structure
2646 * Unlock all blocks
2648 static void onenand_unlock_all(struct mtd_info *mtd)
2650 struct onenand_chip *this = mtd->priv;
2651 loff_t ofs = 0;
2652 loff_t len = mtd->size;
2654 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2655 /* Set start block address */
2656 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2657 /* Write unlock command */
2658 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2660 /* There's no return value */
2661 this->wait(mtd, FL_LOCKING);
2663 /* Sanity check */
2664 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2665 & ONENAND_CTRL_ONGO)
2666 continue;
2668 /* Don't check lock status */
2669 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2670 return;
2672 /* Check lock status */
2673 if (onenand_check_lock_status(this))
2674 return;
2676 /* Workaround for all block unlock in DDP */
2677 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2678 /* All blocks on another chip */
2679 ofs = this->chipsize >> 1;
2680 len = this->chipsize >> 1;
2684 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2687 #ifdef CONFIG_MTD_ONENAND_OTP
2690 * onenand_otp_command - Send OTP specific command to OneNAND device
2691 * @param mtd MTD device structure
2692 * @param cmd the command to be sent
2693 * @param addr offset to read from or write to
2694 * @param len number of bytes to read or write
2696 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2697 size_t len)
2699 struct onenand_chip *this = mtd->priv;
2700 int value, block, page;
2702 /* Address translation */
2703 switch (cmd) {
2704 case ONENAND_CMD_OTP_ACCESS:
2705 block = (int) (addr >> this->erase_shift);
2706 page = -1;
2707 break;
2709 default:
2710 block = (int) (addr >> this->erase_shift);
2711 page = (int) (addr >> this->page_shift);
2713 if (ONENAND_IS_2PLANE(this)) {
2714 /* Make the even block number */
2715 block &= ~1;
2716 /* Is it the odd plane? */
2717 if (addr & this->writesize)
2718 block++;
2719 page >>= 1;
2721 page &= this->page_mask;
2722 break;
2725 if (block != -1) {
2726 /* Write 'DFS, FBA' of Flash */
2727 value = onenand_block_address(this, block);
2728 this->write_word(value, this->base +
2729 ONENAND_REG_START_ADDRESS1);
2732 if (page != -1) {
2733 /* Now we use page size operation */
2734 int sectors = 4, count = 4;
2735 int dataram;
2737 switch (cmd) {
2738 default:
2739 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2740 cmd = ONENAND_CMD_2X_PROG;
2741 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2742 break;
2745 /* Write 'FPA, FSA' of Flash */
2746 value = onenand_page_address(page, sectors);
2747 this->write_word(value, this->base +
2748 ONENAND_REG_START_ADDRESS8);
2750 /* Write 'BSA, BSC' of DataRAM */
2751 value = onenand_buffer_address(dataram, sectors, count);
2752 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2755 /* Interrupt clear */
2756 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2758 /* Write command */
2759 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2761 return 0;
2765 * onenand_otp_write_oob_nolock - [INTERN] OneNAND write out-of-band, specific to OTP
2766 * @param mtd MTD device structure
2767 * @param to offset to write to
2768 * @param len number of bytes to write
2769 * @param retlen pointer to variable to store the number of written bytes
2770 * @param buf the data to write
2772 * OneNAND write out-of-band only for OTP
2774 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2775 struct mtd_oob_ops *ops)
2777 struct onenand_chip *this = mtd->priv;
2778 int column, ret = 0, oobsize;
2779 int written = 0;
2780 u_char *oobbuf;
2781 size_t len = ops->ooblen;
2782 const u_char *buf = ops->oobbuf;
2783 int block, value, status;
2785 to += ops->ooboffs;
2787 /* Initialize retlen, in case of early exit */
2788 ops->oobretlen = 0;
2790 oobsize = mtd->oobsize;
2792 column = to & (mtd->oobsize - 1);
2794 oobbuf = this->oob_buf;
2796 /* Loop until all data write */
2797 while (written < len) {
2798 int thislen = min_t(int, oobsize, len - written);
2800 cond_resched();
2802 block = (int) (to >> this->erase_shift);
2804 * Write 'DFS, FBA' of Flash
2805 * Add: F100h DQ=DFS, FBA
2808 value = onenand_block_address(this, block);
2809 this->write_word(value, this->base +
2810 ONENAND_REG_START_ADDRESS1);
2813 * Select DataRAM for DDP
2814 * Add: F101h DQ=DBS
2817 value = onenand_bufferram_address(this, block);
2818 this->write_word(value, this->base +
2819 ONENAND_REG_START_ADDRESS2);
2820 ONENAND_SET_NEXT_BUFFERRAM(this);
2823 * Enter OTP access mode
2825 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2826 this->wait(mtd, FL_OTPING);
2828 /* We send data to spare ram with oobsize
2829 * to prevent byte access */
2830 memcpy(oobbuf + column, buf, thislen);
2833 * Write Data into DataRAM
2834 * Add: 8th Word
2835 * in sector0/spare/page0
2836 * DQ=XXFCh
2838 this->write_bufferram(mtd, ONENAND_SPARERAM,
2839 oobbuf, 0, mtd->oobsize);
2841 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2842 onenand_update_bufferram(mtd, to, 0);
2843 if (ONENAND_IS_2PLANE(this)) {
2844 ONENAND_SET_BUFFERRAM1(this);
2845 onenand_update_bufferram(mtd, to + this->writesize, 0);
2848 ret = this->wait(mtd, FL_WRITING);
2849 if (ret) {
2850 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2851 break;
2854 /* Exit OTP access mode */
2855 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2856 this->wait(mtd, FL_RESETING);
2858 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2859 status &= 0x60;
2861 if (status == 0x60) {
2862 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2863 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2864 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2865 } else if (status == 0x20) {
2866 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2867 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2868 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2869 } else if (status == 0x40) {
2870 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2871 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2872 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2873 } else {
2874 printk(KERN_DEBUG "Reboot to check\n");
2877 written += thislen;
2878 if (written == len)
2879 break;
2881 to += mtd->writesize;
2882 buf += thislen;
2883 column = 0;
2886 ops->oobretlen = written;
2888 return ret;
2891 /* Internal OTP operation */
2892 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2893 size_t *retlen, u_char *buf);
2896 * do_otp_read - [DEFAULT] Read OTP block area
2897 * @param mtd MTD device structure
2898 * @param from The offset to read
2899 * @param len number of bytes to read
2900 * @param retlen pointer to variable to store the number of readbytes
2901 * @param buf the databuffer to put/get data
2903 * Read OTP block area.
2905 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2906 size_t *retlen, u_char *buf)
2908 struct onenand_chip *this = mtd->priv;
2909 struct mtd_oob_ops ops = {
2910 .len = len,
2911 .ooblen = 0,
2912 .datbuf = buf,
2913 .oobbuf = NULL,
2915 int ret;
2917 /* Enter OTP access mode */
2918 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2919 this->wait(mtd, FL_OTPING);
2921 ret = ONENAND_IS_4KB_PAGE(this) ?
2922 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
2923 onenand_read_ops_nolock(mtd, from, &ops);
2925 /* Exit OTP access mode */
2926 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2927 this->wait(mtd, FL_RESETING);
2929 return ret;
2933 * do_otp_write - [DEFAULT] Write OTP block area
2934 * @param mtd MTD device structure
2935 * @param to The offset to write
2936 * @param len number of bytes to write
2937 * @param retlen pointer to variable to store the number of write bytes
2938 * @param buf the databuffer to put/get data
2940 * Write OTP block area.
2942 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2943 size_t *retlen, u_char *buf)
2945 struct onenand_chip *this = mtd->priv;
2946 unsigned char *pbuf = buf;
2947 int ret;
2948 struct mtd_oob_ops ops;
2950 /* Force buffer page aligned */
2951 if (len < mtd->writesize) {
2952 memcpy(this->page_buf, buf, len);
2953 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2954 pbuf = this->page_buf;
2955 len = mtd->writesize;
2958 /* Enter OTP access mode */
2959 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2960 this->wait(mtd, FL_OTPING);
2962 ops.len = len;
2963 ops.ooblen = 0;
2964 ops.datbuf = pbuf;
2965 ops.oobbuf = NULL;
2966 ret = onenand_write_ops_nolock(mtd, to, &ops);
2967 *retlen = ops.retlen;
2969 /* Exit OTP access mode */
2970 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2971 this->wait(mtd, FL_RESETING);
2973 return ret;
2977 * do_otp_lock - [DEFAULT] Lock OTP block area
2978 * @param mtd MTD device structure
2979 * @param from The offset to lock
2980 * @param len number of bytes to lock
2981 * @param retlen pointer to variable to store the number of lock bytes
2982 * @param buf the databuffer to put/get data
2984 * Lock OTP block area.
2986 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2987 size_t *retlen, u_char *buf)
2989 struct onenand_chip *this = mtd->priv;
2990 struct mtd_oob_ops ops;
2991 int ret;
2993 if (FLEXONENAND(this)) {
2995 /* Enter OTP access mode */
2996 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2997 this->wait(mtd, FL_OTPING);
2999 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3000 * main area of page 49.
3002 ops.len = mtd->writesize;
3003 ops.ooblen = 0;
3004 ops.datbuf = buf;
3005 ops.oobbuf = NULL;
3006 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3007 *retlen = ops.retlen;
3009 /* Exit OTP access mode */
3010 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3011 this->wait(mtd, FL_RESETING);
3012 } else {
3013 ops.mode = MTD_OPS_PLACE_OOB;
3014 ops.ooblen = len;
3015 ops.oobbuf = buf;
3016 ops.ooboffs = 0;
3017 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3018 *retlen = ops.oobretlen;
3021 return ret;
3025 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3026 * @param mtd MTD device structure
3027 * @param from The offset to read/write
3028 * @param len number of bytes to read/write
3029 * @param retlen pointer to variable to store the number of read bytes
3030 * @param buf the databuffer to put/get data
3031 * @param action do given action
3032 * @param mode specify user and factory
3034 * Handle OTP operation.
3036 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3037 size_t *retlen, u_char *buf,
3038 otp_op_t action, int mode)
3040 struct onenand_chip *this = mtd->priv;
3041 int otp_pages;
3042 int density;
3043 int ret = 0;
3045 *retlen = 0;
3047 density = onenand_get_density(this->device_id);
3048 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3049 otp_pages = 20;
3050 else
3051 otp_pages = 50;
3053 if (mode == MTD_OTP_FACTORY) {
3054 from += mtd->writesize * otp_pages;
3055 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3058 /* Check User/Factory boundary */
3059 if (mode == MTD_OTP_USER) {
3060 if (mtd->writesize * otp_pages < from + len)
3061 return 0;
3062 } else {
3063 if (mtd->writesize * otp_pages < len)
3064 return 0;
3067 onenand_get_device(mtd, FL_OTPING);
3068 while (len > 0 && otp_pages > 0) {
3069 if (!action) { /* OTP Info functions */
3070 struct otp_info *otpinfo;
3072 len -= sizeof(struct otp_info);
3073 if (len <= 0) {
3074 ret = -ENOSPC;
3075 break;
3078 otpinfo = (struct otp_info *) buf;
3079 otpinfo->start = from;
3080 otpinfo->length = mtd->writesize;
3081 otpinfo->locked = 0;
3083 from += mtd->writesize;
3084 buf += sizeof(struct otp_info);
3085 *retlen += sizeof(struct otp_info);
3086 } else {
3087 size_t tmp_retlen;
3089 ret = action(mtd, from, len, &tmp_retlen, buf);
3090 if (ret)
3091 break;
3093 buf += tmp_retlen;
3094 len -= tmp_retlen;
3095 *retlen += tmp_retlen;
3098 otp_pages--;
3100 onenand_release_device(mtd);
3102 return ret;
3106 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3107 * @param mtd MTD device structure
3108 * @param len number of bytes to read
3109 * @param retlen pointer to variable to store the number of read bytes
3110 * @param buf the databuffer to put/get data
3112 * Read factory OTP info.
3114 static int onenand_get_fact_prot_info(struct mtd_info *mtd, size_t len,
3115 size_t *retlen, struct otp_info *buf)
3117 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3118 MTD_OTP_FACTORY);
3122 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3123 * @param mtd MTD device structure
3124 * @param from The offset to read
3125 * @param len number of bytes to read
3126 * @param retlen pointer to variable to store the number of read bytes
3127 * @param buf the databuffer to put/get data
3129 * Read factory OTP area.
3131 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3132 size_t len, size_t *retlen, u_char *buf)
3134 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3138 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3139 * @param mtd MTD device structure
3140 * @param retlen pointer to variable to store the number of read bytes
3141 * @param len number of bytes to read
3142 * @param buf the databuffer to put/get data
3144 * Read user OTP info.
3146 static int onenand_get_user_prot_info(struct mtd_info *mtd, size_t len,
3147 size_t *retlen, struct otp_info *buf)
3149 return onenand_otp_walk(mtd, 0, len, retlen, (u_char *) buf, NULL,
3150 MTD_OTP_USER);
3154 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3155 * @param mtd MTD device structure
3156 * @param from The offset to read
3157 * @param len number of bytes to read
3158 * @param retlen pointer to variable to store the number of read bytes
3159 * @param buf the databuffer to put/get data
3161 * Read user OTP area.
3163 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3164 size_t len, size_t *retlen, u_char *buf)
3166 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3170 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3171 * @param mtd MTD device structure
3172 * @param from The offset to write
3173 * @param len number of bytes to write
3174 * @param retlen pointer to variable to store the number of write bytes
3175 * @param buf the databuffer to put/get data
3177 * Write user OTP area.
3179 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3180 size_t len, size_t *retlen, u_char *buf)
3182 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3186 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3187 * @param mtd MTD device structure
3188 * @param from The offset to lock
3189 * @param len number of bytes to unlock
3191 * Write lock mark on spare area in page 0 in OTP block
3193 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3194 size_t len)
3196 struct onenand_chip *this = mtd->priv;
3197 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3198 size_t retlen;
3199 int ret;
3200 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3202 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3203 : mtd->oobsize);
3205 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3206 * We write 16 bytes spare area instead of 2 bytes.
3207 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3208 * main area of page 49.
3211 from = 0;
3212 len = FLEXONENAND(this) ? mtd->writesize : 16;
3215 * Note: OTP lock operation
3216 * OTP block : 0xXXFC XX 1111 1100
3217 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3218 * Both : 0xXXF0 (If chip support) XX 1111 0000
3220 if (FLEXONENAND(this))
3221 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3223 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3224 if (otp == 1)
3225 buf[otp_lock_offset] = 0xFC;
3226 else if (otp == 2)
3227 buf[otp_lock_offset] = 0xF3;
3228 else if (otp == 3)
3229 buf[otp_lock_offset] = 0xF0;
3230 else if (otp != 0)
3231 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3233 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
3235 return ret ? : retlen;
3238 #endif /* CONFIG_MTD_ONENAND_OTP */
3241 * onenand_check_features - Check and set OneNAND features
3242 * @param mtd MTD data structure
3244 * Check and set OneNAND features
3245 * - lock scheme
3246 * - two plane
3248 static void onenand_check_features(struct mtd_info *mtd)
3250 struct onenand_chip *this = mtd->priv;
3251 unsigned int density, process, numbufs;
3253 /* Lock scheme depends on density and process */
3254 density = onenand_get_density(this->device_id);
3255 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
3256 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
3258 /* Lock scheme */
3259 switch (density) {
3260 case ONENAND_DEVICE_DENSITY_8Gb:
3261 this->options |= ONENAND_HAS_NOP_1;
3262 /* fall through */
3263 case ONENAND_DEVICE_DENSITY_4Gb:
3264 if (ONENAND_IS_DDP(this))
3265 this->options |= ONENAND_HAS_2PLANE;
3266 else if (numbufs == 1) {
3267 this->options |= ONENAND_HAS_4KB_PAGE;
3268 this->options |= ONENAND_HAS_CACHE_PROGRAM;
3270 * There are two different 4KiB pagesize chips
3271 * and no way to detect it by H/W config values.
3273 * To detect the correct NOP for each chips,
3274 * It should check the version ID as workaround.
3276 * Now it has as following
3277 * KFM4G16Q4M has NOP 4 with version ID 0x0131
3278 * KFM4G16Q5M has NOP 1 with versoin ID 0x013e
3280 if ((this->version_id & 0xf) == 0xe)
3281 this->options |= ONENAND_HAS_NOP_1;
3283 this->options |= ONENAND_HAS_UNLOCK_ALL;
3284 break;
3286 case ONENAND_DEVICE_DENSITY_2Gb:
3287 /* 2Gb DDP does not have 2 plane */
3288 if (!ONENAND_IS_DDP(this))
3289 this->options |= ONENAND_HAS_2PLANE;
3290 this->options |= ONENAND_HAS_UNLOCK_ALL;
3291 break;
3293 case ONENAND_DEVICE_DENSITY_1Gb:
3294 /* A-Die has all block unlock */
3295 if (process)
3296 this->options |= ONENAND_HAS_UNLOCK_ALL;
3297 break;
3299 default:
3300 /* Some OneNAND has continuous lock scheme */
3301 if (!process)
3302 this->options |= ONENAND_HAS_CONT_LOCK;
3303 break;
3306 /* The MLC has 4KiB pagesize. */
3307 if (ONENAND_IS_MLC(this))
3308 this->options |= ONENAND_HAS_4KB_PAGE;
3310 if (ONENAND_IS_4KB_PAGE(this))
3311 this->options &= ~ONENAND_HAS_2PLANE;
3313 if (FLEXONENAND(this)) {
3314 this->options &= ~ONENAND_HAS_CONT_LOCK;
3315 this->options |= ONENAND_HAS_UNLOCK_ALL;
3318 if (this->options & ONENAND_HAS_CONT_LOCK)
3319 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3320 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3321 printk(KERN_DEBUG "Chip support all block unlock\n");
3322 if (this->options & ONENAND_HAS_2PLANE)
3323 printk(KERN_DEBUG "Chip has 2 plane\n");
3324 if (this->options & ONENAND_HAS_4KB_PAGE)
3325 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
3326 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3327 printk(KERN_DEBUG "Chip has cache program feature\n");
3331 * onenand_print_device_info - Print device & version ID
3332 * @param device device ID
3333 * @param version version ID
3335 * Print device & version ID
3337 static void onenand_print_device_info(int device, int version)
3339 int vcc, demuxed, ddp, density, flexonenand;
3341 vcc = device & ONENAND_DEVICE_VCC_MASK;
3342 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3343 ddp = device & ONENAND_DEVICE_IS_DDP;
3344 density = onenand_get_density(device);
3345 flexonenand = device & DEVICE_IS_FLEXONENAND;
3346 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3347 demuxed ? "" : "Muxed ",
3348 flexonenand ? "Flex-" : "",
3349 ddp ? "(DDP)" : "",
3350 (16 << density),
3351 vcc ? "2.65/3.3" : "1.8",
3352 device);
3353 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3356 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3357 {ONENAND_MFR_SAMSUNG, "Samsung"},
3358 {ONENAND_MFR_NUMONYX, "Numonyx"},
3362 * onenand_check_maf - Check manufacturer ID
3363 * @param manuf manufacturer ID
3365 * Check manufacturer ID
3367 static int onenand_check_maf(int manuf)
3369 int size = ARRAY_SIZE(onenand_manuf_ids);
3370 char *name;
3371 int i;
3373 for (i = 0; i < size; i++)
3374 if (manuf == onenand_manuf_ids[i].id)
3375 break;
3377 if (i < size)
3378 name = onenand_manuf_ids[i].name;
3379 else
3380 name = "Unknown";
3382 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3384 return (i == size);
3388 * flexonenand_get_boundary - Reads the SLC boundary
3389 * @param onenand_info - onenand info structure
3391 static int flexonenand_get_boundary(struct mtd_info *mtd)
3393 struct onenand_chip *this = mtd->priv;
3394 unsigned die, bdry;
3395 int syscfg, locked;
3397 /* Disable ECC */
3398 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3399 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3401 for (die = 0; die < this->dies; die++) {
3402 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3403 this->wait(mtd, FL_SYNCING);
3405 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3406 this->wait(mtd, FL_READING);
3408 bdry = this->read_word(this->base + ONENAND_DATARAM);
3409 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3410 locked = 0;
3411 else
3412 locked = 1;
3413 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3415 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3416 this->wait(mtd, FL_RESETING);
3418 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3419 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3422 /* Enable ECC */
3423 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3424 return 0;
3428 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3429 * boundary[], diesize[], mtd->size, mtd->erasesize
3430 * @param mtd - MTD device structure
3432 static void flexonenand_get_size(struct mtd_info *mtd)
3434 struct onenand_chip *this = mtd->priv;
3435 int die, i, eraseshift, density;
3436 int blksperdie, maxbdry;
3437 loff_t ofs;
3439 density = onenand_get_density(this->device_id);
3440 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3441 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3442 maxbdry = blksperdie - 1;
3443 eraseshift = this->erase_shift - 1;
3445 mtd->numeraseregions = this->dies << 1;
3447 /* This fills up the device boundary */
3448 flexonenand_get_boundary(mtd);
3449 die = ofs = 0;
3450 i = -1;
3451 for (; die < this->dies; die++) {
3452 if (!die || this->boundary[die-1] != maxbdry) {
3453 i++;
3454 mtd->eraseregions[i].offset = ofs;
3455 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3456 mtd->eraseregions[i].numblocks =
3457 this->boundary[die] + 1;
3458 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3459 eraseshift++;
3460 } else {
3461 mtd->numeraseregions -= 1;
3462 mtd->eraseregions[i].numblocks +=
3463 this->boundary[die] + 1;
3464 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3466 if (this->boundary[die] != maxbdry) {
3467 i++;
3468 mtd->eraseregions[i].offset = ofs;
3469 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3470 mtd->eraseregions[i].numblocks = maxbdry ^
3471 this->boundary[die];
3472 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3473 eraseshift--;
3474 } else
3475 mtd->numeraseregions -= 1;
3478 /* Expose MLC erase size except when all blocks are SLC */
3479 mtd->erasesize = 1 << this->erase_shift;
3480 if (mtd->numeraseregions == 1)
3481 mtd->erasesize >>= 1;
3483 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3484 for (i = 0; i < mtd->numeraseregions; i++)
3485 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3486 " numblocks: %04u]\n",
3487 (unsigned int) mtd->eraseregions[i].offset,
3488 mtd->eraseregions[i].erasesize,
3489 mtd->eraseregions[i].numblocks);
3491 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3492 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3493 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3494 << (this->erase_shift - 1);
3495 mtd->size += this->diesize[die];
3500 * flexonenand_check_blocks_erased - Check if blocks are erased
3501 * @param mtd_info - mtd info structure
3502 * @param start - first erase block to check
3503 * @param end - last erase block to check
3505 * Converting an unerased block from MLC to SLC
3506 * causes byte values to change. Since both data and its ECC
3507 * have changed, reads on the block give uncorrectable error.
3508 * This might lead to the block being detected as bad.
3510 * Avoid this by ensuring that the block to be converted is
3511 * erased.
3513 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3515 struct onenand_chip *this = mtd->priv;
3516 int i, ret;
3517 int block;
3518 struct mtd_oob_ops ops = {
3519 .mode = MTD_OPS_PLACE_OOB,
3520 .ooboffs = 0,
3521 .ooblen = mtd->oobsize,
3522 .datbuf = NULL,
3523 .oobbuf = this->oob_buf,
3525 loff_t addr;
3527 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3529 for (block = start; block <= end; block++) {
3530 addr = flexonenand_addr(this, block);
3531 if (onenand_block_isbad_nolock(mtd, addr, 0))
3532 continue;
3535 * Since main area write results in ECC write to spare,
3536 * it is sufficient to check only ECC bytes for change.
3538 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3539 if (ret)
3540 return ret;
3542 for (i = 0; i < mtd->oobsize; i++)
3543 if (this->oob_buf[i] != 0xff)
3544 break;
3546 if (i != mtd->oobsize) {
3547 printk(KERN_WARNING "%s: Block %d not erased.\n",
3548 __func__, block);
3549 return 1;
3553 return 0;
3557 * flexonenand_set_boundary - Writes the SLC boundary
3558 * @param mtd - mtd info structure
3560 static int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3561 int boundary, int lock)
3563 struct onenand_chip *this = mtd->priv;
3564 int ret, density, blksperdie, old, new, thisboundary;
3565 loff_t addr;
3567 /* Change only once for SDP Flex-OneNAND */
3568 if (die && (!ONENAND_IS_DDP(this)))
3569 return 0;
3571 /* boundary value of -1 indicates no required change */
3572 if (boundary < 0 || boundary == this->boundary[die])
3573 return 0;
3575 density = onenand_get_density(this->device_id);
3576 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3577 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3579 if (boundary >= blksperdie) {
3580 printk(KERN_ERR "%s: Invalid boundary value. "
3581 "Boundary not changed.\n", __func__);
3582 return -EINVAL;
3585 /* Check if converting blocks are erased */
3586 old = this->boundary[die] + (die * this->density_mask);
3587 new = boundary + (die * this->density_mask);
3588 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3589 if (ret) {
3590 printk(KERN_ERR "%s: Please erase blocks "
3591 "before boundary change\n", __func__);
3592 return ret;
3595 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3596 this->wait(mtd, FL_SYNCING);
3598 /* Check is boundary is locked */
3599 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3600 this->wait(mtd, FL_READING);
3602 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3603 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3604 printk(KERN_ERR "%s: boundary locked\n", __func__);
3605 ret = 1;
3606 goto out;
3609 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3610 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3612 addr = die ? this->diesize[0] : 0;
3614 boundary &= FLEXONENAND_PI_MASK;
3615 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3617 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3618 ret = this->wait(mtd, FL_ERASING);
3619 if (ret) {
3620 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3621 __func__, die);
3622 goto out;
3625 this->write_word(boundary, this->base + ONENAND_DATARAM);
3626 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3627 ret = this->wait(mtd, FL_WRITING);
3628 if (ret) {
3629 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3630 __func__, die);
3631 goto out;
3634 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3635 ret = this->wait(mtd, FL_WRITING);
3636 out:
3637 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3638 this->wait(mtd, FL_RESETING);
3639 if (!ret)
3640 /* Recalculate device size on boundary change*/
3641 flexonenand_get_size(mtd);
3643 return ret;
3647 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
3648 * @param mtd MTD device structure
3650 * OneNAND detection method:
3651 * Compare the values from command with ones from register
3653 static int onenand_chip_probe(struct mtd_info *mtd)
3655 struct onenand_chip *this = mtd->priv;
3656 int bram_maf_id, bram_dev_id, maf_id, dev_id;
3657 int syscfg;
3659 /* Save system configuration 1 */
3660 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3661 /* Clear Sync. Burst Read mode to read BootRAM */
3662 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3664 /* Send the command for reading device ID from BootRAM */
3665 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3667 /* Read manufacturer and device IDs from BootRAM */
3668 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3669 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3671 /* Reset OneNAND to read default register values */
3672 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3673 /* Wait reset */
3674 this->wait(mtd, FL_RESETING);
3676 /* Restore system configuration 1 */
3677 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3679 /* Check manufacturer ID */
3680 if (onenand_check_maf(bram_maf_id))
3681 return -ENXIO;
3683 /* Read manufacturer and device IDs from Register */
3684 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3685 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3687 /* Check OneNAND device */
3688 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3689 return -ENXIO;
3691 return 0;
3695 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3696 * @param mtd MTD device structure
3698 static int onenand_probe(struct mtd_info *mtd)
3700 struct onenand_chip *this = mtd->priv;
3701 int dev_id, ver_id;
3702 int density;
3703 int ret;
3705 ret = this->chip_probe(mtd);
3706 if (ret)
3707 return ret;
3709 /* Device and version IDs from Register */
3710 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3711 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3712 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3714 /* Flash device information */
3715 onenand_print_device_info(dev_id, ver_id);
3716 this->device_id = dev_id;
3717 this->version_id = ver_id;
3719 /* Check OneNAND features */
3720 onenand_check_features(mtd);
3722 density = onenand_get_density(dev_id);
3723 if (FLEXONENAND(this)) {
3724 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3725 /* Maximum possible erase regions */
3726 mtd->numeraseregions = this->dies << 1;
3727 mtd->eraseregions =
3728 kcalloc(this->dies << 1,
3729 sizeof(struct mtd_erase_region_info),
3730 GFP_KERNEL);
3731 if (!mtd->eraseregions)
3732 return -ENOMEM;
3736 * For Flex-OneNAND, chipsize represents maximum possible device size.
3737 * mtd->size represents the actual device size.
3739 this->chipsize = (16 << density) << 20;
3741 /* OneNAND page size & block size */
3742 /* The data buffer size is equal to page size */
3743 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3744 /* We use the full BufferRAM */
3745 if (ONENAND_IS_4KB_PAGE(this))
3746 mtd->writesize <<= 1;
3748 mtd->oobsize = mtd->writesize >> 5;
3749 /* Pages per a block are always 64 in OneNAND */
3750 mtd->erasesize = mtd->writesize << 6;
3752 * Flex-OneNAND SLC area has 64 pages per block.
3753 * Flex-OneNAND MLC area has 128 pages per block.
3754 * Expose MLC erase size to find erase_shift and page_mask.
3756 if (FLEXONENAND(this))
3757 mtd->erasesize <<= 1;
3759 this->erase_shift = ffs(mtd->erasesize) - 1;
3760 this->page_shift = ffs(mtd->writesize) - 1;
3761 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3762 /* Set density mask. it is used for DDP */
3763 if (ONENAND_IS_DDP(this))
3764 this->density_mask = this->chipsize >> (this->erase_shift + 1);
3765 /* It's real page size */
3766 this->writesize = mtd->writesize;
3768 /* REVISIT: Multichip handling */
3770 if (FLEXONENAND(this))
3771 flexonenand_get_size(mtd);
3772 else
3773 mtd->size = this->chipsize;
3776 * We emulate the 4KiB page and 256KiB erase block size
3777 * But oobsize is still 64 bytes.
3778 * It is only valid if you turn on 2X program support,
3779 * Otherwise it will be ignored by compiler.
3781 if (ONENAND_IS_2PLANE(this)) {
3782 mtd->writesize <<= 1;
3783 mtd->erasesize <<= 1;
3786 return 0;
3790 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3791 * @param mtd MTD device structure
3793 static int onenand_suspend(struct mtd_info *mtd)
3795 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3799 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3800 * @param mtd MTD device structure
3802 static void onenand_resume(struct mtd_info *mtd)
3804 struct onenand_chip *this = mtd->priv;
3806 if (this->state == FL_PM_SUSPENDED)
3807 onenand_release_device(mtd);
3808 else
3809 printk(KERN_ERR "%s: resume() called for the chip which is not "
3810 "in suspended state\n", __func__);
3814 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3815 * @param mtd MTD device structure
3816 * @param maxchips Number of chips to scan for
3818 * This fills out all the not initialized function pointers
3819 * with the defaults.
3820 * The flash ID is read and the mtd/chip structures are
3821 * filled with the appropriate values.
3823 int onenand_scan(struct mtd_info *mtd, int maxchips)
3825 int i, ret;
3826 struct onenand_chip *this = mtd->priv;
3828 if (!this->read_word)
3829 this->read_word = onenand_readw;
3830 if (!this->write_word)
3831 this->write_word = onenand_writew;
3833 if (!this->command)
3834 this->command = onenand_command;
3835 if (!this->wait)
3836 onenand_setup_wait(mtd);
3837 if (!this->bbt_wait)
3838 this->bbt_wait = onenand_bbt_wait;
3839 if (!this->unlock_all)
3840 this->unlock_all = onenand_unlock_all;
3842 if (!this->chip_probe)
3843 this->chip_probe = onenand_chip_probe;
3845 if (!this->read_bufferram)
3846 this->read_bufferram = onenand_read_bufferram;
3847 if (!this->write_bufferram)
3848 this->write_bufferram = onenand_write_bufferram;
3850 if (!this->block_markbad)
3851 this->block_markbad = onenand_default_block_markbad;
3852 if (!this->scan_bbt)
3853 this->scan_bbt = onenand_default_bbt;
3855 if (onenand_probe(mtd))
3856 return -ENXIO;
3858 /* Set Sync. Burst Read after probing */
3859 if (this->mmcontrol) {
3860 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3861 this->read_bufferram = onenand_sync_read_bufferram;
3864 /* Allocate buffers, if necessary */
3865 if (!this->page_buf) {
3866 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3867 if (!this->page_buf)
3868 return -ENOMEM;
3869 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
3870 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3871 if (!this->verify_buf) {
3872 kfree(this->page_buf);
3873 return -ENOMEM;
3875 #endif
3876 this->options |= ONENAND_PAGEBUF_ALLOC;
3878 if (!this->oob_buf) {
3879 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3880 if (!this->oob_buf) {
3881 if (this->options & ONENAND_PAGEBUF_ALLOC) {
3882 this->options &= ~ONENAND_PAGEBUF_ALLOC;
3883 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
3884 kfree(this->verify_buf);
3885 #endif
3886 kfree(this->page_buf);
3888 return -ENOMEM;
3890 this->options |= ONENAND_OOBBUF_ALLOC;
3893 this->state = FL_READY;
3894 init_waitqueue_head(&this->wq);
3895 spin_lock_init(&this->chip_lock);
3898 * Allow subpage writes up to oobsize.
3900 switch (mtd->oobsize) {
3901 case 128:
3902 if (FLEXONENAND(this)) {
3903 mtd_set_ooblayout(mtd, &flexonenand_ooblayout_ops);
3904 mtd->subpage_sft = 0;
3905 } else {
3906 mtd_set_ooblayout(mtd, &onenand_oob_128_ooblayout_ops);
3907 mtd->subpage_sft = 2;
3909 if (ONENAND_IS_NOP_1(this))
3910 mtd->subpage_sft = 0;
3911 break;
3912 case 64:
3913 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3914 mtd->subpage_sft = 2;
3915 break;
3917 case 32:
3918 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3919 mtd->subpage_sft = 1;
3920 break;
3922 default:
3923 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
3924 __func__, mtd->oobsize);
3925 mtd->subpage_sft = 0;
3926 /* To prevent kernel oops */
3927 mtd_set_ooblayout(mtd, &onenand_oob_32_64_ooblayout_ops);
3928 break;
3931 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
3934 * The number of bytes available for a client to place data into
3935 * the out of band area
3937 ret = mtd_ooblayout_count_freebytes(mtd);
3938 if (ret < 0)
3939 ret = 0;
3941 mtd->oobavail = ret;
3943 mtd->ecc_strength = 1;
3945 /* Fill in remaining MTD driver data */
3946 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
3947 mtd->flags = MTD_CAP_NANDFLASH;
3948 mtd->_erase = onenand_erase;
3949 mtd->_point = NULL;
3950 mtd->_unpoint = NULL;
3951 mtd->_read_oob = onenand_read_oob;
3952 mtd->_write_oob = onenand_write_oob;
3953 mtd->_panic_write = onenand_panic_write;
3954 #ifdef CONFIG_MTD_ONENAND_OTP
3955 mtd->_get_fact_prot_info = onenand_get_fact_prot_info;
3956 mtd->_read_fact_prot_reg = onenand_read_fact_prot_reg;
3957 mtd->_get_user_prot_info = onenand_get_user_prot_info;
3958 mtd->_read_user_prot_reg = onenand_read_user_prot_reg;
3959 mtd->_write_user_prot_reg = onenand_write_user_prot_reg;
3960 mtd->_lock_user_prot_reg = onenand_lock_user_prot_reg;
3961 #endif
3962 mtd->_sync = onenand_sync;
3963 mtd->_lock = onenand_lock;
3964 mtd->_unlock = onenand_unlock;
3965 mtd->_suspend = onenand_suspend;
3966 mtd->_resume = onenand_resume;
3967 mtd->_block_isbad = onenand_block_isbad;
3968 mtd->_block_markbad = onenand_block_markbad;
3969 mtd->owner = THIS_MODULE;
3970 mtd->writebufsize = mtd->writesize;
3972 /* Unlock whole block */
3973 if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING))
3974 this->unlock_all(mtd);
3976 /* Set the bad block marker position */
3977 this->badblockpos = ONENAND_BADBLOCK_POS;
3979 ret = this->scan_bbt(mtd);
3980 if ((!FLEXONENAND(this)) || ret)
3981 return ret;
3983 /* Change Flex-OneNAND boundaries if required */
3984 for (i = 0; i < MAX_DIES; i++)
3985 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
3986 flex_bdry[(2 * i) + 1]);
3988 return 0;
3992 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
3993 * @param mtd MTD device structure
3995 void onenand_release(struct mtd_info *mtd)
3997 struct onenand_chip *this = mtd->priv;
3999 /* Deregister partitions */
4000 mtd_device_unregister(mtd);
4002 /* Free bad block table memory, if allocated */
4003 if (this->bbm) {
4004 struct bbm_info *bbm = this->bbm;
4005 kfree(bbm->bbt);
4006 kfree(this->bbm);
4008 /* Buffers allocated by onenand_scan */
4009 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4010 kfree(this->page_buf);
4011 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4012 kfree(this->verify_buf);
4013 #endif
4015 if (this->options & ONENAND_OOBBUF_ALLOC)
4016 kfree(this->oob_buf);
4017 kfree(mtd->eraseregions);
4020 EXPORT_SYMBOL_GPL(onenand_scan);
4021 EXPORT_SYMBOL_GPL(onenand_release);
4023 MODULE_LICENSE("GPL");
4024 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4025 MODULE_DESCRIPTION("Generic OneNAND flash driver code");