2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
21 #include <linux/of_device.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
30 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31 * each chip, which may be used for double buffered I/O; but this driver
32 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
34 * Sometimes DataFlash is packaged in MMC-format cards, although the
35 * MMC stack can't (yet?) distinguish between MMC and DataFlash
36 * protocols during enumeration.
39 /* reads can bypass the buffers */
40 #define OP_READ_CONTINUOUS 0xE8
41 #define OP_READ_PAGE 0xD2
43 /* group B requests can run even while status reports "busy" */
44 #define OP_READ_STATUS 0xD7 /* group B */
46 /* move data between host and buffer */
47 #define OP_READ_BUFFER1 0xD4 /* group B */
48 #define OP_READ_BUFFER2 0xD6 /* group B */
49 #define OP_WRITE_BUFFER1 0x84 /* group B */
50 #define OP_WRITE_BUFFER2 0x87 /* group B */
53 #define OP_ERASE_PAGE 0x81
54 #define OP_ERASE_BLOCK 0x50
56 /* move data between buffer and flash */
57 #define OP_TRANSFER_BUF1 0x53
58 #define OP_TRANSFER_BUF2 0x55
59 #define OP_MREAD_BUFFER1 0xD4
60 #define OP_MREAD_BUFFER2 0xD6
61 #define OP_MWERASE_BUFFER1 0x83
62 #define OP_MWERASE_BUFFER2 0x86
63 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
66 /* write to buffer, then write-erase to flash */
67 #define OP_PROGRAM_VIA_BUF1 0x82
68 #define OP_PROGRAM_VIA_BUF2 0x85
70 /* compare buffer to flash */
71 #define OP_COMPARE_BUF1 0x60
72 #define OP_COMPARE_BUF2 0x61
74 /* read flash to buffer, then write-erase to flash */
75 #define OP_REWRITE_VIA_BUF1 0x58
76 #define OP_REWRITE_VIA_BUF2 0x59
78 /* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
81 #define OP_READ_ID 0x9F
82 #define OP_READ_SECURITY 0x77
83 #define OP_WRITE_SECURITY_REVC 0x9A
84 #define OP_WRITE_SECURITY 0x9B /* revision D */
91 unsigned partitioned
:1;
93 unsigned short page_offset
; /* offset in flash address */
94 unsigned int page_size
; /* of bytes per page */
97 struct spi_device
*spi
;
103 static const struct of_device_id dataflash_dt_ids
[] = {
104 { .compatible
= "atmel,at45", },
105 { .compatible
= "atmel,dataflash", },
109 #define dataflash_dt_ids NULL
112 /* ......................................................................... */
115 * Return the status of the DataFlash device.
117 static inline int dataflash_status(struct spi_device
*spi
)
119 /* NOTE: at45db321c over 25 MHz wants to write
120 * a dummy byte after the opcode...
122 return spi_w8r8(spi
, OP_READ_STATUS
);
126 * Poll the DataFlash device until it is READY.
127 * This usually takes 5-20 msec or so; more for sector erase.
129 static int dataflash_waitready(struct spi_device
*spi
)
134 status
= dataflash_status(spi
);
136 pr_debug("%s: status %d?\n",
137 dev_name(&spi
->dev
), status
);
141 if (status
& (1 << 7)) /* RDY/nBSY */
148 /* ......................................................................... */
151 * Erase pages of flash.
153 static int dataflash_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
155 struct dataflash
*priv
= mtd
->priv
;
156 struct spi_device
*spi
= priv
->spi
;
157 struct spi_transfer x
= { .tx_dma
= 0, };
158 struct spi_message msg
;
159 unsigned blocksize
= priv
->page_size
<< 3;
163 pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
164 dev_name(&spi
->dev
), (long long)instr
->addr
,
165 (long long)instr
->len
);
167 div_u64_rem(instr
->len
, priv
->page_size
, &rem
);
170 div_u64_rem(instr
->addr
, priv
->page_size
, &rem
);
174 spi_message_init(&msg
);
176 x
.tx_buf
= command
= priv
->command
;
178 spi_message_add_tail(&x
, &msg
);
180 mutex_lock(&priv
->lock
);
181 while (instr
->len
> 0) {
182 unsigned int pageaddr
;
186 /* Calculate flash page address; use block erase (for speed) if
187 * we're at a block boundary and need to erase the whole block.
189 pageaddr
= div_u64(instr
->addr
, priv
->page_size
);
190 do_block
= (pageaddr
& 0x7) == 0 && instr
->len
>= blocksize
;
191 pageaddr
= pageaddr
<< priv
->page_offset
;
193 command
[0] = do_block
? OP_ERASE_BLOCK
: OP_ERASE_PAGE
;
194 command
[1] = (uint8_t)(pageaddr
>> 16);
195 command
[2] = (uint8_t)(pageaddr
>> 8);
198 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
199 do_block
? "block" : "page",
200 command
[0], command
[1], command
[2], command
[3],
203 status
= spi_sync(spi
, &msg
);
204 (void) dataflash_waitready(spi
);
207 printk(KERN_ERR
"%s: erase %x, err %d\n",
208 dev_name(&spi
->dev
), pageaddr
, status
);
209 /* REVISIT: can retry instr->retries times; or
210 * giveup and instr->fail_addr = instr->addr;
216 instr
->addr
+= blocksize
;
217 instr
->len
-= blocksize
;
219 instr
->addr
+= priv
->page_size
;
220 instr
->len
-= priv
->page_size
;
223 mutex_unlock(&priv
->lock
);
225 /* Inform MTD subsystem that erase is complete */
226 instr
->state
= MTD_ERASE_DONE
;
227 mtd_erase_callback(instr
);
233 * Read from the DataFlash device.
234 * from : Start offset in flash device
235 * len : Amount to read
236 * retlen : About of data actually read
237 * buf : Buffer containing the data
239 static int dataflash_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
240 size_t *retlen
, u_char
*buf
)
242 struct dataflash
*priv
= mtd
->priv
;
243 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
244 struct spi_message msg
;
249 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv
->spi
->dev
),
250 (unsigned)from
, (unsigned)(from
+ len
));
252 /* Calculate flash page/byte address */
253 addr
= (((unsigned)from
/ priv
->page_size
) << priv
->page_offset
)
254 + ((unsigned)from
% priv
->page_size
);
256 command
= priv
->command
;
258 pr_debug("READ: (%x) %x %x %x\n",
259 command
[0], command
[1], command
[2], command
[3]);
261 spi_message_init(&msg
);
263 x
[0].tx_buf
= command
;
265 spi_message_add_tail(&x
[0], &msg
);
269 spi_message_add_tail(&x
[1], &msg
);
271 mutex_lock(&priv
->lock
);
273 /* Continuous read, max clock = f(car) which may be less than
274 * the peak rate available. Some chips support commands with
275 * fewer "don't care" bytes. Both buffers stay unchanged.
277 command
[0] = OP_READ_CONTINUOUS
;
278 command
[1] = (uint8_t)(addr
>> 16);
279 command
[2] = (uint8_t)(addr
>> 8);
280 command
[3] = (uint8_t)(addr
>> 0);
281 /* plus 4 "don't care" bytes */
283 status
= spi_sync(priv
->spi
, &msg
);
284 mutex_unlock(&priv
->lock
);
287 *retlen
= msg
.actual_length
- 8;
290 pr_debug("%s: read %x..%x --> %d\n",
291 dev_name(&priv
->spi
->dev
),
292 (unsigned)from
, (unsigned)(from
+ len
),
298 * Write to the DataFlash device.
299 * to : Start offset in flash device
300 * len : Amount to write
301 * retlen : Amount of data actually written
302 * buf : Buffer containing the data
304 static int dataflash_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
305 size_t * retlen
, const u_char
* buf
)
307 struct dataflash
*priv
= mtd
->priv
;
308 struct spi_device
*spi
= priv
->spi
;
309 struct spi_transfer x
[2] = { { .tx_dma
= 0, }, };
310 struct spi_message msg
;
311 unsigned int pageaddr
, addr
, offset
, writelen
;
312 size_t remaining
= len
;
313 u_char
*writebuf
= (u_char
*) buf
;
314 int status
= -EINVAL
;
317 pr_debug("%s: write 0x%x..0x%x\n",
318 dev_name(&spi
->dev
), (unsigned)to
, (unsigned)(to
+ len
));
320 spi_message_init(&msg
);
322 x
[0].tx_buf
= command
= priv
->command
;
324 spi_message_add_tail(&x
[0], &msg
);
326 pageaddr
= ((unsigned)to
/ priv
->page_size
);
327 offset
= ((unsigned)to
% priv
->page_size
);
328 if (offset
+ len
> priv
->page_size
)
329 writelen
= priv
->page_size
- offset
;
333 mutex_lock(&priv
->lock
);
334 while (remaining
> 0) {
335 pr_debug("write @ %i:%i len=%i\n",
336 pageaddr
, offset
, writelen
);
339 * (a) each page in a sector must be rewritten at least
340 * once every 10K sibling erase/program operations.
341 * (b) for pages that are already erased, we could
342 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
343 * (c) WRITE to buffer could be done while waiting for
344 * a previous MWRITE/MWERASE to complete ...
345 * (d) error handling here seems to be mostly missing.
347 * Two persistent bits per page, plus a per-sector counter,
348 * could support (a) and (b) ... we might consider using
349 * the second half of sector zero, which is just one block,
350 * to track that state. (On AT91, that sector should also
351 * support boot-from-DataFlash.)
354 addr
= pageaddr
<< priv
->page_offset
;
356 /* (1) Maybe transfer partial page to Buffer1 */
357 if (writelen
!= priv
->page_size
) {
358 command
[0] = OP_TRANSFER_BUF1
;
359 command
[1] = (addr
& 0x00FF0000) >> 16;
360 command
[2] = (addr
& 0x0000FF00) >> 8;
363 pr_debug("TRANSFER: (%x) %x %x %x\n",
364 command
[0], command
[1], command
[2], command
[3]);
366 status
= spi_sync(spi
, &msg
);
368 pr_debug("%s: xfer %u -> %d\n",
369 dev_name(&spi
->dev
), addr
, status
);
371 (void) dataflash_waitready(priv
->spi
);
374 /* (2) Program full page via Buffer1 */
376 command
[0] = OP_PROGRAM_VIA_BUF1
;
377 command
[1] = (addr
& 0x00FF0000) >> 16;
378 command
[2] = (addr
& 0x0000FF00) >> 8;
379 command
[3] = (addr
& 0x000000FF);
381 pr_debug("PROGRAM: (%x) %x %x %x\n",
382 command
[0], command
[1], command
[2], command
[3]);
384 x
[1].tx_buf
= writebuf
;
386 spi_message_add_tail(x
+ 1, &msg
);
387 status
= spi_sync(spi
, &msg
);
388 spi_transfer_del(x
+ 1);
390 pr_debug("%s: pgm %u/%u -> %d\n",
391 dev_name(&spi
->dev
), addr
, writelen
, status
);
393 (void) dataflash_waitready(priv
->spi
);
396 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
398 /* (3) Compare to Buffer1 */
399 addr
= pageaddr
<< priv
->page_offset
;
400 command
[0] = OP_COMPARE_BUF1
;
401 command
[1] = (addr
& 0x00FF0000) >> 16;
402 command
[2] = (addr
& 0x0000FF00) >> 8;
405 pr_debug("COMPARE: (%x) %x %x %x\n",
406 command
[0], command
[1], command
[2], command
[3]);
408 status
= spi_sync(spi
, &msg
);
410 pr_debug("%s: compare %u -> %d\n",
411 dev_name(&spi
->dev
), addr
, status
);
413 status
= dataflash_waitready(priv
->spi
);
415 /* Check result of the compare operation */
416 if (status
& (1 << 6)) {
417 printk(KERN_ERR
"%s: compare page %u, err %d\n",
418 dev_name(&spi
->dev
), pageaddr
, status
);
425 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
427 remaining
= remaining
- writelen
;
430 writebuf
+= writelen
;
433 if (remaining
> priv
->page_size
)
434 writelen
= priv
->page_size
;
436 writelen
= remaining
;
438 mutex_unlock(&priv
->lock
);
443 /* ......................................................................... */
445 #ifdef CONFIG_MTD_DATAFLASH_OTP
447 static int dataflash_get_otp_info(struct mtd_info
*mtd
,
448 struct otp_info
*info
, size_t len
)
450 /* Report both blocks as identical: bytes 0..64, locked.
451 * Unless the user block changed from all-ones, we can't
452 * tell whether it's still writable; so we assume it isn't.
457 return sizeof(*info
);
460 static ssize_t
otp_read(struct spi_device
*spi
, unsigned base
,
461 uint8_t *buf
, loff_t off
, size_t len
)
463 struct spi_message m
;
466 struct spi_transfer t
;
472 if ((off
+ len
) > 64)
475 spi_message_init(&m
);
477 l
= 4 + base
+ off
+ len
;
478 scratch
= kzalloc(l
, GFP_KERNEL
);
482 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
483 * IN: ignore 4 bytes, data bytes 0..N (max 127)
485 scratch
[0] = OP_READ_SECURITY
;
487 memset(&t
, 0, sizeof t
);
491 spi_message_add_tail(&t
, &m
);
493 dataflash_waitready(spi
);
495 status
= spi_sync(spi
, &m
);
497 memcpy(buf
, scratch
+ 4 + base
+ off
, len
);
505 static int dataflash_read_fact_otp(struct mtd_info
*mtd
,
506 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
508 struct dataflash
*priv
= mtd
->priv
;
511 /* 64 bytes, from 0..63 ... start at 64 on-chip */
512 mutex_lock(&priv
->lock
);
513 status
= otp_read(priv
->spi
, 64, buf
, from
, len
);
514 mutex_unlock(&priv
->lock
);
522 static int dataflash_read_user_otp(struct mtd_info
*mtd
,
523 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
525 struct dataflash
*priv
= mtd
->priv
;
528 /* 64 bytes, from 0..63 ... start at 0 on-chip */
529 mutex_lock(&priv
->lock
);
530 status
= otp_read(priv
->spi
, 0, buf
, from
, len
);
531 mutex_unlock(&priv
->lock
);
539 static int dataflash_write_user_otp(struct mtd_info
*mtd
,
540 loff_t from
, size_t len
, size_t *retlen
, u_char
*buf
)
542 struct spi_message m
;
543 const size_t l
= 4 + 64;
545 struct spi_transfer t
;
546 struct dataflash
*priv
= mtd
->priv
;
552 /* Strictly speaking, we *could* truncate the write ... but
553 * let's not do that for the only write that's ever possible.
555 if ((from
+ len
) > 64)
558 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
561 scratch
= kzalloc(l
, GFP_KERNEL
);
564 scratch
[0] = OP_WRITE_SECURITY
;
565 memcpy(scratch
+ 4 + from
, buf
, len
);
567 spi_message_init(&m
);
569 memset(&t
, 0, sizeof t
);
572 spi_message_add_tail(&t
, &m
);
574 /* Write the OTP bits, if they've not yet been written.
575 * This modifies SRAM buffer1.
577 mutex_lock(&priv
->lock
);
578 dataflash_waitready(priv
->spi
);
579 status
= spi_sync(priv
->spi
, &m
);
580 mutex_unlock(&priv
->lock
);
591 static char *otp_setup(struct mtd_info
*device
, char revision
)
593 device
->_get_fact_prot_info
= dataflash_get_otp_info
;
594 device
->_read_fact_prot_reg
= dataflash_read_fact_otp
;
595 device
->_get_user_prot_info
= dataflash_get_otp_info
;
596 device
->_read_user_prot_reg
= dataflash_read_user_otp
;
598 /* rev c parts (at45db321c and at45db1281 only!) use a
599 * different write procedure; not (yet?) implemented.
602 device
->_write_user_prot_reg
= dataflash_write_user_otp
;
609 static char *otp_setup(struct mtd_info
*device
, char revision
)
616 /* ......................................................................... */
619 * Register DataFlash device with MTD subsystem.
622 add_dataflash_otp(struct spi_device
*spi
, char *name
,
623 int nr_pages
, int pagesize
, int pageoffset
, char revision
)
625 struct dataflash
*priv
;
626 struct mtd_info
*device
;
627 struct mtd_part_parser_data ppdata
;
628 struct flash_platform_data
*pdata
= spi
->dev
.platform_data
;
632 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
636 mutex_init(&priv
->lock
);
638 priv
->page_size
= pagesize
;
639 priv
->page_offset
= pageoffset
;
641 /* name must be usable with cmdlinepart */
642 sprintf(priv
->name
, "spi%d.%d-%s",
643 spi
->master
->bus_num
, spi
->chip_select
,
647 device
->name
= (pdata
&& pdata
->name
) ? pdata
->name
: priv
->name
;
648 device
->size
= nr_pages
* pagesize
;
649 device
->erasesize
= pagesize
;
650 device
->writesize
= pagesize
;
651 device
->owner
= THIS_MODULE
;
652 device
->type
= MTD_DATAFLASH
;
653 device
->flags
= MTD_WRITEABLE
;
654 device
->_erase
= dataflash_erase
;
655 device
->_read
= dataflash_read
;
656 device
->_write
= dataflash_write
;
659 device
->dev
.parent
= &spi
->dev
;
662 otp_tag
= otp_setup(device
, revision
);
664 dev_info(&spi
->dev
, "%s (%lld KBytes) pagesize %d bytes%s\n",
665 name
, (long long)((device
->size
+ 1023) >> 10),
667 dev_set_drvdata(&spi
->dev
, priv
);
669 ppdata
.of_node
= spi
->dev
.of_node
;
670 err
= mtd_device_parse_register(device
, NULL
, &ppdata
,
671 pdata
? pdata
->parts
: NULL
,
672 pdata
? pdata
->nr_parts
: 0);
677 dev_set_drvdata(&spi
->dev
, NULL
);
682 static inline int __devinit
683 add_dataflash(struct spi_device
*spi
, char *name
,
684 int nr_pages
, int pagesize
, int pageoffset
)
686 return add_dataflash_otp(spi
, name
, nr_pages
, pagesize
,
693 /* JEDEC id has a high byte of zero plus three data bytes:
694 * the manufacturer id, then a two byte device id.
698 /* The size listed here is what works with OP_ERASE_PAGE. */
704 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
705 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
708 static struct flash_info __devinitdata dataflash_data
[] = {
711 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
712 * one with IS_POW2PS and the other without. The entry with the
713 * non-2^N byte page size can't name exact chip revisions without
714 * losing backwards compatibility for cmdlinepart.
716 * These newer chips also support 128-byte security registers (with
717 * 64 bytes one-time-programmable) and software write-protection.
719 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS
},
720 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS
| IS_POW2PS
},
722 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS
},
723 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS
| IS_POW2PS
},
725 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS
},
726 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS
| IS_POW2PS
},
728 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS
},
729 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS
| IS_POW2PS
},
731 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS
},
732 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS
| IS_POW2PS
},
734 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
736 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS
},
737 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS
| IS_POW2PS
},
739 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS
},
740 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS
| IS_POW2PS
},
743 static struct flash_info
*__devinit
jedec_probe(struct spi_device
*spi
)
746 uint8_t code
= OP_READ_ID
;
749 struct flash_info
*info
;
752 /* JEDEC also defines an optional "extended device information"
753 * string for after vendor-specific data, after the three bytes
754 * we use here. Supporting some chips might require using it.
756 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
757 * That's not an error; only rev C and newer chips handle it, and
758 * only Atmel sells these chips.
760 tmp
= spi_write_then_read(spi
, &code
, 1, id
, 3);
762 pr_debug("%s: error %d reading JEDEC ID\n",
763 dev_name(&spi
->dev
), tmp
);
775 for (tmp
= 0, info
= dataflash_data
;
776 tmp
< ARRAY_SIZE(dataflash_data
);
778 if (info
->jedec_id
== jedec
) {
779 pr_debug("%s: OTP, sector protect%s\n",
781 (info
->flags
& SUP_POW2PS
)
782 ? ", binary pagesize" : ""
784 if (info
->flags
& SUP_POW2PS
) {
785 status
= dataflash_status(spi
);
787 pr_debug("%s: status error %d\n",
788 dev_name(&spi
->dev
), status
);
789 return ERR_PTR(status
);
792 if (info
->flags
& IS_POW2PS
)
795 if (!(info
->flags
& IS_POW2PS
))
804 * Treat other chips as errors ... we won't know the right page
805 * size (it might be binary) even when we can tell which density
806 * class is involved (legacy chip id scheme).
808 dev_warn(&spi
->dev
, "JEDEC id %06x not handled\n", jedec
);
809 return ERR_PTR(-ENODEV
);
813 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
814 * or else the ID code embedded in the status bits:
816 * Device Density ID code #Pages PageSize Offset
817 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
818 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
819 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
820 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
821 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
822 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
823 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
824 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
826 static int __devinit
dataflash_probe(struct spi_device
*spi
)
829 struct flash_info
*info
;
832 * Try to detect dataflash by JEDEC ID.
833 * If it succeeds we know we have either a C or D part.
834 * D will support power of 2 pagesize option.
835 * Both support the security register, though with different
838 info
= jedec_probe(spi
);
840 return PTR_ERR(info
);
842 return add_dataflash_otp(spi
, info
->name
, info
->nr_pages
,
843 info
->pagesize
, info
->pageoffset
,
844 (info
->flags
& SUP_POW2PS
) ? 'd' : 'c');
847 * Older chips support only legacy commands, identifing
848 * capacity using bits in the status byte.
850 status
= dataflash_status(spi
);
851 if (status
<= 0 || status
== 0xff) {
852 pr_debug("%s: status error %d\n",
853 dev_name(&spi
->dev
), status
);
854 if (status
== 0 || status
== 0xff)
859 /* if there's a device there, assume it's dataflash.
860 * board setup should have set spi->max_speed_max to
861 * match f(car) for continuous reads, mode 0 or 3.
863 switch (status
& 0x3c) {
864 case 0x0c: /* 0 0 1 1 x x */
865 status
= add_dataflash(spi
, "AT45DB011B", 512, 264, 9);
867 case 0x14: /* 0 1 0 1 x x */
868 status
= add_dataflash(spi
, "AT45DB021B", 1024, 264, 9);
870 case 0x1c: /* 0 1 1 1 x x */
871 status
= add_dataflash(spi
, "AT45DB041x", 2048, 264, 9);
873 case 0x24: /* 1 0 0 1 x x */
874 status
= add_dataflash(spi
, "AT45DB081B", 4096, 264, 9);
876 case 0x2c: /* 1 0 1 1 x x */
877 status
= add_dataflash(spi
, "AT45DB161x", 4096, 528, 10);
879 case 0x34: /* 1 1 0 1 x x */
880 status
= add_dataflash(spi
, "AT45DB321x", 8192, 528, 10);
882 case 0x38: /* 1 1 1 x x x */
884 status
= add_dataflash(spi
, "AT45DB642x", 8192, 1056, 11);
886 /* obsolete AT45DB1282 not (yet?) supported */
888 pr_debug("%s: unsupported device (%x)\n", dev_name(&spi
->dev
),
894 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi
->dev
),
900 static int __devexit
dataflash_remove(struct spi_device
*spi
)
902 struct dataflash
*flash
= dev_get_drvdata(&spi
->dev
);
905 pr_debug("%s: remove\n", dev_name(&spi
->dev
));
907 status
= mtd_device_unregister(&flash
->mtd
);
909 dev_set_drvdata(&spi
->dev
, NULL
);
915 static struct spi_driver dataflash_driver
= {
917 .name
= "mtd_dataflash",
918 .owner
= THIS_MODULE
,
919 .of_match_table
= dataflash_dt_ids
,
922 .probe
= dataflash_probe
,
923 .remove
= __devexit_p(dataflash_remove
),
925 /* FIXME: investigate suspend and resume... */
928 module_spi_driver(dataflash_driver
);
930 MODULE_LICENSE("GPL");
931 MODULE_AUTHOR("Andrew Victor, David Brownell");
932 MODULE_DESCRIPTION("MTD DataFlash driver");
933 MODULE_ALIAS("spi:mtd_dataflash");