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USB: usb-storage: unusual_devs update for Super TOP SATA bridge
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blobb0fefc435c037072a1367fce3523416b3ae546c6
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/kthread.h>
52 #include <linux/jiffies.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "2.0.2-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59 #define HPSA "hpsa"
60
61 /* How long to wait (in milliseconds) for board to go into simple mode */
62 #define MAX_CONFIG_WAIT 30000
63 #define MAX_IOCTL_CONFIG_WAIT 1000
64
65 /*define how many times we will try a command because of bus resets */
66 #define MAX_CMD_RETRIES 3
67
68 /* Embedded module documentation macros - see modules.h */
69 MODULE_AUTHOR("Hewlett-Packard Company");
70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73 MODULE_VERSION(HPSA_DRIVER_VERSION);
74 MODULE_LICENSE("GPL");
75
76 static int hpsa_allow_any;
77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78 MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
80 static int hpsa_simple_mode;
81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
84
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id hpsa_pci_device_id[] = {
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
104 {0,}
105 };
106
107 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109 /* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113 static struct board_type products[] = {
114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129 };
130
131 static int number_of_controllers;
132
133 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134 static spinlock_t lockup_detector_lock;
135 static struct task_struct *hpsa_lockup_detector;
136
137 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
139 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140 static void start_io(struct ctlr_info *h);
141
142 #ifdef CONFIG_COMPAT
143 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144 #endif
145
146 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148 static struct CommandList *cmd_alloc(struct ctlr_info *h);
149 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
150 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
152 int cmd_type);
153
154 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
155 static void hpsa_scan_start(struct Scsi_Host *);
156 static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
158 static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
160
161 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
162 static int hpsa_slave_alloc(struct scsi_device *sdev);
163 static void hpsa_slave_destroy(struct scsi_device *sdev);
164
165 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
166 static int check_for_unit_attention(struct ctlr_info *h,
167 struct CommandList *c);
168 static void check_ioctl_unit_attention(struct ctlr_info *h,
169 struct CommandList *c);
170 /* performant mode helper functions */
171 static void calc_bucket_map(int *bucket, int num_buckets,
172 int nsgs, int *bucket_map);
173 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
174 static inline u32 next_command(struct ctlr_info *h);
175 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
176 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
177 u64 *cfg_offset);
178 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
179 unsigned long *memory_bar);
180 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
181 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
182 void __iomem *vaddr, int wait_for_ready);
183 #define BOARD_NOT_READY 0
184 #define BOARD_READY 1
185
186 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
187 {
188 unsigned long *priv = shost_priv(sdev->host);
189 return (struct ctlr_info *) *priv;
190 }
191
192 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
193 {
194 unsigned long *priv = shost_priv(sh);
195 return (struct ctlr_info *) *priv;
196 }
197
198 static int check_for_unit_attention(struct ctlr_info *h,
199 struct CommandList *c)
200 {
201 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
202 return 0;
203
204 switch (c->err_info->SenseInfo[12]) {
205 case STATE_CHANGED:
206 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
207 "detected, command retried\n", h->ctlr);
208 break;
209 case LUN_FAILED:
210 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
211 "detected, action required\n", h->ctlr);
212 break;
213 case REPORT_LUNS_CHANGED:
214 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
215 "changed, action required\n", h->ctlr);
216 /*
217 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
218 * target (array) devices.
219 */
220 break;
221 case POWER_OR_RESET:
222 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
223 "or device reset detected\n", h->ctlr);
224 break;
225 case UNIT_ATTENTION_CLEARED:
226 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
227 "cleared by another initiator\n", h->ctlr);
228 break;
229 default:
230 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
231 "unit attention detected\n", h->ctlr);
232 break;
233 }
234 return 1;
235 }
236
237 static ssize_t host_store_rescan(struct device *dev,
238 struct device_attribute *attr,
239 const char *buf, size_t count)
240 {
241 struct ctlr_info *h;
242 struct Scsi_Host *shost = class_to_shost(dev);
243 h = shost_to_hba(shost);
244 hpsa_scan_start(h->scsi_host);
245 return count;
246 }
247
248 static ssize_t host_show_firmware_revision(struct device *dev,
249 struct device_attribute *attr, char *buf)
250 {
251 struct ctlr_info *h;
252 struct Scsi_Host *shost = class_to_shost(dev);
253 unsigned char *fwrev;
254
255 h = shost_to_hba(shost);
256 if (!h->hba_inquiry_data)
257 return 0;
258 fwrev = &h->hba_inquiry_data[32];
259 return snprintf(buf, 20, "%c%c%c%c\n",
260 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
261 }
262
263 static ssize_t host_show_commands_outstanding(struct device *dev,
264 struct device_attribute *attr, char *buf)
265 {
266 struct Scsi_Host *shost = class_to_shost(dev);
267 struct ctlr_info *h = shost_to_hba(shost);
268
269 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
270 }
271
272 static ssize_t host_show_transport_mode(struct device *dev,
273 struct device_attribute *attr, char *buf)
274 {
275 struct ctlr_info *h;
276 struct Scsi_Host *shost = class_to_shost(dev);
277
278 h = shost_to_hba(shost);
279 return snprintf(buf, 20, "%s\n",
280 h->transMethod & CFGTBL_Trans_Performant ?
281 "performant" : "simple");
282 }
283
284 /* List of controllers which cannot be hard reset on kexec with reset_devices */
285 static u32 unresettable_controller[] = {
286 0x324a103C, /* Smart Array P712m */
287 0x324b103C, /* SmartArray P711m */
288 0x3223103C, /* Smart Array P800 */
289 0x3234103C, /* Smart Array P400 */
290 0x3235103C, /* Smart Array P400i */
291 0x3211103C, /* Smart Array E200i */
292 0x3212103C, /* Smart Array E200 */
293 0x3213103C, /* Smart Array E200i */
294 0x3214103C, /* Smart Array E200i */
295 0x3215103C, /* Smart Array E200i */
296 0x3237103C, /* Smart Array E500 */
297 0x323D103C, /* Smart Array P700m */
298 0x40800E11, /* Smart Array 5i */
299 0x409C0E11, /* Smart Array 6400 */
300 0x409D0E11, /* Smart Array 6400 EM */
301 0x40700E11, /* Smart Array 5300 */
302 0x40820E11, /* Smart Array 532 */
303 0x40830E11, /* Smart Array 5312 */
304 0x409A0E11, /* Smart Array 641 */
305 0x409B0E11, /* Smart Array 642 */
306 0x40910E11, /* Smart Array 6i */
307 };
308
309 /* List of controllers which cannot even be soft reset */
310 static u32 soft_unresettable_controller[] = {
311 0x40800E11, /* Smart Array 5i */
312 0x40700E11, /* Smart Array 5300 */
313 0x40820E11, /* Smart Array 532 */
314 0x40830E11, /* Smart Array 5312 */
315 0x409A0E11, /* Smart Array 641 */
316 0x409B0E11, /* Smart Array 642 */
317 0x40910E11, /* Smart Array 6i */
318 /* Exclude 640x boards. These are two pci devices in one slot
319 * which share a battery backed cache module. One controls the
320 * cache, the other accesses the cache through the one that controls
321 * it. If we reset the one controlling the cache, the other will
322 * likely not be happy. Just forbid resetting this conjoined mess.
323 * The 640x isn't really supported by hpsa anyway.
324 */
325 0x409C0E11, /* Smart Array 6400 */
326 0x409D0E11, /* Smart Array 6400 EM */
327 };
328
329 static int ctlr_is_hard_resettable(u32 board_id)
330 {
331 int i;
332
333 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
334 if (unresettable_controller[i] == board_id)
335 return 0;
336 return 1;
337 }
338
339 static int ctlr_is_soft_resettable(u32 board_id)
340 {
341 int i;
342
343 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
344 if (soft_unresettable_controller[i] == board_id)
345 return 0;
346 return 1;
347 }
348
349 static int ctlr_is_resettable(u32 board_id)
350 {
351 return ctlr_is_hard_resettable(board_id) ||
352 ctlr_is_soft_resettable(board_id);
353 }
354
355 static ssize_t host_show_resettable(struct device *dev,
356 struct device_attribute *attr, char *buf)
357 {
358 struct ctlr_info *h;
359 struct Scsi_Host *shost = class_to_shost(dev);
360
361 h = shost_to_hba(shost);
362 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
363 }
364
365 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
366 {
367 return (scsi3addr[3] & 0xC0) == 0x40;
368 }
369
370 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
371 "UNKNOWN"
372 };
373 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
374
375 static ssize_t raid_level_show(struct device *dev,
376 struct device_attribute *attr, char *buf)
377 {
378 ssize_t l = 0;
379 unsigned char rlevel;
380 struct ctlr_info *h;
381 struct scsi_device *sdev;
382 struct hpsa_scsi_dev_t *hdev;
383 unsigned long flags;
384
385 sdev = to_scsi_device(dev);
386 h = sdev_to_hba(sdev);
387 spin_lock_irqsave(&h->lock, flags);
388 hdev = sdev->hostdata;
389 if (!hdev) {
390 spin_unlock_irqrestore(&h->lock, flags);
391 return -ENODEV;
392 }
393
394 /* Is this even a logical drive? */
395 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
396 spin_unlock_irqrestore(&h->lock, flags);
397 l = snprintf(buf, PAGE_SIZE, "N/A\n");
398 return l;
399 }
400
401 rlevel = hdev->raid_level;
402 spin_unlock_irqrestore(&h->lock, flags);
403 if (rlevel > RAID_UNKNOWN)
404 rlevel = RAID_UNKNOWN;
405 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
406 return l;
407 }
408
409 static ssize_t lunid_show(struct device *dev,
410 struct device_attribute *attr, char *buf)
411 {
412 struct ctlr_info *h;
413 struct scsi_device *sdev;
414 struct hpsa_scsi_dev_t *hdev;
415 unsigned long flags;
416 unsigned char lunid[8];
417
418 sdev = to_scsi_device(dev);
419 h = sdev_to_hba(sdev);
420 spin_lock_irqsave(&h->lock, flags);
421 hdev = sdev->hostdata;
422 if (!hdev) {
423 spin_unlock_irqrestore(&h->lock, flags);
424 return -ENODEV;
425 }
426 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
427 spin_unlock_irqrestore(&h->lock, flags);
428 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
429 lunid[0], lunid[1], lunid[2], lunid[3],
430 lunid[4], lunid[5], lunid[6], lunid[7]);
431 }
432
433 static ssize_t unique_id_show(struct device *dev,
434 struct device_attribute *attr, char *buf)
435 {
436 struct ctlr_info *h;
437 struct scsi_device *sdev;
438 struct hpsa_scsi_dev_t *hdev;
439 unsigned long flags;
440 unsigned char sn[16];
441
442 sdev = to_scsi_device(dev);
443 h = sdev_to_hba(sdev);
444 spin_lock_irqsave(&h->lock, flags);
445 hdev = sdev->hostdata;
446 if (!hdev) {
447 spin_unlock_irqrestore(&h->lock, flags);
448 return -ENODEV;
449 }
450 memcpy(sn, hdev->device_id, sizeof(sn));
451 spin_unlock_irqrestore(&h->lock, flags);
452 return snprintf(buf, 16 * 2 + 2,
453 "%02X%02X%02X%02X%02X%02X%02X%02X"
454 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
455 sn[0], sn[1], sn[2], sn[3],
456 sn[4], sn[5], sn[6], sn[7],
457 sn[8], sn[9], sn[10], sn[11],
458 sn[12], sn[13], sn[14], sn[15]);
459 }
460
461 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
462 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
463 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
464 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
465 static DEVICE_ATTR(firmware_revision, S_IRUGO,
466 host_show_firmware_revision, NULL);
467 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
468 host_show_commands_outstanding, NULL);
469 static DEVICE_ATTR(transport_mode, S_IRUGO,
470 host_show_transport_mode, NULL);
471 static DEVICE_ATTR(resettable, S_IRUGO,
472 host_show_resettable, NULL);
473
474 static struct device_attribute *hpsa_sdev_attrs[] = {
475 &dev_attr_raid_level,
476 &dev_attr_lunid,
477 &dev_attr_unique_id,
478 NULL,
479 };
480
481 static struct device_attribute *hpsa_shost_attrs[] = {
482 &dev_attr_rescan,
483 &dev_attr_firmware_revision,
484 &dev_attr_commands_outstanding,
485 &dev_attr_transport_mode,
486 &dev_attr_resettable,
487 NULL,
488 };
489
490 static struct scsi_host_template hpsa_driver_template = {
491 .module = THIS_MODULE,
492 .name = HPSA,
493 .proc_name = HPSA,
494 .queuecommand = hpsa_scsi_queue_command,
495 .scan_start = hpsa_scan_start,
496 .scan_finished = hpsa_scan_finished,
497 .change_queue_depth = hpsa_change_queue_depth,
498 .this_id = -1,
499 .use_clustering = ENABLE_CLUSTERING,
500 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
501 .ioctl = hpsa_ioctl,
502 .slave_alloc = hpsa_slave_alloc,
503 .slave_destroy = hpsa_slave_destroy,
504 #ifdef CONFIG_COMPAT
505 .compat_ioctl = hpsa_compat_ioctl,
506 #endif
507 .sdev_attrs = hpsa_sdev_attrs,
508 .shost_attrs = hpsa_shost_attrs,
509 .max_sectors = 8192,
510 };
511
512
513 /* Enqueuing and dequeuing functions for cmdlists. */
514 static inline void addQ(struct list_head *list, struct CommandList *c)
515 {
516 list_add_tail(&c->list, list);
517 }
518
519 static inline u32 next_command(struct ctlr_info *h)
520 {
521 u32 a;
522
523 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
524 return h->access.command_completed(h);
525
526 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
527 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
528 (h->reply_pool_head)++;
529 h->commands_outstanding--;
530 } else {
531 a = FIFO_EMPTY;
532 }
533 /* Check for wraparound */
534 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
535 h->reply_pool_head = h->reply_pool;
536 h->reply_pool_wraparound ^= 1;
537 }
538 return a;
539 }
540
541 /* set_performant_mode: Modify the tag for cciss performant
542 * set bit 0 for pull model, bits 3-1 for block fetch
543 * register number
544 */
545 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
546 {
547 if (likely(h->transMethod & CFGTBL_Trans_Performant))
548 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
549 }
550
551 static int is_firmware_flash_cmd(u8 *cdb)
552 {
553 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
554 }
555
556 /*
557 * During firmware flash, the heartbeat register may not update as frequently
558 * as it should. So we dial down lockup detection during firmware flash. and
559 * dial it back up when firmware flash completes.
560 */
561 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
562 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
563 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
564 struct CommandList *c)
565 {
566 if (!is_firmware_flash_cmd(c->Request.CDB))
567 return;
568 atomic_inc(&h->firmware_flash_in_progress);
569 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
570 }
571
572 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
573 struct CommandList *c)
574 {
575 if (is_firmware_flash_cmd(c->Request.CDB) &&
576 atomic_dec_and_test(&h->firmware_flash_in_progress))
577 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
578 }
579
580 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
581 struct CommandList *c)
582 {
583 unsigned long flags;
584
585 set_performant_mode(h, c);
586 dial_down_lockup_detection_during_fw_flash(h, c);
587 spin_lock_irqsave(&h->lock, flags);
588 addQ(&h->reqQ, c);
589 h->Qdepth++;
590 start_io(h);
591 spin_unlock_irqrestore(&h->lock, flags);
592 }
593
594 static inline void removeQ(struct CommandList *c)
595 {
596 if (WARN_ON(list_empty(&c->list)))
597 return;
598 list_del_init(&c->list);
599 }
600
601 static inline int is_hba_lunid(unsigned char scsi3addr[])
602 {
603 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
604 }
605
606 static inline int is_scsi_rev_5(struct ctlr_info *h)
607 {
608 if (!h->hba_inquiry_data)
609 return 0;
610 if ((h->hba_inquiry_data[2] & 0x07) == 5)
611 return 1;
612 return 0;
613 }
614
615 static int hpsa_find_target_lun(struct ctlr_info *h,
616 unsigned char scsi3addr[], int bus, int *target, int *lun)
617 {
618 /* finds an unused bus, target, lun for a new physical device
619 * assumes h->devlock is held
620 */
621 int i, found = 0;
622 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
623
624 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
625
626 for (i = 0; i < h->ndevices; i++) {
627 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
628 __set_bit(h->dev[i]->target, lun_taken);
629 }
630
631 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
632 if (i < HPSA_MAX_DEVICES) {
633 /* *bus = 1; */
634 *target = i;
635 *lun = 0;
636 found = 1;
637 }
638 return !found;
639 }
640
641 /* Add an entry into h->dev[] array. */
642 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
643 struct hpsa_scsi_dev_t *device,
644 struct hpsa_scsi_dev_t *added[], int *nadded)
645 {
646 /* assumes h->devlock is held */
647 int n = h->ndevices;
648 int i;
649 unsigned char addr1[8], addr2[8];
650 struct hpsa_scsi_dev_t *sd;
651
652 if (n >= HPSA_MAX_DEVICES) {
653 dev_err(&h->pdev->dev, "too many devices, some will be "
654 "inaccessible.\n");
655 return -1;
656 }
657
658 /* physical devices do not have lun or target assigned until now. */
659 if (device->lun != -1)
660 /* Logical device, lun is already assigned. */
661 goto lun_assigned;
662
663 /* If this device a non-zero lun of a multi-lun device
664 * byte 4 of the 8-byte LUN addr will contain the logical
665 * unit no, zero otherise.
666 */
667 if (device->scsi3addr[4] == 0) {
668 /* This is not a non-zero lun of a multi-lun device */
669 if (hpsa_find_target_lun(h, device->scsi3addr,
670 device->bus, &device->target, &device->lun) != 0)
671 return -1;
672 goto lun_assigned;
673 }
674
675 /* This is a non-zero lun of a multi-lun device.
676 * Search through our list and find the device which
677 * has the same 8 byte LUN address, excepting byte 4.
678 * Assign the same bus and target for this new LUN.
679 * Use the logical unit number from the firmware.
680 */
681 memcpy(addr1, device->scsi3addr, 8);
682 addr1[4] = 0;
683 for (i = 0; i < n; i++) {
684 sd = h->dev[i];
685 memcpy(addr2, sd->scsi3addr, 8);
686 addr2[4] = 0;
687 /* differ only in byte 4? */
688 if (memcmp(addr1, addr2, 8) == 0) {
689 device->bus = sd->bus;
690 device->target = sd->target;
691 device->lun = device->scsi3addr[4];
692 break;
693 }
694 }
695 if (device->lun == -1) {
696 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
697 " suspect firmware bug or unsupported hardware "
698 "configuration.\n");
699 return -1;
700 }
701
702 lun_assigned:
703
704 h->dev[n] = device;
705 h->ndevices++;
706 added[*nadded] = device;
707 (*nadded)++;
708
709 /* initially, (before registering with scsi layer) we don't
710 * know our hostno and we don't want to print anything first
711 * time anyway (the scsi layer's inquiries will show that info)
712 */
713 /* if (hostno != -1) */
714 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
715 scsi_device_type(device->devtype), hostno,
716 device->bus, device->target, device->lun);
717 return 0;
718 }
719
720 /* Update an entry in h->dev[] array. */
721 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
722 int entry, struct hpsa_scsi_dev_t *new_entry)
723 {
724 /* assumes h->devlock is held */
725 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
726
727 /* Raid level changed. */
728 h->dev[entry]->raid_level = new_entry->raid_level;
729 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
730 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
731 new_entry->target, new_entry->lun);
732 }
733
734 /* Replace an entry from h->dev[] array. */
735 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
736 int entry, struct hpsa_scsi_dev_t *new_entry,
737 struct hpsa_scsi_dev_t *added[], int *nadded,
738 struct hpsa_scsi_dev_t *removed[], int *nremoved)
739 {
740 /* assumes h->devlock is held */
741 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
742 removed[*nremoved] = h->dev[entry];
743 (*nremoved)++;
744
745 /*
746 * New physical devices won't have target/lun assigned yet
747 * so we need to preserve the values in the slot we are replacing.
748 */
749 if (new_entry->target == -1) {
750 new_entry->target = h->dev[entry]->target;
751 new_entry->lun = h->dev[entry]->lun;
752 }
753
754 h->dev[entry] = new_entry;
755 added[*nadded] = new_entry;
756 (*nadded)++;
757 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
758 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
759 new_entry->target, new_entry->lun);
760 }
761
762 /* Remove an entry from h->dev[] array. */
763 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
764 struct hpsa_scsi_dev_t *removed[], int *nremoved)
765 {
766 /* assumes h->devlock is held */
767 int i;
768 struct hpsa_scsi_dev_t *sd;
769
770 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
771
772 sd = h->dev[entry];
773 removed[*nremoved] = h->dev[entry];
774 (*nremoved)++;
775
776 for (i = entry; i < h->ndevices-1; i++)
777 h->dev[i] = h->dev[i+1];
778 h->ndevices--;
779 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
780 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
781 sd->lun);
782 }
783
784 #define SCSI3ADDR_EQ(a, b) ( \
785 (a)[7] == (b)[7] && \
786 (a)[6] == (b)[6] && \
787 (a)[5] == (b)[5] && \
788 (a)[4] == (b)[4] && \
789 (a)[3] == (b)[3] && \
790 (a)[2] == (b)[2] && \
791 (a)[1] == (b)[1] && \
792 (a)[0] == (b)[0])
793
794 static void fixup_botched_add(struct ctlr_info *h,
795 struct hpsa_scsi_dev_t *added)
796 {
797 /* called when scsi_add_device fails in order to re-adjust
798 * h->dev[] to match the mid layer's view.
799 */
800 unsigned long flags;
801 int i, j;
802
803 spin_lock_irqsave(&h->lock, flags);
804 for (i = 0; i < h->ndevices; i++) {
805 if (h->dev[i] == added) {
806 for (j = i; j < h->ndevices-1; j++)
807 h->dev[j] = h->dev[j+1];
808 h->ndevices--;
809 break;
810 }
811 }
812 spin_unlock_irqrestore(&h->lock, flags);
813 kfree(added);
814 }
815
816 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
817 struct hpsa_scsi_dev_t *dev2)
818 {
819 /* we compare everything except lun and target as these
820 * are not yet assigned. Compare parts likely
821 * to differ first
822 */
823 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
824 sizeof(dev1->scsi3addr)) != 0)
825 return 0;
826 if (memcmp(dev1->device_id, dev2->device_id,
827 sizeof(dev1->device_id)) != 0)
828 return 0;
829 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
830 return 0;
831 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
832 return 0;
833 if (dev1->devtype != dev2->devtype)
834 return 0;
835 if (dev1->bus != dev2->bus)
836 return 0;
837 return 1;
838 }
839
840 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
841 struct hpsa_scsi_dev_t *dev2)
842 {
843 /* Device attributes that can change, but don't mean
844 * that the device is a different device, nor that the OS
845 * needs to be told anything about the change.
846 */
847 if (dev1->raid_level != dev2->raid_level)
848 return 1;
849 return 0;
850 }
851
852 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
853 * and return needle location in *index. If scsi3addr matches, but not
854 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
855 * location in *index.
856 * In the case of a minor device attribute change, such as RAID level, just
857 * return DEVICE_UPDATED, along with the updated device's location in index.
858 * If needle not found, return DEVICE_NOT_FOUND.
859 */
860 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
861 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
862 int *index)
863 {
864 int i;
865 #define DEVICE_NOT_FOUND 0
866 #define DEVICE_CHANGED 1
867 #define DEVICE_SAME 2
868 #define DEVICE_UPDATED 3
869 for (i = 0; i < haystack_size; i++) {
870 if (haystack[i] == NULL) /* previously removed. */
871 continue;
872 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
873 *index = i;
874 if (device_is_the_same(needle, haystack[i])) {
875 if (device_updated(needle, haystack[i]))
876 return DEVICE_UPDATED;
877 return DEVICE_SAME;
878 } else {
879 return DEVICE_CHANGED;
880 }
881 }
882 }
883 *index = -1;
884 return DEVICE_NOT_FOUND;
885 }
886
887 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
888 struct hpsa_scsi_dev_t *sd[], int nsds)
889 {
890 /* sd contains scsi3 addresses and devtypes, and inquiry
891 * data. This function takes what's in sd to be the current
892 * reality and updates h->dev[] to reflect that reality.
893 */
894 int i, entry, device_change, changes = 0;
895 struct hpsa_scsi_dev_t *csd;
896 unsigned long flags;
897 struct hpsa_scsi_dev_t **added, **removed;
898 int nadded, nremoved;
899 struct Scsi_Host *sh = NULL;
900
901 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
902 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
903
904 if (!added || !removed) {
905 dev_warn(&h->pdev->dev, "out of memory in "
906 "adjust_hpsa_scsi_table\n");
907 goto free_and_out;
908 }
909
910 spin_lock_irqsave(&h->devlock, flags);
911
912 /* find any devices in h->dev[] that are not in
913 * sd[] and remove them from h->dev[], and for any
914 * devices which have changed, remove the old device
915 * info and add the new device info.
916 * If minor device attributes change, just update
917 * the existing device structure.
918 */
919 i = 0;
920 nremoved = 0;
921 nadded = 0;
922 while (i < h->ndevices) {
923 csd = h->dev[i];
924 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
925 if (device_change == DEVICE_NOT_FOUND) {
926 changes++;
927 hpsa_scsi_remove_entry(h, hostno, i,
928 removed, &nremoved);
929 continue; /* remove ^^^, hence i not incremented */
930 } else if (device_change == DEVICE_CHANGED) {
931 changes++;
932 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
933 added, &nadded, removed, &nremoved);
934 /* Set it to NULL to prevent it from being freed
935 * at the bottom of hpsa_update_scsi_devices()
936 */
937 sd[entry] = NULL;
938 } else if (device_change == DEVICE_UPDATED) {
939 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
940 }
941 i++;
942 }
943
944 /* Now, make sure every device listed in sd[] is also
945 * listed in h->dev[], adding them if they aren't found
946 */
947
948 for (i = 0; i < nsds; i++) {
949 if (!sd[i]) /* if already added above. */
950 continue;
951 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
952 h->ndevices, &entry);
953 if (device_change == DEVICE_NOT_FOUND) {
954 changes++;
955 if (hpsa_scsi_add_entry(h, hostno, sd[i],
956 added, &nadded) != 0)
957 break;
958 sd[i] = NULL; /* prevent from being freed later. */
959 } else if (device_change == DEVICE_CHANGED) {
960 /* should never happen... */
961 changes++;
962 dev_warn(&h->pdev->dev,
963 "device unexpectedly changed.\n");
964 /* but if it does happen, we just ignore that device */
965 }
966 }
967 spin_unlock_irqrestore(&h->devlock, flags);
968
969 /* Don't notify scsi mid layer of any changes the first time through
970 * (or if there are no changes) scsi_scan_host will do it later the
971 * first time through.
972 */
973 if (hostno == -1 || !changes)
974 goto free_and_out;
975
976 sh = h->scsi_host;
977 /* Notify scsi mid layer of any removed devices */
978 for (i = 0; i < nremoved; i++) {
979 struct scsi_device *sdev =
980 scsi_device_lookup(sh, removed[i]->bus,
981 removed[i]->target, removed[i]->lun);
982 if (sdev != NULL) {
983 scsi_remove_device(sdev);
984 scsi_device_put(sdev);
985 } else {
986 /* We don't expect to get here.
987 * future cmds to this device will get selection
988 * timeout as if the device was gone.
989 */
990 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
991 " for removal.", hostno, removed[i]->bus,
992 removed[i]->target, removed[i]->lun);
993 }
994 kfree(removed[i]);
995 removed[i] = NULL;
996 }
997
998 /* Notify scsi mid layer of any added devices */
999 for (i = 0; i < nadded; i++) {
1000 if (scsi_add_device(sh, added[i]->bus,
1001 added[i]->target, added[i]->lun) == 0)
1002 continue;
1003 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1004 "device not added.\n", hostno, added[i]->bus,
1005 added[i]->target, added[i]->lun);
1006 /* now we have to remove it from h->dev,
1007 * since it didn't get added to scsi mid layer
1008 */
1009 fixup_botched_add(h, added[i]);
1010 }
1011
1012 free_and_out:
1013 kfree(added);
1014 kfree(removed);
1015 }
1016
1017 /*
1018 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1019 * Assume's h->devlock is held.
1020 */
1021 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1022 int bus, int target, int lun)
1023 {
1024 int i;
1025 struct hpsa_scsi_dev_t *sd;
1026
1027 for (i = 0; i < h->ndevices; i++) {
1028 sd = h->dev[i];
1029 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1030 return sd;
1031 }
1032 return NULL;
1033 }
1034
1035 /* link sdev->hostdata to our per-device structure. */
1036 static int hpsa_slave_alloc(struct scsi_device *sdev)
1037 {
1038 struct hpsa_scsi_dev_t *sd;
1039 unsigned long flags;
1040 struct ctlr_info *h;
1041
1042 h = sdev_to_hba(sdev);
1043 spin_lock_irqsave(&h->devlock, flags);
1044 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1045 sdev_id(sdev), sdev->lun);
1046 if (sd != NULL)
1047 sdev->hostdata = sd;
1048 spin_unlock_irqrestore(&h->devlock, flags);
1049 return 0;
1050 }
1051
1052 static void hpsa_slave_destroy(struct scsi_device *sdev)
1053 {
1054 /* nothing to do. */
1055 }
1056
1057 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1058 {
1059 int i;
1060
1061 if (!h->cmd_sg_list)
1062 return;
1063 for (i = 0; i < h->nr_cmds; i++) {
1064 kfree(h->cmd_sg_list[i]);
1065 h->cmd_sg_list[i] = NULL;
1066 }
1067 kfree(h->cmd_sg_list);
1068 h->cmd_sg_list = NULL;
1069 }
1070
1071 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1072 {
1073 int i;
1074
1075 if (h->chainsize <= 0)
1076 return 0;
1077
1078 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1079 GFP_KERNEL);
1080 if (!h->cmd_sg_list)
1081 return -ENOMEM;
1082 for (i = 0; i < h->nr_cmds; i++) {
1083 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1084 h->chainsize, GFP_KERNEL);
1085 if (!h->cmd_sg_list[i])
1086 goto clean;
1087 }
1088 return 0;
1089
1090 clean:
1091 hpsa_free_sg_chain_blocks(h);
1092 return -ENOMEM;
1093 }
1094
1095 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1096 struct CommandList *c)
1097 {
1098 struct SGDescriptor *chain_sg, *chain_block;
1099 u64 temp64;
1100
1101 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1102 chain_block = h->cmd_sg_list[c->cmdindex];
1103 chain_sg->Ext = HPSA_SG_CHAIN;
1104 chain_sg->Len = sizeof(*chain_sg) *
1105 (c->Header.SGTotal - h->max_cmd_sg_entries);
1106 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1107 PCI_DMA_TODEVICE);
1108 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1109 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1110 }
1111
1112 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1113 struct CommandList *c)
1114 {
1115 struct SGDescriptor *chain_sg;
1116 union u64bit temp64;
1117
1118 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1119 return;
1120
1121 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1122 temp64.val32.lower = chain_sg->Addr.lower;
1123 temp64.val32.upper = chain_sg->Addr.upper;
1124 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1125 }
1126
1127 static void complete_scsi_command(struct CommandList *cp)
1128 {
1129 struct scsi_cmnd *cmd;
1130 struct ctlr_info *h;
1131 struct ErrorInfo *ei;
1132
1133 unsigned char sense_key;
1134 unsigned char asc; /* additional sense code */
1135 unsigned char ascq; /* additional sense code qualifier */
1136 unsigned long sense_data_size;
1137
1138 ei = cp->err_info;
1139 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1140 h = cp->h;
1141
1142 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1143 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1144 hpsa_unmap_sg_chain_block(h, cp);
1145
1146 cmd->result = (DID_OK << 16); /* host byte */
1147 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1148 cmd->result |= ei->ScsiStatus;
1149
1150 /* copy the sense data whether we need to or not. */
1151 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1152 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1153 else
1154 sense_data_size = sizeof(ei->SenseInfo);
1155 if (ei->SenseLen < sense_data_size)
1156 sense_data_size = ei->SenseLen;
1157
1158 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1159 scsi_set_resid(cmd, ei->ResidualCnt);
1160
1161 if (ei->CommandStatus == 0) {
1162 cmd->scsi_done(cmd);
1163 cmd_free(h, cp);
1164 return;
1165 }
1166
1167 /* an error has occurred */
1168 switch (ei->CommandStatus) {
1169
1170 case CMD_TARGET_STATUS:
1171 if (ei->ScsiStatus) {
1172 /* Get sense key */
1173 sense_key = 0xf & ei->SenseInfo[2];
1174 /* Get additional sense code */
1175 asc = ei->SenseInfo[12];
1176 /* Get addition sense code qualifier */
1177 ascq = ei->SenseInfo[13];
1178 }
1179
1180 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1181 if (check_for_unit_attention(h, cp)) {
1182 cmd->result = DID_SOFT_ERROR << 16;
1183 break;
1184 }
1185 if (sense_key == ILLEGAL_REQUEST) {
1186 /*
1187 * SCSI REPORT_LUNS is commonly unsupported on
1188 * Smart Array. Suppress noisy complaint.
1189 */
1190 if (cp->Request.CDB[0] == REPORT_LUNS)
1191 break;
1192
1193 /* If ASC/ASCQ indicate Logical Unit
1194 * Not Supported condition,
1195 */
1196 if ((asc == 0x25) && (ascq == 0x0)) {
1197 dev_warn(&h->pdev->dev, "cp %p "
1198 "has check condition\n", cp);
1199 break;
1200 }
1201 }
1202
1203 if (sense_key == NOT_READY) {
1204 /* If Sense is Not Ready, Logical Unit
1205 * Not ready, Manual Intervention
1206 * required
1207 */
1208 if ((asc == 0x04) && (ascq == 0x03)) {
1209 dev_warn(&h->pdev->dev, "cp %p "
1210 "has check condition: unit "
1211 "not ready, manual "
1212 "intervention required\n", cp);
1213 break;
1214 }
1215 }
1216 if (sense_key == ABORTED_COMMAND) {
1217 /* Aborted command is retryable */
1218 dev_warn(&h->pdev->dev, "cp %p "
1219 "has check condition: aborted command: "
1220 "ASC: 0x%x, ASCQ: 0x%x\n",
1221 cp, asc, ascq);
1222 cmd->result = DID_SOFT_ERROR << 16;
1223 break;
1224 }
1225 /* Must be some other type of check condition */
1226 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1227 "unknown type: "
1228 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1229 "Returning result: 0x%x, "
1230 "cmd=[%02x %02x %02x %02x %02x "
1231 "%02x %02x %02x %02x %02x %02x "
1232 "%02x %02x %02x %02x %02x]\n",
1233 cp, sense_key, asc, ascq,
1234 cmd->result,
1235 cmd->cmnd[0], cmd->cmnd[1],
1236 cmd->cmnd[2], cmd->cmnd[3],
1237 cmd->cmnd[4], cmd->cmnd[5],
1238 cmd->cmnd[6], cmd->cmnd[7],
1239 cmd->cmnd[8], cmd->cmnd[9],
1240 cmd->cmnd[10], cmd->cmnd[11],
1241 cmd->cmnd[12], cmd->cmnd[13],
1242 cmd->cmnd[14], cmd->cmnd[15]);
1243 break;
1244 }
1245
1246
1247 /* Problem was not a check condition
1248 * Pass it up to the upper layers...
1249 */
1250 if (ei->ScsiStatus) {
1251 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1252 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1253 "Returning result: 0x%x\n",
1254 cp, ei->ScsiStatus,
1255 sense_key, asc, ascq,
1256 cmd->result);
1257 } else { /* scsi status is zero??? How??? */
1258 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1259 "Returning no connection.\n", cp),
1260
1261 /* Ordinarily, this case should never happen,
1262 * but there is a bug in some released firmware
1263 * revisions that allows it to happen if, for
1264 * example, a 4100 backplane loses power and
1265 * the tape drive is in it. We assume that
1266 * it's a fatal error of some kind because we
1267 * can't show that it wasn't. We will make it
1268 * look like selection timeout since that is
1269 * the most common reason for this to occur,
1270 * and it's severe enough.
1271 */
1272
1273 cmd->result = DID_NO_CONNECT << 16;
1274 }
1275 break;
1276
1277 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1278 break;
1279 case CMD_DATA_OVERRUN:
1280 dev_warn(&h->pdev->dev, "cp %p has"
1281 " completed with data overrun "
1282 "reported\n", cp);
1283 break;
1284 case CMD_INVALID: {
1285 /* print_bytes(cp, sizeof(*cp), 1, 0);
1286 print_cmd(cp); */
1287 /* We get CMD_INVALID if you address a non-existent device
1288 * instead of a selection timeout (no response). You will
1289 * see this if you yank out a drive, then try to access it.
1290 * This is kind of a shame because it means that any other
1291 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1292 * missing target. */
1293 cmd->result = DID_NO_CONNECT << 16;
1294 }
1295 break;
1296 case CMD_PROTOCOL_ERR:
1297 cmd->result = DID_ERROR << 16;
1298 dev_warn(&h->pdev->dev, "cp %p has "
1299 "protocol error\n", cp);
1300 break;
1301 case CMD_HARDWARE_ERR:
1302 cmd->result = DID_ERROR << 16;
1303 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1304 break;
1305 case CMD_CONNECTION_LOST:
1306 cmd->result = DID_ERROR << 16;
1307 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1308 break;
1309 case CMD_ABORTED:
1310 cmd->result = DID_ABORT << 16;
1311 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1312 cp, ei->ScsiStatus);
1313 break;
1314 case CMD_ABORT_FAILED:
1315 cmd->result = DID_ERROR << 16;
1316 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1317 break;
1318 case CMD_UNSOLICITED_ABORT:
1319 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1320 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1321 "abort\n", cp);
1322 break;
1323 case CMD_TIMEOUT:
1324 cmd->result = DID_TIME_OUT << 16;
1325 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1326 break;
1327 case CMD_UNABORTABLE:
1328 cmd->result = DID_ERROR << 16;
1329 dev_warn(&h->pdev->dev, "Command unabortable\n");
1330 break;
1331 default:
1332 cmd->result = DID_ERROR << 16;
1333 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1334 cp, ei->CommandStatus);
1335 }
1336 cmd->scsi_done(cmd);
1337 cmd_free(h, cp);
1338 }
1339
1340 static void hpsa_pci_unmap(struct pci_dev *pdev,
1341 struct CommandList *c, int sg_used, int data_direction)
1342 {
1343 int i;
1344 union u64bit addr64;
1345
1346 for (i = 0; i < sg_used; i++) {
1347 addr64.val32.lower = c->SG[i].Addr.lower;
1348 addr64.val32.upper = c->SG[i].Addr.upper;
1349 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1350 data_direction);
1351 }
1352 }
1353
1354 static void hpsa_map_one(struct pci_dev *pdev,
1355 struct CommandList *cp,
1356 unsigned char *buf,
1357 size_t buflen,
1358 int data_direction)
1359 {
1360 u64 addr64;
1361
1362 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1363 cp->Header.SGList = 0;
1364 cp->Header.SGTotal = 0;
1365 return;
1366 }
1367
1368 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1369 cp->SG[0].Addr.lower =
1370 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1371 cp->SG[0].Addr.upper =
1372 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1373 cp->SG[0].Len = buflen;
1374 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1375 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1376 }
1377
1378 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1379 struct CommandList *c)
1380 {
1381 DECLARE_COMPLETION_ONSTACK(wait);
1382
1383 c->waiting = &wait;
1384 enqueue_cmd_and_start_io(h, c);
1385 wait_for_completion(&wait);
1386 }
1387
1388 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1389 struct CommandList *c)
1390 {
1391 unsigned long flags;
1392
1393 /* If controller lockup detected, fake a hardware error. */
1394 spin_lock_irqsave(&h->lock, flags);
1395 if (unlikely(h->lockup_detected)) {
1396 spin_unlock_irqrestore(&h->lock, flags);
1397 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1398 } else {
1399 spin_unlock_irqrestore(&h->lock, flags);
1400 hpsa_scsi_do_simple_cmd_core(h, c);
1401 }
1402 }
1403
1404 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1405 struct CommandList *c, int data_direction)
1406 {
1407 int retry_count = 0;
1408
1409 do {
1410 memset(c->err_info, 0, sizeof(*c->err_info));
1411 hpsa_scsi_do_simple_cmd_core(h, c);
1412 retry_count++;
1413 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1414 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1415 }
1416
1417 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1418 {
1419 struct ErrorInfo *ei;
1420 struct device *d = &cp->h->pdev->dev;
1421
1422 ei = cp->err_info;
1423 switch (ei->CommandStatus) {
1424 case CMD_TARGET_STATUS:
1425 dev_warn(d, "cmd %p has completed with errors\n", cp);
1426 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1427 ei->ScsiStatus);
1428 if (ei->ScsiStatus == 0)
1429 dev_warn(d, "SCSI status is abnormally zero. "
1430 "(probably indicates selection timeout "
1431 "reported incorrectly due to a known "
1432 "firmware bug, circa July, 2001.)\n");
1433 break;
1434 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1435 dev_info(d, "UNDERRUN\n");
1436 break;
1437 case CMD_DATA_OVERRUN:
1438 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1439 break;
1440 case CMD_INVALID: {
1441 /* controller unfortunately reports SCSI passthru's
1442 * to non-existent targets as invalid commands.
1443 */
1444 dev_warn(d, "cp %p is reported invalid (probably means "
1445 "target device no longer present)\n", cp);
1446 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1447 print_cmd(cp); */
1448 }
1449 break;
1450 case CMD_PROTOCOL_ERR:
1451 dev_warn(d, "cp %p has protocol error \n", cp);
1452 break;
1453 case CMD_HARDWARE_ERR:
1454 /* cmd->result = DID_ERROR << 16; */
1455 dev_warn(d, "cp %p had hardware error\n", cp);
1456 break;
1457 case CMD_CONNECTION_LOST:
1458 dev_warn(d, "cp %p had connection lost\n", cp);
1459 break;
1460 case CMD_ABORTED:
1461 dev_warn(d, "cp %p was aborted\n", cp);
1462 break;
1463 case CMD_ABORT_FAILED:
1464 dev_warn(d, "cp %p reports abort failed\n", cp);
1465 break;
1466 case CMD_UNSOLICITED_ABORT:
1467 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1468 break;
1469 case CMD_TIMEOUT:
1470 dev_warn(d, "cp %p timed out\n", cp);
1471 break;
1472 case CMD_UNABORTABLE:
1473 dev_warn(d, "Command unabortable\n");
1474 break;
1475 default:
1476 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1477 ei->CommandStatus);
1478 }
1479 }
1480
1481 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1482 unsigned char page, unsigned char *buf,
1483 unsigned char bufsize)
1484 {
1485 int rc = IO_OK;
1486 struct CommandList *c;
1487 struct ErrorInfo *ei;
1488
1489 c = cmd_special_alloc(h);
1490
1491 if (c == NULL) { /* trouble... */
1492 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1493 return -ENOMEM;
1494 }
1495
1496 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1497 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1498 ei = c->err_info;
1499 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1500 hpsa_scsi_interpret_error(c);
1501 rc = -1;
1502 }
1503 cmd_special_free(h, c);
1504 return rc;
1505 }
1506
1507 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1508 {
1509 int rc = IO_OK;
1510 struct CommandList *c;
1511 struct ErrorInfo *ei;
1512
1513 c = cmd_special_alloc(h);
1514
1515 if (c == NULL) { /* trouble... */
1516 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1517 return -ENOMEM;
1518 }
1519
1520 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1521 hpsa_scsi_do_simple_cmd_core(h, c);
1522 /* no unmap needed here because no data xfer. */
1523
1524 ei = c->err_info;
1525 if (ei->CommandStatus != 0) {
1526 hpsa_scsi_interpret_error(c);
1527 rc = -1;
1528 }
1529 cmd_special_free(h, c);
1530 return rc;
1531 }
1532
1533 static void hpsa_get_raid_level(struct ctlr_info *h,
1534 unsigned char *scsi3addr, unsigned char *raid_level)
1535 {
1536 int rc;
1537 unsigned char *buf;
1538
1539 *raid_level = RAID_UNKNOWN;
1540 buf = kzalloc(64, GFP_KERNEL);
1541 if (!buf)
1542 return;
1543 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1544 if (rc == 0)
1545 *raid_level = buf[8];
1546 if (*raid_level > RAID_UNKNOWN)
1547 *raid_level = RAID_UNKNOWN;
1548 kfree(buf);
1549 return;
1550 }
1551
1552 /* Get the device id from inquiry page 0x83 */
1553 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1554 unsigned char *device_id, int buflen)
1555 {
1556 int rc;
1557 unsigned char *buf;
1558
1559 if (buflen > 16)
1560 buflen = 16;
1561 buf = kzalloc(64, GFP_KERNEL);
1562 if (!buf)
1563 return -1;
1564 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1565 if (rc == 0)
1566 memcpy(device_id, &buf[8], buflen);
1567 kfree(buf);
1568 return rc != 0;
1569 }
1570
1571 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1572 struct ReportLUNdata *buf, int bufsize,
1573 int extended_response)
1574 {
1575 int rc = IO_OK;
1576 struct CommandList *c;
1577 unsigned char scsi3addr[8];
1578 struct ErrorInfo *ei;
1579
1580 c = cmd_special_alloc(h);
1581 if (c == NULL) { /* trouble... */
1582 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1583 return -1;
1584 }
1585 /* address the controller */
1586 memset(scsi3addr, 0, sizeof(scsi3addr));
1587 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1588 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1589 if (extended_response)
1590 c->Request.CDB[1] = extended_response;
1591 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1592 ei = c->err_info;
1593 if (ei->CommandStatus != 0 &&
1594 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1595 hpsa_scsi_interpret_error(c);
1596 rc = -1;
1597 }
1598 cmd_special_free(h, c);
1599 return rc;
1600 }
1601
1602 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1603 struct ReportLUNdata *buf,
1604 int bufsize, int extended_response)
1605 {
1606 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1607 }
1608
1609 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1610 struct ReportLUNdata *buf, int bufsize)
1611 {
1612 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1613 }
1614
1615 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1616 int bus, int target, int lun)
1617 {
1618 device->bus = bus;
1619 device->target = target;
1620 device->lun = lun;
1621 }
1622
1623 static int hpsa_update_device_info(struct ctlr_info *h,
1624 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1625 unsigned char *is_OBDR_device)
1626 {
1627
1628 #define OBDR_SIG_OFFSET 43
1629 #define OBDR_TAPE_SIG "$DR-10"
1630 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1631 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1632
1633 unsigned char *inq_buff;
1634 unsigned char *obdr_sig;
1635
1636 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1637 if (!inq_buff)
1638 goto bail_out;
1639
1640 /* Do an inquiry to the device to see what it is. */
1641 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1642 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1643 /* Inquiry failed (msg printed already) */
1644 dev_err(&h->pdev->dev,
1645 "hpsa_update_device_info: inquiry failed\n");
1646 goto bail_out;
1647 }
1648
1649 this_device->devtype = (inq_buff[0] & 0x1f);
1650 memcpy(this_device->scsi3addr, scsi3addr, 8);
1651 memcpy(this_device->vendor, &inq_buff[8],
1652 sizeof(this_device->vendor));
1653 memcpy(this_device->model, &inq_buff[16],
1654 sizeof(this_device->model));
1655 memset(this_device->device_id, 0,
1656 sizeof(this_device->device_id));
1657 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1658 sizeof(this_device->device_id));
1659
1660 if (this_device->devtype == TYPE_DISK &&
1661 is_logical_dev_addr_mode(scsi3addr))
1662 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1663 else
1664 this_device->raid_level = RAID_UNKNOWN;
1665
1666 if (is_OBDR_device) {
1667 /* See if this is a One-Button-Disaster-Recovery device
1668 * by looking for "$DR-10" at offset 43 in inquiry data.
1669 */
1670 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1671 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1672 strncmp(obdr_sig, OBDR_TAPE_SIG,
1673 OBDR_SIG_LEN) == 0);
1674 }
1675
1676 kfree(inq_buff);
1677 return 0;
1678
1679 bail_out:
1680 kfree(inq_buff);
1681 return 1;
1682 }
1683
1684 static unsigned char *ext_target_model[] = {
1685 "MSA2012",
1686 "MSA2024",
1687 "MSA2312",
1688 "MSA2324",
1689 "P2000 G3 SAS",
1690 NULL,
1691 };
1692
1693 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1694 {
1695 int i;
1696
1697 for (i = 0; ext_target_model[i]; i++)
1698 if (strncmp(device->model, ext_target_model[i],
1699 strlen(ext_target_model[i])) == 0)
1700 return 1;
1701 return 0;
1702 }
1703
1704 /* Helper function to assign bus, target, lun mapping of devices.
1705 * Puts non-external target logical volumes on bus 0, external target logical
1706 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1707 * Logical drive target and lun are assigned at this time, but
1708 * physical device lun and target assignment are deferred (assigned
1709 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1710 */
1711 static void figure_bus_target_lun(struct ctlr_info *h,
1712 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
1713 {
1714 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1715
1716 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1717 /* physical device, target and lun filled in later */
1718 if (is_hba_lunid(lunaddrbytes))
1719 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
1720 else
1721 /* defer target, lun assignment for physical devices */
1722 hpsa_set_bus_target_lun(device, 2, -1, -1);
1723 return;
1724 }
1725 /* It's a logical device */
1726 if (is_ext_target(h, device)) {
1727 /* external target way, put logicals on bus 1
1728 * and match target/lun numbers box
1729 * reports, other smart array, bus 0, target 0, match lunid
1730 */
1731 hpsa_set_bus_target_lun(device,
1732 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1733 return;
1734 }
1735 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
1736 }
1737
1738 /*
1739 * If there is no lun 0 on a target, linux won't find any devices.
1740 * For the external targets (arrays), we have to manually detect the enclosure
1741 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1742 * it for some reason. *tmpdevice is the target we're adding,
1743 * this_device is a pointer into the current element of currentsd[]
1744 * that we're building up in update_scsi_devices(), below.
1745 * lunzerobits is a bitmap that tracks which targets already have a
1746 * lun 0 assigned.
1747 * Returns 1 if an enclosure was added, 0 if not.
1748 */
1749 static int add_ext_target_dev(struct ctlr_info *h,
1750 struct hpsa_scsi_dev_t *tmpdevice,
1751 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1752 unsigned long lunzerobits[], int *n_ext_target_devs)
1753 {
1754 unsigned char scsi3addr[8];
1755
1756 if (test_bit(tmpdevice->target, lunzerobits))
1757 return 0; /* There is already a lun 0 on this target. */
1758
1759 if (!is_logical_dev_addr_mode(lunaddrbytes))
1760 return 0; /* It's the logical targets that may lack lun 0. */
1761
1762 if (!is_ext_target(h, tmpdevice))
1763 return 0; /* Only external target devices have this problem. */
1764
1765 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
1766 return 0;
1767
1768 memset(scsi3addr, 0, 8);
1769 scsi3addr[3] = tmpdevice->target;
1770 if (is_hba_lunid(scsi3addr))
1771 return 0; /* Don't add the RAID controller here. */
1772
1773 if (is_scsi_rev_5(h))
1774 return 0; /* p1210m doesn't need to do this. */
1775
1776 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
1777 dev_warn(&h->pdev->dev, "Maximum number of external "
1778 "target devices exceeded. Check your hardware "
1779 "configuration.");
1780 return 0;
1781 }
1782
1783 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1784 return 0;
1785 (*n_ext_target_devs)++;
1786 hpsa_set_bus_target_lun(this_device,
1787 tmpdevice->bus, tmpdevice->target, 0);
1788 set_bit(tmpdevice->target, lunzerobits);
1789 return 1;
1790 }
1791
1792 /*
1793 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1794 * logdev. The number of luns in physdev and logdev are returned in
1795 * *nphysicals and *nlogicals, respectively.
1796 * Returns 0 on success, -1 otherwise.
1797 */
1798 static int hpsa_gather_lun_info(struct ctlr_info *h,
1799 int reportlunsize,
1800 struct ReportLUNdata *physdev, u32 *nphysicals,
1801 struct ReportLUNdata *logdev, u32 *nlogicals)
1802 {
1803 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1804 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1805 return -1;
1806 }
1807 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1808 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1809 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1810 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1811 *nphysicals - HPSA_MAX_PHYS_LUN);
1812 *nphysicals = HPSA_MAX_PHYS_LUN;
1813 }
1814 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1815 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1816 return -1;
1817 }
1818 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1819 /* Reject Logicals in excess of our max capability. */
1820 if (*nlogicals > HPSA_MAX_LUN) {
1821 dev_warn(&h->pdev->dev,
1822 "maximum logical LUNs (%d) exceeded. "
1823 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1824 *nlogicals - HPSA_MAX_LUN);
1825 *nlogicals = HPSA_MAX_LUN;
1826 }
1827 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1828 dev_warn(&h->pdev->dev,
1829 "maximum logical + physical LUNs (%d) exceeded. "
1830 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1831 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1832 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1833 }
1834 return 0;
1835 }
1836
1837 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1838 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1839 struct ReportLUNdata *logdev_list)
1840 {
1841 /* Helper function, figure out where the LUN ID info is coming from
1842 * given index i, lists of physical and logical devices, where in
1843 * the list the raid controller is supposed to appear (first or last)
1844 */
1845
1846 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1847 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1848
1849 if (i == raid_ctlr_position)
1850 return RAID_CTLR_LUNID;
1851
1852 if (i < logicals_start)
1853 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1854
1855 if (i < last_device)
1856 return &logdev_list->LUN[i - nphysicals -
1857 (raid_ctlr_position == 0)][0];
1858 BUG();
1859 return NULL;
1860 }
1861
1862 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1863 {
1864 /* the idea here is we could get notified
1865 * that some devices have changed, so we do a report
1866 * physical luns and report logical luns cmd, and adjust
1867 * our list of devices accordingly.
1868 *
1869 * The scsi3addr's of devices won't change so long as the
1870 * adapter is not reset. That means we can rescan and
1871 * tell which devices we already know about, vs. new
1872 * devices, vs. disappearing devices.
1873 */
1874 struct ReportLUNdata *physdev_list = NULL;
1875 struct ReportLUNdata *logdev_list = NULL;
1876 u32 nphysicals = 0;
1877 u32 nlogicals = 0;
1878 u32 ndev_allocated = 0;
1879 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1880 int ncurrent = 0;
1881 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1882 int i, n_ext_target_devs, ndevs_to_allocate;
1883 int raid_ctlr_position;
1884 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
1885
1886 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1887 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1888 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1889 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1890
1891 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1892 dev_err(&h->pdev->dev, "out of memory\n");
1893 goto out;
1894 }
1895 memset(lunzerobits, 0, sizeof(lunzerobits));
1896
1897 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1898 logdev_list, &nlogicals))
1899 goto out;
1900
1901 /* We might see up to the maximum number of logical and physical disks
1902 * plus external target devices, and a device for the local RAID
1903 * controller.
1904 */
1905 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
1906
1907 /* Allocate the per device structures */
1908 for (i = 0; i < ndevs_to_allocate; i++) {
1909 if (i >= HPSA_MAX_DEVICES) {
1910 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1911 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1912 ndevs_to_allocate - HPSA_MAX_DEVICES);
1913 break;
1914 }
1915
1916 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1917 if (!currentsd[i]) {
1918 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1919 __FILE__, __LINE__);
1920 goto out;
1921 }
1922 ndev_allocated++;
1923 }
1924
1925 if (unlikely(is_scsi_rev_5(h)))
1926 raid_ctlr_position = 0;
1927 else
1928 raid_ctlr_position = nphysicals + nlogicals;
1929
1930 /* adjust our table of devices */
1931 n_ext_target_devs = 0;
1932 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1933 u8 *lunaddrbytes, is_OBDR = 0;
1934
1935 /* Figure out where the LUN ID info is coming from */
1936 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1937 i, nphysicals, nlogicals, physdev_list, logdev_list);
1938 /* skip masked physical devices. */
1939 if (lunaddrbytes[3] & 0xC0 &&
1940 i < nphysicals + (raid_ctlr_position == 0))
1941 continue;
1942
1943 /* Get device type, vendor, model, device id */
1944 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1945 &is_OBDR))
1946 continue; /* skip it if we can't talk to it. */
1947 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
1948 this_device = currentsd[ncurrent];
1949
1950 /*
1951 * For external target devices, we have to insert a LUN 0 which
1952 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1953 * is nonetheless an enclosure device there. We have to
1954 * present that otherwise linux won't find anything if
1955 * there is no lun 0.
1956 */
1957 if (add_ext_target_dev(h, tmpdevice, this_device,
1958 lunaddrbytes, lunzerobits,
1959 &n_ext_target_devs)) {
1960 ncurrent++;
1961 this_device = currentsd[ncurrent];
1962 }
1963
1964 *this_device = *tmpdevice;
1965
1966 switch (this_device->devtype) {
1967 case TYPE_ROM:
1968 /* We don't *really* support actual CD-ROM devices,
1969 * just "One Button Disaster Recovery" tape drive
1970 * which temporarily pretends to be a CD-ROM drive.
1971 * So we check that the device is really an OBDR tape
1972 * device by checking for "$DR-10" in bytes 43-48 of
1973 * the inquiry data.
1974 */
1975 if (is_OBDR)
1976 ncurrent++;
1977 break;
1978 case TYPE_DISK:
1979 if (i < nphysicals)
1980 break;
1981 ncurrent++;
1982 break;
1983 case TYPE_TAPE:
1984 case TYPE_MEDIUM_CHANGER:
1985 ncurrent++;
1986 break;
1987 case TYPE_RAID:
1988 /* Only present the Smartarray HBA as a RAID controller.
1989 * If it's a RAID controller other than the HBA itself
1990 * (an external RAID controller, MSA500 or similar)
1991 * don't present it.
1992 */
1993 if (!is_hba_lunid(lunaddrbytes))
1994 break;
1995 ncurrent++;
1996 break;
1997 default:
1998 break;
1999 }
2000 if (ncurrent >= HPSA_MAX_DEVICES)
2001 break;
2002 }
2003 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2004 out:
2005 kfree(tmpdevice);
2006 for (i = 0; i < ndev_allocated; i++)
2007 kfree(currentsd[i]);
2008 kfree(currentsd);
2009 kfree(physdev_list);
2010 kfree(logdev_list);
2011 }
2012
2013 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2014 * dma mapping and fills in the scatter gather entries of the
2015 * hpsa command, cp.
2016 */
2017 static int hpsa_scatter_gather(struct ctlr_info *h,
2018 struct CommandList *cp,
2019 struct scsi_cmnd *cmd)
2020 {
2021 unsigned int len;
2022 struct scatterlist *sg;
2023 u64 addr64;
2024 int use_sg, i, sg_index, chained;
2025 struct SGDescriptor *curr_sg;
2026
2027 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2028
2029 use_sg = scsi_dma_map(cmd);
2030 if (use_sg < 0)
2031 return use_sg;
2032
2033 if (!use_sg)
2034 goto sglist_finished;
2035
2036 curr_sg = cp->SG;
2037 chained = 0;
2038 sg_index = 0;
2039 scsi_for_each_sg(cmd, sg, use_sg, i) {
2040 if (i == h->max_cmd_sg_entries - 1 &&
2041 use_sg > h->max_cmd_sg_entries) {
2042 chained = 1;
2043 curr_sg = h->cmd_sg_list[cp->cmdindex];
2044 sg_index = 0;
2045 }
2046 addr64 = (u64) sg_dma_address(sg);
2047 len = sg_dma_len(sg);
2048 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2049 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2050 curr_sg->Len = len;
2051 curr_sg->Ext = 0; /* we are not chaining */
2052 curr_sg++;
2053 }
2054
2055 if (use_sg + chained > h->maxSG)
2056 h->maxSG = use_sg + chained;
2057
2058 if (chained) {
2059 cp->Header.SGList = h->max_cmd_sg_entries;
2060 cp->Header.SGTotal = (u16) (use_sg + 1);
2061 hpsa_map_sg_chain_block(h, cp);
2062 return 0;
2063 }
2064
2065 sglist_finished:
2066
2067 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2068 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2069 return 0;
2070 }
2071
2072
2073 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2074 void (*done)(struct scsi_cmnd *))
2075 {
2076 struct ctlr_info *h;
2077 struct hpsa_scsi_dev_t *dev;
2078 unsigned char scsi3addr[8];
2079 struct CommandList *c;
2080 unsigned long flags;
2081
2082 /* Get the ptr to our adapter structure out of cmd->host. */
2083 h = sdev_to_hba(cmd->device);
2084 dev = cmd->device->hostdata;
2085 if (!dev) {
2086 cmd->result = DID_NO_CONNECT << 16;
2087 done(cmd);
2088 return 0;
2089 }
2090 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2091
2092 spin_lock_irqsave(&h->lock, flags);
2093 if (unlikely(h->lockup_detected)) {
2094 spin_unlock_irqrestore(&h->lock, flags);
2095 cmd->result = DID_ERROR << 16;
2096 done(cmd);
2097 return 0;
2098 }
2099 /* Need a lock as this is being allocated from the pool */
2100 c = cmd_alloc(h);
2101 spin_unlock_irqrestore(&h->lock, flags);
2102 if (c == NULL) { /* trouble... */
2103 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2104 return SCSI_MLQUEUE_HOST_BUSY;
2105 }
2106
2107 /* Fill in the command list header */
2108
2109 cmd->scsi_done = done; /* save this for use by completion code */
2110
2111 /* save c in case we have to abort it */
2112 cmd->host_scribble = (unsigned char *) c;
2113
2114 c->cmd_type = CMD_SCSI;
2115 c->scsi_cmd = cmd;
2116 c->Header.ReplyQueue = 0; /* unused in simple mode */
2117 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2118 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2119 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2120
2121 /* Fill in the request block... */
2122
2123 c->Request.Timeout = 0;
2124 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2125 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2126 c->Request.CDBLen = cmd->cmd_len;
2127 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2128 c->Request.Type.Type = TYPE_CMD;
2129 c->Request.Type.Attribute = ATTR_SIMPLE;
2130 switch (cmd->sc_data_direction) {
2131 case DMA_TO_DEVICE:
2132 c->Request.Type.Direction = XFER_WRITE;
2133 break;
2134 case DMA_FROM_DEVICE:
2135 c->Request.Type.Direction = XFER_READ;
2136 break;
2137 case DMA_NONE:
2138 c->Request.Type.Direction = XFER_NONE;
2139 break;
2140 case DMA_BIDIRECTIONAL:
2141 /* This can happen if a buggy application does a scsi passthru
2142 * and sets both inlen and outlen to non-zero. ( see
2143 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2144 */
2145
2146 c->Request.Type.Direction = XFER_RSVD;
2147 /* This is technically wrong, and hpsa controllers should
2148 * reject it with CMD_INVALID, which is the most correct
2149 * response, but non-fibre backends appear to let it
2150 * slide by, and give the same results as if this field
2151 * were set correctly. Either way is acceptable for
2152 * our purposes here.
2153 */
2154
2155 break;
2156
2157 default:
2158 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2159 cmd->sc_data_direction);
2160 BUG();
2161 break;
2162 }
2163
2164 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2165 cmd_free(h, c);
2166 return SCSI_MLQUEUE_HOST_BUSY;
2167 }
2168 enqueue_cmd_and_start_io(h, c);
2169 /* the cmd'll come back via intr handler in complete_scsi_command() */
2170 return 0;
2171 }
2172
2173 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2174
2175 static void hpsa_scan_start(struct Scsi_Host *sh)
2176 {
2177 struct ctlr_info *h = shost_to_hba(sh);
2178 unsigned long flags;
2179
2180 /* wait until any scan already in progress is finished. */
2181 while (1) {
2182 spin_lock_irqsave(&h->scan_lock, flags);
2183 if (h->scan_finished)
2184 break;
2185 spin_unlock_irqrestore(&h->scan_lock, flags);
2186 wait_event(h->scan_wait_queue, h->scan_finished);
2187 /* Note: We don't need to worry about a race between this
2188 * thread and driver unload because the midlayer will
2189 * have incremented the reference count, so unload won't
2190 * happen if we're in here.
2191 */
2192 }
2193 h->scan_finished = 0; /* mark scan as in progress */
2194 spin_unlock_irqrestore(&h->scan_lock, flags);
2195
2196 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2197
2198 spin_lock_irqsave(&h->scan_lock, flags);
2199 h->scan_finished = 1; /* mark scan as finished. */
2200 wake_up_all(&h->scan_wait_queue);
2201 spin_unlock_irqrestore(&h->scan_lock, flags);
2202 }
2203
2204 static int hpsa_scan_finished(struct Scsi_Host *sh,
2205 unsigned long elapsed_time)
2206 {
2207 struct ctlr_info *h = shost_to_hba(sh);
2208 unsigned long flags;
2209 int finished;
2210
2211 spin_lock_irqsave(&h->scan_lock, flags);
2212 finished = h->scan_finished;
2213 spin_unlock_irqrestore(&h->scan_lock, flags);
2214 return finished;
2215 }
2216
2217 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2218 int qdepth, int reason)
2219 {
2220 struct ctlr_info *h = sdev_to_hba(sdev);
2221
2222 if (reason != SCSI_QDEPTH_DEFAULT)
2223 return -ENOTSUPP;
2224
2225 if (qdepth < 1)
2226 qdepth = 1;
2227 else
2228 if (qdepth > h->nr_cmds)
2229 qdepth = h->nr_cmds;
2230 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2231 return sdev->queue_depth;
2232 }
2233
2234 static void hpsa_unregister_scsi(struct ctlr_info *h)
2235 {
2236 /* we are being forcibly unloaded, and may not refuse. */
2237 scsi_remove_host(h->scsi_host);
2238 scsi_host_put(h->scsi_host);
2239 h->scsi_host = NULL;
2240 }
2241
2242 static int hpsa_register_scsi(struct ctlr_info *h)
2243 {
2244 struct Scsi_Host *sh;
2245 int error;
2246
2247 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2248 if (sh == NULL)
2249 goto fail;
2250
2251 sh->io_port = 0;
2252 sh->n_io_port = 0;
2253 sh->this_id = -1;
2254 sh->max_channel = 3;
2255 sh->max_cmd_len = MAX_COMMAND_SIZE;
2256 sh->max_lun = HPSA_MAX_LUN;
2257 sh->max_id = HPSA_MAX_LUN;
2258 sh->can_queue = h->nr_cmds;
2259 sh->cmd_per_lun = h->nr_cmds;
2260 sh->sg_tablesize = h->maxsgentries;
2261 h->scsi_host = sh;
2262 sh->hostdata[0] = (unsigned long) h;
2263 sh->irq = h->intr[h->intr_mode];
2264 sh->unique_id = sh->irq;
2265 error = scsi_add_host(sh, &h->pdev->dev);
2266 if (error)
2267 goto fail_host_put;
2268 scsi_scan_host(sh);
2269 return 0;
2270
2271 fail_host_put:
2272 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2273 " failed for controller %d\n", __func__, h->ctlr);
2274 scsi_host_put(sh);
2275 return error;
2276 fail:
2277 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2278 " failed for controller %d\n", __func__, h->ctlr);
2279 return -ENOMEM;
2280 }
2281
2282 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2283 unsigned char lunaddr[])
2284 {
2285 int rc = 0;
2286 int count = 0;
2287 int waittime = 1; /* seconds */
2288 struct CommandList *c;
2289
2290 c = cmd_special_alloc(h);
2291 if (!c) {
2292 dev_warn(&h->pdev->dev, "out of memory in "
2293 "wait_for_device_to_become_ready.\n");
2294 return IO_ERROR;
2295 }
2296
2297 /* Send test unit ready until device ready, or give up. */
2298 while (count < HPSA_TUR_RETRY_LIMIT) {
2299
2300 /* Wait for a bit. do this first, because if we send
2301 * the TUR right away, the reset will just abort it.
2302 */
2303 msleep(1000 * waittime);
2304 count++;
2305
2306 /* Increase wait time with each try, up to a point. */
2307 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2308 waittime = waittime * 2;
2309
2310 /* Send the Test Unit Ready */
2311 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2312 hpsa_scsi_do_simple_cmd_core(h, c);
2313 /* no unmap needed here because no data xfer. */
2314
2315 if (c->err_info->CommandStatus == CMD_SUCCESS)
2316 break;
2317
2318 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2319 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2320 (c->err_info->SenseInfo[2] == NO_SENSE ||
2321 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2322 break;
2323
2324 dev_warn(&h->pdev->dev, "waiting %d secs "
2325 "for device to become ready.\n", waittime);
2326 rc = 1; /* device not ready. */
2327 }
2328
2329 if (rc)
2330 dev_warn(&h->pdev->dev, "giving up on device.\n");
2331 else
2332 dev_warn(&h->pdev->dev, "device is ready.\n");
2333
2334 cmd_special_free(h, c);
2335 return rc;
2336 }
2337
2338 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2339 * complaining. Doing a host- or bus-reset can't do anything good here.
2340 */
2341 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2342 {
2343 int rc;
2344 struct ctlr_info *h;
2345 struct hpsa_scsi_dev_t *dev;
2346
2347 /* find the controller to which the command to be aborted was sent */
2348 h = sdev_to_hba(scsicmd->device);
2349 if (h == NULL) /* paranoia */
2350 return FAILED;
2351 dev = scsicmd->device->hostdata;
2352 if (!dev) {
2353 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2354 "device lookup failed.\n");
2355 return FAILED;
2356 }
2357 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2358 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2359 /* send a reset to the SCSI LUN which the command was sent to */
2360 rc = hpsa_send_reset(h, dev->scsi3addr);
2361 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2362 return SUCCESS;
2363
2364 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2365 return FAILED;
2366 }
2367
2368 /*
2369 * For operations that cannot sleep, a command block is allocated at init,
2370 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2371 * which ones are free or in use. Lock must be held when calling this.
2372 * cmd_free() is the complement.
2373 */
2374 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2375 {
2376 struct CommandList *c;
2377 int i;
2378 union u64bit temp64;
2379 dma_addr_t cmd_dma_handle, err_dma_handle;
2380
2381 do {
2382 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2383 if (i == h->nr_cmds)
2384 return NULL;
2385 } while (test_and_set_bit
2386 (i & (BITS_PER_LONG - 1),
2387 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2388 c = h->cmd_pool + i;
2389 memset(c, 0, sizeof(*c));
2390 cmd_dma_handle = h->cmd_pool_dhandle
2391 + i * sizeof(*c);
2392 c->err_info = h->errinfo_pool + i;
2393 memset(c->err_info, 0, sizeof(*c->err_info));
2394 err_dma_handle = h->errinfo_pool_dhandle
2395 + i * sizeof(*c->err_info);
2396 h->nr_allocs++;
2397
2398 c->cmdindex = i;
2399
2400 INIT_LIST_HEAD(&c->list);
2401 c->busaddr = (u32) cmd_dma_handle;
2402 temp64.val = (u64) err_dma_handle;
2403 c->ErrDesc.Addr.lower = temp64.val32.lower;
2404 c->ErrDesc.Addr.upper = temp64.val32.upper;
2405 c->ErrDesc.Len = sizeof(*c->err_info);
2406
2407 c->h = h;
2408 return c;
2409 }
2410
2411 /* For operations that can wait for kmalloc to possibly sleep,
2412 * this routine can be called. Lock need not be held to call
2413 * cmd_special_alloc. cmd_special_free() is the complement.
2414 */
2415 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2416 {
2417 struct CommandList *c;
2418 union u64bit temp64;
2419 dma_addr_t cmd_dma_handle, err_dma_handle;
2420
2421 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2422 if (c == NULL)
2423 return NULL;
2424 memset(c, 0, sizeof(*c));
2425
2426 c->cmdindex = -1;
2427
2428 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2429 &err_dma_handle);
2430
2431 if (c->err_info == NULL) {
2432 pci_free_consistent(h->pdev,
2433 sizeof(*c), c, cmd_dma_handle);
2434 return NULL;
2435 }
2436 memset(c->err_info, 0, sizeof(*c->err_info));
2437
2438 INIT_LIST_HEAD(&c->list);
2439 c->busaddr = (u32) cmd_dma_handle;
2440 temp64.val = (u64) err_dma_handle;
2441 c->ErrDesc.Addr.lower = temp64.val32.lower;
2442 c->ErrDesc.Addr.upper = temp64.val32.upper;
2443 c->ErrDesc.Len = sizeof(*c->err_info);
2444
2445 c->h = h;
2446 return c;
2447 }
2448
2449 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2450 {
2451 int i;
2452
2453 i = c - h->cmd_pool;
2454 clear_bit(i & (BITS_PER_LONG - 1),
2455 h->cmd_pool_bits + (i / BITS_PER_LONG));
2456 h->nr_frees++;
2457 }
2458
2459 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2460 {
2461 union u64bit temp64;
2462
2463 temp64.val32.lower = c->ErrDesc.Addr.lower;
2464 temp64.val32.upper = c->ErrDesc.Addr.upper;
2465 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2466 c->err_info, (dma_addr_t) temp64.val);
2467 pci_free_consistent(h->pdev, sizeof(*c),
2468 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2469 }
2470
2471 #ifdef CONFIG_COMPAT
2472
2473 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2474 {
2475 IOCTL32_Command_struct __user *arg32 =
2476 (IOCTL32_Command_struct __user *) arg;
2477 IOCTL_Command_struct arg64;
2478 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2479 int err;
2480 u32 cp;
2481
2482 memset(&arg64, 0, sizeof(arg64));
2483 err = 0;
2484 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2485 sizeof(arg64.LUN_info));
2486 err |= copy_from_user(&arg64.Request, &arg32->Request,
2487 sizeof(arg64.Request));
2488 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2489 sizeof(arg64.error_info));
2490 err |= get_user(arg64.buf_size, &arg32->buf_size);
2491 err |= get_user(cp, &arg32->buf);
2492 arg64.buf = compat_ptr(cp);
2493 err |= copy_to_user(p, &arg64, sizeof(arg64));
2494
2495 if (err)
2496 return -EFAULT;
2497
2498 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2499 if (err)
2500 return err;
2501 err |= copy_in_user(&arg32->error_info, &p->error_info,
2502 sizeof(arg32->error_info));
2503 if (err)
2504 return -EFAULT;
2505 return err;
2506 }
2507
2508 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2509 int cmd, void *arg)
2510 {
2511 BIG_IOCTL32_Command_struct __user *arg32 =
2512 (BIG_IOCTL32_Command_struct __user *) arg;
2513 BIG_IOCTL_Command_struct arg64;
2514 BIG_IOCTL_Command_struct __user *p =
2515 compat_alloc_user_space(sizeof(arg64));
2516 int err;
2517 u32 cp;
2518
2519 memset(&arg64, 0, sizeof(arg64));
2520 err = 0;
2521 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2522 sizeof(arg64.LUN_info));
2523 err |= copy_from_user(&arg64.Request, &arg32->Request,
2524 sizeof(arg64.Request));
2525 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2526 sizeof(arg64.error_info));
2527 err |= get_user(arg64.buf_size, &arg32->buf_size);
2528 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2529 err |= get_user(cp, &arg32->buf);
2530 arg64.buf = compat_ptr(cp);
2531 err |= copy_to_user(p, &arg64, sizeof(arg64));
2532
2533 if (err)
2534 return -EFAULT;
2535
2536 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2537 if (err)
2538 return err;
2539 err |= copy_in_user(&arg32->error_info, &p->error_info,
2540 sizeof(arg32->error_info));
2541 if (err)
2542 return -EFAULT;
2543 return err;
2544 }
2545
2546 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2547 {
2548 switch (cmd) {
2549 case CCISS_GETPCIINFO:
2550 case CCISS_GETINTINFO:
2551 case CCISS_SETINTINFO:
2552 case CCISS_GETNODENAME:
2553 case CCISS_SETNODENAME:
2554 case CCISS_GETHEARTBEAT:
2555 case CCISS_GETBUSTYPES:
2556 case CCISS_GETFIRMVER:
2557 case CCISS_GETDRIVVER:
2558 case CCISS_REVALIDVOLS:
2559 case CCISS_DEREGDISK:
2560 case CCISS_REGNEWDISK:
2561 case CCISS_REGNEWD:
2562 case CCISS_RESCANDISK:
2563 case CCISS_GETLUNINFO:
2564 return hpsa_ioctl(dev, cmd, arg);
2565
2566 case CCISS_PASSTHRU32:
2567 return hpsa_ioctl32_passthru(dev, cmd, arg);
2568 case CCISS_BIG_PASSTHRU32:
2569 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2570
2571 default:
2572 return -ENOIOCTLCMD;
2573 }
2574 }
2575 #endif
2576
2577 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2578 {
2579 struct hpsa_pci_info pciinfo;
2580
2581 if (!argp)
2582 return -EINVAL;
2583 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2584 pciinfo.bus = h->pdev->bus->number;
2585 pciinfo.dev_fn = h->pdev->devfn;
2586 pciinfo.board_id = h->board_id;
2587 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2588 return -EFAULT;
2589 return 0;
2590 }
2591
2592 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2593 {
2594 DriverVer_type DriverVer;
2595 unsigned char vmaj, vmin, vsubmin;
2596 int rc;
2597
2598 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2599 &vmaj, &vmin, &vsubmin);
2600 if (rc != 3) {
2601 dev_info(&h->pdev->dev, "driver version string '%s' "
2602 "unrecognized.", HPSA_DRIVER_VERSION);
2603 vmaj = 0;
2604 vmin = 0;
2605 vsubmin = 0;
2606 }
2607 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2608 if (!argp)
2609 return -EINVAL;
2610 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2611 return -EFAULT;
2612 return 0;
2613 }
2614
2615 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2616 {
2617 IOCTL_Command_struct iocommand;
2618 struct CommandList *c;
2619 char *buff = NULL;
2620 union u64bit temp64;
2621
2622 if (!argp)
2623 return -EINVAL;
2624 if (!capable(CAP_SYS_RAWIO))
2625 return -EPERM;
2626 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2627 return -EFAULT;
2628 if ((iocommand.buf_size < 1) &&
2629 (iocommand.Request.Type.Direction != XFER_NONE)) {
2630 return -EINVAL;
2631 }
2632 if (iocommand.buf_size > 0) {
2633 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2634 if (buff == NULL)
2635 return -EFAULT;
2636 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2637 /* Copy the data into the buffer we created */
2638 if (copy_from_user(buff, iocommand.buf,
2639 iocommand.buf_size)) {
2640 kfree(buff);
2641 return -EFAULT;
2642 }
2643 } else {
2644 memset(buff, 0, iocommand.buf_size);
2645 }
2646 }
2647 c = cmd_special_alloc(h);
2648 if (c == NULL) {
2649 kfree(buff);
2650 return -ENOMEM;
2651 }
2652 /* Fill in the command type */
2653 c->cmd_type = CMD_IOCTL_PEND;
2654 /* Fill in Command Header */
2655 c->Header.ReplyQueue = 0; /* unused in simple mode */
2656 if (iocommand.buf_size > 0) { /* buffer to fill */
2657 c->Header.SGList = 1;
2658 c->Header.SGTotal = 1;
2659 } else { /* no buffers to fill */
2660 c->Header.SGList = 0;
2661 c->Header.SGTotal = 0;
2662 }
2663 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2664 /* use the kernel address the cmd block for tag */
2665 c->Header.Tag.lower = c->busaddr;
2666
2667 /* Fill in Request block */
2668 memcpy(&c->Request, &iocommand.Request,
2669 sizeof(c->Request));
2670
2671 /* Fill in the scatter gather information */
2672 if (iocommand.buf_size > 0) {
2673 temp64.val = pci_map_single(h->pdev, buff,
2674 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2675 c->SG[0].Addr.lower = temp64.val32.lower;
2676 c->SG[0].Addr.upper = temp64.val32.upper;
2677 c->SG[0].Len = iocommand.buf_size;
2678 c->SG[0].Ext = 0; /* we are not chaining*/
2679 }
2680 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2681 if (iocommand.buf_size > 0)
2682 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2683 check_ioctl_unit_attention(h, c);
2684
2685 /* Copy the error information out */
2686 memcpy(&iocommand.error_info, c->err_info,
2687 sizeof(iocommand.error_info));
2688 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2689 kfree(buff);
2690 cmd_special_free(h, c);
2691 return -EFAULT;
2692 }
2693 if (iocommand.Request.Type.Direction == XFER_READ &&
2694 iocommand.buf_size > 0) {
2695 /* Copy the data out of the buffer we created */
2696 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2697 kfree(buff);
2698 cmd_special_free(h, c);
2699 return -EFAULT;
2700 }
2701 }
2702 kfree(buff);
2703 cmd_special_free(h, c);
2704 return 0;
2705 }
2706
2707 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2708 {
2709 BIG_IOCTL_Command_struct *ioc;
2710 struct CommandList *c;
2711 unsigned char **buff = NULL;
2712 int *buff_size = NULL;
2713 union u64bit temp64;
2714 BYTE sg_used = 0;
2715 int status = 0;
2716 int i;
2717 u32 left;
2718 u32 sz;
2719 BYTE __user *data_ptr;
2720
2721 if (!argp)
2722 return -EINVAL;
2723 if (!capable(CAP_SYS_RAWIO))
2724 return -EPERM;
2725 ioc = (BIG_IOCTL_Command_struct *)
2726 kmalloc(sizeof(*ioc), GFP_KERNEL);
2727 if (!ioc) {
2728 status = -ENOMEM;
2729 goto cleanup1;
2730 }
2731 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2732 status = -EFAULT;
2733 goto cleanup1;
2734 }
2735 if ((ioc->buf_size < 1) &&
2736 (ioc->Request.Type.Direction != XFER_NONE)) {
2737 status = -EINVAL;
2738 goto cleanup1;
2739 }
2740 /* Check kmalloc limits using all SGs */
2741 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2742 status = -EINVAL;
2743 goto cleanup1;
2744 }
2745 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
2746 status = -EINVAL;
2747 goto cleanup1;
2748 }
2749 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
2750 if (!buff) {
2751 status = -ENOMEM;
2752 goto cleanup1;
2753 }
2754 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
2755 if (!buff_size) {
2756 status = -ENOMEM;
2757 goto cleanup1;
2758 }
2759 left = ioc->buf_size;
2760 data_ptr = ioc->buf;
2761 while (left) {
2762 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2763 buff_size[sg_used] = sz;
2764 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2765 if (buff[sg_used] == NULL) {
2766 status = -ENOMEM;
2767 goto cleanup1;
2768 }
2769 if (ioc->Request.Type.Direction == XFER_WRITE) {
2770 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2771 status = -ENOMEM;
2772 goto cleanup1;
2773 }
2774 } else
2775 memset(buff[sg_used], 0, sz);
2776 left -= sz;
2777 data_ptr += sz;
2778 sg_used++;
2779 }
2780 c = cmd_special_alloc(h);
2781 if (c == NULL) {
2782 status = -ENOMEM;
2783 goto cleanup1;
2784 }
2785 c->cmd_type = CMD_IOCTL_PEND;
2786 c->Header.ReplyQueue = 0;
2787 c->Header.SGList = c->Header.SGTotal = sg_used;
2788 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2789 c->Header.Tag.lower = c->busaddr;
2790 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2791 if (ioc->buf_size > 0) {
2792 int i;
2793 for (i = 0; i < sg_used; i++) {
2794 temp64.val = pci_map_single(h->pdev, buff[i],
2795 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2796 c->SG[i].Addr.lower = temp64.val32.lower;
2797 c->SG[i].Addr.upper = temp64.val32.upper;
2798 c->SG[i].Len = buff_size[i];
2799 /* we are not chaining */
2800 c->SG[i].Ext = 0;
2801 }
2802 }
2803 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2804 if (sg_used)
2805 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2806 check_ioctl_unit_attention(h, c);
2807 /* Copy the error information out */
2808 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2809 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2810 cmd_special_free(h, c);
2811 status = -EFAULT;
2812 goto cleanup1;
2813 }
2814 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
2815 /* Copy the data out of the buffer we created */
2816 BYTE __user *ptr = ioc->buf;
2817 for (i = 0; i < sg_used; i++) {
2818 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2819 cmd_special_free(h, c);
2820 status = -EFAULT;
2821 goto cleanup1;
2822 }
2823 ptr += buff_size[i];
2824 }
2825 }
2826 cmd_special_free(h, c);
2827 status = 0;
2828 cleanup1:
2829 if (buff) {
2830 for (i = 0; i < sg_used; i++)
2831 kfree(buff[i]);
2832 kfree(buff);
2833 }
2834 kfree(buff_size);
2835 kfree(ioc);
2836 return status;
2837 }
2838
2839 static void check_ioctl_unit_attention(struct ctlr_info *h,
2840 struct CommandList *c)
2841 {
2842 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2843 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2844 (void) check_for_unit_attention(h, c);
2845 }
2846 /*
2847 * ioctl
2848 */
2849 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2850 {
2851 struct ctlr_info *h;
2852 void __user *argp = (void __user *)arg;
2853
2854 h = sdev_to_hba(dev);
2855
2856 switch (cmd) {
2857 case CCISS_DEREGDISK:
2858 case CCISS_REGNEWDISK:
2859 case CCISS_REGNEWD:
2860 hpsa_scan_start(h->scsi_host);
2861 return 0;
2862 case CCISS_GETPCIINFO:
2863 return hpsa_getpciinfo_ioctl(h, argp);
2864 case CCISS_GETDRIVVER:
2865 return hpsa_getdrivver_ioctl(h, argp);
2866 case CCISS_PASSTHRU:
2867 return hpsa_passthru_ioctl(h, argp);
2868 case CCISS_BIG_PASSTHRU:
2869 return hpsa_big_passthru_ioctl(h, argp);
2870 default:
2871 return -ENOTTY;
2872 }
2873 }
2874
2875 static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2876 unsigned char *scsi3addr, u8 reset_type)
2877 {
2878 struct CommandList *c;
2879
2880 c = cmd_alloc(h);
2881 if (!c)
2882 return -ENOMEM;
2883 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2884 RAID_CTLR_LUNID, TYPE_MSG);
2885 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2886 c->waiting = NULL;
2887 enqueue_cmd_and_start_io(h, c);
2888 /* Don't wait for completion, the reset won't complete. Don't free
2889 * the command either. This is the last command we will send before
2890 * re-initializing everything, so it doesn't matter and won't leak.
2891 */
2892 return 0;
2893 }
2894
2895 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2896 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
2897 int cmd_type)
2898 {
2899 int pci_dir = XFER_NONE;
2900
2901 c->cmd_type = CMD_IOCTL_PEND;
2902 c->Header.ReplyQueue = 0;
2903 if (buff != NULL && size > 0) {
2904 c->Header.SGList = 1;
2905 c->Header.SGTotal = 1;
2906 } else {
2907 c->Header.SGList = 0;
2908 c->Header.SGTotal = 0;
2909 }
2910 c->Header.Tag.lower = c->busaddr;
2911 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2912
2913 c->Request.Type.Type = cmd_type;
2914 if (cmd_type == TYPE_CMD) {
2915 switch (cmd) {
2916 case HPSA_INQUIRY:
2917 /* are we trying to read a vital product page */
2918 if (page_code != 0) {
2919 c->Request.CDB[1] = 0x01;
2920 c->Request.CDB[2] = page_code;
2921 }
2922 c->Request.CDBLen = 6;
2923 c->Request.Type.Attribute = ATTR_SIMPLE;
2924 c->Request.Type.Direction = XFER_READ;
2925 c->Request.Timeout = 0;
2926 c->Request.CDB[0] = HPSA_INQUIRY;
2927 c->Request.CDB[4] = size & 0xFF;
2928 break;
2929 case HPSA_REPORT_LOG:
2930 case HPSA_REPORT_PHYS:
2931 /* Talking to controller so It's a physical command
2932 mode = 00 target = 0. Nothing to write.
2933 */
2934 c->Request.CDBLen = 12;
2935 c->Request.Type.Attribute = ATTR_SIMPLE;
2936 c->Request.Type.Direction = XFER_READ;
2937 c->Request.Timeout = 0;
2938 c->Request.CDB[0] = cmd;
2939 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2940 c->Request.CDB[7] = (size >> 16) & 0xFF;
2941 c->Request.CDB[8] = (size >> 8) & 0xFF;
2942 c->Request.CDB[9] = size & 0xFF;
2943 break;
2944 case HPSA_CACHE_FLUSH:
2945 c->Request.CDBLen = 12;
2946 c->Request.Type.Attribute = ATTR_SIMPLE;
2947 c->Request.Type.Direction = XFER_WRITE;
2948 c->Request.Timeout = 0;
2949 c->Request.CDB[0] = BMIC_WRITE;
2950 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2951 c->Request.CDB[7] = (size >> 8) & 0xFF;
2952 c->Request.CDB[8] = size & 0xFF;
2953 break;
2954 case TEST_UNIT_READY:
2955 c->Request.CDBLen = 6;
2956 c->Request.Type.Attribute = ATTR_SIMPLE;
2957 c->Request.Type.Direction = XFER_NONE;
2958 c->Request.Timeout = 0;
2959 break;
2960 default:
2961 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2962 BUG();
2963 return;
2964 }
2965 } else if (cmd_type == TYPE_MSG) {
2966 switch (cmd) {
2967
2968 case HPSA_DEVICE_RESET_MSG:
2969 c->Request.CDBLen = 16;
2970 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2971 c->Request.Type.Attribute = ATTR_SIMPLE;
2972 c->Request.Type.Direction = XFER_NONE;
2973 c->Request.Timeout = 0; /* Don't time out */
2974 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2975 c->Request.CDB[0] = cmd;
2976 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
2977 /* If bytes 4-7 are zero, it means reset the */
2978 /* LunID device */
2979 c->Request.CDB[4] = 0x00;
2980 c->Request.CDB[5] = 0x00;
2981 c->Request.CDB[6] = 0x00;
2982 c->Request.CDB[7] = 0x00;
2983 break;
2984
2985 default:
2986 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2987 cmd);
2988 BUG();
2989 }
2990 } else {
2991 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2992 BUG();
2993 }
2994
2995 switch (c->Request.Type.Direction) {
2996 case XFER_READ:
2997 pci_dir = PCI_DMA_FROMDEVICE;
2998 break;
2999 case XFER_WRITE:
3000 pci_dir = PCI_DMA_TODEVICE;
3001 break;
3002 case XFER_NONE:
3003 pci_dir = PCI_DMA_NONE;
3004 break;
3005 default:
3006 pci_dir = PCI_DMA_BIDIRECTIONAL;
3007 }
3008
3009 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
3010
3011 return;
3012 }
3013
3014 /*
3015 * Map (physical) PCI mem into (virtual) kernel space
3016 */
3017 static void __iomem *remap_pci_mem(ulong base, ulong size)
3018 {
3019 ulong page_base = ((ulong) base) & PAGE_MASK;
3020 ulong page_offs = ((ulong) base) - page_base;
3021 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3022
3023 return page_remapped ? (page_remapped + page_offs) : NULL;
3024 }
3025
3026 /* Takes cmds off the submission queue and sends them to the hardware,
3027 * then puts them on the queue of cmds waiting for completion.
3028 */
3029 static void start_io(struct ctlr_info *h)
3030 {
3031 struct CommandList *c;
3032
3033 while (!list_empty(&h->reqQ)) {
3034 c = list_entry(h->reqQ.next, struct CommandList, list);
3035 /* can't do anything if fifo is full */
3036 if ((h->access.fifo_full(h))) {
3037 dev_warn(&h->pdev->dev, "fifo full\n");
3038 break;
3039 }
3040
3041 /* Get the first entry from the Request Q */
3042 removeQ(c);
3043 h->Qdepth--;
3044
3045 /* Tell the controller execute command */
3046 h->access.submit_command(h, c);
3047
3048 /* Put job onto the completed Q */
3049 addQ(&h->cmpQ, c);
3050 }
3051 }
3052
3053 static inline unsigned long get_next_completion(struct ctlr_info *h)
3054 {
3055 return h->access.command_completed(h);
3056 }
3057
3058 static inline bool interrupt_pending(struct ctlr_info *h)
3059 {
3060 return h->access.intr_pending(h);
3061 }
3062
3063 static inline long interrupt_not_for_us(struct ctlr_info *h)
3064 {
3065 return (h->access.intr_pending(h) == 0) ||
3066 (h->interrupts_enabled == 0);
3067 }
3068
3069 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3070 u32 raw_tag)
3071 {
3072 if (unlikely(tag_index >= h->nr_cmds)) {
3073 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3074 return 1;
3075 }
3076 return 0;
3077 }
3078
3079 static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
3080 {
3081 removeQ(c);
3082 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
3083 if (likely(c->cmd_type == CMD_SCSI))
3084 complete_scsi_command(c);
3085 else if (c->cmd_type == CMD_IOCTL_PEND)
3086 complete(c->waiting);
3087 }
3088
3089 static inline u32 hpsa_tag_contains_index(u32 tag)
3090 {
3091 return tag & DIRECT_LOOKUP_BIT;
3092 }
3093
3094 static inline u32 hpsa_tag_to_index(u32 tag)
3095 {
3096 return tag >> DIRECT_LOOKUP_SHIFT;
3097 }
3098
3099
3100 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3101 {
3102 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3103 #define HPSA_SIMPLE_ERROR_BITS 0x03
3104 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3105 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3106 return tag & ~HPSA_PERF_ERROR_BITS;
3107 }
3108
3109 /* process completion of an indexed ("direct lookup") command */
3110 static inline u32 process_indexed_cmd(struct ctlr_info *h,
3111 u32 raw_tag)
3112 {
3113 u32 tag_index;
3114 struct CommandList *c;
3115
3116 tag_index = hpsa_tag_to_index(raw_tag);
3117 if (bad_tag(h, tag_index, raw_tag))
3118 return next_command(h);
3119 c = h->cmd_pool + tag_index;
3120 finish_cmd(c, raw_tag);
3121 return next_command(h);
3122 }
3123
3124 /* process completion of a non-indexed command */
3125 static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3126 u32 raw_tag)
3127 {
3128 u32 tag;
3129 struct CommandList *c = NULL;
3130
3131 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3132 list_for_each_entry(c, &h->cmpQ, list) {
3133 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3134 finish_cmd(c, raw_tag);
3135 return next_command(h);
3136 }
3137 }
3138 bad_tag(h, h->nr_cmds + 1, raw_tag);
3139 return next_command(h);
3140 }
3141
3142 /* Some controllers, like p400, will give us one interrupt
3143 * after a soft reset, even if we turned interrupts off.
3144 * Only need to check for this in the hpsa_xxx_discard_completions
3145 * functions.
3146 */
3147 static int ignore_bogus_interrupt(struct ctlr_info *h)
3148 {
3149 if (likely(!reset_devices))
3150 return 0;
3151
3152 if (likely(h->interrupts_enabled))
3153 return 0;
3154
3155 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3156 "(known firmware bug.) Ignoring.\n");
3157
3158 return 1;
3159 }
3160
3161 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3162 {
3163 struct ctlr_info *h = dev_id;
3164 unsigned long flags;
3165 u32 raw_tag;
3166
3167 if (ignore_bogus_interrupt(h))
3168 return IRQ_NONE;
3169
3170 if (interrupt_not_for_us(h))
3171 return IRQ_NONE;
3172 spin_lock_irqsave(&h->lock, flags);
3173 h->last_intr_timestamp = get_jiffies_64();
3174 while (interrupt_pending(h)) {
3175 raw_tag = get_next_completion(h);
3176 while (raw_tag != FIFO_EMPTY)
3177 raw_tag = next_command(h);
3178 }
3179 spin_unlock_irqrestore(&h->lock, flags);
3180 return IRQ_HANDLED;
3181 }
3182
3183 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3184 {
3185 struct ctlr_info *h = dev_id;
3186 unsigned long flags;
3187 u32 raw_tag;
3188
3189 if (ignore_bogus_interrupt(h))
3190 return IRQ_NONE;
3191
3192 spin_lock_irqsave(&h->lock, flags);
3193 h->last_intr_timestamp = get_jiffies_64();
3194 raw_tag = get_next_completion(h);
3195 while (raw_tag != FIFO_EMPTY)
3196 raw_tag = next_command(h);
3197 spin_unlock_irqrestore(&h->lock, flags);
3198 return IRQ_HANDLED;
3199 }
3200
3201 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
3202 {
3203 struct ctlr_info *h = dev_id;
3204 unsigned long flags;
3205 u32 raw_tag;
3206
3207 if (interrupt_not_for_us(h))
3208 return IRQ_NONE;
3209 spin_lock_irqsave(&h->lock, flags);
3210 h->last_intr_timestamp = get_jiffies_64();
3211 while (interrupt_pending(h)) {
3212 raw_tag = get_next_completion(h);
3213 while (raw_tag != FIFO_EMPTY) {
3214 if (hpsa_tag_contains_index(raw_tag))
3215 raw_tag = process_indexed_cmd(h, raw_tag);
3216 else
3217 raw_tag = process_nonindexed_cmd(h, raw_tag);
3218 }
3219 }
3220 spin_unlock_irqrestore(&h->lock, flags);
3221 return IRQ_HANDLED;
3222 }
3223
3224 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3225 {
3226 struct ctlr_info *h = dev_id;
3227 unsigned long flags;
3228 u32 raw_tag;
3229
3230 spin_lock_irqsave(&h->lock, flags);
3231 h->last_intr_timestamp = get_jiffies_64();
3232 raw_tag = get_next_completion(h);
3233 while (raw_tag != FIFO_EMPTY) {
3234 if (hpsa_tag_contains_index(raw_tag))
3235 raw_tag = process_indexed_cmd(h, raw_tag);
3236 else
3237 raw_tag = process_nonindexed_cmd(h, raw_tag);
3238 }
3239 spin_unlock_irqrestore(&h->lock, flags);
3240 return IRQ_HANDLED;
3241 }
3242
3243 /* Send a message CDB to the firmware. Careful, this only works
3244 * in simple mode, not performant mode due to the tag lookup.
3245 * We only ever use this immediately after a controller reset.
3246 */
3247 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3248 unsigned char type)
3249 {
3250 struct Command {
3251 struct CommandListHeader CommandHeader;
3252 struct RequestBlock Request;
3253 struct ErrDescriptor ErrorDescriptor;
3254 };
3255 struct Command *cmd;
3256 static const size_t cmd_sz = sizeof(*cmd) +
3257 sizeof(cmd->ErrorDescriptor);
3258 dma_addr_t paddr64;
3259 uint32_t paddr32, tag;
3260 void __iomem *vaddr;
3261 int i, err;
3262
3263 vaddr = pci_ioremap_bar(pdev, 0);
3264 if (vaddr == NULL)
3265 return -ENOMEM;
3266
3267 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3268 * CCISS commands, so they must be allocated from the lower 4GiB of
3269 * memory.
3270 */
3271 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3272 if (err) {
3273 iounmap(vaddr);
3274 return -ENOMEM;
3275 }
3276
3277 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3278 if (cmd == NULL) {
3279 iounmap(vaddr);
3280 return -ENOMEM;
3281 }
3282
3283 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3284 * although there's no guarantee, we assume that the address is at
3285 * least 4-byte aligned (most likely, it's page-aligned).
3286 */
3287 paddr32 = paddr64;
3288
3289 cmd->CommandHeader.ReplyQueue = 0;
3290 cmd->CommandHeader.SGList = 0;
3291 cmd->CommandHeader.SGTotal = 0;
3292 cmd->CommandHeader.Tag.lower = paddr32;
3293 cmd->CommandHeader.Tag.upper = 0;
3294 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3295
3296 cmd->Request.CDBLen = 16;
3297 cmd->Request.Type.Type = TYPE_MSG;
3298 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3299 cmd->Request.Type.Direction = XFER_NONE;
3300 cmd->Request.Timeout = 0; /* Don't time out */
3301 cmd->Request.CDB[0] = opcode;
3302 cmd->Request.CDB[1] = type;
3303 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3304 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3305 cmd->ErrorDescriptor.Addr.upper = 0;
3306 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3307
3308 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3309
3310 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3311 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3312 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3313 break;
3314 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3315 }
3316
3317 iounmap(vaddr);
3318
3319 /* we leak the DMA buffer here ... no choice since the controller could
3320 * still complete the command.
3321 */
3322 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3323 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3324 opcode, type);
3325 return -ETIMEDOUT;
3326 }
3327
3328 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3329
3330 if (tag & HPSA_ERROR_BIT) {
3331 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3332 opcode, type);
3333 return -EIO;
3334 }
3335
3336 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3337 opcode, type);
3338 return 0;
3339 }
3340
3341 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3342
3343 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3344 void * __iomem vaddr, u32 use_doorbell)
3345 {
3346 u16 pmcsr;
3347 int pos;
3348
3349 if (use_doorbell) {
3350 /* For everything after the P600, the PCI power state method
3351 * of resetting the controller doesn't work, so we have this
3352 * other way using the doorbell register.
3353 */
3354 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3355 writel(use_doorbell, vaddr + SA5_DOORBELL);
3356 } else { /* Try to do it the PCI power state way */
3357
3358 /* Quoting from the Open CISS Specification: "The Power
3359 * Management Control/Status Register (CSR) controls the power
3360 * state of the device. The normal operating state is D0,
3361 * CSR=00h. The software off state is D3, CSR=03h. To reset
3362 * the controller, place the interface device in D3 then to D0,
3363 * this causes a secondary PCI reset which will reset the
3364 * controller." */
3365
3366 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3367 if (pos == 0) {
3368 dev_err(&pdev->dev,
3369 "hpsa_reset_controller: "
3370 "PCI PM not supported\n");
3371 return -ENODEV;
3372 }
3373 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3374 /* enter the D3hot power management state */
3375 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3376 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3377 pmcsr |= PCI_D3hot;
3378 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3379
3380 msleep(500);
3381
3382 /* enter the D0 power management state */
3383 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3384 pmcsr |= PCI_D0;
3385 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3386
3387 /*
3388 * The P600 requires a small delay when changing states.
3389 * Otherwise we may think the board did not reset and we bail.
3390 * This for kdump only and is particular to the P600.
3391 */
3392 msleep(500);
3393 }
3394 return 0;
3395 }
3396
3397 static __devinit void init_driver_version(char *driver_version, int len)
3398 {
3399 memset(driver_version, 0, len);
3400 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
3401 }
3402
3403 static __devinit int write_driver_ver_to_cfgtable(
3404 struct CfgTable __iomem *cfgtable)
3405 {
3406 char *driver_version;
3407 int i, size = sizeof(cfgtable->driver_version);
3408
3409 driver_version = kmalloc(size, GFP_KERNEL);
3410 if (!driver_version)
3411 return -ENOMEM;
3412
3413 init_driver_version(driver_version, size);
3414 for (i = 0; i < size; i++)
3415 writeb(driver_version[i], &cfgtable->driver_version[i]);
3416 kfree(driver_version);
3417 return 0;
3418 }
3419
3420 static __devinit void read_driver_ver_from_cfgtable(
3421 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3422 {
3423 int i;
3424
3425 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3426 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3427 }
3428
3429 static __devinit int controller_reset_failed(
3430 struct CfgTable __iomem *cfgtable)
3431 {
3432
3433 char *driver_ver, *old_driver_ver;
3434 int rc, size = sizeof(cfgtable->driver_version);
3435
3436 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3437 if (!old_driver_ver)
3438 return -ENOMEM;
3439 driver_ver = old_driver_ver + size;
3440
3441 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3442 * should have been changed, otherwise we know the reset failed.
3443 */
3444 init_driver_version(old_driver_ver, size);
3445 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3446 rc = !memcmp(driver_ver, old_driver_ver, size);
3447 kfree(old_driver_ver);
3448 return rc;
3449 }
3450 /* This does a hard reset of the controller using PCI power management
3451 * states or the using the doorbell register.
3452 */
3453 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3454 {
3455 u64 cfg_offset;
3456 u32 cfg_base_addr;
3457 u64 cfg_base_addr_index;
3458 void __iomem *vaddr;
3459 unsigned long paddr;
3460 u32 misc_fw_support;
3461 int rc;
3462 struct CfgTable __iomem *cfgtable;
3463 u32 use_doorbell;
3464 u32 board_id;
3465 u16 command_register;
3466
3467 /* For controllers as old as the P600, this is very nearly
3468 * the same thing as
3469 *
3470 * pci_save_state(pci_dev);
3471 * pci_set_power_state(pci_dev, PCI_D3hot);
3472 * pci_set_power_state(pci_dev, PCI_D0);
3473 * pci_restore_state(pci_dev);
3474 *
3475 * For controllers newer than the P600, the pci power state
3476 * method of resetting doesn't work so we have another way
3477 * using the doorbell register.
3478 */
3479
3480 rc = hpsa_lookup_board_id(pdev, &board_id);
3481 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3482 dev_warn(&pdev->dev, "Not resetting device.\n");
3483 return -ENODEV;
3484 }
3485
3486 /* if controller is soft- but not hard resettable... */
3487 if (!ctlr_is_hard_resettable(board_id))
3488 return -ENOTSUPP; /* try soft reset later. */
3489
3490 /* Save the PCI command register */
3491 pci_read_config_word(pdev, 4, &command_register);
3492 /* Turn the board off. This is so that later pci_restore_state()
3493 * won't turn the board on before the rest of config space is ready.
3494 */
3495 pci_disable_device(pdev);
3496 pci_save_state(pdev);
3497
3498 /* find the first memory BAR, so we can find the cfg table */
3499 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3500 if (rc)
3501 return rc;
3502 vaddr = remap_pci_mem(paddr, 0x250);
3503 if (!vaddr)
3504 return -ENOMEM;
3505
3506 /* find cfgtable in order to check if reset via doorbell is supported */
3507 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3508 &cfg_base_addr_index, &cfg_offset);
3509 if (rc)
3510 goto unmap_vaddr;
3511 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3512 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3513 if (!cfgtable) {
3514 rc = -ENOMEM;
3515 goto unmap_vaddr;
3516 }
3517 rc = write_driver_ver_to_cfgtable(cfgtable);
3518 if (rc)
3519 goto unmap_vaddr;
3520
3521 /* If reset via doorbell register is supported, use that.
3522 * There are two such methods. Favor the newest method.
3523 */
3524 misc_fw_support = readl(&cfgtable->misc_fw_support);
3525 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3526 if (use_doorbell) {
3527 use_doorbell = DOORBELL_CTLR_RESET2;
3528 } else {
3529 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3530 if (use_doorbell) {
3531 dev_warn(&pdev->dev, "Soft reset not supported. "
3532 "Firmware update is required.\n");
3533 rc = -ENOTSUPP; /* try soft reset */
3534 goto unmap_cfgtable;
3535 }
3536 }
3537
3538 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3539 if (rc)
3540 goto unmap_cfgtable;
3541
3542 pci_restore_state(pdev);
3543 rc = pci_enable_device(pdev);
3544 if (rc) {
3545 dev_warn(&pdev->dev, "failed to enable device.\n");
3546 goto unmap_cfgtable;
3547 }
3548 pci_write_config_word(pdev, 4, command_register);
3549
3550 /* Some devices (notably the HP Smart Array 5i Controller)
3551 need a little pause here */
3552 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3553
3554 /* Wait for board to become not ready, then ready. */
3555 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3556 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3557 if (rc) {
3558 dev_warn(&pdev->dev,
3559 "failed waiting for board to reset."
3560 " Will try soft reset.\n");
3561 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3562 goto unmap_cfgtable;
3563 }
3564 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3565 if (rc) {
3566 dev_warn(&pdev->dev,
3567 "failed waiting for board to become ready "
3568 "after hard reset\n");
3569 goto unmap_cfgtable;
3570 }
3571
3572 rc = controller_reset_failed(vaddr);
3573 if (rc < 0)
3574 goto unmap_cfgtable;
3575 if (rc) {
3576 dev_warn(&pdev->dev, "Unable to successfully reset "
3577 "controller. Will try soft reset.\n");
3578 rc = -ENOTSUPP;
3579 } else {
3580 dev_info(&pdev->dev, "board ready after hard reset.\n");
3581 }
3582
3583 unmap_cfgtable:
3584 iounmap(cfgtable);
3585
3586 unmap_vaddr:
3587 iounmap(vaddr);
3588 return rc;
3589 }
3590
3591 /*
3592 * We cannot read the structure directly, for portability we must use
3593 * the io functions.
3594 * This is for debug only.
3595 */
3596 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3597 {
3598 #ifdef HPSA_DEBUG
3599 int i;
3600 char temp_name[17];
3601
3602 dev_info(dev, "Controller Configuration information\n");
3603 dev_info(dev, "------------------------------------\n");
3604 for (i = 0; i < 4; i++)
3605 temp_name[i] = readb(&(tb->Signature[i]));
3606 temp_name[4] = '\0';
3607 dev_info(dev, " Signature = %s\n", temp_name);
3608 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3609 dev_info(dev, " Transport methods supported = 0x%x\n",
3610 readl(&(tb->TransportSupport)));
3611 dev_info(dev, " Transport methods active = 0x%x\n",
3612 readl(&(tb->TransportActive)));
3613 dev_info(dev, " Requested transport Method = 0x%x\n",
3614 readl(&(tb->HostWrite.TransportRequest)));
3615 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3616 readl(&(tb->HostWrite.CoalIntDelay)));
3617 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3618 readl(&(tb->HostWrite.CoalIntCount)));
3619 dev_info(dev, " Max outstanding commands = 0x%d\n",
3620 readl(&(tb->CmdsOutMax)));
3621 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3622 for (i = 0; i < 16; i++)
3623 temp_name[i] = readb(&(tb->ServerName[i]));
3624 temp_name[16] = '\0';
3625 dev_info(dev, " Server Name = %s\n", temp_name);
3626 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3627 readl(&(tb->HeartBeat)));
3628 #endif /* HPSA_DEBUG */
3629 }
3630
3631 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3632 {
3633 int i, offset, mem_type, bar_type;
3634
3635 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3636 return 0;
3637 offset = 0;
3638 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3639 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3640 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3641 offset += 4;
3642 else {
3643 mem_type = pci_resource_flags(pdev, i) &
3644 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3645 switch (mem_type) {
3646 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3647 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3648 offset += 4; /* 32 bit */
3649 break;
3650 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3651 offset += 8;
3652 break;
3653 default: /* reserved in PCI 2.2 */
3654 dev_warn(&pdev->dev,
3655 "base address is invalid\n");
3656 return -1;
3657 break;
3658 }
3659 }
3660 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3661 return i + 1;
3662 }
3663 return -1;
3664 }
3665
3666 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3667 * controllers that are capable. If not, we use IO-APIC mode.
3668 */
3669
3670 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
3671 {
3672 #ifdef CONFIG_PCI_MSI
3673 int err;
3674 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3675 {0, 2}, {0, 3}
3676 };
3677
3678 /* Some boards advertise MSI but don't really support it */
3679 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3680 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3681 goto default_int_mode;
3682 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3683 dev_info(&h->pdev->dev, "MSIX\n");
3684 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
3685 if (!err) {
3686 h->intr[0] = hpsa_msix_entries[0].vector;
3687 h->intr[1] = hpsa_msix_entries[1].vector;
3688 h->intr[2] = hpsa_msix_entries[2].vector;
3689 h->intr[3] = hpsa_msix_entries[3].vector;
3690 h->msix_vector = 1;
3691 return;
3692 }
3693 if (err > 0) {
3694 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
3695 "available\n", err);
3696 goto default_int_mode;
3697 } else {
3698 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
3699 err);
3700 goto default_int_mode;
3701 }
3702 }
3703 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3704 dev_info(&h->pdev->dev, "MSI\n");
3705 if (!pci_enable_msi(h->pdev))
3706 h->msi_vector = 1;
3707 else
3708 dev_warn(&h->pdev->dev, "MSI init failed\n");
3709 }
3710 default_int_mode:
3711 #endif /* CONFIG_PCI_MSI */
3712 /* if we get here we're going to use the default interrupt mode */
3713 h->intr[h->intr_mode] = h->pdev->irq;
3714 }
3715
3716 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3717 {
3718 int i;
3719 u32 subsystem_vendor_id, subsystem_device_id;
3720
3721 subsystem_vendor_id = pdev->subsystem_vendor;
3722 subsystem_device_id = pdev->subsystem_device;
3723 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3724 subsystem_vendor_id;
3725
3726 for (i = 0; i < ARRAY_SIZE(products); i++)
3727 if (*board_id == products[i].board_id)
3728 return i;
3729
3730 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3731 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3732 !hpsa_allow_any) {
3733 dev_warn(&pdev->dev, "unrecognized board ID: "
3734 "0x%08x, ignoring.\n", *board_id);
3735 return -ENODEV;
3736 }
3737 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3738 }
3739
3740 static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3741 {
3742 u16 command;
3743
3744 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3745 return ((command & PCI_COMMAND_MEMORY) == 0);
3746 }
3747
3748 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3749 unsigned long *memory_bar)
3750 {
3751 int i;
3752
3753 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3754 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3755 /* addressing mode bits already removed */
3756 *memory_bar = pci_resource_start(pdev, i);
3757 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3758 *memory_bar);
3759 return 0;
3760 }
3761 dev_warn(&pdev->dev, "no memory BAR found\n");
3762 return -ENODEV;
3763 }
3764
3765 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3766 void __iomem *vaddr, int wait_for_ready)
3767 {
3768 int i, iterations;
3769 u32 scratchpad;
3770 if (wait_for_ready)
3771 iterations = HPSA_BOARD_READY_ITERATIONS;
3772 else
3773 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
3774
3775 for (i = 0; i < iterations; i++) {
3776 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3777 if (wait_for_ready) {
3778 if (scratchpad == HPSA_FIRMWARE_READY)
3779 return 0;
3780 } else {
3781 if (scratchpad != HPSA_FIRMWARE_READY)
3782 return 0;
3783 }
3784 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3785 }
3786 dev_warn(&pdev->dev, "board not ready, timed out.\n");
3787 return -ENODEV;
3788 }
3789
3790 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3791 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3792 u64 *cfg_offset)
3793 {
3794 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3795 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3796 *cfg_base_addr &= (u32) 0x0000ffff;
3797 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3798 if (*cfg_base_addr_index == -1) {
3799 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3800 return -ENODEV;
3801 }
3802 return 0;
3803 }
3804
3805 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
3806 {
3807 u64 cfg_offset;
3808 u32 cfg_base_addr;
3809 u64 cfg_base_addr_index;
3810 u32 trans_offset;
3811 int rc;
3812
3813 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3814 &cfg_base_addr_index, &cfg_offset);
3815 if (rc)
3816 return rc;
3817 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
3818 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
3819 if (!h->cfgtable)
3820 return -ENOMEM;
3821 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3822 if (rc)
3823 return rc;
3824 /* Find performant mode table. */
3825 trans_offset = readl(&h->cfgtable->TransMethodOffset);
3826 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3827 cfg_base_addr_index)+cfg_offset+trans_offset,
3828 sizeof(*h->transtable));
3829 if (!h->transtable)
3830 return -ENOMEM;
3831 return 0;
3832 }
3833
3834 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3835 {
3836 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3837
3838 /* Limit commands in memory limited kdump scenario. */
3839 if (reset_devices && h->max_commands > 32)
3840 h->max_commands = 32;
3841
3842 if (h->max_commands < 16) {
3843 dev_warn(&h->pdev->dev, "Controller reports "
3844 "max supported commands of %d, an obvious lie. "
3845 "Using 16. Ensure that firmware is up to date.\n",
3846 h->max_commands);
3847 h->max_commands = 16;
3848 }
3849 }
3850
3851 /* Interrogate the hardware for some limits:
3852 * max commands, max SG elements without chaining, and with chaining,
3853 * SG chain block size, etc.
3854 */
3855 static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3856 {
3857 hpsa_get_max_perf_mode_cmds(h);
3858 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3859 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3860 /*
3861 * Limit in-command s/g elements to 32 save dma'able memory.
3862 * Howvever spec says if 0, use 31
3863 */
3864 h->max_cmd_sg_entries = 31;
3865 if (h->maxsgentries > 512) {
3866 h->max_cmd_sg_entries = 32;
3867 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3868 h->maxsgentries--; /* save one for chain pointer */
3869 } else {
3870 h->maxsgentries = 31; /* default to traditional values */
3871 h->chainsize = 0;
3872 }
3873 }
3874
3875 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3876 {
3877 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3878 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3879 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3880 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3881 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3882 return false;
3883 }
3884 return true;
3885 }
3886
3887 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3888 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3889 {
3890 #ifdef CONFIG_X86
3891 u32 prefetch;
3892
3893 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3894 prefetch |= 0x100;
3895 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3896 #endif
3897 }
3898
3899 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3900 * in a prefetch beyond physical memory.
3901 */
3902 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3903 {
3904 u32 dma_prefetch;
3905
3906 if (h->board_id != 0x3225103C)
3907 return;
3908 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3909 dma_prefetch |= 0x8000;
3910 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3911 }
3912
3913 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
3914 {
3915 int i;
3916 u32 doorbell_value;
3917 unsigned long flags;
3918
3919 /* under certain very rare conditions, this can take awhile.
3920 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3921 * as we enter this code.)
3922 */
3923 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3924 spin_lock_irqsave(&h->lock, flags);
3925 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3926 spin_unlock_irqrestore(&h->lock, flags);
3927 if (!(doorbell_value & CFGTBL_ChangeReq))
3928 break;
3929 /* delay and try again */
3930 usleep_range(10000, 20000);
3931 }
3932 }
3933
3934 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3935 {
3936 u32 trans_support;
3937
3938 trans_support = readl(&(h->cfgtable->TransportSupport));
3939 if (!(trans_support & SIMPLE_MODE))
3940 return -ENOTSUPP;
3941
3942 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3943 /* Update the field, and then ring the doorbell */
3944 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3945 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3946 hpsa_wait_for_mode_change_ack(h);
3947 print_cfg_table(&h->pdev->dev, h->cfgtable);
3948 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3949 dev_warn(&h->pdev->dev,
3950 "unable to get board into simple mode\n");
3951 return -ENODEV;
3952 }
3953 h->transMethod = CFGTBL_Trans_Simple;
3954 return 0;
3955 }
3956
3957 static int __devinit hpsa_pci_init(struct ctlr_info *h)
3958 {
3959 int prod_index, err;
3960
3961 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3962 if (prod_index < 0)
3963 return -ENODEV;
3964 h->product_name = products[prod_index].product_name;
3965 h->access = *(products[prod_index].access);
3966
3967 if (hpsa_board_disabled(h->pdev)) {
3968 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
3969 return -ENODEV;
3970 }
3971
3972 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
3973 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
3974
3975 err = pci_enable_device(h->pdev);
3976 if (err) {
3977 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
3978 return err;
3979 }
3980
3981 err = pci_request_regions(h->pdev, HPSA);
3982 if (err) {
3983 dev_err(&h->pdev->dev,
3984 "cannot obtain PCI resources, aborting\n");
3985 return err;
3986 }
3987 hpsa_interrupt_mode(h);
3988 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3989 if (err)
3990 goto err_out_free_res;
3991 h->vaddr = remap_pci_mem(h->paddr, 0x250);
3992 if (!h->vaddr) {
3993 err = -ENOMEM;
3994 goto err_out_free_res;
3995 }
3996 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
3997 if (err)
3998 goto err_out_free_res;
3999 err = hpsa_find_cfgtables(h);
4000 if (err)
4001 goto err_out_free_res;
4002 hpsa_find_board_params(h);
4003
4004 if (!hpsa_CISS_signature_present(h)) {
4005 err = -ENODEV;
4006 goto err_out_free_res;
4007 }
4008 hpsa_enable_scsi_prefetch(h);
4009 hpsa_p600_dma_prefetch_quirk(h);
4010 err = hpsa_enter_simple_mode(h);
4011 if (err)
4012 goto err_out_free_res;
4013 return 0;
4014
4015 err_out_free_res:
4016 if (h->transtable)
4017 iounmap(h->transtable);
4018 if (h->cfgtable)
4019 iounmap(h->cfgtable);
4020 if (h->vaddr)
4021 iounmap(h->vaddr);
4022 /*
4023 * Deliberately omit pci_disable_device(): it does something nasty to
4024 * Smart Array controllers that pci_enable_device does not undo
4025 */
4026 pci_release_regions(h->pdev);
4027 return err;
4028 }
4029
4030 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
4031 {
4032 int rc;
4033
4034 #define HBA_INQUIRY_BYTE_COUNT 64
4035 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4036 if (!h->hba_inquiry_data)
4037 return;
4038 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4039 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4040 if (rc != 0) {
4041 kfree(h->hba_inquiry_data);
4042 h->hba_inquiry_data = NULL;
4043 }
4044 }
4045
4046 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4047 {
4048 int rc, i;
4049
4050 if (!reset_devices)
4051 return 0;
4052
4053 /* Reset the controller with a PCI power-cycle or via doorbell */
4054 rc = hpsa_kdump_hard_reset_controller(pdev);
4055
4056 /* -ENOTSUPP here means we cannot reset the controller
4057 * but it's already (and still) up and running in
4058 * "performant mode". Or, it might be 640x, which can't reset
4059 * due to concerns about shared bbwc between 6402/6404 pair.
4060 */
4061 if (rc == -ENOTSUPP)
4062 return rc; /* just try to do the kdump anyhow. */
4063 if (rc)
4064 return -ENODEV;
4065
4066 /* Now try to get the controller to respond to a no-op */
4067 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4068 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4069 if (hpsa_noop(pdev) == 0)
4070 break;
4071 else
4072 dev_warn(&pdev->dev, "no-op failed%s\n",
4073 (i < 11 ? "; re-trying" : ""));
4074 }
4075 return 0;
4076 }
4077
4078 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4079 {
4080 h->cmd_pool_bits = kzalloc(
4081 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4082 sizeof(unsigned long), GFP_KERNEL);
4083 h->cmd_pool = pci_alloc_consistent(h->pdev,
4084 h->nr_cmds * sizeof(*h->cmd_pool),
4085 &(h->cmd_pool_dhandle));
4086 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4087 h->nr_cmds * sizeof(*h->errinfo_pool),
4088 &(h->errinfo_pool_dhandle));
4089 if ((h->cmd_pool_bits == NULL)
4090 || (h->cmd_pool == NULL)
4091 || (h->errinfo_pool == NULL)) {
4092 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4093 return -ENOMEM;
4094 }
4095 return 0;
4096 }
4097
4098 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4099 {
4100 kfree(h->cmd_pool_bits);
4101 if (h->cmd_pool)
4102 pci_free_consistent(h->pdev,
4103 h->nr_cmds * sizeof(struct CommandList),
4104 h->cmd_pool, h->cmd_pool_dhandle);
4105 if (h->errinfo_pool)
4106 pci_free_consistent(h->pdev,
4107 h->nr_cmds * sizeof(struct ErrorInfo),
4108 h->errinfo_pool,
4109 h->errinfo_pool_dhandle);
4110 }
4111
4112 static int hpsa_request_irq(struct ctlr_info *h,
4113 irqreturn_t (*msixhandler)(int, void *),
4114 irqreturn_t (*intxhandler)(int, void *))
4115 {
4116 int rc;
4117
4118 if (h->msix_vector || h->msi_vector)
4119 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4120 0, h->devname, h);
4121 else
4122 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4123 IRQF_SHARED, h->devname, h);
4124 if (rc) {
4125 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4126 h->intr[h->intr_mode], h->devname);
4127 return -ENODEV;
4128 }
4129 return 0;
4130 }
4131
4132 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4133 {
4134 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4135 HPSA_RESET_TYPE_CONTROLLER)) {
4136 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4137 return -EIO;
4138 }
4139
4140 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4141 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4142 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4143 return -1;
4144 }
4145
4146 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4147 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4148 dev_warn(&h->pdev->dev, "Board failed to become ready "
4149 "after soft reset.\n");
4150 return -1;
4151 }
4152
4153 return 0;
4154 }
4155
4156 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4157 {
4158 free_irq(h->intr[h->intr_mode], h);
4159 #ifdef CONFIG_PCI_MSI
4160 if (h->msix_vector)
4161 pci_disable_msix(h->pdev);
4162 else if (h->msi_vector)
4163 pci_disable_msi(h->pdev);
4164 #endif /* CONFIG_PCI_MSI */
4165 hpsa_free_sg_chain_blocks(h);
4166 hpsa_free_cmd_pool(h);
4167 kfree(h->blockFetchTable);
4168 pci_free_consistent(h->pdev, h->reply_pool_size,
4169 h->reply_pool, h->reply_pool_dhandle);
4170 if (h->vaddr)
4171 iounmap(h->vaddr);
4172 if (h->transtable)
4173 iounmap(h->transtable);
4174 if (h->cfgtable)
4175 iounmap(h->cfgtable);
4176 pci_release_regions(h->pdev);
4177 kfree(h);
4178 }
4179
4180 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4181 {
4182 assert_spin_locked(&lockup_detector_lock);
4183 if (!hpsa_lockup_detector)
4184 return;
4185 if (h->lockup_detected)
4186 return; /* already stopped the lockup detector */
4187 list_del(&h->lockup_list);
4188 }
4189
4190 /* Called when controller lockup detected. */
4191 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4192 {
4193 struct CommandList *c = NULL;
4194
4195 assert_spin_locked(&h->lock);
4196 /* Mark all outstanding commands as failed and complete them. */
4197 while (!list_empty(list)) {
4198 c = list_entry(list->next, struct CommandList, list);
4199 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4200 finish_cmd(c, c->Header.Tag.lower);
4201 }
4202 }
4203
4204 static void controller_lockup_detected(struct ctlr_info *h)
4205 {
4206 unsigned long flags;
4207
4208 assert_spin_locked(&lockup_detector_lock);
4209 remove_ctlr_from_lockup_detector_list(h);
4210 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4211 spin_lock_irqsave(&h->lock, flags);
4212 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4213 spin_unlock_irqrestore(&h->lock, flags);
4214 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4215 h->lockup_detected);
4216 pci_disable_device(h->pdev);
4217 spin_lock_irqsave(&h->lock, flags);
4218 fail_all_cmds_on_list(h, &h->cmpQ);
4219 fail_all_cmds_on_list(h, &h->reqQ);
4220 spin_unlock_irqrestore(&h->lock, flags);
4221 }
4222
4223 static void detect_controller_lockup(struct ctlr_info *h)
4224 {
4225 u64 now;
4226 u32 heartbeat;
4227 unsigned long flags;
4228
4229 assert_spin_locked(&lockup_detector_lock);
4230 now = get_jiffies_64();
4231 /* If we've received an interrupt recently, we're ok. */
4232 if (time_after64(h->last_intr_timestamp +
4233 (h->heartbeat_sample_interval), now))
4234 return;
4235
4236 /*
4237 * If we've already checked the heartbeat recently, we're ok.
4238 * This could happen if someone sends us a signal. We
4239 * otherwise don't care about signals in this thread.
4240 */
4241 if (time_after64(h->last_heartbeat_timestamp +
4242 (h->heartbeat_sample_interval), now))
4243 return;
4244
4245 /* If heartbeat has not changed since we last looked, we're not ok. */
4246 spin_lock_irqsave(&h->lock, flags);
4247 heartbeat = readl(&h->cfgtable->HeartBeat);
4248 spin_unlock_irqrestore(&h->lock, flags);
4249 if (h->last_heartbeat == heartbeat) {
4250 controller_lockup_detected(h);
4251 return;
4252 }
4253
4254 /* We're ok. */
4255 h->last_heartbeat = heartbeat;
4256 h->last_heartbeat_timestamp = now;
4257 }
4258
4259 static int detect_controller_lockup_thread(void *notused)
4260 {
4261 struct ctlr_info *h;
4262 unsigned long flags;
4263
4264 while (1) {
4265 struct list_head *this, *tmp;
4266
4267 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4268 if (kthread_should_stop())
4269 break;
4270 spin_lock_irqsave(&lockup_detector_lock, flags);
4271 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4272 h = list_entry(this, struct ctlr_info, lockup_list);
4273 detect_controller_lockup(h);
4274 }
4275 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4276 }
4277 return 0;
4278 }
4279
4280 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4281 {
4282 unsigned long flags;
4283
4284 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4285 spin_lock_irqsave(&lockup_detector_lock, flags);
4286 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4287 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4288 }
4289
4290 static void start_controller_lockup_detector(struct ctlr_info *h)
4291 {
4292 /* Start the lockup detector thread if not already started */
4293 if (!hpsa_lockup_detector) {
4294 spin_lock_init(&lockup_detector_lock);
4295 hpsa_lockup_detector =
4296 kthread_run(detect_controller_lockup_thread,
4297 NULL, HPSA);
4298 }
4299 if (!hpsa_lockup_detector) {
4300 dev_warn(&h->pdev->dev,
4301 "Could not start lockup detector thread\n");
4302 return;
4303 }
4304 add_ctlr_to_lockup_detector_list(h);
4305 }
4306
4307 static void stop_controller_lockup_detector(struct ctlr_info *h)
4308 {
4309 unsigned long flags;
4310
4311 spin_lock_irqsave(&lockup_detector_lock, flags);
4312 remove_ctlr_from_lockup_detector_list(h);
4313 /* If the list of ctlr's to monitor is empty, stop the thread */
4314 if (list_empty(&hpsa_ctlr_list)) {
4315 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4316 kthread_stop(hpsa_lockup_detector);
4317 spin_lock_irqsave(&lockup_detector_lock, flags);
4318 hpsa_lockup_detector = NULL;
4319 }
4320 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4321 }
4322
4323 static int __devinit hpsa_init_one(struct pci_dev *pdev,
4324 const struct pci_device_id *ent)
4325 {
4326 int dac, rc;
4327 struct ctlr_info *h;
4328 int try_soft_reset = 0;
4329 unsigned long flags;
4330
4331 if (number_of_controllers == 0)
4332 printk(KERN_INFO DRIVER_NAME "\n");
4333
4334 rc = hpsa_init_reset_devices(pdev);
4335 if (rc) {
4336 if (rc != -ENOTSUPP)
4337 return rc;
4338 /* If the reset fails in a particular way (it has no way to do
4339 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4340 * a soft reset once we get the controller configured up to the
4341 * point that it can accept a command.
4342 */
4343 try_soft_reset = 1;
4344 rc = 0;
4345 }
4346
4347 reinit_after_soft_reset:
4348
4349 /* Command structures must be aligned on a 32-byte boundary because
4350 * the 5 lower bits of the address are used by the hardware. and by
4351 * the driver. See comments in hpsa.h for more info.
4352 */
4353 #define COMMANDLIST_ALIGNMENT 32
4354 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4355 h = kzalloc(sizeof(*h), GFP_KERNEL);
4356 if (!h)
4357 return -ENOMEM;
4358
4359 h->pdev = pdev;
4360 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4361 INIT_LIST_HEAD(&h->cmpQ);
4362 INIT_LIST_HEAD(&h->reqQ);
4363 spin_lock_init(&h->lock);
4364 spin_lock_init(&h->scan_lock);
4365 rc = hpsa_pci_init(h);
4366 if (rc != 0)
4367 goto clean1;
4368
4369 sprintf(h->devname, HPSA "%d", number_of_controllers);
4370 h->ctlr = number_of_controllers;
4371 number_of_controllers++;
4372
4373 /* configure PCI DMA stuff */
4374 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4375 if (rc == 0) {
4376 dac = 1;
4377 } else {
4378 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4379 if (rc == 0) {
4380 dac = 0;
4381 } else {
4382 dev_err(&pdev->dev, "no suitable DMA available\n");
4383 goto clean1;
4384 }
4385 }
4386
4387 /* make sure the board interrupts are off */
4388 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4389
4390 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4391 goto clean2;
4392 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4393 h->devname, pdev->device,
4394 h->intr[h->intr_mode], dac ? "" : " not");
4395 if (hpsa_allocate_cmd_pool(h))
4396 goto clean4;
4397 if (hpsa_allocate_sg_chain_blocks(h))
4398 goto clean4;
4399 init_waitqueue_head(&h->scan_wait_queue);
4400 h->scan_finished = 1; /* no scan currently in progress */
4401
4402 pci_set_drvdata(pdev, h);
4403 h->ndevices = 0;
4404 h->scsi_host = NULL;
4405 spin_lock_init(&h->devlock);
4406 hpsa_put_ctlr_into_performant_mode(h);
4407
4408 /* At this point, the controller is ready to take commands.
4409 * Now, if reset_devices and the hard reset didn't work, try
4410 * the soft reset and see if that works.
4411 */
4412 if (try_soft_reset) {
4413
4414 /* This is kind of gross. We may or may not get a completion
4415 * from the soft reset command, and if we do, then the value
4416 * from the fifo may or may not be valid. So, we wait 10 secs
4417 * after the reset throwing away any completions we get during
4418 * that time. Unregister the interrupt handler and register
4419 * fake ones to scoop up any residual completions.
4420 */
4421 spin_lock_irqsave(&h->lock, flags);
4422 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4423 spin_unlock_irqrestore(&h->lock, flags);
4424 free_irq(h->intr[h->intr_mode], h);
4425 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4426 hpsa_intx_discard_completions);
4427 if (rc) {
4428 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4429 "soft reset.\n");
4430 goto clean4;
4431 }
4432
4433 rc = hpsa_kdump_soft_reset(h);
4434 if (rc)
4435 /* Neither hard nor soft reset worked, we're hosed. */
4436 goto clean4;
4437
4438 dev_info(&h->pdev->dev, "Board READY.\n");
4439 dev_info(&h->pdev->dev,
4440 "Waiting for stale completions to drain.\n");
4441 h->access.set_intr_mask(h, HPSA_INTR_ON);
4442 msleep(10000);
4443 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4444
4445 rc = controller_reset_failed(h->cfgtable);
4446 if (rc)
4447 dev_info(&h->pdev->dev,
4448 "Soft reset appears to have failed.\n");
4449
4450 /* since the controller's reset, we have to go back and re-init
4451 * everything. Easiest to just forget what we've done and do it
4452 * all over again.
4453 */
4454 hpsa_undo_allocations_after_kdump_soft_reset(h);
4455 try_soft_reset = 0;
4456 if (rc)
4457 /* don't go to clean4, we already unallocated */
4458 return -ENODEV;
4459
4460 goto reinit_after_soft_reset;
4461 }
4462
4463 /* Turn the interrupts on so we can service requests */
4464 h->access.set_intr_mask(h, HPSA_INTR_ON);
4465
4466 hpsa_hba_inquiry(h);
4467 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4468 start_controller_lockup_detector(h);
4469 return 1;
4470
4471 clean4:
4472 hpsa_free_sg_chain_blocks(h);
4473 hpsa_free_cmd_pool(h);
4474 free_irq(h->intr[h->intr_mode], h);
4475 clean2:
4476 clean1:
4477 kfree(h);
4478 return rc;
4479 }
4480
4481 static void hpsa_flush_cache(struct ctlr_info *h)
4482 {
4483 char *flush_buf;
4484 struct CommandList *c;
4485
4486 flush_buf = kzalloc(4, GFP_KERNEL);
4487 if (!flush_buf)
4488 return;
4489
4490 c = cmd_special_alloc(h);
4491 if (!c) {
4492 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4493 goto out_of_memory;
4494 }
4495 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4496 RAID_CTLR_LUNID, TYPE_CMD);
4497 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4498 if (c->err_info->CommandStatus != 0)
4499 dev_warn(&h->pdev->dev,
4500 "error flushing cache on controller\n");
4501 cmd_special_free(h, c);
4502 out_of_memory:
4503 kfree(flush_buf);
4504 }
4505
4506 static void hpsa_shutdown(struct pci_dev *pdev)
4507 {
4508 struct ctlr_info *h;
4509
4510 h = pci_get_drvdata(pdev);
4511 /* Turn board interrupts off and send the flush cache command
4512 * sendcmd will turn off interrupt, and send the flush...
4513 * To write all data in the battery backed cache to disks
4514 */
4515 hpsa_flush_cache(h);
4516 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4517 free_irq(h->intr[h->intr_mode], h);
4518 #ifdef CONFIG_PCI_MSI
4519 if (h->msix_vector)
4520 pci_disable_msix(h->pdev);
4521 else if (h->msi_vector)
4522 pci_disable_msi(h->pdev);
4523 #endif /* CONFIG_PCI_MSI */
4524 }
4525
4526 static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4527 {
4528 int i;
4529
4530 for (i = 0; i < h->ndevices; i++)
4531 kfree(h->dev[i]);
4532 }
4533
4534 static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4535 {
4536 struct ctlr_info *h;
4537
4538 if (pci_get_drvdata(pdev) == NULL) {
4539 dev_err(&pdev->dev, "unable to remove device\n");
4540 return;
4541 }
4542 h = pci_get_drvdata(pdev);
4543 stop_controller_lockup_detector(h);
4544 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4545 hpsa_shutdown(pdev);
4546 iounmap(h->vaddr);
4547 iounmap(h->transtable);
4548 iounmap(h->cfgtable);
4549 hpsa_free_device_info(h);
4550 hpsa_free_sg_chain_blocks(h);
4551 pci_free_consistent(h->pdev,
4552 h->nr_cmds * sizeof(struct CommandList),
4553 h->cmd_pool, h->cmd_pool_dhandle);
4554 pci_free_consistent(h->pdev,
4555 h->nr_cmds * sizeof(struct ErrorInfo),
4556 h->errinfo_pool, h->errinfo_pool_dhandle);
4557 pci_free_consistent(h->pdev, h->reply_pool_size,
4558 h->reply_pool, h->reply_pool_dhandle);
4559 kfree(h->cmd_pool_bits);
4560 kfree(h->blockFetchTable);
4561 kfree(h->hba_inquiry_data);
4562 /*
4563 * Deliberately omit pci_disable_device(): it does something nasty to
4564 * Smart Array controllers that pci_enable_device does not undo
4565 */
4566 pci_release_regions(pdev);
4567 pci_set_drvdata(pdev, NULL);
4568 kfree(h);
4569 }
4570
4571 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4572 __attribute__((unused)) pm_message_t state)
4573 {
4574 return -ENOSYS;
4575 }
4576
4577 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4578 {
4579 return -ENOSYS;
4580 }
4581
4582 static struct pci_driver hpsa_pci_driver = {
4583 .name = HPSA,
4584 .probe = hpsa_init_one,
4585 .remove = __devexit_p(hpsa_remove_one),
4586 .id_table = hpsa_pci_device_id, /* id_table */
4587 .shutdown = hpsa_shutdown,
4588 .suspend = hpsa_suspend,
4589 .resume = hpsa_resume,
4590 };
4591
4592 /* Fill in bucket_map[], given nsgs (the max number of
4593 * scatter gather elements supported) and bucket[],
4594 * which is an array of 8 integers. The bucket[] array
4595 * contains 8 different DMA transfer sizes (in 16
4596 * byte increments) which the controller uses to fetch
4597 * commands. This function fills in bucket_map[], which
4598 * maps a given number of scatter gather elements to one of
4599 * the 8 DMA transfer sizes. The point of it is to allow the
4600 * controller to only do as much DMA as needed to fetch the
4601 * command, with the DMA transfer size encoded in the lower
4602 * bits of the command address.
4603 */
4604 static void calc_bucket_map(int bucket[], int num_buckets,
4605 int nsgs, int *bucket_map)
4606 {
4607 int i, j, b, size;
4608
4609 /* even a command with 0 SGs requires 4 blocks */
4610 #define MINIMUM_TRANSFER_BLOCKS 4
4611 #define NUM_BUCKETS 8
4612 /* Note, bucket_map must have nsgs+1 entries. */
4613 for (i = 0; i <= nsgs; i++) {
4614 /* Compute size of a command with i SG entries */
4615 size = i + MINIMUM_TRANSFER_BLOCKS;
4616 b = num_buckets; /* Assume the biggest bucket */
4617 /* Find the bucket that is just big enough */
4618 for (j = 0; j < 8; j++) {
4619 if (bucket[j] >= size) {
4620 b = j;
4621 break;
4622 }
4623 }
4624 /* for a command with i SG entries, use bucket b. */
4625 bucket_map[i] = b;
4626 }
4627 }
4628
4629 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4630 u32 use_short_tags)
4631 {
4632 int i;
4633 unsigned long register_value;
4634
4635 /* This is a bit complicated. There are 8 registers on
4636 * the controller which we write to to tell it 8 different
4637 * sizes of commands which there may be. It's a way of
4638 * reducing the DMA done to fetch each command. Encoded into
4639 * each command's tag are 3 bits which communicate to the controller
4640 * which of the eight sizes that command fits within. The size of
4641 * each command depends on how many scatter gather entries there are.
4642 * Each SG entry requires 16 bytes. The eight registers are programmed
4643 * with the number of 16-byte blocks a command of that size requires.
4644 * The smallest command possible requires 5 such 16 byte blocks.
4645 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
4646 * blocks. Note, this only extends to the SG entries contained
4647 * within the command block, and does not extend to chained blocks
4648 * of SG elements. bft[] contains the eight values we write to
4649 * the registers. They are not evenly distributed, but have more
4650 * sizes for small commands, and fewer sizes for larger commands.
4651 */
4652 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
4653 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
4654 /* 5 = 1 s/g entry or 4k
4655 * 6 = 2 s/g entry or 8k
4656 * 8 = 4 s/g entry or 16k
4657 * 10 = 6 s/g entry or 24k
4658 */
4659
4660 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4661
4662 /* Controller spec: zero out this buffer. */
4663 memset(h->reply_pool, 0, h->reply_pool_size);
4664 h->reply_pool_head = h->reply_pool;
4665
4666 bft[7] = SG_ENTRIES_IN_CMD + 4;
4667 calc_bucket_map(bft, ARRAY_SIZE(bft),
4668 SG_ENTRIES_IN_CMD, h->blockFetchTable);
4669 for (i = 0; i < 8; i++)
4670 writel(bft[i], &h->transtable->BlockFetch[i]);
4671
4672 /* size of controller ring buffer */
4673 writel(h->max_commands, &h->transtable->RepQSize);
4674 writel(1, &h->transtable->RepQCount);
4675 writel(0, &h->transtable->RepQCtrAddrLow32);
4676 writel(0, &h->transtable->RepQCtrAddrHigh32);
4677 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4678 writel(0, &h->transtable->RepQAddr0High32);
4679 writel(CFGTBL_Trans_Performant | use_short_tags,
4680 &(h->cfgtable->HostWrite.TransportRequest));
4681 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4682 hpsa_wait_for_mode_change_ack(h);
4683 register_value = readl(&(h->cfgtable->TransportActive));
4684 if (!(register_value & CFGTBL_Trans_Performant)) {
4685 dev_warn(&h->pdev->dev, "unable to get board into"
4686 " performant mode\n");
4687 return;
4688 }
4689 /* Change the access methods to the performant access methods */
4690 h->access = SA5_performant_access;
4691 h->transMethod = CFGTBL_Trans_Performant;
4692 }
4693
4694 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4695 {
4696 u32 trans_support;
4697
4698 if (hpsa_simple_mode)
4699 return;
4700
4701 trans_support = readl(&(h->cfgtable->TransportSupport));
4702 if (!(trans_support & PERFORMANT_MODE))
4703 return;
4704
4705 hpsa_get_max_perf_mode_cmds(h);
4706 /* Performant mode ring buffer and supporting data structures */
4707 h->reply_pool_size = h->max_commands * sizeof(u64);
4708 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4709 &(h->reply_pool_dhandle));
4710
4711 /* Need a block fetch table for performant mode */
4712 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
4713 sizeof(u32)), GFP_KERNEL);
4714
4715 if ((h->reply_pool == NULL)
4716 || (h->blockFetchTable == NULL))
4717 goto clean_up;
4718
4719 hpsa_enter_performant_mode(h,
4720 trans_support & CFGTBL_Trans_use_short_tags);
4721
4722 return;
4723
4724 clean_up:
4725 if (h->reply_pool)
4726 pci_free_consistent(h->pdev, h->reply_pool_size,
4727 h->reply_pool, h->reply_pool_dhandle);
4728 kfree(h->blockFetchTable);
4729 }
4730
4731 /*
4732 * This is it. Register the PCI driver information for the cards we control
4733 * the OS will call our registered routines when it finds one of our cards.
4734 */
4735 static int __init hpsa_init(void)
4736 {
4737 return pci_register_driver(&hpsa_pci_driver);
4738 }
4739
4740 static void __exit hpsa_cleanup(void)
4741 {
4742 pci_unregister_driver(&hpsa_pci_driver);
4743 }
4744
4745 module_init(hpsa_init);
4746 module_exit(hpsa_cleanup);
Linux with added FPC-III support