rtnetlink: check DO_SETLINK_NOTIFY correctly in do_setlink
[linux/fpc-iii.git] / arch / powerpc / platforms / pseries / eeh_pseries.c
blob6b812ad990e48318803c0d1d5d6d02e569c2ee9c
1 /*
2 * The file intends to implement the platform dependent EEH operations on pseries.
3 * Actually, the pseries platform is built based on RTAS heavily. That means the
4 * pseries platform dependent EEH operations will be built on RTAS calls. The functions
5 * are derived from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
6 * been done.
8 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
9 * Copyright IBM Corporation 2001, 2005, 2006
10 * Copyright Dave Engebretsen & Todd Inglett 2001
11 * Copyright Linas Vepstas 2005, 2006
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <linux/atomic.h>
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/init.h>
32 #include <linux/list.h>
33 #include <linux/of.h>
34 #include <linux/pci.h>
35 #include <linux/proc_fs.h>
36 #include <linux/rbtree.h>
37 #include <linux/sched.h>
38 #include <linux/seq_file.h>
39 #include <linux/spinlock.h>
41 #include <asm/eeh.h>
42 #include <asm/eeh_event.h>
43 #include <asm/io.h>
44 #include <asm/machdep.h>
45 #include <asm/ppc-pci.h>
46 #include <asm/rtas.h>
48 /* RTAS tokens */
49 static int ibm_set_eeh_option;
50 static int ibm_set_slot_reset;
51 static int ibm_read_slot_reset_state;
52 static int ibm_read_slot_reset_state2;
53 static int ibm_slot_error_detail;
54 static int ibm_get_config_addr_info;
55 static int ibm_get_config_addr_info2;
56 static int ibm_configure_pe;
59 * Buffer for reporting slot-error-detail rtas calls. Its here
60 * in BSS, and not dynamically alloced, so that it ends up in
61 * RMO where RTAS can access it.
63 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
64 static DEFINE_SPINLOCK(slot_errbuf_lock);
65 static int eeh_error_buf_size;
67 /**
68 * pseries_eeh_init - EEH platform dependent initialization
70 * EEH platform dependent initialization on pseries.
72 static int pseries_eeh_init(void)
74 /* figure out EEH RTAS function call tokens */
75 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
76 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
77 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
78 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
79 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
80 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
81 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
82 ibm_configure_pe = rtas_token("ibm,configure-pe");
85 * ibm,configure-pe and ibm,configure-bridge have the same semantics,
86 * however ibm,configure-pe can be faster. If we can't find
87 * ibm,configure-pe then fall back to using ibm,configure-bridge.
89 if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE)
90 ibm_configure_pe = rtas_token("ibm,configure-bridge");
93 * Necessary sanity check. We needn't check "get-config-addr-info"
94 * and its variant since the old firmware probably support address
95 * of domain/bus/slot/function for EEH RTAS operations.
97 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE ||
98 ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE ||
99 (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
100 ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) ||
101 ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE ||
102 ibm_configure_pe == RTAS_UNKNOWN_SERVICE) {
103 pr_info("EEH functionality not supported\n");
104 return -EINVAL;
107 /* Initialize error log lock and size */
108 spin_lock_init(&slot_errbuf_lock);
109 eeh_error_buf_size = rtas_token("rtas-error-log-max");
110 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
111 pr_info("%s: unknown EEH error log size\n",
112 __func__);
113 eeh_error_buf_size = 1024;
114 } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
115 pr_info("%s: EEH error log size %d exceeds the maximal %d\n",
116 __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
117 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
120 /* Set EEH probe mode */
121 eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);
123 return 0;
126 static int pseries_eeh_cap_start(struct pci_dn *pdn)
128 u32 status;
130 if (!pdn)
131 return 0;
133 rtas_read_config(pdn, PCI_STATUS, 2, &status);
134 if (!(status & PCI_STATUS_CAP_LIST))
135 return 0;
137 return PCI_CAPABILITY_LIST;
141 static int pseries_eeh_find_cap(struct pci_dn *pdn, int cap)
143 int pos = pseries_eeh_cap_start(pdn);
144 int cnt = 48; /* Maximal number of capabilities */
145 u32 id;
147 if (!pos)
148 return 0;
150 while (cnt--) {
151 rtas_read_config(pdn, pos, 1, &pos);
152 if (pos < 0x40)
153 break;
154 pos &= ~3;
155 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
156 if (id == 0xff)
157 break;
158 if (id == cap)
159 return pos;
160 pos += PCI_CAP_LIST_NEXT;
163 return 0;
166 static int pseries_eeh_find_ecap(struct pci_dn *pdn, int cap)
168 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
169 u32 header;
170 int pos = 256;
171 int ttl = (4096 - 256) / 8;
173 if (!edev || !edev->pcie_cap)
174 return 0;
175 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
176 return 0;
177 else if (!header)
178 return 0;
180 while (ttl-- > 0) {
181 if (PCI_EXT_CAP_ID(header) == cap && pos)
182 return pos;
184 pos = PCI_EXT_CAP_NEXT(header);
185 if (pos < 256)
186 break;
188 if (rtas_read_config(pdn, pos, 4, &header) != PCIBIOS_SUCCESSFUL)
189 break;
192 return 0;
196 * pseries_eeh_probe - EEH probe on the given device
197 * @pdn: PCI device node
198 * @data: Unused
200 * When EEH module is installed during system boot, all PCI devices
201 * are checked one by one to see if it supports EEH. The function
202 * is introduced for the purpose.
204 static void *pseries_eeh_probe(struct pci_dn *pdn, void *data)
206 struct eeh_dev *edev;
207 struct eeh_pe pe;
208 u32 pcie_flags;
209 int enable = 0;
210 int ret;
212 /* Retrieve OF node and eeh device */
213 edev = pdn_to_eeh_dev(pdn);
214 if (!edev || edev->pe)
215 return NULL;
217 /* Check class/vendor/device IDs */
218 if (!pdn->vendor_id || !pdn->device_id || !pdn->class_code)
219 return NULL;
221 /* Skip for PCI-ISA bridge */
222 if ((pdn->class_code >> 8) == PCI_CLASS_BRIDGE_ISA)
223 return NULL;
226 * Update class code and mode of eeh device. We need
227 * correctly reflects that current device is root port
228 * or PCIe switch downstream port.
230 edev->class_code = pdn->class_code;
231 edev->pcix_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
232 edev->pcie_cap = pseries_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
233 edev->aer_cap = pseries_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
234 edev->mode &= 0xFFFFFF00;
235 if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
236 edev->mode |= EEH_DEV_BRIDGE;
237 if (edev->pcie_cap) {
238 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
239 2, &pcie_flags);
240 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
241 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
242 edev->mode |= EEH_DEV_ROOT_PORT;
243 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
244 edev->mode |= EEH_DEV_DS_PORT;
248 /* Initialize the fake PE */
249 memset(&pe, 0, sizeof(struct eeh_pe));
250 pe.phb = pdn->phb;
251 pe.config_addr = (pdn->busno << 16) | (pdn->devfn << 8);
253 /* Enable EEH on the device */
254 ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
255 if (!ret) {
256 /* Retrieve PE address */
257 edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
258 pe.addr = edev->pe_config_addr;
260 /* Some older systems (Power4) allow the ibm,set-eeh-option
261 * call to succeed even on nodes where EEH is not supported.
262 * Verify support explicitly.
264 ret = eeh_ops->get_state(&pe, NULL);
265 if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
266 enable = 1;
268 if (enable) {
269 eeh_add_flag(EEH_ENABLED);
270 eeh_add_to_parent_pe(edev);
272 pr_debug("%s: EEH enabled on %02x:%02x.%01x PHB#%x-PE#%x\n",
273 __func__, pdn->busno, PCI_SLOT(pdn->devfn),
274 PCI_FUNC(pdn->devfn), pe.phb->global_number,
275 pe.addr);
276 } else if (pdn->parent && pdn_to_eeh_dev(pdn->parent) &&
277 (pdn_to_eeh_dev(pdn->parent))->pe) {
278 /* This device doesn't support EEH, but it may have an
279 * EEH parent, in which case we mark it as supported.
281 edev->pe_config_addr = pdn_to_eeh_dev(pdn->parent)->pe_config_addr;
282 eeh_add_to_parent_pe(edev);
286 /* Save memory bars */
287 eeh_save_bars(edev);
289 return NULL;
293 * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
294 * @pe: EEH PE
295 * @option: operation to be issued
297 * The function is used to control the EEH functionality globally.
298 * Currently, following options are support according to PAPR:
299 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
301 static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
303 int ret = 0;
304 int config_addr;
307 * When we're enabling or disabling EEH functioality on
308 * the particular PE, the PE config address is possibly
309 * unavailable. Therefore, we have to figure it out from
310 * the FDT node.
312 switch (option) {
313 case EEH_OPT_DISABLE:
314 case EEH_OPT_ENABLE:
315 case EEH_OPT_THAW_MMIO:
316 case EEH_OPT_THAW_DMA:
317 config_addr = pe->config_addr;
318 if (pe->addr)
319 config_addr = pe->addr;
320 break;
321 case EEH_OPT_FREEZE_PE:
322 /* Not support */
323 return 0;
324 default:
325 pr_err("%s: Invalid option %d\n",
326 __func__, option);
327 return -EINVAL;
330 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
331 config_addr, BUID_HI(pe->phb->buid),
332 BUID_LO(pe->phb->buid), option);
334 return ret;
338 * pseries_eeh_get_pe_addr - Retrieve PE address
339 * @pe: EEH PE
341 * Retrieve the assocated PE address. Actually, there're 2 RTAS
342 * function calls dedicated for the purpose. We need implement
343 * it through the new function and then the old one. Besides,
344 * you should make sure the config address is figured out from
345 * FDT node before calling the function.
347 * It's notable that zero'ed return value means invalid PE config
348 * address.
350 static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
352 int ret = 0;
353 int rets[3];
355 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
357 * First of all, we need to make sure there has one PE
358 * associated with the device. Otherwise, PE address is
359 * meaningless.
361 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
362 pe->config_addr, BUID_HI(pe->phb->buid),
363 BUID_LO(pe->phb->buid), 1);
364 if (ret || (rets[0] == 0))
365 return 0;
367 /* Retrieve the associated PE config address */
368 ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
369 pe->config_addr, BUID_HI(pe->phb->buid),
370 BUID_LO(pe->phb->buid), 0);
371 if (ret) {
372 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
373 __func__, pe->phb->global_number, pe->config_addr);
374 return 0;
377 return rets[0];
380 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
381 ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
382 pe->config_addr, BUID_HI(pe->phb->buid),
383 BUID_LO(pe->phb->buid), 0);
384 if (ret) {
385 pr_warn("%s: Failed to get address for PHB#%x-PE#%x\n",
386 __func__, pe->phb->global_number, pe->config_addr);
387 return 0;
390 return rets[0];
393 return ret;
397 * pseries_eeh_get_state - Retrieve PE state
398 * @pe: EEH PE
399 * @state: return value
401 * Retrieve the state of the specified PE. On RTAS compliant
402 * pseries platform, there already has one dedicated RTAS function
403 * for the purpose. It's notable that the associated PE config address
404 * might be ready when calling the function. Therefore, endeavour to
405 * use the PE config address if possible. Further more, there're 2
406 * RTAS calls for the purpose, we need to try the new one and back
407 * to the old one if the new one couldn't work properly.
409 static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
411 int config_addr;
412 int ret;
413 int rets[4];
414 int result;
416 /* Figure out PE config address if possible */
417 config_addr = pe->config_addr;
418 if (pe->addr)
419 config_addr = pe->addr;
421 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
422 ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
423 config_addr, BUID_HI(pe->phb->buid),
424 BUID_LO(pe->phb->buid));
425 } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
426 /* Fake PE unavailable info */
427 rets[2] = 0;
428 ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
429 config_addr, BUID_HI(pe->phb->buid),
430 BUID_LO(pe->phb->buid));
431 } else {
432 return EEH_STATE_NOT_SUPPORT;
435 if (ret)
436 return ret;
438 /* Parse the result out */
439 if (!rets[1])
440 return EEH_STATE_NOT_SUPPORT;
442 switch(rets[0]) {
443 case 0:
444 result = EEH_STATE_MMIO_ACTIVE |
445 EEH_STATE_DMA_ACTIVE;
446 break;
447 case 1:
448 result = EEH_STATE_RESET_ACTIVE |
449 EEH_STATE_MMIO_ACTIVE |
450 EEH_STATE_DMA_ACTIVE;
451 break;
452 case 2:
453 result = 0;
454 break;
455 case 4:
456 result = EEH_STATE_MMIO_ENABLED;
457 break;
458 case 5:
459 if (rets[2]) {
460 if (state) *state = rets[2];
461 result = EEH_STATE_UNAVAILABLE;
462 } else {
463 result = EEH_STATE_NOT_SUPPORT;
465 break;
466 default:
467 result = EEH_STATE_NOT_SUPPORT;
470 return result;
474 * pseries_eeh_reset - Reset the specified PE
475 * @pe: EEH PE
476 * @option: reset option
478 * Reset the specified PE
480 static int pseries_eeh_reset(struct eeh_pe *pe, int option)
482 int config_addr;
483 int ret;
485 /* Figure out PE address */
486 config_addr = pe->config_addr;
487 if (pe->addr)
488 config_addr = pe->addr;
490 /* Reset PE through RTAS call */
491 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
492 config_addr, BUID_HI(pe->phb->buid),
493 BUID_LO(pe->phb->buid), option);
495 /* If fundamental-reset not supported, try hot-reset */
496 if (option == EEH_RESET_FUNDAMENTAL &&
497 ret == -8) {
498 option = EEH_RESET_HOT;
499 ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
500 config_addr, BUID_HI(pe->phb->buid),
501 BUID_LO(pe->phb->buid), option);
504 /* We need reset hold or settlement delay */
505 if (option == EEH_RESET_FUNDAMENTAL ||
506 option == EEH_RESET_HOT)
507 msleep(EEH_PE_RST_HOLD_TIME);
508 else
509 msleep(EEH_PE_RST_SETTLE_TIME);
511 return ret;
515 * pseries_eeh_wait_state - Wait for PE state
516 * @pe: EEH PE
517 * @max_wait: maximal period in millisecond
519 * Wait for the state of associated PE. It might take some time
520 * to retrieve the PE's state.
522 static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
524 int ret;
525 int mwait;
528 * According to PAPR, the state of PE might be temporarily
529 * unavailable. Under the circumstance, we have to wait
530 * for indicated time determined by firmware. The maximal
531 * wait time is 5 minutes, which is acquired from the original
532 * EEH implementation. Also, the original implementation
533 * also defined the minimal wait time as 1 second.
535 #define EEH_STATE_MIN_WAIT_TIME (1000)
536 #define EEH_STATE_MAX_WAIT_TIME (300 * 1000)
538 while (1) {
539 ret = pseries_eeh_get_state(pe, &mwait);
542 * If the PE's state is temporarily unavailable,
543 * we have to wait for the specified time. Otherwise,
544 * the PE's state will be returned immediately.
546 if (ret != EEH_STATE_UNAVAILABLE)
547 return ret;
549 if (max_wait <= 0) {
550 pr_warn("%s: Timeout when getting PE's state (%d)\n",
551 __func__, max_wait);
552 return EEH_STATE_NOT_SUPPORT;
555 if (mwait <= 0) {
556 pr_warn("%s: Firmware returned bad wait value %d\n",
557 __func__, mwait);
558 mwait = EEH_STATE_MIN_WAIT_TIME;
559 } else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
560 pr_warn("%s: Firmware returned too long wait value %d\n",
561 __func__, mwait);
562 mwait = EEH_STATE_MAX_WAIT_TIME;
565 max_wait -= mwait;
566 msleep(mwait);
569 return EEH_STATE_NOT_SUPPORT;
573 * pseries_eeh_get_log - Retrieve error log
574 * @pe: EEH PE
575 * @severity: temporary or permanent error log
576 * @drv_log: driver log to be combined with retrieved error log
577 * @len: length of driver log
579 * Retrieve the temporary or permanent error from the PE.
580 * Actually, the error will be retrieved through the dedicated
581 * RTAS call.
583 static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
585 int config_addr;
586 unsigned long flags;
587 int ret;
589 spin_lock_irqsave(&slot_errbuf_lock, flags);
590 memset(slot_errbuf, 0, eeh_error_buf_size);
592 /* Figure out the PE address */
593 config_addr = pe->config_addr;
594 if (pe->addr)
595 config_addr = pe->addr;
597 ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
598 BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
599 virt_to_phys(drv_log), len,
600 virt_to_phys(slot_errbuf), eeh_error_buf_size,
601 severity);
602 if (!ret)
603 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
604 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
606 return ret;
610 * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
611 * @pe: EEH PE
613 * The function will be called to reconfigure the bridges included
614 * in the specified PE so that the mulfunctional PE would be recovered
615 * again.
617 static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
619 int config_addr;
620 int ret;
621 /* Waiting 0.2s maximum before skipping configuration */
622 int max_wait = 200;
624 /* Figure out the PE address */
625 config_addr = pe->config_addr;
626 if (pe->addr)
627 config_addr = pe->addr;
629 while (max_wait > 0) {
630 ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
631 config_addr, BUID_HI(pe->phb->buid),
632 BUID_LO(pe->phb->buid));
634 if (!ret)
635 return ret;
638 * If RTAS returns a delay value that's above 100ms, cut it
639 * down to 100ms in case firmware made a mistake. For more
640 * on how these delay values work see rtas_busy_delay_time
642 if (ret > RTAS_EXTENDED_DELAY_MIN+2 &&
643 ret <= RTAS_EXTENDED_DELAY_MAX)
644 ret = RTAS_EXTENDED_DELAY_MIN+2;
646 max_wait -= rtas_busy_delay_time(ret);
648 if (max_wait < 0)
649 break;
651 rtas_busy_delay(ret);
654 pr_warn("%s: Unable to configure bridge PHB#%x-PE#%x (%d)\n",
655 __func__, pe->phb->global_number, pe->addr, ret);
656 return ret;
660 * pseries_eeh_read_config - Read PCI config space
661 * @pdn: PCI device node
662 * @where: PCI address
663 * @size: size to read
664 * @val: return value
666 * Read config space from the speicifed device
668 static int pseries_eeh_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
670 return rtas_read_config(pdn, where, size, val);
674 * pseries_eeh_write_config - Write PCI config space
675 * @pdn: PCI device node
676 * @where: PCI address
677 * @size: size to write
678 * @val: value to be written
680 * Write config space to the specified device
682 static int pseries_eeh_write_config(struct pci_dn *pdn, int where, int size, u32 val)
684 return rtas_write_config(pdn, where, size, val);
687 static struct eeh_ops pseries_eeh_ops = {
688 .name = "pseries",
689 .init = pseries_eeh_init,
690 .probe = pseries_eeh_probe,
691 .set_option = pseries_eeh_set_option,
692 .get_pe_addr = pseries_eeh_get_pe_addr,
693 .get_state = pseries_eeh_get_state,
694 .reset = pseries_eeh_reset,
695 .wait_state = pseries_eeh_wait_state,
696 .get_log = pseries_eeh_get_log,
697 .configure_bridge = pseries_eeh_configure_bridge,
698 .err_inject = NULL,
699 .read_config = pseries_eeh_read_config,
700 .write_config = pseries_eeh_write_config,
701 .next_error = NULL,
702 .restore_config = NULL
706 * eeh_pseries_init - Register platform dependent EEH operations
708 * EEH initialization on pseries platform. This function should be
709 * called before any EEH related functions.
711 static int __init eeh_pseries_init(void)
713 int ret;
715 ret = eeh_ops_register(&pseries_eeh_ops);
716 if (!ret)
717 pr_info("EEH: pSeries platform initialized\n");
718 else
719 pr_info("EEH: pSeries platform initialization failure (%d)\n",
720 ret);
722 return ret;
724 machine_early_initcall(pseries, eeh_pseries_init);