| blob | 4fa221fd9bdc9d7f1236f08e61f1354517525904 |
1 /*
2 * MPC8379E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 /dts-v1/;
14 / {
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
32 PowerPC,8379@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
50 localbus@e0005000 {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
58 // booting from NOR flash
59 ranges = <0 0x0 0xfe000000 0x02000000
60 1 0x0 0xf8000000 0x00008000
61 3 0x0 0xe0600000 0x00008000>;
63 flash@0,0 {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "cfi-flash";
67 reg = <0 0x0 0x2000000>;
68 bank-width = <2>;
69 device-width = <1>;
71 u-boot@0 {
72 reg = <0x0 0x100000>;
73 read-only;
74 };
76 fs@100000 {
77 reg = <0x100000 0x800000>;
78 };
80 kernel@1d00000 {
81 reg = <0x1d00000 0x200000>;
82 };
84 dtb@1f00000 {
85 reg = <0x1f00000 0x100000>;
86 };
87 };
89 bcsr@1,0 {
90 reg = <1 0x0 0x8000>;
91 compatible = "fsl,mpc837xmds-bcsr";
92 };
94 nand@3,0 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "fsl,mpc8379-fcm-nand",
98 "fsl,elbc-fcm-nand";
99 reg = <3 0x0 0x8000>;
101 u-boot@0 {
102 reg = <0x0 0x100000>;
103 read-only;
104 };
106 kernel@100000 {
107 reg = <0x100000 0x300000>;
108 };
110 fs@400000 {
111 reg = <0x400000 0x1c00000>;
112 };
113 };
114 };
116 soc@e0000000 {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 device_type = "soc";
120 compatible = "simple-bus";
121 ranges = <0x0 0xe0000000 0x00100000>;
122 reg = <0xe0000000 0x00000200>;
123 bus-frequency = <0>;
125 wdt@200 {
126 compatible = "mpc83xx_wdt";
127 reg = <0x200 0x100>;
128 };
130 sleep-nexus {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "simple-bus";
134 sleep = <&pmc 0x0c000000>;
135 ranges;
137 i2c@3000 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 cell-index = <0>;
141 compatible = "fsl-i2c";
142 reg = <0x3000 0x100>;
143 interrupts = <14 0x8>;
144 interrupt-parent = <&ipic>;
145 dfsrr;
147 rtc@68 {
148 compatible = "dallas,ds1374";
149 reg = <0x68>;
150 interrupts = <19 0x8>;
151 interrupt-parent = <&ipic>;
152 };
153 };
155 sdhci@2e000 {
156 compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
157 reg = <0x2e000 0x1000>;
158 interrupts = <42 0x8>;
159 interrupt-parent = <&ipic>;
160 /* Filled in by U-Boot */
161 clock-frequency = <0>;
162 };
163 };
165 i2c@3100 {
166 #address-cells = <1>;
167 #size-cells = <0>;
168 cell-index = <1>;
169 compatible = "fsl-i2c";
170 reg = <0x3100 0x100>;
171 interrupts = <15 0x8>;
172 interrupt-parent = <&ipic>;
173 dfsrr;
174 };
176 spi@7000 {
177 cell-index = <0>;
178 compatible = "fsl,spi";
179 reg = <0x7000 0x1000>;
180 interrupts = <16 0x8>;
181 interrupt-parent = <&ipic>;
182 mode = "cpu";
183 };
185 dma@82a8 {
186 #address-cells = <1>;
187 #size-cells = <1>;
188 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
189 reg = <0x82a8 4>;
190 ranges = <0 0x8100 0x1a8>;
191 interrupt-parent = <&ipic>;
192 interrupts = <71 8>;
193 cell-index = <0>;
194 dma-channel@0 {
195 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
196 reg = <0 0x80>;
197 cell-index = <0>;
198 interrupt-parent = <&ipic>;
199 interrupts = <71 8>;
200 };
201 dma-channel@80 {
202 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
203 reg = <0x80 0x80>;
204 cell-index = <1>;
205 interrupt-parent = <&ipic>;
206 interrupts = <71 8>;
207 };
208 dma-channel@100 {
209 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
210 reg = <0x100 0x80>;
211 cell-index = <2>;
212 interrupt-parent = <&ipic>;
213 interrupts = <71 8>;
214 };
215 dma-channel@180 {
216 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
217 reg = <0x180 0x28>;
218 cell-index = <3>;
219 interrupt-parent = <&ipic>;
220 interrupts = <71 8>;
221 };
222 };
224 usb@23000 {
225 compatible = "fsl-usb2-dr";
226 reg = <0x23000 0x1000>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229 interrupt-parent = <&ipic>;
230 interrupts = <38 0x8>;
231 dr_mode = "host";
232 phy_type = "ulpi";
233 sleep = <&pmc 0x00c00000>;
234 };
236 enet0: ethernet@24000 {
237 #address-cells = <1>;
238 #size-cells = <1>;
239 cell-index = <0>;
240 device_type = "network";
241 model = "eTSEC";
242 compatible = "gianfar";
243 reg = <0x24000 0x1000>;
244 ranges = <0x0 0x24000 0x1000>;
245 local-mac-address = [ 00 00 00 00 00 00 ];
246 interrupts = <32 0x8 33 0x8 34 0x8>;
247 phy-connection-type = "mii";
248 interrupt-parent = <&ipic>;
249 tbi-handle = <&tbi0>;
250 phy-handle = <&phy2>;
251 sleep = <&pmc 0xc0000000>;
252 fsl,magic-packet;
254 mdio@520 {
255 #address-cells = <1>;
256 #size-cells = <0>;
257 compatible = "fsl,gianfar-mdio";
258 reg = <0x520 0x20>;
260 phy2: ethernet-phy@2 {
261 interrupt-parent = <&ipic>;
262 interrupts = <17 0x8>;
263 reg = <0x2>;
264 device_type = "ethernet-phy";
265 };
267 phy3: ethernet-phy@3 {
268 interrupt-parent = <&ipic>;
269 interrupts = <18 0x8>;
270 reg = <0x3>;
271 device_type = "ethernet-phy";
272 };
274 tbi0: tbi-phy@11 {
275 reg = <0x11>;
276 device_type = "tbi-phy";
277 };
278 };
279 };
281 enet1: ethernet@25000 {
282 #address-cells = <1>;
283 #size-cells = <1>;
284 cell-index = <1>;
285 device_type = "network";
286 model = "eTSEC";
287 compatible = "gianfar";
288 reg = <0x25000 0x1000>;
289 ranges = <0x0 0x25000 0x1000>;
290 local-mac-address = [ 00 00 00 00 00 00 ];
291 interrupts = <35 0x8 36 0x8 37 0x8>;
292 phy-connection-type = "mii";
293 interrupt-parent = <&ipic>;
294 tbi-handle = <&tbi1>;
295 phy-handle = <&phy3>;
296 sleep = <&pmc 0x30000000>;
297 fsl,magic-packet;
299 mdio@520 {
300 #address-cells = <1>;
301 #size-cells = <0>;
302 compatible = "fsl,gianfar-tbi";
303 reg = <0x520 0x20>;
305 tbi1: tbi-phy@11 {
306 reg = <0x11>;
307 device_type = "tbi-phy";
308 };
309 };
310 };
312 serial0: serial@4500 {
313 cell-index = <0>;
314 device_type = "serial";
315 compatible = "ns16550";
316 reg = <0x4500 0x100>;
317 clock-frequency = <0>;
318 interrupts = <9 0x8>;
319 interrupt-parent = <&ipic>;
320 };
322 serial1: serial@4600 {
323 cell-index = <1>;
324 device_type = "serial";
325 compatible = "ns16550";
326 reg = <0x4600 0x100>;
327 clock-frequency = <0>;
328 interrupts = <10 0x8>;
329 interrupt-parent = <&ipic>;
330 };
332 crypto@30000 {
333 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
334 "fsl,sec2.1", "fsl,sec2.0";
335 reg = <0x30000 0x10000>;
336 interrupts = <11 0x8>;
337 interrupt-parent = <&ipic>;
338 fsl,num-channels = <4>;
339 fsl,channel-fifo-len = <24>;
340 fsl,exec-units-mask = <0x9fe>;
341 fsl,descriptor-types-mask = <0x3ab0ebf>;
342 sleep = <&pmc 0x03000000>;
343 };
345 sata@18000 {
346 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
347 reg = <0x18000 0x1000>;
348 interrupts = <44 0x8>;
349 interrupt-parent = <&ipic>;
350 sleep = <&pmc 0x000000c0>;
351 };
353 sata@19000 {
354 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
355 reg = <0x19000 0x1000>;
356 interrupts = <45 0x8>;
357 interrupt-parent = <&ipic>;
358 sleep = <&pmc 0x00000030>;
359 };
361 sata@1a000 {
362 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
363 reg = <0x1a000 0x1000>;
364 interrupts = <46 0x8>;
365 interrupt-parent = <&ipic>;
366 sleep = <&pmc 0x0000000c>;
367 };
369 sata@1b000 {
370 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
371 reg = <0x1b000 0x1000>;
372 interrupts = <47 0x8>;
373 interrupt-parent = <&ipic>;
374 sleep = <&pmc 0x00000003>;
375 };
377 /* IPIC
378 * interrupts cell = <intr #, sense>
379 * sense values match linux IORESOURCE_IRQ_* defines:
380 * sense == 8: Level, low assertion
381 * sense == 2: Edge, high-to-low change
382 */
383 ipic: pic@700 {
384 compatible = "fsl,ipic";
385 interrupt-controller;
386 #address-cells = <0>;
387 #interrupt-cells = <2>;
388 reg = <0x700 0x100>;
389 };
391 pmc: power@b00 {
392 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
393 reg = <0xb00 0x100 0xa00 0x100>;
394 interrupts = <80 0x8>;
395 interrupt-parent = <&ipic>;
396 };
397 };
399 pci0: pci@e0008500 {
400 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
401 interrupt-map = <
403 /* IDSEL 0x11 */
404 0x8800 0x0 0x0 0x1 &ipic 20 0x8
405 0x8800 0x0 0x0 0x2 &ipic 21 0x8
406 0x8800 0x0 0x0 0x3 &ipic 22 0x8
407 0x8800 0x0 0x0 0x4 &ipic 23 0x8
409 /* IDSEL 0x12 */
410 0x9000 0x0 0x0 0x1 &ipic 22 0x8
411 0x9000 0x0 0x0 0x2 &ipic 23 0x8
412 0x9000 0x0 0x0 0x3 &ipic 20 0x8
413 0x9000 0x0 0x0 0x4 &ipic 21 0x8
415 /* IDSEL 0x13 */
416 0x9800 0x0 0x0 0x1 &ipic 23 0x8
417 0x9800 0x0 0x0 0x2 &ipic 20 0x8
418 0x9800 0x0 0x0 0x3 &ipic 21 0x8
419 0x9800 0x0 0x0 0x4 &ipic 22 0x8
421 /* IDSEL 0x15 */
422 0xa800 0x0 0x0 0x1 &ipic 20 0x8
423 0xa800 0x0 0x0 0x2 &ipic 21 0x8
424 0xa800 0x0 0x0 0x3 &ipic 22 0x8
425 0xa800 0x0 0x0 0x4 &ipic 23 0x8
427 /* IDSEL 0x16 */
428 0xb000 0x0 0x0 0x1 &ipic 23 0x8
429 0xb000 0x0 0x0 0x2 &ipic 20 0x8
430 0xb000 0x0 0x0 0x3 &ipic 21 0x8
431 0xb000 0x0 0x0 0x4 &ipic 22 0x8
433 /* IDSEL 0x17 */
434 0xb800 0x0 0x0 0x1 &ipic 22 0x8
435 0xb800 0x0 0x0 0x2 &ipic 23 0x8
436 0xb800 0x0 0x0 0x3 &ipic 20 0x8
437 0xb800 0x0 0x0 0x4 &ipic 21 0x8
439 /* IDSEL 0x18 */
440 0xc000 0x0 0x0 0x1 &ipic 21 0x8
441 0xc000 0x0 0x0 0x2 &ipic 22 0x8
442 0xc000 0x0 0x0 0x3 &ipic 23 0x8
443 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
444 interrupt-parent = <&ipic>;
445 interrupts = <66 0x8>;
446 bus-range = <0x0 0x0>;
447 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
448 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
449 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
450 sleep = <&pmc 0x00010000>;
451 clock-frequency = <0>;
452 #interrupt-cells = <1>;
453 #size-cells = <2>;
454 #address-cells = <3>;
455 reg = <0xe0008500 0x100 /* internal registers */
456 0xe0008300 0x8>; /* config space access registers */
457 compatible = "fsl,mpc8349-pci";
458 device_type = "pci";
459 };
460 };