mm, vmalloc: remove useless variable in vmap_block
[linux/fpc-iii.git] / drivers / usb / host / ehci-q.c
blobe321804c34755553afcf3c1ceab38678ed27af1b
1 /*
2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
49 int i, count;
50 u64 addr = buf;
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
82 return count;
85 /*-------------------------------------------------------------------------*/
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 struct ehci_qh_hw *hw = qh->hw;
92 /* writes to an active overlay are unsafe */
93 WARN_ON(qh->qh_state != QH_STATE_IDLE);
95 hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
96 hw->hw_alt_next = EHCI_LIST_END(ehci);
98 /* Except for control endpoints, we make hardware maintain data
99 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
100 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 * ever clear it.
103 if (!(hw->hw_info1 & cpu_to_hc32(ehci, QH_TOGGLE_CTL))) {
104 unsigned is_out, epnum;
106 is_out = qh->is_out;
107 epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
108 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
109 hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
110 usb_settoggle (qh->dev, epnum, is_out, 1);
114 hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
124 struct ehci_qtd *qtd;
126 qtd = list_entry(qh->qtd_list.next, struct ehci_qtd, qtd_list);
129 * first qtd may already be partially processed.
130 * If we come here during unlink, the QH overlay region
131 * might have reference to the just unlinked qtd. The
132 * qtd is updated in qh_completions(). Update the QH
133 * overlay here.
135 if (qh->hw->hw_token & ACTIVE_BIT(ehci))
136 qh->hw->hw_qtd_next = qtd->hw_next;
137 else
138 qh_update(ehci, qh, qtd);
141 /*-------------------------------------------------------------------------*/
143 static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
145 static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
146 struct usb_host_endpoint *ep)
148 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
149 struct ehci_qh *qh = ep->hcpriv;
150 unsigned long flags;
152 spin_lock_irqsave(&ehci->lock, flags);
153 qh->clearing_tt = 0;
154 if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
155 && ehci->rh_state == EHCI_RH_RUNNING)
156 qh_link_async(ehci, qh);
157 spin_unlock_irqrestore(&ehci->lock, flags);
160 static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
161 struct urb *urb, u32 token)
164 /* If an async split transaction gets an error or is unlinked,
165 * the TT buffer may be left in an indeterminate state. We
166 * have to clear the TT buffer.
168 * Note: this routine is never called for Isochronous transfers.
170 if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
171 #if defined(DEBUG) || defined(CONFIG_DYNAMIC_DEBUG)
172 struct usb_device *tt = urb->dev->tt->hub;
173 dev_dbg(&tt->dev,
174 "clear tt buffer port %d, a%d ep%d t%08x\n",
175 urb->dev->ttport, urb->dev->devnum,
176 usb_pipeendpoint(urb->pipe), token);
177 #endif /* DEBUG || CONFIG_DYNAMIC_DEBUG */
178 if (!ehci_is_TDI(ehci)
179 || urb->dev->tt->hub !=
180 ehci_to_hcd(ehci)->self.root_hub) {
181 if (usb_hub_clear_tt_buffer(urb) == 0)
182 qh->clearing_tt = 1;
183 } else {
185 /* REVISIT ARC-derived cores don't clear the root
186 * hub TT buffer in this way...
192 static int qtd_copy_status (
193 struct ehci_hcd *ehci,
194 struct urb *urb,
195 size_t length,
196 u32 token
199 int status = -EINPROGRESS;
201 /* count IN/OUT bytes, not SETUP (even short packets) */
202 if (likely (QTD_PID (token) != 2))
203 urb->actual_length += length - QTD_LENGTH (token);
205 /* don't modify error codes */
206 if (unlikely(urb->unlinked))
207 return status;
209 /* force cleanup after short read; not always an error */
210 if (unlikely (IS_SHORT_READ (token)))
211 status = -EREMOTEIO;
213 /* serious "can't proceed" faults reported by the hardware */
214 if (token & QTD_STS_HALT) {
215 if (token & QTD_STS_BABBLE) {
216 /* FIXME "must" disable babbling device's port too */
217 status = -EOVERFLOW;
218 /* CERR nonzero + halt --> stall */
219 } else if (QTD_CERR(token)) {
220 status = -EPIPE;
222 /* In theory, more than one of the following bits can be set
223 * since they are sticky and the transaction is retried.
224 * Which to test first is rather arbitrary.
226 } else if (token & QTD_STS_MMF) {
227 /* fs/ls interrupt xfer missed the complete-split */
228 status = -EPROTO;
229 } else if (token & QTD_STS_DBE) {
230 status = (QTD_PID (token) == 1) /* IN ? */
231 ? -ENOSR /* hc couldn't read data */
232 : -ECOMM; /* hc couldn't write data */
233 } else if (token & QTD_STS_XACT) {
234 /* timeout, bad CRC, wrong PID, etc */
235 ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
236 urb->dev->devpath,
237 usb_pipeendpoint(urb->pipe),
238 usb_pipein(urb->pipe) ? "in" : "out");
239 status = -EPROTO;
240 } else { /* unknown */
241 status = -EPROTO;
245 return status;
248 static void
249 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
251 if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
252 /* ... update hc-wide periodic stats */
253 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
256 if (unlikely(urb->unlinked)) {
257 COUNT(ehci->stats.unlink);
258 } else {
259 /* report non-error and short read status as zero */
260 if (status == -EINPROGRESS || status == -EREMOTEIO)
261 status = 0;
262 COUNT(ehci->stats.complete);
265 #ifdef EHCI_URB_TRACE
266 ehci_dbg (ehci,
267 "%s %s urb %p ep%d%s status %d len %d/%d\n",
268 __func__, urb->dev->devpath, urb,
269 usb_pipeendpoint (urb->pipe),
270 usb_pipein (urb->pipe) ? "in" : "out",
271 status,
272 urb->actual_length, urb->transfer_buffer_length);
273 #endif
275 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
276 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
279 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
282 * Process and free completed qtds for a qh, returning URBs to drivers.
283 * Chases up to qh->hw_current. Returns nonzero if the caller should
284 * unlink qh.
286 static unsigned
287 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
289 struct ehci_qtd *last, *end = qh->dummy;
290 struct list_head *entry, *tmp;
291 int last_status;
292 int stopped;
293 u8 state;
294 struct ehci_qh_hw *hw = qh->hw;
296 /* completions (or tasks on other cpus) must never clobber HALT
297 * till we've gone through and cleaned everything up, even when
298 * they add urbs to this qh's queue or mark them for unlinking.
300 * NOTE: unlinking expects to be done in queue order.
302 * It's a bug for qh->qh_state to be anything other than
303 * QH_STATE_IDLE, unless our caller is scan_async() or
304 * scan_intr().
306 state = qh->qh_state;
307 qh->qh_state = QH_STATE_COMPLETING;
308 stopped = (state == QH_STATE_IDLE);
310 rescan:
311 last = NULL;
312 last_status = -EINPROGRESS;
313 qh->dequeue_during_giveback = 0;
315 /* remove de-activated QTDs from front of queue.
316 * after faults (including short reads), cleanup this urb
317 * then let the queue advance.
318 * if queue is stopped, handles unlinks.
320 list_for_each_safe (entry, tmp, &qh->qtd_list) {
321 struct ehci_qtd *qtd;
322 struct urb *urb;
323 u32 token = 0;
325 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
326 urb = qtd->urb;
328 /* clean up any state from previous QTD ...*/
329 if (last) {
330 if (likely (last->urb != urb)) {
331 ehci_urb_done(ehci, last->urb, last_status);
332 last_status = -EINPROGRESS;
334 ehci_qtd_free (ehci, last);
335 last = NULL;
338 /* ignore urbs submitted during completions we reported */
339 if (qtd == end)
340 break;
342 /* hardware copies qtd out of qh overlay */
343 rmb ();
344 token = hc32_to_cpu(ehci, qtd->hw_token);
346 /* always clean up qtds the hc de-activated */
347 retry_xacterr:
348 if ((token & QTD_STS_ACTIVE) == 0) {
350 /* Report Data Buffer Error: non-fatal but useful */
351 if (token & QTD_STS_DBE)
352 ehci_dbg(ehci,
353 "detected DataBufferErr for urb %p ep%d%s len %d, qtd %p [qh %p]\n",
354 urb,
355 usb_endpoint_num(&urb->ep->desc),
356 usb_endpoint_dir_in(&urb->ep->desc) ? "in" : "out",
357 urb->transfer_buffer_length,
358 qtd,
359 qh);
361 /* on STALL, error, and short reads this urb must
362 * complete and all its qtds must be recycled.
364 if ((token & QTD_STS_HALT) != 0) {
366 /* retry transaction errors until we
367 * reach the software xacterr limit
369 if ((token & QTD_STS_XACT) &&
370 QTD_CERR(token) == 0 &&
371 ++qh->xacterrs < QH_XACTERR_MAX &&
372 !urb->unlinked) {
373 ehci_dbg(ehci,
374 "detected XactErr len %zu/%zu retry %d\n",
375 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
377 /* reset the token in the qtd and the
378 * qh overlay (which still contains
379 * the qtd) so that we pick up from
380 * where we left off
382 token &= ~QTD_STS_HALT;
383 token |= QTD_STS_ACTIVE |
384 (EHCI_TUNE_CERR << 10);
385 qtd->hw_token = cpu_to_hc32(ehci,
386 token);
387 wmb();
388 hw->hw_token = cpu_to_hc32(ehci,
389 token);
390 goto retry_xacterr;
392 stopped = 1;
394 /* magic dummy for some short reads; qh won't advance.
395 * that silicon quirk can kick in with this dummy too.
397 * other short reads won't stop the queue, including
398 * control transfers (status stage handles that) or
399 * most other single-qtd reads ... the queue stops if
400 * URB_SHORT_NOT_OK was set so the driver submitting
401 * the urbs could clean it up.
403 } else if (IS_SHORT_READ (token)
404 && !(qtd->hw_alt_next
405 & EHCI_LIST_END(ehci))) {
406 stopped = 1;
409 /* stop scanning when we reach qtds the hc is using */
410 } else if (likely (!stopped
411 && ehci->rh_state >= EHCI_RH_RUNNING)) {
412 break;
414 /* scan the whole queue for unlinks whenever it stops */
415 } else {
416 stopped = 1;
418 /* cancel everything if we halt, suspend, etc */
419 if (ehci->rh_state < EHCI_RH_RUNNING)
420 last_status = -ESHUTDOWN;
422 /* this qtd is active; skip it unless a previous qtd
423 * for its urb faulted, or its urb was canceled.
425 else if (last_status == -EINPROGRESS && !urb->unlinked)
426 continue;
429 * If this was the active qtd when the qh was unlinked
430 * and the overlay's token is active, then the overlay
431 * hasn't been written back to the qtd yet so use its
432 * token instead of the qtd's. After the qtd is
433 * processed and removed, the overlay won't be valid
434 * any more.
436 if (state == QH_STATE_IDLE &&
437 qh->qtd_list.next == &qtd->qtd_list &&
438 (hw->hw_token & ACTIVE_BIT(ehci))) {
439 token = hc32_to_cpu(ehci, hw->hw_token);
440 hw->hw_token &= ~ACTIVE_BIT(ehci);
442 /* An unlink may leave an incomplete
443 * async transaction in the TT buffer.
444 * We have to clear it.
446 ehci_clear_tt_buffer(ehci, qh, urb, token);
450 /* unless we already know the urb's status, collect qtd status
451 * and update count of bytes transferred. in common short read
452 * cases with only one data qtd (including control transfers),
453 * queue processing won't halt. but with two or more qtds (for
454 * example, with a 32 KB transfer), when the first qtd gets a
455 * short read the second must be removed by hand.
457 if (last_status == -EINPROGRESS) {
458 last_status = qtd_copy_status(ehci, urb,
459 qtd->length, token);
460 if (last_status == -EREMOTEIO
461 && (qtd->hw_alt_next
462 & EHCI_LIST_END(ehci)))
463 last_status = -EINPROGRESS;
465 /* As part of low/full-speed endpoint-halt processing
466 * we must clear the TT buffer (11.17.5).
468 if (unlikely(last_status != -EINPROGRESS &&
469 last_status != -EREMOTEIO)) {
470 /* The TT's in some hubs malfunction when they
471 * receive this request following a STALL (they
472 * stop sending isochronous packets). Since a
473 * STALL can't leave the TT buffer in a busy
474 * state (if you believe Figures 11-48 - 11-51
475 * in the USB 2.0 spec), we won't clear the TT
476 * buffer in this case. Strictly speaking this
477 * is a violation of the spec.
479 if (last_status != -EPIPE)
480 ehci_clear_tt_buffer(ehci, qh, urb,
481 token);
485 /* if we're removing something not at the queue head,
486 * patch the hardware queue pointer.
488 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
489 last = list_entry (qtd->qtd_list.prev,
490 struct ehci_qtd, qtd_list);
491 last->hw_next = qtd->hw_next;
494 /* remove qtd; it's recycled after possible urb completion */
495 list_del (&qtd->qtd_list);
496 last = qtd;
498 /* reinit the xacterr counter for the next qtd */
499 qh->xacterrs = 0;
502 /* last urb's completion might still need calling */
503 if (likely (last != NULL)) {
504 ehci_urb_done(ehci, last->urb, last_status);
505 ehci_qtd_free (ehci, last);
508 /* Do we need to rescan for URBs dequeued during a giveback? */
509 if (unlikely(qh->dequeue_during_giveback)) {
510 /* If the QH is already unlinked, do the rescan now. */
511 if (state == QH_STATE_IDLE)
512 goto rescan;
514 /* Otherwise the caller must unlink the QH. */
517 /* restore original state; caller must unlink or relink */
518 qh->qh_state = state;
520 /* be sure the hardware's done with the qh before refreshing
521 * it after fault cleanup, or recovering from silicon wrongly
522 * overlaying the dummy qtd (which reduces DMA chatter).
524 * We won't refresh a QH that's linked (after the HC
525 * stopped the queue). That avoids a race:
526 * - HC reads first part of QH;
527 * - CPU updates that first part and the token;
528 * - HC reads rest of that QH, including token
529 * Result: HC gets an inconsistent image, and then
530 * DMAs to/from the wrong memory (corrupting it).
532 * That should be rare for interrupt transfers,
533 * except maybe high bandwidth ...
535 if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci))
536 qh->exception = 1;
538 /* Let the caller know if the QH needs to be unlinked. */
539 return qh->exception;
542 /*-------------------------------------------------------------------------*/
544 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
545 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
546 // ... and packet size, for any kind of endpoint descriptor
547 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
550 * reverse of qh_urb_transaction: free a list of TDs.
551 * used for cleanup after errors, before HC sees an URB's TDs.
553 static void qtd_list_free (
554 struct ehci_hcd *ehci,
555 struct urb *urb,
556 struct list_head *qtd_list
558 struct list_head *entry, *temp;
560 list_for_each_safe (entry, temp, qtd_list) {
561 struct ehci_qtd *qtd;
563 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
564 list_del (&qtd->qtd_list);
565 ehci_qtd_free (ehci, qtd);
570 * create a list of filled qtds for this URB; won't link into qh.
572 static struct list_head *
573 qh_urb_transaction (
574 struct ehci_hcd *ehci,
575 struct urb *urb,
576 struct list_head *head,
577 gfp_t flags
579 struct ehci_qtd *qtd, *qtd_prev;
580 dma_addr_t buf;
581 int len, this_sg_len, maxpacket;
582 int is_input;
583 u32 token;
584 int i;
585 struct scatterlist *sg;
588 * URBs map to sequences of QTDs: one logical transaction
590 qtd = ehci_qtd_alloc (ehci, flags);
591 if (unlikely (!qtd))
592 return NULL;
593 list_add_tail (&qtd->qtd_list, head);
594 qtd->urb = urb;
596 token = QTD_STS_ACTIVE;
597 token |= (EHCI_TUNE_CERR << 10);
598 /* for split transactions, SplitXState initialized to zero */
600 len = urb->transfer_buffer_length;
601 is_input = usb_pipein (urb->pipe);
602 if (usb_pipecontrol (urb->pipe)) {
603 /* SETUP pid */
604 qtd_fill(ehci, qtd, urb->setup_dma,
605 sizeof (struct usb_ctrlrequest),
606 token | (2 /* "setup" */ << 8), 8);
608 /* ... and always at least one more pid */
609 token ^= QTD_TOGGLE;
610 qtd_prev = qtd;
611 qtd = ehci_qtd_alloc (ehci, flags);
612 if (unlikely (!qtd))
613 goto cleanup;
614 qtd->urb = urb;
615 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
616 list_add_tail (&qtd->qtd_list, head);
618 /* for zero length DATA stages, STATUS is always IN */
619 if (len == 0)
620 token |= (1 /* "in" */ << 8);
624 * data transfer stage: buffer setup
626 i = urb->num_mapped_sgs;
627 if (len > 0 && i > 0) {
628 sg = urb->sg;
629 buf = sg_dma_address(sg);
631 /* urb->transfer_buffer_length may be smaller than the
632 * size of the scatterlist (or vice versa)
634 this_sg_len = min_t(int, sg_dma_len(sg), len);
635 } else {
636 sg = NULL;
637 buf = urb->transfer_dma;
638 this_sg_len = len;
641 if (is_input)
642 token |= (1 /* "in" */ << 8);
643 /* else it's already initted to "out" pid (0 << 8) */
645 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
648 * buffer gets wrapped in one or more qtds;
649 * last one may be "short" (including zero len)
650 * and may serve as a control status ack
652 for (;;) {
653 int this_qtd_len;
655 this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
656 maxpacket);
657 this_sg_len -= this_qtd_len;
658 len -= this_qtd_len;
659 buf += this_qtd_len;
662 * short reads advance to a "magic" dummy instead of the next
663 * qtd ... that forces the queue to stop, for manual cleanup.
664 * (this will usually be overridden later.)
666 if (is_input)
667 qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
669 /* qh makes control packets use qtd toggle; maybe switch it */
670 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
671 token ^= QTD_TOGGLE;
673 if (likely(this_sg_len <= 0)) {
674 if (--i <= 0 || len <= 0)
675 break;
676 sg = sg_next(sg);
677 buf = sg_dma_address(sg);
678 this_sg_len = min_t(int, sg_dma_len(sg), len);
681 qtd_prev = qtd;
682 qtd = ehci_qtd_alloc (ehci, flags);
683 if (unlikely (!qtd))
684 goto cleanup;
685 qtd->urb = urb;
686 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
687 list_add_tail (&qtd->qtd_list, head);
691 * unless the caller requires manual cleanup after short reads,
692 * have the alt_next mechanism keep the queue running after the
693 * last data qtd (the only one, for control and most other cases).
695 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
696 || usb_pipecontrol (urb->pipe)))
697 qtd->hw_alt_next = EHCI_LIST_END(ehci);
700 * control requests may need a terminating data "status" ack;
701 * other OUT ones may need a terminating short packet
702 * (zero length).
704 if (likely (urb->transfer_buffer_length != 0)) {
705 int one_more = 0;
707 if (usb_pipecontrol (urb->pipe)) {
708 one_more = 1;
709 token ^= 0x0100; /* "in" <--> "out" */
710 token |= QTD_TOGGLE; /* force DATA1 */
711 } else if (usb_pipeout(urb->pipe)
712 && (urb->transfer_flags & URB_ZERO_PACKET)
713 && !(urb->transfer_buffer_length % maxpacket)) {
714 one_more = 1;
716 if (one_more) {
717 qtd_prev = qtd;
718 qtd = ehci_qtd_alloc (ehci, flags);
719 if (unlikely (!qtd))
720 goto cleanup;
721 qtd->urb = urb;
722 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
723 list_add_tail (&qtd->qtd_list, head);
725 /* never any data in such packets */
726 qtd_fill(ehci, qtd, 0, 0, token, 0);
730 /* by default, enable interrupt on urb completion */
731 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
732 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
733 return head;
735 cleanup:
736 qtd_list_free (ehci, urb, head);
737 return NULL;
740 /*-------------------------------------------------------------------------*/
742 // Would be best to create all qh's from config descriptors,
743 // when each interface/altsetting is established. Unlink
744 // any previous qh and cancel its urbs first; endpoints are
745 // implicitly reset then (data toggle too).
746 // That'd mean updating how usbcore talks to HCDs. (2.7?)
750 * Each QH holds a qtd list; a QH is used for everything except iso.
752 * For interrupt urbs, the scheduler must set the microframe scheduling
753 * mask(s) each time the QH gets scheduled. For highspeed, that's
754 * just one microframe in the s-mask. For split interrupt transactions
755 * there are additional complications: c-mask, maybe FSTNs.
757 static struct ehci_qh *
758 qh_make (
759 struct ehci_hcd *ehci,
760 struct urb *urb,
761 gfp_t flags
763 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
764 u32 info1 = 0, info2 = 0;
765 int is_input, type;
766 int maxp = 0;
767 struct usb_tt *tt = urb->dev->tt;
768 struct ehci_qh_hw *hw;
770 if (!qh)
771 return qh;
774 * init endpoint/device data for this QH
776 info1 |= usb_pipeendpoint (urb->pipe) << 8;
777 info1 |= usb_pipedevice (urb->pipe) << 0;
779 is_input = usb_pipein (urb->pipe);
780 type = usb_pipetype (urb->pipe);
781 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
783 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
784 * acts like up to 3KB, but is built from smaller packets.
786 if (max_packet(maxp) > 1024) {
787 ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
788 goto done;
791 /* Compute interrupt scheduling parameters just once, and save.
792 * - allowing for high bandwidth, how many nsec/uframe are used?
793 * - split transactions need a second CSPLIT uframe; same question
794 * - splits also need a schedule gap (for full/low speed I/O)
795 * - qh has a polling interval
797 * For control/bulk requests, the HC or TT handles these.
799 if (type == PIPE_INTERRUPT) {
800 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
801 is_input, 0,
802 hb_mult(maxp) * max_packet(maxp)));
803 qh->start = NO_FRAME;
805 if (urb->dev->speed == USB_SPEED_HIGH) {
806 qh->c_usecs = 0;
807 qh->gap_uf = 0;
809 qh->period = urb->interval >> 3;
810 if (qh->period == 0 && urb->interval != 1) {
811 /* NOTE interval 2 or 4 uframes could work.
812 * But interval 1 scheduling is simpler, and
813 * includes high bandwidth.
815 urb->interval = 1;
816 } else if (qh->period > ehci->periodic_size) {
817 qh->period = ehci->periodic_size;
818 urb->interval = qh->period << 3;
820 } else {
821 int think_time;
823 /* gap is f(FS/LS transfer times) */
824 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
825 is_input, 0, maxp) / (125 * 1000);
827 /* FIXME this just approximates SPLIT/CSPLIT times */
828 if (is_input) { // SPLIT, gap, CSPLIT+DATA
829 qh->c_usecs = qh->usecs + HS_USECS (0);
830 qh->usecs = HS_USECS (1);
831 } else { // SPLIT+DATA, gap, CSPLIT
832 qh->usecs += HS_USECS (1);
833 qh->c_usecs = HS_USECS (0);
836 think_time = tt ? tt->think_time : 0;
837 qh->tt_usecs = NS_TO_US (think_time +
838 usb_calc_bus_time (urb->dev->speed,
839 is_input, 0, max_packet (maxp)));
840 qh->period = urb->interval;
841 if (qh->period > ehci->periodic_size) {
842 qh->period = ehci->periodic_size;
843 urb->interval = qh->period;
848 /* support for tt scheduling, and access to toggles */
849 qh->dev = urb->dev;
851 /* using TT? */
852 switch (urb->dev->speed) {
853 case USB_SPEED_LOW:
854 info1 |= QH_LOW_SPEED;
855 /* FALL THROUGH */
857 case USB_SPEED_FULL:
858 /* EPS 0 means "full" */
859 if (type != PIPE_INTERRUPT)
860 info1 |= (EHCI_TUNE_RL_TT << 28);
861 if (type == PIPE_CONTROL) {
862 info1 |= QH_CONTROL_EP; /* for TT */
863 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
865 info1 |= maxp << 16;
867 info2 |= (EHCI_TUNE_MULT_TT << 30);
869 /* Some Freescale processors have an erratum in which the
870 * port number in the queue head was 0..N-1 instead of 1..N.
872 if (ehci_has_fsl_portno_bug(ehci))
873 info2 |= (urb->dev->ttport-1) << 23;
874 else
875 info2 |= urb->dev->ttport << 23;
877 /* set the address of the TT; for TDI's integrated
878 * root hub tt, leave it zeroed.
880 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
881 info2 |= tt->hub->devnum << 16;
883 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
885 break;
887 case USB_SPEED_HIGH: /* no TT involved */
888 info1 |= QH_HIGH_SPEED;
889 if (type == PIPE_CONTROL) {
890 info1 |= (EHCI_TUNE_RL_HS << 28);
891 info1 |= 64 << 16; /* usb2 fixed maxpacket */
892 info1 |= QH_TOGGLE_CTL; /* toggle from qtd */
893 info2 |= (EHCI_TUNE_MULT_HS << 30);
894 } else if (type == PIPE_BULK) {
895 info1 |= (EHCI_TUNE_RL_HS << 28);
896 /* The USB spec says that high speed bulk endpoints
897 * always use 512 byte maxpacket. But some device
898 * vendors decided to ignore that, and MSFT is happy
899 * to help them do so. So now people expect to use
900 * such nonconformant devices with Linux too; sigh.
902 info1 |= max_packet(maxp) << 16;
903 info2 |= (EHCI_TUNE_MULT_HS << 30);
904 } else { /* PIPE_INTERRUPT */
905 info1 |= max_packet (maxp) << 16;
906 info2 |= hb_mult (maxp) << 30;
908 break;
909 default:
910 ehci_dbg(ehci, "bogus dev %p speed %d\n", urb->dev,
911 urb->dev->speed);
912 done:
913 qh_destroy(ehci, qh);
914 return NULL;
917 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
919 /* init as live, toggle clear */
920 qh->qh_state = QH_STATE_IDLE;
921 hw = qh->hw;
922 hw->hw_info1 = cpu_to_hc32(ehci, info1);
923 hw->hw_info2 = cpu_to_hc32(ehci, info2);
924 qh->is_out = !is_input;
925 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
926 return qh;
929 /*-------------------------------------------------------------------------*/
931 static void enable_async(struct ehci_hcd *ehci)
933 if (ehci->async_count++)
934 return;
936 /* Stop waiting to turn off the async schedule */
937 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_DISABLE_ASYNC);
939 /* Don't start the schedule until ASS is 0 */
940 ehci_poll_ASS(ehci);
941 turn_on_io_watchdog(ehci);
944 static void disable_async(struct ehci_hcd *ehci)
946 if (--ehci->async_count)
947 return;
949 /* The async schedule and unlink lists are supposed to be empty */
950 WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
951 !list_empty(&ehci->async_idle));
953 /* Don't turn off the schedule until ASS is 1 */
954 ehci_poll_ASS(ehci);
957 /* move qh (and its qtds) onto async queue; maybe enable queue. */
959 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
961 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
962 struct ehci_qh *head;
964 /* Don't link a QH if there's a Clear-TT-Buffer pending */
965 if (unlikely(qh->clearing_tt))
966 return;
968 WARN_ON(qh->qh_state != QH_STATE_IDLE);
970 /* clear halt and/or toggle; and maybe recover from silicon quirk */
971 qh_refresh(ehci, qh);
973 /* splice right after start */
974 head = ehci->async;
975 qh->qh_next = head->qh_next;
976 qh->hw->hw_next = head->hw->hw_next;
977 wmb ();
979 head->qh_next.qh = qh;
980 head->hw->hw_next = dma;
982 qh->qh_state = QH_STATE_LINKED;
983 qh->xacterrs = 0;
984 qh->exception = 0;
985 /* qtd completions reported later by interrupt */
987 enable_async(ehci);
990 /*-------------------------------------------------------------------------*/
993 * For control/bulk/interrupt, return QH with these TDs appended.
994 * Allocates and initializes the QH if necessary.
995 * Returns null if it can't allocate a QH it needs to.
996 * If the QH has TDs (urbs) already, that's great.
998 static struct ehci_qh *qh_append_tds (
999 struct ehci_hcd *ehci,
1000 struct urb *urb,
1001 struct list_head *qtd_list,
1002 int epnum,
1003 void **ptr
1006 struct ehci_qh *qh = NULL;
1007 __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
1009 qh = (struct ehci_qh *) *ptr;
1010 if (unlikely (qh == NULL)) {
1011 /* can't sleep here, we have ehci->lock... */
1012 qh = qh_make (ehci, urb, GFP_ATOMIC);
1013 *ptr = qh;
1015 if (likely (qh != NULL)) {
1016 struct ehci_qtd *qtd;
1018 if (unlikely (list_empty (qtd_list)))
1019 qtd = NULL;
1020 else
1021 qtd = list_entry (qtd_list->next, struct ehci_qtd,
1022 qtd_list);
1024 /* control qh may need patching ... */
1025 if (unlikely (epnum == 0)) {
1027 /* usb_reset_device() briefly reverts to address 0 */
1028 if (usb_pipedevice (urb->pipe) == 0)
1029 qh->hw->hw_info1 &= ~qh_addr_mask;
1032 /* just one way to queue requests: swap with the dummy qtd.
1033 * only hc or qh_refresh() ever modify the overlay.
1035 if (likely (qtd != NULL)) {
1036 struct ehci_qtd *dummy;
1037 dma_addr_t dma;
1038 __hc32 token;
1040 /* to avoid racing the HC, use the dummy td instead of
1041 * the first td of our list (becomes new dummy). both
1042 * tds stay deactivated until we're done, when the
1043 * HC is allowed to fetch the old dummy (4.10.2).
1045 token = qtd->hw_token;
1046 qtd->hw_token = HALT_BIT(ehci);
1048 dummy = qh->dummy;
1050 dma = dummy->qtd_dma;
1051 *dummy = *qtd;
1052 dummy->qtd_dma = dma;
1054 list_del (&qtd->qtd_list);
1055 list_add (&dummy->qtd_list, qtd_list);
1056 list_splice_tail(qtd_list, &qh->qtd_list);
1058 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
1059 qh->dummy = qtd;
1061 /* hc must see the new dummy at list end */
1062 dma = qtd->qtd_dma;
1063 qtd = list_entry (qh->qtd_list.prev,
1064 struct ehci_qtd, qtd_list);
1065 qtd->hw_next = QTD_NEXT(ehci, dma);
1067 /* let the hc process these next qtds */
1068 wmb ();
1069 dummy->hw_token = token;
1071 urb->hcpriv = qh;
1074 return qh;
1077 /*-------------------------------------------------------------------------*/
1079 static int
1080 submit_async (
1081 struct ehci_hcd *ehci,
1082 struct urb *urb,
1083 struct list_head *qtd_list,
1084 gfp_t mem_flags
1086 int epnum;
1087 unsigned long flags;
1088 struct ehci_qh *qh = NULL;
1089 int rc;
1091 epnum = urb->ep->desc.bEndpointAddress;
1093 #ifdef EHCI_URB_TRACE
1095 struct ehci_qtd *qtd;
1096 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1097 ehci_dbg(ehci,
1098 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1099 __func__, urb->dev->devpath, urb,
1100 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1101 urb->transfer_buffer_length,
1102 qtd, urb->ep->hcpriv);
1104 #endif
1106 spin_lock_irqsave (&ehci->lock, flags);
1107 if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
1108 rc = -ESHUTDOWN;
1109 goto done;
1111 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1112 if (unlikely(rc))
1113 goto done;
1115 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
1116 if (unlikely(qh == NULL)) {
1117 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1118 rc = -ENOMEM;
1119 goto done;
1122 /* Control/bulk operations through TTs don't need scheduling,
1123 * the HC and TT handle it when the TT has a buffer ready.
1125 if (likely (qh->qh_state == QH_STATE_IDLE))
1126 qh_link_async(ehci, qh);
1127 done:
1128 spin_unlock_irqrestore (&ehci->lock, flags);
1129 if (unlikely (qh == NULL))
1130 qtd_list_free (ehci, urb, qtd_list);
1131 return rc;
1134 /*-------------------------------------------------------------------------*/
1135 #ifdef CONFIG_USB_HCD_TEST_MODE
1137 * This function creates the qtds and submits them for the
1138 * SINGLE_STEP_SET_FEATURE Test.
1139 * This is done in two parts: first SETUP req for GetDesc is sent then
1140 * 15 seconds later, the IN stage for GetDesc starts to req data from dev
1142 * is_setup : i/p arguement decides which of the two stage needs to be
1143 * performed; TRUE - SETUP and FALSE - IN+STATUS
1144 * Returns 0 if success
1146 static int submit_single_step_set_feature(
1147 struct usb_hcd *hcd,
1148 struct urb *urb,
1149 int is_setup
1151 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
1152 struct list_head qtd_list;
1153 struct list_head *head;
1155 struct ehci_qtd *qtd, *qtd_prev;
1156 dma_addr_t buf;
1157 int len, maxpacket;
1158 u32 token;
1160 INIT_LIST_HEAD(&qtd_list);
1161 head = &qtd_list;
1163 /* URBs map to sequences of QTDs: one logical transaction */
1164 qtd = ehci_qtd_alloc(ehci, GFP_KERNEL);
1165 if (unlikely(!qtd))
1166 return -1;
1167 list_add_tail(&qtd->qtd_list, head);
1168 qtd->urb = urb;
1170 token = QTD_STS_ACTIVE;
1171 token |= (EHCI_TUNE_CERR << 10);
1173 len = urb->transfer_buffer_length;
1175 * Check if the request is to perform just the SETUP stage (getDesc)
1176 * as in SINGLE_STEP_SET_FEATURE test, DATA stage (IN) happens
1177 * 15 secs after the setup
1179 if (is_setup) {
1180 /* SETUP pid */
1181 qtd_fill(ehci, qtd, urb->setup_dma,
1182 sizeof(struct usb_ctrlrequest),
1183 token | (2 /* "setup" */ << 8), 8);
1185 submit_async(ehci, urb, &qtd_list, GFP_ATOMIC);
1186 return 0; /*Return now; we shall come back after 15 seconds*/
1190 * IN: data transfer stage: buffer setup : start the IN txn phase for
1191 * the get_Desc SETUP which was sent 15seconds back
1193 token ^= QTD_TOGGLE; /*We need to start IN with DATA-1 Pid-sequence*/
1194 buf = urb->transfer_dma;
1196 token |= (1 /* "in" */ << 8); /*This is IN stage*/
1198 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, 0));
1200 qtd_fill(ehci, qtd, buf, len, token, maxpacket);
1203 * Our IN phase shall always be a short read; so keep the queue running
1204 * and let it advance to the next qtd which zero length OUT status
1206 qtd->hw_alt_next = EHCI_LIST_END(ehci);
1208 /* STATUS stage for GetDesc control request */
1209 token ^= 0x0100; /* "in" <--> "out" */
1210 token |= QTD_TOGGLE; /* force DATA1 */
1212 qtd_prev = qtd;
1213 qtd = ehci_qtd_alloc(ehci, GFP_ATOMIC);
1214 if (unlikely(!qtd))
1215 goto cleanup;
1216 qtd->urb = urb;
1217 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
1218 list_add_tail(&qtd->qtd_list, head);
1220 /* dont fill any data in such packets */
1221 qtd_fill(ehci, qtd, 0, 0, token, 0);
1223 /* by default, enable interrupt on urb completion */
1224 if (likely(!(urb->transfer_flags & URB_NO_INTERRUPT)))
1225 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
1227 submit_async(ehci, urb, &qtd_list, GFP_KERNEL);
1229 return 0;
1231 cleanup:
1232 qtd_list_free(ehci, urb, head);
1233 return -1;
1235 #endif /* CONFIG_USB_HCD_TEST_MODE */
1237 /*-------------------------------------------------------------------------*/
1239 static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1241 struct ehci_qh *prev;
1243 /* Add to the end of the list of QHs waiting for the next IAAD */
1244 qh->qh_state = QH_STATE_UNLINK_WAIT;
1245 list_add_tail(&qh->unlink_node, &ehci->async_unlink);
1247 /* Unlink it from the schedule */
1248 prev = ehci->async;
1249 while (prev->qh_next.qh != qh)
1250 prev = prev->qh_next.qh;
1252 prev->hw->hw_next = qh->hw->hw_next;
1253 prev->qh_next = qh->qh_next;
1254 if (ehci->qh_scan_next == qh)
1255 ehci->qh_scan_next = qh->qh_next.qh;
1258 static void start_iaa_cycle(struct ehci_hcd *ehci)
1260 /* Do nothing if an IAA cycle is already running */
1261 if (ehci->iaa_in_progress)
1262 return;
1263 ehci->iaa_in_progress = true;
1265 /* If the controller isn't running, we don't have to wait for it */
1266 if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
1267 end_unlink_async(ehci);
1269 /* Otherwise start a new IAA cycle */
1270 } else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
1272 /* Make sure the unlinks are all visible to the hardware */
1273 wmb();
1275 ehci_writel(ehci, ehci->command | CMD_IAAD,
1276 &ehci->regs->command);
1277 ehci_readl(ehci, &ehci->regs->command);
1278 ehci_enable_event(ehci, EHCI_HRTIMER_IAA_WATCHDOG, true);
1282 /* the async qh for the qtds being unlinked are now gone from the HC */
1284 static void end_unlink_async(struct ehci_hcd *ehci)
1286 struct ehci_qh *qh;
1287 bool early_exit;
1289 if (ehci->has_synopsys_hc_bug)
1290 ehci_writel(ehci, (u32) ehci->async->qh_dma,
1291 &ehci->regs->async_next);
1293 /* The current IAA cycle has ended */
1294 ehci->iaa_in_progress = false;
1296 if (list_empty(&ehci->async_unlink))
1297 return;
1298 qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
1299 unlink_node); /* QH whose IAA cycle just ended */
1302 * If async_unlinking is set then this routine is already running,
1303 * either on the stack or on another CPU.
1305 early_exit = ehci->async_unlinking;
1307 /* If the controller isn't running, process all the waiting QHs */
1308 if (ehci->rh_state < EHCI_RH_RUNNING)
1309 list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
1312 * Intel (?) bug: The HC can write back the overlay region even
1313 * after the IAA interrupt occurs. In self-defense, always go
1314 * through two IAA cycles for each QH.
1316 else if (qh->qh_state == QH_STATE_UNLINK_WAIT) {
1317 qh->qh_state = QH_STATE_UNLINK;
1318 early_exit = true;
1321 /* Otherwise process only the first waiting QH (NVIDIA bug?) */
1322 else
1323 list_move_tail(&qh->unlink_node, &ehci->async_idle);
1325 /* Start a new IAA cycle if any QHs are waiting for it */
1326 if (!list_empty(&ehci->async_unlink))
1327 start_iaa_cycle(ehci);
1330 * Don't allow nesting or concurrent calls,
1331 * or wait for the second IAA cycle for the next QH.
1333 if (early_exit)
1334 return;
1336 /* Process the idle QHs */
1337 ehci->async_unlinking = true;
1338 while (!list_empty(&ehci->async_idle)) {
1339 qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
1340 unlink_node);
1341 list_del(&qh->unlink_node);
1343 qh->qh_state = QH_STATE_IDLE;
1344 qh->qh_next.qh = NULL;
1346 if (!list_empty(&qh->qtd_list))
1347 qh_completions(ehci, qh);
1348 if (!list_empty(&qh->qtd_list) &&
1349 ehci->rh_state == EHCI_RH_RUNNING)
1350 qh_link_async(ehci, qh);
1351 disable_async(ehci);
1353 ehci->async_unlinking = false;
1356 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
1358 static void unlink_empty_async(struct ehci_hcd *ehci)
1360 struct ehci_qh *qh;
1361 struct ehci_qh *qh_to_unlink = NULL;
1362 int count = 0;
1364 /* Find the last async QH which has been empty for a timer cycle */
1365 for (qh = ehci->async->qh_next.qh; qh; qh = qh->qh_next.qh) {
1366 if (list_empty(&qh->qtd_list) &&
1367 qh->qh_state == QH_STATE_LINKED) {
1368 ++count;
1369 if (qh->unlink_cycle != ehci->async_unlink_cycle)
1370 qh_to_unlink = qh;
1374 /* If nothing else is being unlinked, unlink the last empty QH */
1375 if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
1376 start_unlink_async(ehci, qh_to_unlink);
1377 --count;
1380 /* Other QHs will be handled later */
1381 if (count > 0) {
1382 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1383 ++ehci->async_unlink_cycle;
1387 /* The root hub is suspended; unlink all the async QHs */
1388 static void __maybe_unused unlink_empty_async_suspended(struct ehci_hcd *ehci)
1390 struct ehci_qh *qh;
1392 while (ehci->async->qh_next.qh) {
1393 qh = ehci->async->qh_next.qh;
1394 WARN_ON(!list_empty(&qh->qtd_list));
1395 single_unlink_async(ehci, qh);
1397 start_iaa_cycle(ehci);
1400 /* makes sure the async qh will become idle */
1401 /* caller must own ehci->lock */
1403 static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
1405 /* If the QH isn't linked then there's nothing we can do. */
1406 if (qh->qh_state != QH_STATE_LINKED)
1407 return;
1409 single_unlink_async(ehci, qh);
1410 start_iaa_cycle(ehci);
1413 /*-------------------------------------------------------------------------*/
1415 static void scan_async (struct ehci_hcd *ehci)
1417 struct ehci_qh *qh;
1418 bool check_unlinks_later = false;
1420 ehci->qh_scan_next = ehci->async->qh_next.qh;
1421 while (ehci->qh_scan_next) {
1422 qh = ehci->qh_scan_next;
1423 ehci->qh_scan_next = qh->qh_next.qh;
1425 /* clean any finished work for this qh */
1426 if (!list_empty(&qh->qtd_list)) {
1427 int temp;
1430 * Unlinks could happen here; completion reporting
1431 * drops the lock. That's why ehci->qh_scan_next
1432 * always holds the next qh to scan; if the next qh
1433 * gets unlinked then ehci->qh_scan_next is adjusted
1434 * in single_unlink_async().
1436 temp = qh_completions(ehci, qh);
1437 if (unlikely(temp)) {
1438 start_unlink_async(ehci, qh);
1439 } else if (list_empty(&qh->qtd_list)
1440 && qh->qh_state == QH_STATE_LINKED) {
1441 qh->unlink_cycle = ehci->async_unlink_cycle;
1442 check_unlinks_later = true;
1448 * Unlink empty entries, reducing DMA usage as well
1449 * as HCD schedule-scanning costs. Delay for any qh
1450 * we just scanned, there's a not-unusual case that it
1451 * doesn't stay idle for long.
1453 if (check_unlinks_later && ehci->rh_state == EHCI_RH_RUNNING &&
1454 !(ehci->enabled_hrtimer_events &
1455 BIT(EHCI_HRTIMER_ASYNC_UNLINKS))) {
1456 ehci_enable_event(ehci, EHCI_HRTIMER_ASYNC_UNLINKS, true);
1457 ++ehci->async_unlink_cycle;