Documentation/devicetree/bindings/serial/renesas,hscif.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF)
   8
   9 maintainers:
  10   - Geert Uytterhoeven <geert+renesas@glider.be>
  11
  12 allOf:
  13   - $ref: serial.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - enum:
  20               - renesas,hscif-r8a7778      # R-Car M1
  21               - renesas,hscif-r8a7779      # R-Car H1
  22           - const: renesas,rcar-gen1-hscif # R-Car Gen1
  23           - const: renesas,hscif           # generic HSCIF compatible UART
  24
  25       - items:
  26           - enum:
  27               - renesas,hscif-r8a7743      # RZ/G1M
  28               - renesas,hscif-r8a7744      # RZ/G1N
  29               - renesas,hscif-r8a7745      # RZ/G1E
  30               - renesas,hscif-r8a77470     # RZ/G1C
  31               - renesas,hscif-r8a7790      # R-Car H2
  32               - renesas,hscif-r8a7791      # R-Car M2-W
  33               - renesas,hscif-r8a7792      # R-Car V2H
  34               - renesas,hscif-r8a7793      # R-Car M2-N
  35               - renesas,hscif-r8a7794      # R-Car E2
  36           - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1
  37           - const: renesas,hscif           # generic HSCIF compatible UART
  38
  39       - items:
  40           - enum:
  41               - renesas,hscif-r8a774a1     # RZ/G2M
  42               - renesas,hscif-r8a774b1     # RZ/G2N
  43               - renesas,hscif-r8a774c0     # RZ/G2E
  44               - renesas,hscif-r8a7795      # R-Car H3
  45               - renesas,hscif-r8a7796      # R-Car M3-W
  46               - renesas,hscif-r8a77961     # R-Car M3-W+
  47               - renesas,hscif-r8a77965     # R-Car M3-N
  48               - renesas,hscif-r8a77970     # R-Car V3M
  49               - renesas,hscif-r8a77980     # R-Car V3H
  50               - renesas,hscif-r8a77990     # R-Car E3
  51               - renesas,hscif-r8a77995     # R-Car D3
  52           - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
  53           - const: renesas,hscif           # generic HSCIF compatible UART
  54
  55   reg:
  56     maxItems: 1
  57
  58   interrupts:
  59     maxItems: 1
  60
  61   clocks:
  62     minItems: 1
  63     maxItems: 4
  64
  65   clock-names:
  66     minItems: 1
  67     maxItems: 4
  68     items:
  69       enum:
  70         - fck # UART functional clock
  71         - hsck # optional external clock input
  72         - brg_int # optional internal clock source for BRG frequency divider
  73         - scif_clk # optional external clock source for BRG frequency divider
  74
  75   power-domains:
  76     maxItems: 1
  77
  78   resets:
  79     maxItems: 1
  80
  81   dmas:
  82     description:
  83       Must contain a list of pairs of references to DMA specifiers, one for
  84       transmission, and one for reception.
  85
  86   dma-names:
  87     minItems: 2
  88     maxItems: 4
  89     items:
  90       enum:
  91         - tx
  92         - rx
  93
  94 required:
  95   - compatible
  96   - reg
  97   - interrupts
  98   - clocks
  99   - clock-names
 100   - power-domains
 101
 102 if:
 103   properties:
 104     compatible:
 105       contains:
 106         enum:
 107           - renesas,rcar-gen2-hscif
 108           - renesas,rcar-gen3-hscif
 109 then:
 110   required:
 111     - resets
 112
 113 examples:
 114   - |
 115     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 116     #include <dt-bindings/interrupt-controller/arm-gic.h>
 117     #include <dt-bindings/power/r8a7795-sysc.h>
 118     aliases {
 119             serial1 = &hscif1;
 120     };
 121
 122     hscif1: serial@e6550000 {
 123             compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",
 124                          "renesas,hscif";
 125             reg = <0xe6550000 96>;
 126             interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 127             clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 128                      <&scif_clk>;
 129             clock-names = "fck", "brg_int", "scif_clk";
 130             dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>;
 131             dma-names = "tx", "rx", "tx", "rx";
 132             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 133             resets = <&cpg 519>;
 134             uart-has-rtscts;
 135     };