| blob | 56afcf41aae0d6bb8373ae9ed419c65294460897 |
1 /*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
12 /include/ "skeleton.dtsi"
14 / {
15 interrupt-parent = <&icoll>;
17 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 serial0 = &auart0;
22 serial1 = &auart1;
23 };
25 cpus {
26 cpu@0 {
27 compatible = "arm,arm926ejs";
28 };
29 };
31 apb@80000000 {
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x80000000 0x80000>;
36 ranges;
38 apbh@80000000 {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 reg = <0x80000000 0x40000>;
43 ranges;
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx23-icoll", "fsl,icoll";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
50 };
52 dma-apbh@80004000 {
53 compatible = "fsl,imx23-dma-apbh";
54 reg = <0x80004000 0x2000>;
55 clocks = <&clks 15>;
56 };
58 ecc@80008000 {
59 reg = <0x80008000 0x2000>;
60 status = "disabled";
61 };
63 gpmi-nand@8000c000 {
64 compatible = "fsl,imx23-gpmi-nand";
65 #address-cells = <1>;
66 #size-cells = <1>;
67 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
68 reg-names = "gpmi-nand", "bch";
69 interrupts = <13>, <56>;
70 interrupt-names = "gpmi-dma", "bch";
71 clocks = <&clks 34>;
72 clock-names = "gpmi_io";
73 fsl,gpmi-dma-channel = <4>;
74 status = "disabled";
75 };
77 ssp0: ssp@80010000 {
78 reg = <0x80010000 0x2000>;
79 interrupts = <15 14>;
80 clocks = <&clks 33>;
81 fsl,ssp-dma-channel = <1>;
82 status = "disabled";
83 };
85 etm@80014000 {
86 reg = <0x80014000 0x2000>;
87 status = "disabled";
88 };
90 pinctrl@80018000 {
91 #address-cells = <1>;
92 #size-cells = <0>;
93 compatible = "fsl,imx23-pinctrl", "simple-bus";
94 reg = <0x80018000 0x2000>;
96 gpio0: gpio@0 {
97 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
98 interrupts = <16>;
99 gpio-controller;
100 #gpio-cells = <2>;
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
105 gpio1: gpio@1 {
106 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
107 interrupts = <17>;
108 gpio-controller;
109 #gpio-cells = <2>;
110 interrupt-controller;
111 #interrupt-cells = <2>;
112 };
114 gpio2: gpio@2 {
115 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
116 interrupts = <18>;
117 gpio-controller;
118 #gpio-cells = <2>;
119 interrupt-controller;
120 #interrupt-cells = <2>;
121 };
123 duart_pins_a: duart@0 {
124 reg = <0>;
125 fsl,pinmux-ids = <
126 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
127 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
128 >;
129 fsl,drive-strength = <0>;
130 fsl,voltage = <1>;
131 fsl,pull-up = <0>;
132 };
134 auart0_pins_a: auart0@0 {
135 reg = <0>;
136 fsl,pinmux-ids = <
137 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
138 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
139 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
140 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
141 >;
142 fsl,drive-strength = <0>;
143 fsl,voltage = <1>;
144 fsl,pull-up = <0>;
145 };
147 auart0_2pins_a: auart0-2pins@0 {
148 reg = <0>;
149 fsl,pinmux-ids = <
150 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
151 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
152 >;
153 fsl,drive-strength = <0>;
154 fsl,voltage = <1>;
155 fsl,pull-up = <0>;
156 };
158 gpmi_pins_a: gpmi-nand@0 {
159 reg = <0>;
160 fsl,pinmux-ids = <
161 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
162 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
163 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
164 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
165 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
166 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
167 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
168 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
169 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
170 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
171 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
172 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
173 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
174 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
175 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
176 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
177 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
178 >;
179 fsl,drive-strength = <0>;
180 fsl,voltage = <1>;
181 fsl,pull-up = <0>;
182 };
184 gpmi_pins_fixup: gpmi-pins-fixup {
185 fsl,pinmux-ids = <
186 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
187 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
188 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
189 >;
190 fsl,drive-strength = <2>;
191 };
193 mmc0_4bit_pins_a: mmc0-4bit@0 {
194 reg = <0>;
195 fsl,pinmux-ids = <
196 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
197 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
198 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
199 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
200 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
201 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
202 >;
203 fsl,drive-strength = <1>;
204 fsl,voltage = <1>;
205 fsl,pull-up = <1>;
206 };
208 mmc0_8bit_pins_a: mmc0-8bit@0 {
209 reg = <0>;
210 fsl,pinmux-ids = <
211 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
212 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
213 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
214 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
215 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
216 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
217 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
218 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
219 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
220 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
221 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
222 >;
223 fsl,drive-strength = <1>;
224 fsl,voltage = <1>;
225 fsl,pull-up = <1>;
226 };
228 mmc0_pins_fixup: mmc0-pins-fixup {
229 fsl,pinmux-ids = <
230 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
231 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
232 >;
233 fsl,pull-up = <0>;
234 };
236 pwm2_pins_a: pwm2@0 {
237 reg = <0>;
238 fsl,pinmux-ids = <
239 0x11c0 /* MX23_PAD_PWM2__PWM2 */
240 >;
241 fsl,drive-strength = <0>;
242 fsl,voltage = <1>;
243 fsl,pull-up = <0>;
244 };
246 lcdif_24bit_pins_a: lcdif-24bit@0 {
247 reg = <0>;
248 fsl,pinmux-ids = <
249 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
250 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
251 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
252 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
253 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
254 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
255 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
256 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
257 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
258 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
259 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
260 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
261 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
262 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
263 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
264 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
265 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
266 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
267 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
268 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
269 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
270 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
271 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
272 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
273 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
274 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
275 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
276 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
277 >;
278 fsl,drive-strength = <0>;
279 fsl,voltage = <1>;
280 fsl,pull-up = <0>;
281 };
283 spi2_pins_a: spi2@0 {
284 reg = <0>;
285 fsl,pinmux-ids = <
286 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
287 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
288 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
289 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
290 >;
291 fsl,drive-strength = <1>;
292 fsl,voltage = <1>;
293 fsl,pull-up = <1>;
294 };
295 };
297 digctl@8001c000 {
298 reg = <0x8001c000 2000>;
299 status = "disabled";
300 };
302 emi@80020000 {
303 reg = <0x80020000 0x2000>;
304 status = "disabled";
305 };
307 dma-apbx@80024000 {
308 compatible = "fsl,imx23-dma-apbx";
309 reg = <0x80024000 0x2000>;
310 clocks = <&clks 16>;
311 };
313 dcp@80028000 {
314 reg = <0x80028000 0x2000>;
315 status = "disabled";
316 };
318 pxp@8002a000 {
319 reg = <0x8002a000 0x2000>;
320 status = "disabled";
321 };
323 ocotp@8002c000 {
324 reg = <0x8002c000 0x2000>;
325 status = "disabled";
326 };
328 axi-ahb@8002e000 {
329 reg = <0x8002e000 0x2000>;
330 status = "disabled";
331 };
333 lcdif@80030000 {
334 compatible = "fsl,imx23-lcdif";
335 reg = <0x80030000 2000>;
336 interrupts = <46 45>;
337 clocks = <&clks 38>;
338 status = "disabled";
339 };
341 ssp1: ssp@80034000 {
342 reg = <0x80034000 0x2000>;
343 interrupts = <2 20>;
344 clocks = <&clks 33>;
345 fsl,ssp-dma-channel = <2>;
346 status = "disabled";
347 };
349 tvenc@80038000 {
350 reg = <0x80038000 0x2000>;
351 status = "disabled";
352 };
353 };
355 apbx@80040000 {
356 compatible = "simple-bus";
357 #address-cells = <1>;
358 #size-cells = <1>;
359 reg = <0x80040000 0x40000>;
360 ranges;
362 clks: clkctrl@80040000 {
363 compatible = "fsl,imx23-clkctrl";
364 reg = <0x80040000 0x2000>;
365 #clock-cells = <1>;
366 };
368 saif0: saif@80042000 {
369 reg = <0x80042000 0x2000>;
370 status = "disabled";
371 };
373 power@80044000 {
374 reg = <0x80044000 0x2000>;
375 status = "disabled";
376 };
378 saif1: saif@80046000 {
379 reg = <0x80046000 0x2000>;
380 status = "disabled";
381 };
383 audio-out@80048000 {
384 reg = <0x80048000 0x2000>;
385 status = "disabled";
386 };
388 audio-in@8004c000 {
389 reg = <0x8004c000 0x2000>;
390 status = "disabled";
391 };
393 lradc@80050000 {
394 compatible = "fsl,imx23-lradc";
395 reg = <0x80050000 0x2000>;
396 interrupts = <36 37 38 39 40 41 42 43 44>;
397 status = "disabled";
398 };
400 spdif@80054000 {
401 reg = <0x80054000 2000>;
402 status = "disabled";
403 };
405 i2c@80058000 {
406 reg = <0x80058000 0x2000>;
407 status = "disabled";
408 };
410 rtc@8005c000 {
411 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
412 reg = <0x8005c000 0x2000>;
413 interrupts = <22>;
414 };
416 pwm: pwm@80064000 {
417 compatible = "fsl,imx23-pwm";
418 reg = <0x80064000 0x2000>;
419 clocks = <&clks 30>;
420 #pwm-cells = <2>;
421 fsl,pwm-number = <5>;
422 status = "disabled";
423 };
425 timrot@80068000 {
426 compatible = "fsl,imx23-timrot", "fsl,timrot";
427 reg = <0x80068000 0x2000>;
428 interrupts = <28 29 30 31>;
429 };
431 auart0: serial@8006c000 {
432 compatible = "fsl,imx23-auart";
433 reg = <0x8006c000 0x2000>;
434 interrupts = <24 25 23>;
435 clocks = <&clks 32>;
436 status = "disabled";
437 };
439 auart1: serial@8006e000 {
440 compatible = "fsl,imx23-auart";
441 reg = <0x8006e000 0x2000>;
442 interrupts = <59 60 58>;
443 clocks = <&clks 32>;
444 status = "disabled";
445 };
447 duart: serial@80070000 {
448 compatible = "arm,pl011", "arm,primecell";
449 reg = <0x80070000 0x2000>;
450 interrupts = <0>;
451 clocks = <&clks 32>, <&clks 16>;
452 clock-names = "uart", "apb_pclk";
453 status = "disabled";
454 };
456 usbphy0: usbphy@8007c000 {
457 compatible = "fsl,imx23-usbphy";
458 reg = <0x8007c000 0x2000>;
459 clocks = <&clks 41>;
460 status = "disabled";
461 };
462 };
463 };
465 ahb@80080000 {
466 compatible = "simple-bus";
467 #address-cells = <1>;
468 #size-cells = <1>;
469 reg = <0x80080000 0x80000>;
470 ranges;
472 usb0: usb@80080000 {
473 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
474 reg = <0x80080000 0x40000>;
475 interrupts = <11>;
476 fsl,usbphy = <&usbphy0>;
477 clocks = <&clks 40>;
478 status = "disabled";
479 };
480 };
481 };