drm/msm/hdmi: Enable HPD after HDMI IRQ is set up
[linux/fpc-iii.git] / drivers / gpu / drm / sun4i / sun8i_ui_scaler.h
blob86295be8be785b411019bba2aba0ece42131c07c
1 /*
2 * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
9 #ifndef _SUN8I_UI_SCALER_H_
10 #define _SUN8I_UI_SCALER_H_
12 #include "sun8i_mixer.h"
14 /* this two macros assumes 16 fractional bits which is standard in DRM */
15 #define SUN8I_UI_SCALER_SCALE_MIN 1
16 #define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1)
18 #define SUN8I_UI_SCALER_SCALE_FRAC 20
19 #define SUN8I_UI_SCALER_PHASE_FRAC 20
20 #define SUN8I_UI_SCALER_COEFF_COUNT 16
21 #define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
23 #define SUN8I_SCALER_GSU_CTRL(vi_cnt, ui_idx) \
24 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x0)
25 #define SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, ui_idx) \
26 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x40)
27 #define SUN8I_SCALER_GSU_INSIZE(vi_cnt, ui_idx) \
28 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x80)
29 #define SUN8I_SCALER_GSU_HSTEP(vi_cnt, ui_idx) \
30 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x88)
31 #define SUN8I_SCALER_GSU_VSTEP(vi_cnt, ui_idx) \
32 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x8c)
33 #define SUN8I_SCALER_GSU_HPHASE(vi_cnt, ui_idx) \
34 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x90)
35 #define SUN8I_SCALER_GSU_VPHASE(vi_cnt, ui_idx) \
36 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x98)
37 #define SUN8I_SCALER_GSU_HCOEFF(vi_cnt, ui_idx, index) \
38 (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x200 + \
39 0x4 * (index))
41 #define SUN8I_SCALER_GSU_CTRL_EN BIT(0)
42 #define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4)
44 void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
45 void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer,
46 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
47 u32 hscale, u32 vscale, u32 hphase, u32 vphase);
49 #endif