xen-netback: correctly schedule rate-limited queues
[linux/fpc-iii.git] / drivers / thermal / ti-soc-thermal / omap4xxx-bandgap.h
blob6f2de3a3356d4bd803cf944364f6d43de9729a69
1 /*
2 * OMAP4xxx bandgap registers, bitfields and temperature definitions
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 * Contact:
6 * Eduardo Valentin <eduardo.valentin@ti.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
23 #ifndef __OMAP4XXX_BANDGAP_H
24 #define __OMAP4XXX_BANDGAP_H
26 /**
27 * *** OMAP4430 ***
29 * Below, in sequence, are the Register definitions,
30 * the bitfields and the temperature definitions for OMAP4430.
33 /**
34 * OMAP4430 register definitions
36 * Registers are defined as offsets. The offsets are
37 * relative to FUSE_OPP_BGAP on 4430.
40 /* OMAP4430.FUSE_OPP_BGAP */
41 #define OMAP4430_FUSE_OPP_BGAP 0x0
43 /* OMAP4430.TEMP_SENSOR */
44 #define OMAP4430_TEMP_SENSOR_CTRL_OFFSET 0xCC
46 /**
47 * Register and bit definitions for OMAP4430
49 * All the macros bellow define the required bits for
50 * controlling temperature on OMAP4430. Bit defines are
51 * grouped by register.
54 /* OMAP4430.TEMP_SENSOR bits */
55 #define OMAP4430_BGAP_TEMPSOFF_MASK BIT(12)
56 #define OMAP4430_BGAP_TSHUT_MASK BIT(11)
57 #define OMAP4430_SINGLE_MODE_MASK BIT(10)
58 #define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK BIT(9)
59 #define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(8)
60 #define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0)
62 /**
63 * Temperature limits and thresholds for OMAP4430
65 * All the macros bellow are definitions for handling the
66 * ADC conversions and representation of temperature limits
67 * and thresholds for OMAP4430.
70 /* ADC conversion table limits */
71 #define OMAP4430_ADC_START_VALUE 0
72 #define OMAP4430_ADC_END_VALUE 127
73 /* bandgap clock limits (no control on 4430) */
74 #define OMAP4430_MAX_FREQ 32768
75 #define OMAP4430_MIN_FREQ 32768
76 /* sensor limits */
77 #define OMAP4430_MIN_TEMP -40000
78 #define OMAP4430_MAX_TEMP 125000
79 #define OMAP4430_HYST_VAL 5000
81 /**
82 * *** OMAP4460 *** Applicable for OMAP4470
84 * Below, in sequence, are the Register definitions,
85 * the bitfields and the temperature definitions for OMAP4460.
88 /**
89 * OMAP4460 register definitions
91 * Registers are defined as offsets. The offsets are
92 * relative to FUSE_OPP_BGAP on 4460.
95 /* OMAP4460.FUSE_OPP_BGAP */
96 #define OMAP4460_FUSE_OPP_BGAP 0x0
98 /* OMAP4460.TEMP_SENSOR */
99 #define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0xCC
101 /* OMAP4460.BANDGAP_CTRL */
102 #define OMAP4460_BGAP_CTRL_OFFSET 0x118
104 /* OMAP4460.BANDGAP_COUNTER */
105 #define OMAP4460_BGAP_COUNTER_OFFSET 0x11C
107 /* OMAP4460.BANDGAP_THRESHOLD */
108 #define OMAP4460_BGAP_THRESHOLD_OFFSET 0x120
110 /* OMAP4460.TSHUT_THRESHOLD */
111 #define OMAP4460_BGAP_TSHUT_OFFSET 0x124
113 /* OMAP4460.BANDGAP_STATUS */
114 #define OMAP4460_BGAP_STATUS_OFFSET 0x128
117 * Register bitfields for OMAP4460
119 * All the macros bellow define the required bits for
120 * controlling temperature on OMAP4460. Bit defines are
121 * grouped by register.
123 /* OMAP4460.TEMP_SENSOR bits */
124 #define OMAP4460_BGAP_TEMPSOFF_MASK BIT(13)
125 #define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK BIT(11)
126 #define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(10)
127 #define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0)
129 /* OMAP4460.BANDGAP_CTRL bits */
130 #define OMAP4460_SINGLE_MODE_MASK BIT(31)
131 #define OMAP4460_MASK_HOT_MASK BIT(1)
132 #define OMAP4460_MASK_COLD_MASK BIT(0)
134 /* OMAP4460.BANDGAP_COUNTER bits */
135 #define OMAP4460_COUNTER_MASK (0xffffff << 0)
137 /* OMAP4460.BANDGAP_THRESHOLD bits */
138 #define OMAP4460_T_HOT_MASK (0x3ff << 16)
139 #define OMAP4460_T_COLD_MASK (0x3ff << 0)
141 /* OMAP4460.TSHUT_THRESHOLD bits */
142 #define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16)
143 #define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0)
145 /* OMAP4460.BANDGAP_STATUS bits */
146 #define OMAP4460_CLEAN_STOP_MASK BIT(3)
147 #define OMAP4460_BGAP_ALERT_MASK BIT(2)
148 #define OMAP4460_HOT_FLAG_MASK BIT(1)
149 #define OMAP4460_COLD_FLAG_MASK BIT(0)
152 * Temperature limits and thresholds for OMAP4460
154 * All the macros bellow are definitions for handling the
155 * ADC conversions and representation of temperature limits
156 * and thresholds for OMAP4460.
159 /* ADC conversion table limits */
160 #define OMAP4460_ADC_START_VALUE 530
161 #define OMAP4460_ADC_END_VALUE 932
162 /* bandgap clock limits */
163 #define OMAP4460_MAX_FREQ 1500000
164 #define OMAP4460_MIN_FREQ 1000000
165 /* sensor limits */
166 #define OMAP4460_MIN_TEMP -40000
167 #define OMAP4460_MAX_TEMP 123000
168 #define OMAP4460_HYST_VAL 5000
169 /* interrupts thresholds */
170 #define OMAP4460_TSHUT_HOT 900 /* 122 deg C */
171 #define OMAP4460_TSHUT_COLD 895 /* 100 deg C */
172 #define OMAP4460_T_HOT 800 /* 73 deg C */
173 #define OMAP4460_T_COLD 795 /* 71 deg C */
175 #endif /* __OMAP4XXX_BANDGAP_H */