4 - compatible: must be one of:
8 - reg: physical base address of the controller and length of memory mapped
13 - aspeed,reset-type = "cpu|soc|system|none"
15 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
16 to generate one of three different, mutually exclusive, types of resets.
18 Type "none" can be specified to indicate that no resets are to be done.
19 This is useful in situations where another watchdog engine on chip is
22 If 'aspeed,reset-type=' is not specfied the default is to enable system
27 - cpu: Reset CPU on watchdog timeout
29 - soc: Reset 'System on Chip' on watchdog timeout
31 - system: Reset system on watchdog timeout
33 - none: No reset is performed on timeout. Assumes another watchdog
34 engine is responsible for this.
36 - aspeed,alt-boot: If property is present then boot from alternate block.
37 - aspeed,external-signal: If property is present then signal is sent to
38 external reset counter (only WDT1 and WDT2). If not
39 specified no external signal is sent.
40 - aspeed,ext-pulse-duration: External signal pulse duration in microseconds
42 Optional properties for AST2500-compatible watchdogs:
43 - aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin's
44 drive type to push-pull. The default is open-drain.
45 - aspeed,ext-active-high: If aspeed,external-signal is present and and the pin
46 is configured as push-pull, then set the pulse
47 polarity to active-high. The default is active-low.
51 wdt1: watchdog@1e785000 {
52 compatible = "aspeed,ast2400-wdt";
53 reg = <0x1e785000 0x1c>;
54 aspeed,reset-type = "system";
55 aspeed,external-signal;