arch/powerpc/platforms/83xx/km83xx.c

   1 /*
   2  * Copyright 2008-2011 DENX Software Engineering GmbH
   3  * Author: Heiko Schocher <hs@denx.de>
   4  *
   5  * Description:
   6  * Keymile 83xx platform specific routines.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/reboot.h>
  19 #include <linux/pci.h>
  20 #include <linux/kdev_t.h>
  21 #include <linux/major.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/root_dev.h>
  26 #include <linux/initrd.h>
  27 #include <linux/of_platform.h>
  28 #include <linux/of_device.h>
  29
  30 #include <linux/atomic.h>
  31 #include <linux/time.h>
  32 #include <linux/io.h>
  33 #include <asm/machdep.h>
  34 #include <asm/ipic.h>
  35 #include <asm/irq.h>
  36 #include <asm/prom.h>
  37 #include <asm/udbg.h>
  38 #include <sysdev/fsl_soc.h>
  39 #include <sysdev/fsl_pci.h>
  40 #include <asm/qe.h>
  41 #include <asm/qe_ic.h>
  42
  43 #include "mpc83xx.h"
  44
  45 #define SVR_REV(svr)    (((svr) >>  0) & 0xFFFF) /* Revision field */
  46
  47 static void quirk_mpc8360e_qe_enet10(void)
  48 {
  49         /*
  50          * handle mpc8360E Erratum QE_ENET10:
  51          * RGMII AC values do not meet the specification
  52          */
  53         uint svid = mfspr(SPRN_SVR);
  54         struct  device_node *np_par;
  55         struct  resource res;
  56         void    __iomem *base;
  57         int     ret;
  58
  59         np_par = of_find_node_by_name(NULL, "par_io");
  60         if (np_par == NULL) {
  61                 pr_warn("%s couldn;t find par_io node\n", __func__);
  62                 return;
  63         }
  64         /* Map Parallel I/O ports registers */
  65         ret = of_address_to_resource(np_par, 0, &res);
  66         if (ret) {
  67                 pr_warn("%s couldn;t map par_io registers\n", __func__);
  68                 return;
  69         }
  70
  71         base = ioremap(res.start, res.end - res.start + 1);
  72
  73         /*
  74          * set output delay adjustments to default values according
  75          * table 5 in Errata Rev. 5, 9/2011:
  76          *
  77          * write 0b01 to UCC1 bits 18:19
  78          * write 0b01 to UCC2 option 1 bits 4:5
  79          * write 0b01 to UCC2 option 2 bits 16:17
  80          */
  81         clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
  82
  83         /*
  84          * set output delay adjustments to default values according
  85          * table 3-13 in Reference Manual Rev.3 05/2010:
  86          *
  87          * write 0b01 to UCC2 option 2 bits 16:17
  88          * write 0b0101 to UCC1 bits 20:23
  89          * write 0b0101 to UCC2 option 1 bits 24:27
  90          */
  91         clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
  92
  93         if (SVR_REV(svid) == 0x0021) {
  94                 /*
  95                  * UCC2 option 1: write 0b1010 to bits 24:27
  96                  * at address IMMRBAR+0x14AC
  97                  */
  98                 clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
  99         } else if (SVR_REV(svid) == 0x0020) {
 100                 /*
 101                  * UCC1: write 0b11 to bits 18:19
 102                  * at address IMMRBAR+0x14A8
 103                  */
 104                 setbits32((base + 0xa8), 0x00003000);
 105
 106                 /*
 107                  * UCC2 option 1: write 0b11 to bits 4:5
 108                  * at address IMMRBAR+0x14A8
 109                  */
 110                 setbits32((base + 0xa8), 0x0c000000);
 111
 112                 /*
 113                  * UCC2 option 2: write 0b11 to bits 16:17
 114                  * at address IMMRBAR+0x14AC
 115                  */
 116                 setbits32((base + 0xac), 0x0000c000);
 117         }
 118         iounmap(base);
 119         of_node_put(np_par);
 120 }
 121
 122 /* ************************************************************************
 123  *
 124  * Setup the architecture
 125  *
 126  */
 127 static void __init mpc83xx_km_setup_arch(void)
 128 {
 129 #ifdef CONFIG_QUICC_ENGINE
 130         struct device_node *np;
 131 #endif
 132
 133         if (ppc_md.progress)
 134                 ppc_md.progress("kmpbec83xx_setup_arch()", 0);
 135
 136         mpc83xx_setup_pci();
 137
 138 #ifdef CONFIG_QUICC_ENGINE
 139         qe_reset();
 140
 141         np = of_find_node_by_name(NULL, "par_io");
 142         if (np != NULL) {
 143                 par_io_init(np);
 144                 of_node_put(np);
 145
 146                 for_each_node_by_name(np, "spi")
 147                         par_io_of_config(np);
 148
 149                 for_each_node_by_name(np, "ucc")
 150                         par_io_of_config(np);
 151
 152                 /* Only apply this quirk when par_io is available */
 153                 np = of_find_compatible_node(NULL, "network", "ucc_geth");
 154                 if (np != NULL) {
 155                         quirk_mpc8360e_qe_enet10();
 156                         of_node_put(np);
 157                 }
 158         }
 159 #endif  /* CONFIG_QUICC_ENGINE */
 160 }
 161
 162 machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
 163
 164 /* list of the supported boards */
 165 static char *board[] __initdata = {
 166         "Keymile,KMETER1",
 167         "Keymile,kmpbec8321",
 168         NULL
 169 };
 170
 171 /*
 172  * Called very early, MMU is off, device-tree isn't unflattened
 173  */
 174 static int __init mpc83xx_km_probe(void)
 175 {
 176         unsigned long node = of_get_flat_dt_root();
 177         int i = 0;
 178
 179         while (board[i]) {
 180                 if (of_flat_dt_is_compatible(node, board[i]))
 181                         break;
 182                 i++;
 183         }
 184         return (board[i] != NULL);
 185 }
 186
 187 define_machine(mpc83xx_km) {
 188         .name           = "mpc83xx-km-platform",
 189         .probe          = mpc83xx_km_probe,
 190         .setup_arch     = mpc83xx_km_setup_arch,
 191         .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
 192         .get_irq        = ipic_get_irq,
 193         .restart        = mpc83xx_restart,
 194         .time_init      = mpc83xx_time_init,
 195         .calibrate_decr = generic_calibrate_decr,
 196         .progress       = udbg_progress,
 197 };