arch/mips/boot/dts/brcm/bcm3384_viper.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm3384-viper", "brcm,bcm33843-viper";
   5
   6         memory@0 {
   7                 device_type = "memory";
   8
   9                 /* Typical ranges.  The bootloader should fill these in. */
  10                 reg = <0x06000000 0x02000000>,
  11                       <0x0e000000 0x02000000>;
  12         };
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 /* 1/2 of the CPU core clock (standard MIPS behavior) */
  19                 mips-hpt-frequency = <300000000>;
  20
  21                 cpu@0 {
  22                         compatible = "brcm,bmips4350";
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                 };
  26         };
  27
  28         cpu_intc: cpu_intc {
  29                 #address-cells = <0>;
  30                 compatible = "mti,cpu-interrupt-controller";
  31
  32                 interrupt-controller;
  33                 #interrupt-cells = <1>;
  34         };
  35
  36         clocks {
  37                 periph_clk: periph_clk {
  38                         compatible = "fixed-clock";
  39                         #clock-cells = <0>;
  40                         clock-frequency = <54000000>;
  41                 };
  42         };
  43
  44         aliases {
  45                 uart0 = &uart0;
  46         };
  47
  48         ubus {
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51
  52                 compatible = "brcm,ubus", "simple-bus";
  53                 ranges;
  54                 /* No dma-ranges on Viper. */
  55
  56                 periph_intc: periph_intc@14e00048 {
  57                         compatible = "brcm,bcm3380-l2-intc";
  58                         reg = <0x14e00048 0x4 0x14e0004c 0x4>,
  59                               <0x14e00350 0x4 0x14e00354 0x4>;
  60
  61                         interrupt-controller;
  62                         #interrupt-cells = <1>;
  63
  64                         interrupt-parent = <&cpu_intc>;
  65                         interrupts = <4>;
  66                 };
  67
  68                 cmips_intc: cmips_intc@151f8048 {
  69                         compatible = "brcm,bcm3380-l2-intc";
  70                         reg = <0x151f8048 0x4 0x151f804c 0x4>;
  71
  72                         interrupt-controller;
  73                         #interrupt-cells = <1>;
  74
  75                         interrupt-parent = <&periph_intc>;
  76                         interrupts = <30>;
  77                         brcm,int-map-mask = <0xffffffff>;
  78                 };
  79
  80                 uart0: serial@14e00520 {
  81                         compatible = "brcm,bcm6345-uart";
  82                         reg = <0x14e00520 0x18>;
  83                         interrupt-parent = <&periph_intc>;
  84                         interrupts = <2>;
  85                         clocks = <&periph_clk>;
  86                         status = "disabled";
  87                 };
  88
  89                 ehci0: usb@15400300 {
  90                         compatible = "brcm,bcm3384-ehci", "generic-ehci";
  91                         reg = <0x15400300 0x100>;
  92                         big-endian;
  93                         interrupt-parent = <&periph_intc>;
  94                         interrupts = <41>;
  95                         status = "disabled";
  96                 };
  97
  98                 ohci0: usb@15400400 {
  99                         compatible = "brcm,bcm3384-ohci", "generic-ohci";
 100                         reg = <0x15400400 0x100>;
 101                         big-endian;
 102                         no-big-frame-no;
 103                         interrupt-parent = <&periph_intc>;
 104                         interrupts = <40>;
 105                         status = "disabled";
 106                 };
 107         };
 108 };