2 * TQM 8560 Device Tree Source
4 * Copyright 2008 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 model = "tqc,tqm8560";
17 compatible = "tqc,tqm8560";
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
49 device_type = "memory";
50 reg = <0x00000000 0x10000000>;
57 ranges = <0x0 0xe0000000 0x100000>;
59 compatible = "fsl,mpc8560-immr", "simple-bus";
62 compatible = "fsl,ecm-law";
68 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
69 reg = <0x1000 0x1000>;
71 interrupt-parent = <&mpic>;
74 memory-controller@2000 {
75 compatible = "fsl,mpc8540-memory-controller";
76 reg = <0x2000 0x1000>;
77 interrupt-parent = <&mpic>;
81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8540-l2-cache-controller";
83 reg = <0x20000 0x1000>;
84 cache-line-size = <32>;
85 cache-size = <0x40000>; // L2, 256K
86 interrupt-parent = <&mpic>;
94 compatible = "fsl-i2c";
97 interrupt-parent = <&mpic>;
101 compatible = "national,lm75";
106 compatible = "dallas,ds1337";
112 #address-cells = <1>;
114 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
116 ranges = <0x0 0x21100 0x200>;
119 compatible = "fsl,mpc8560-dma-channel",
120 "fsl,eloplus-dma-channel";
123 interrupt-parent = <&mpic>;
127 compatible = "fsl,mpc8560-dma-channel",
128 "fsl,eloplus-dma-channel";
131 interrupt-parent = <&mpic>;
135 compatible = "fsl,mpc8560-dma-channel",
136 "fsl,eloplus-dma-channel";
139 interrupt-parent = <&mpic>;
143 compatible = "fsl,mpc8560-dma-channel",
144 "fsl,eloplus-dma-channel";
147 interrupt-parent = <&mpic>;
152 enet0: ethernet@24000 {
153 #address-cells = <1>;
156 device_type = "network";
158 compatible = "gianfar";
159 reg = <0x24000 0x1000>;
160 ranges = <0x0 0x24000 0x1000>;
161 local-mac-address = [ 00 00 00 00 00 00 ];
162 interrupts = <29 2 30 2 34 2>;
163 interrupt-parent = <&mpic>;
164 tbi-handle = <&tbi0>;
165 phy-handle = <&phy2>;
168 #address-cells = <1>;
170 compatible = "fsl,gianfar-mdio";
173 phy1: ethernet-phy@1 {
174 interrupt-parent = <&mpic>;
178 phy2: ethernet-phy@2 {
179 interrupt-parent = <&mpic>;
183 phy3: ethernet-phy@3 {
184 interrupt-parent = <&mpic>;
190 device_type = "tbi-phy";
195 enet1: ethernet@25000 {
196 #address-cells = <1>;
199 device_type = "network";
201 compatible = "gianfar";
202 reg = <0x25000 0x1000>;
203 ranges = <0x0 0x25000 0x1000>;
204 local-mac-address = [ 00 00 00 00 00 00 ];
205 interrupts = <35 2 36 2 40 2>;
206 interrupt-parent = <&mpic>;
207 tbi-handle = <&tbi1>;
208 phy-handle = <&phy1>;
211 #address-cells = <1>;
213 compatible = "fsl,gianfar-tbi";
218 device_type = "tbi-phy";
224 interrupt-controller;
225 #address-cells = <0>;
226 #interrupt-cells = <2>;
227 reg = <0x40000 0x40000>;
228 device_type = "open-pic";
229 compatible = "chrp,open-pic";
233 #address-cells = <1>;
235 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
236 reg = <0x919c0 0x30>;
240 #address-cells = <1>;
242 ranges = <0 0x80000 0x10000>;
245 compatible = "fsl,cpm-muram-data";
246 reg = <0 0x4000 0x9000 0x2000>;
251 compatible = "fsl,mpc8560-brg",
254 reg = <0x919f0 0x10 0x915f0 0x10>;
255 clock-frequency = <0>;
259 interrupt-controller;
260 #address-cells = <0>;
261 #interrupt-cells = <2>;
263 interrupt-parent = <&mpic>;
264 reg = <0x90c00 0x80>;
265 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
268 serial0: serial@91a00 {
269 device_type = "serial";
270 compatible = "fsl,mpc8560-scc-uart",
272 reg = <0x91a00 0x20 0x88000 0x100>;
274 fsl,cpm-command = <0x800000>;
275 current-speed = <115200>;
277 interrupt-parent = <&cpmpic>;
280 serial1: serial@91a20 {
281 device_type = "serial";
282 compatible = "fsl,mpc8560-scc-uart",
284 reg = <0x91a20 0x20 0x88100 0x100>;
286 fsl,cpm-command = <0x4a00000>;
287 current-speed = <115200>;
289 interrupt-parent = <&cpmpic>;
292 enet2: ethernet@91340 {
293 device_type = "network";
294 compatible = "fsl,mpc8560-fcc-enet",
296 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
297 local-mac-address = [ 00 00 00 00 00 00 ];
298 fsl,cpm-command = <0x1a400300>;
300 interrupt-parent = <&cpmpic>;
301 phy-handle = <&phy3>;
307 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
309 #address-cells = <2>;
311 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
312 interrupt-parent = <&mpic>;
316 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
317 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
318 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
322 #address-cells = <1>;
324 compatible = "cfi-flash";
325 reg = <1 0x0 0x8000000>;
331 reg = <0x00000000 0x00200000>;
335 reg = <0x00200000 0x00300000>;
339 reg = <0x00500000 0x07a00000>;
343 reg = <0x07f00000 0x00040000>;
347 reg = <0x07f40000 0x00040000>;
351 reg = <0x07f80000 0x00080000>;
356 /* Note: CAN support needs be enabled in U-Boot */
358 compatible = "intel,82527"; // Bosch CC770
361 interrupt-parent = <&mpic>;
365 compatible = "intel,82527"; // Bosch CC770
366 reg = <2 0x100 0x100>;
368 interrupt-parent = <&mpic>;
373 #interrupt-cells = <1>;
375 #address-cells = <3>;
376 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
378 reg = <0xe0008000 0x1000>;
379 clock-frequency = <66666666>;
380 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
383 0xe000 0 0 1 &mpic 2 1
384 0xe000 0 0 2 &mpic 3 1
385 0xe000 0 0 3 &mpic 6 1
386 0xe000 0 0 4 &mpic 5 1
389 0x5800 0 0 1 &mpic 6 1
390 0x5800 0 0 2 &mpic 5 1
393 interrupt-parent = <&mpic>;
396 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
397 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;