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dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blob910b795fc5eb5a2edb2bbd38546d0babc58d15de
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2014-2015 PMC-Sierra, Inc.
4 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details.
14 *
15 * Questions/Comments/Bugfixes to storagedev@pmcs.com
16 *
17 */
18
19 #include <linux/module.h>
20 #include <linux/interrupt.h>
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/pci-aspm.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/fs.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/spinlock.h>
31 #include <linux/compat.h>
32 #include <linux/blktrace_api.h>
33 #include <linux/uaccess.h>
34 #include <linux/io.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/completion.h>
37 #include <linux/moduleparam.h>
38 #include <scsi/scsi.h>
39 #include <scsi/scsi_cmnd.h>
40 #include <scsi/scsi_device.h>
41 #include <scsi/scsi_host.h>
42 #include <scsi/scsi_tcq.h>
43 #include <scsi/scsi_eh.h>
44 #include <scsi/scsi_transport_sas.h>
45 #include <scsi/scsi_dbg.h>
46 #include <linux/cciss_ioctl.h>
47 #include <linux/string.h>
48 #include <linux/bitmap.h>
49 #include <linux/atomic.h>
50 #include <linux/jiffies.h>
51 #include <linux/percpu-defs.h>
52 #include <linux/percpu.h>
53 #include <asm/unaligned.h>
54 #include <asm/div64.h>
55 #include "hpsa_cmd.h"
56 #include "hpsa.h"
57
58 /*
59 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
60 * with an optional trailing '-' followed by a byte value (0-255).
61 */
62 #define HPSA_DRIVER_VERSION "3.4.14-0"
63 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
64 #define HPSA "hpsa"
65
66 /* How long to wait for CISS doorbell communication */
67 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
68 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
69 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
70 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
71 #define MAX_IOCTL_CONFIG_WAIT 1000
72
73 /*define how many times we will try a command because of bus resets */
74 #define MAX_CMD_RETRIES 3
75
76 /* Embedded module documentation macros - see modules.h */
77 MODULE_AUTHOR("Hewlett-Packard Company");
78 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
79 HPSA_DRIVER_VERSION);
80 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
81 MODULE_VERSION(HPSA_DRIVER_VERSION);
82 MODULE_LICENSE("GPL");
83
84 static int hpsa_allow_any;
85 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
86 MODULE_PARM_DESC(hpsa_allow_any,
87 "Allow hpsa driver to access unknown HP Smart Array hardware");
88 static int hpsa_simple_mode;
89 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
90 MODULE_PARM_DESC(hpsa_simple_mode,
91 "Use 'simple mode' rather than 'performant mode'");
92
93 /* define the PCI info for the cards we can control */
94 static const struct pci_device_id hpsa_pci_device_id[] = {
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {0,}
149 };
150
151 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
152
153 /* board_id = Subsystem Device ID & Vendor ID
154 * product = Marketing Name for the board
155 * access = Address of the struct of function pointers
156 */
157 static struct board_type products[] = {
158 {0x3241103C, "Smart Array P212", &SA5_access},
159 {0x3243103C, "Smart Array P410", &SA5_access},
160 {0x3245103C, "Smart Array P410i", &SA5_access},
161 {0x3247103C, "Smart Array P411", &SA5_access},
162 {0x3249103C, "Smart Array P812", &SA5_access},
163 {0x324A103C, "Smart Array P712m", &SA5_access},
164 {0x324B103C, "Smart Array P711m", &SA5_access},
165 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
166 {0x3350103C, "Smart Array P222", &SA5_access},
167 {0x3351103C, "Smart Array P420", &SA5_access},
168 {0x3352103C, "Smart Array P421", &SA5_access},
169 {0x3353103C, "Smart Array P822", &SA5_access},
170 {0x3354103C, "Smart Array P420i", &SA5_access},
171 {0x3355103C, "Smart Array P220i", &SA5_access},
172 {0x3356103C, "Smart Array P721m", &SA5_access},
173 {0x1921103C, "Smart Array P830i", &SA5_access},
174 {0x1922103C, "Smart Array P430", &SA5_access},
175 {0x1923103C, "Smart Array P431", &SA5_access},
176 {0x1924103C, "Smart Array P830", &SA5_access},
177 {0x1926103C, "Smart Array P731m", &SA5_access},
178 {0x1928103C, "Smart Array P230i", &SA5_access},
179 {0x1929103C, "Smart Array P530", &SA5_access},
180 {0x21BD103C, "Smart Array P244br", &SA5_access},
181 {0x21BE103C, "Smart Array P741m", &SA5_access},
182 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
183 {0x21C0103C, "Smart Array P440ar", &SA5_access},
184 {0x21C1103C, "Smart Array P840ar", &SA5_access},
185 {0x21C2103C, "Smart Array P440", &SA5_access},
186 {0x21C3103C, "Smart Array P441", &SA5_access},
187 {0x21C4103C, "Smart Array", &SA5_access},
188 {0x21C5103C, "Smart Array P841", &SA5_access},
189 {0x21C6103C, "Smart HBA H244br", &SA5_access},
190 {0x21C7103C, "Smart HBA H240", &SA5_access},
191 {0x21C8103C, "Smart HBA H241", &SA5_access},
192 {0x21C9103C, "Smart Array", &SA5_access},
193 {0x21CA103C, "Smart Array P246br", &SA5_access},
194 {0x21CB103C, "Smart Array P840", &SA5_access},
195 {0x21CC103C, "Smart Array", &SA5_access},
196 {0x21CD103C, "Smart Array", &SA5_access},
197 {0x21CE103C, "Smart HBA", &SA5_access},
198 {0x05809005, "SmartHBA-SA", &SA5_access},
199 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
200 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
201 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
202 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
203 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
204 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
205 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
206 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
207 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
208 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
209 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
210 };
211
212 static struct scsi_transport_template *hpsa_sas_transport_template;
213 static int hpsa_add_sas_host(struct ctlr_info *h);
214 static void hpsa_delete_sas_host(struct ctlr_info *h);
215 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
216 struct hpsa_scsi_dev_t *device);
217 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
218 static struct hpsa_scsi_dev_t
219 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
220 struct sas_rphy *rphy);
221
222 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
223 static const struct scsi_cmnd hpsa_cmd_busy;
224 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
225 static const struct scsi_cmnd hpsa_cmd_idle;
226 static int number_of_controllers;
227
228 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
229 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
230 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
231
232 #ifdef CONFIG_COMPAT
233 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
234 void __user *arg);
235 #endif
236
237 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
238 static struct CommandList *cmd_alloc(struct ctlr_info *h);
239 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
240 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
241 struct scsi_cmnd *scmd);
242 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
243 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
244 int cmd_type);
245 static void hpsa_free_cmd_pool(struct ctlr_info *h);
246 #define VPD_PAGE (1 << 8)
247 #define HPSA_SIMPLE_ERROR_BITS 0x03
248
249 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
250 static void hpsa_scan_start(struct Scsi_Host *);
251 static int hpsa_scan_finished(struct Scsi_Host *sh,
252 unsigned long elapsed_time);
253 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
254
255 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
256 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
257 static int hpsa_slave_alloc(struct scsi_device *sdev);
258 static int hpsa_slave_configure(struct scsi_device *sdev);
259 static void hpsa_slave_destroy(struct scsi_device *sdev);
260
261 static void hpsa_update_scsi_devices(struct ctlr_info *h);
262 static int check_for_unit_attention(struct ctlr_info *h,
263 struct CommandList *c);
264 static void check_ioctl_unit_attention(struct ctlr_info *h,
265 struct CommandList *c);
266 /* performant mode helper functions */
267 static void calc_bucket_map(int *bucket, int num_buckets,
268 int nsgs, int min_blocks, u32 *bucket_map);
269 static void hpsa_free_performant_mode(struct ctlr_info *h);
270 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
271 static inline u32 next_command(struct ctlr_info *h, u8 q);
272 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
273 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
274 u64 *cfg_offset);
275 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
276 unsigned long *memory_bar);
277 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
278 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
279 int wait_for_ready);
280 static inline void finish_cmd(struct CommandList *c);
281 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
282 #define BOARD_NOT_READY 0
283 #define BOARD_READY 1
284 static void hpsa_drain_accel_commands(struct ctlr_info *h);
285 static void hpsa_flush_cache(struct ctlr_info *h);
286 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
287 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
288 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
289 static void hpsa_command_resubmit_worker(struct work_struct *work);
290 static u32 lockup_detected(struct ctlr_info *h);
291 static int detect_controller_lockup(struct ctlr_info *h);
292 static void hpsa_disable_rld_caching(struct ctlr_info *h);
293 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
294 struct ReportExtendedLUNdata *buf, int bufsize);
295 static int hpsa_luns_changed(struct ctlr_info *h);
296
297 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
298 {
299 unsigned long *priv = shost_priv(sdev->host);
300 return (struct ctlr_info *) *priv;
301 }
302
303 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
304 {
305 unsigned long *priv = shost_priv(sh);
306 return (struct ctlr_info *) *priv;
307 }
308
309 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
310 {
311 return c->scsi_cmd == SCSI_CMD_IDLE;
312 }
313
314 static inline bool hpsa_is_pending_event(struct CommandList *c)
315 {
316 return c->abort_pending || c->reset_pending;
317 }
318
319 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
320 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
321 u8 *sense_key, u8 *asc, u8 *ascq)
322 {
323 struct scsi_sense_hdr sshdr;
324 bool rc;
325
326 *sense_key = -1;
327 *asc = -1;
328 *ascq = -1;
329
330 if (sense_data_len < 1)
331 return;
332
333 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
334 if (rc) {
335 *sense_key = sshdr.sense_key;
336 *asc = sshdr.asc;
337 *ascq = sshdr.ascq;
338 }
339 }
340
341 static int check_for_unit_attention(struct ctlr_info *h,
342 struct CommandList *c)
343 {
344 u8 sense_key, asc, ascq;
345 int sense_len;
346
347 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
348 sense_len = sizeof(c->err_info->SenseInfo);
349 else
350 sense_len = c->err_info->SenseLen;
351
352 decode_sense_data(c->err_info->SenseInfo, sense_len,
353 &sense_key, &asc, &ascq);
354 if (sense_key != UNIT_ATTENTION || asc == 0xff)
355 return 0;
356
357 switch (asc) {
358 case STATE_CHANGED:
359 dev_warn(&h->pdev->dev,
360 "%s: a state change detected, command retried\n",
361 h->devname);
362 break;
363 case LUN_FAILED:
364 dev_warn(&h->pdev->dev,
365 "%s: LUN failure detected\n", h->devname);
366 break;
367 case REPORT_LUNS_CHANGED:
368 dev_warn(&h->pdev->dev,
369 "%s: report LUN data changed\n", h->devname);
370 /*
371 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
372 * target (array) devices.
373 */
374 break;
375 case POWER_OR_RESET:
376 dev_warn(&h->pdev->dev,
377 "%s: a power on or device reset detected\n",
378 h->devname);
379 break;
380 case UNIT_ATTENTION_CLEARED:
381 dev_warn(&h->pdev->dev,
382 "%s: unit attention cleared by another initiator\n",
383 h->devname);
384 break;
385 default:
386 dev_warn(&h->pdev->dev,
387 "%s: unknown unit attention detected\n",
388 h->devname);
389 break;
390 }
391 return 1;
392 }
393
394 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
395 {
396 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
397 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
398 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
399 return 0;
400 dev_warn(&h->pdev->dev, HPSA "device busy");
401 return 1;
402 }
403
404 static u32 lockup_detected(struct ctlr_info *h);
405 static ssize_t host_show_lockup_detected(struct device *dev,
406 struct device_attribute *attr, char *buf)
407 {
408 int ld;
409 struct ctlr_info *h;
410 struct Scsi_Host *shost = class_to_shost(dev);
411
412 h = shost_to_hba(shost);
413 ld = lockup_detected(h);
414
415 return sprintf(buf, "ld=%d\n", ld);
416 }
417
418 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
419 struct device_attribute *attr,
420 const char *buf, size_t count)
421 {
422 int status, len;
423 struct ctlr_info *h;
424 struct Scsi_Host *shost = class_to_shost(dev);
425 char tmpbuf[10];
426
427 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
428 return -EACCES;
429 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
430 strncpy(tmpbuf, buf, len);
431 tmpbuf[len] = '\0';
432 if (sscanf(tmpbuf, "%d", &status) != 1)
433 return -EINVAL;
434 h = shost_to_hba(shost);
435 h->acciopath_status = !!status;
436 dev_warn(&h->pdev->dev,
437 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
438 h->acciopath_status ? "enabled" : "disabled");
439 return count;
440 }
441
442 static ssize_t host_store_raid_offload_debug(struct device *dev,
443 struct device_attribute *attr,
444 const char *buf, size_t count)
445 {
446 int debug_level, len;
447 struct ctlr_info *h;
448 struct Scsi_Host *shost = class_to_shost(dev);
449 char tmpbuf[10];
450
451 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
452 return -EACCES;
453 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
454 strncpy(tmpbuf, buf, len);
455 tmpbuf[len] = '\0';
456 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
457 return -EINVAL;
458 if (debug_level < 0)
459 debug_level = 0;
460 h = shost_to_hba(shost);
461 h->raid_offload_debug = debug_level;
462 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
463 h->raid_offload_debug);
464 return count;
465 }
466
467 static ssize_t host_store_rescan(struct device *dev,
468 struct device_attribute *attr,
469 const char *buf, size_t count)
470 {
471 struct ctlr_info *h;
472 struct Scsi_Host *shost = class_to_shost(dev);
473 h = shost_to_hba(shost);
474 hpsa_scan_start(h->scsi_host);
475 return count;
476 }
477
478 static ssize_t host_show_firmware_revision(struct device *dev,
479 struct device_attribute *attr, char *buf)
480 {
481 struct ctlr_info *h;
482 struct Scsi_Host *shost = class_to_shost(dev);
483 unsigned char *fwrev;
484
485 h = shost_to_hba(shost);
486 if (!h->hba_inquiry_data)
487 return 0;
488 fwrev = &h->hba_inquiry_data[32];
489 return snprintf(buf, 20, "%c%c%c%c\n",
490 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
491 }
492
493 static ssize_t host_show_commands_outstanding(struct device *dev,
494 struct device_attribute *attr, char *buf)
495 {
496 struct Scsi_Host *shost = class_to_shost(dev);
497 struct ctlr_info *h = shost_to_hba(shost);
498
499 return snprintf(buf, 20, "%d\n",
500 atomic_read(&h->commands_outstanding));
501 }
502
503 static ssize_t host_show_transport_mode(struct device *dev,
504 struct device_attribute *attr, char *buf)
505 {
506 struct ctlr_info *h;
507 struct Scsi_Host *shost = class_to_shost(dev);
508
509 h = shost_to_hba(shost);
510 return snprintf(buf, 20, "%s\n",
511 h->transMethod & CFGTBL_Trans_Performant ?
512 "performant" : "simple");
513 }
514
515 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
516 struct device_attribute *attr, char *buf)
517 {
518 struct ctlr_info *h;
519 struct Scsi_Host *shost = class_to_shost(dev);
520
521 h = shost_to_hba(shost);
522 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
523 (h->acciopath_status == 1) ? "enabled" : "disabled");
524 }
525
526 /* List of controllers which cannot be hard reset on kexec with reset_devices */
527 static u32 unresettable_controller[] = {
528 0x324a103C, /* Smart Array P712m */
529 0x324b103C, /* Smart Array P711m */
530 0x3223103C, /* Smart Array P800 */
531 0x3234103C, /* Smart Array P400 */
532 0x3235103C, /* Smart Array P400i */
533 0x3211103C, /* Smart Array E200i */
534 0x3212103C, /* Smart Array E200 */
535 0x3213103C, /* Smart Array E200i */
536 0x3214103C, /* Smart Array E200i */
537 0x3215103C, /* Smart Array E200i */
538 0x3237103C, /* Smart Array E500 */
539 0x323D103C, /* Smart Array P700m */
540 0x40800E11, /* Smart Array 5i */
541 0x409C0E11, /* Smart Array 6400 */
542 0x409D0E11, /* Smart Array 6400 EM */
543 0x40700E11, /* Smart Array 5300 */
544 0x40820E11, /* Smart Array 532 */
545 0x40830E11, /* Smart Array 5312 */
546 0x409A0E11, /* Smart Array 641 */
547 0x409B0E11, /* Smart Array 642 */
548 0x40910E11, /* Smart Array 6i */
549 };
550
551 /* List of controllers which cannot even be soft reset */
552 static u32 soft_unresettable_controller[] = {
553 0x40800E11, /* Smart Array 5i */
554 0x40700E11, /* Smart Array 5300 */
555 0x40820E11, /* Smart Array 532 */
556 0x40830E11, /* Smart Array 5312 */
557 0x409A0E11, /* Smart Array 641 */
558 0x409B0E11, /* Smart Array 642 */
559 0x40910E11, /* Smart Array 6i */
560 /* Exclude 640x boards. These are two pci devices in one slot
561 * which share a battery backed cache module. One controls the
562 * cache, the other accesses the cache through the one that controls
563 * it. If we reset the one controlling the cache, the other will
564 * likely not be happy. Just forbid resetting this conjoined mess.
565 * The 640x isn't really supported by hpsa anyway.
566 */
567 0x409C0E11, /* Smart Array 6400 */
568 0x409D0E11, /* Smart Array 6400 EM */
569 };
570
571 static u32 needs_abort_tags_swizzled[] = {
572 0x323D103C, /* Smart Array P700m */
573 0x324a103C, /* Smart Array P712m */
574 0x324b103C, /* SmartArray P711m */
575 };
576
577 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
578 {
579 int i;
580
581 for (i = 0; i < nelems; i++)
582 if (a[i] == board_id)
583 return 1;
584 return 0;
585 }
586
587 static int ctlr_is_hard_resettable(u32 board_id)
588 {
589 return !board_id_in_array(unresettable_controller,
590 ARRAY_SIZE(unresettable_controller), board_id);
591 }
592
593 static int ctlr_is_soft_resettable(u32 board_id)
594 {
595 return !board_id_in_array(soft_unresettable_controller,
596 ARRAY_SIZE(soft_unresettable_controller), board_id);
597 }
598
599 static int ctlr_is_resettable(u32 board_id)
600 {
601 return ctlr_is_hard_resettable(board_id) ||
602 ctlr_is_soft_resettable(board_id);
603 }
604
605 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
606 {
607 return board_id_in_array(needs_abort_tags_swizzled,
608 ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
609 }
610
611 static ssize_t host_show_resettable(struct device *dev,
612 struct device_attribute *attr, char *buf)
613 {
614 struct ctlr_info *h;
615 struct Scsi_Host *shost = class_to_shost(dev);
616
617 h = shost_to_hba(shost);
618 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
619 }
620
621 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
622 {
623 return (scsi3addr[3] & 0xC0) == 0x40;
624 }
625
626 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
627 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
628 };
629 #define HPSA_RAID_0 0
630 #define HPSA_RAID_4 1
631 #define HPSA_RAID_1 2 /* also used for RAID 10 */
632 #define HPSA_RAID_5 3 /* also used for RAID 50 */
633 #define HPSA_RAID_51 4
634 #define HPSA_RAID_6 5 /* also used for RAID 60 */
635 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
636 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
637 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
638
639 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
640 {
641 return !device->physical_device;
642 }
643
644 static ssize_t raid_level_show(struct device *dev,
645 struct device_attribute *attr, char *buf)
646 {
647 ssize_t l = 0;
648 unsigned char rlevel;
649 struct ctlr_info *h;
650 struct scsi_device *sdev;
651 struct hpsa_scsi_dev_t *hdev;
652 unsigned long flags;
653
654 sdev = to_scsi_device(dev);
655 h = sdev_to_hba(sdev);
656 spin_lock_irqsave(&h->lock, flags);
657 hdev = sdev->hostdata;
658 if (!hdev) {
659 spin_unlock_irqrestore(&h->lock, flags);
660 return -ENODEV;
661 }
662
663 /* Is this even a logical drive? */
664 if (!is_logical_device(hdev)) {
665 spin_unlock_irqrestore(&h->lock, flags);
666 l = snprintf(buf, PAGE_SIZE, "N/A\n");
667 return l;
668 }
669
670 rlevel = hdev->raid_level;
671 spin_unlock_irqrestore(&h->lock, flags);
672 if (rlevel > RAID_UNKNOWN)
673 rlevel = RAID_UNKNOWN;
674 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
675 return l;
676 }
677
678 static ssize_t lunid_show(struct device *dev,
679 struct device_attribute *attr, char *buf)
680 {
681 struct ctlr_info *h;
682 struct scsi_device *sdev;
683 struct hpsa_scsi_dev_t *hdev;
684 unsigned long flags;
685 unsigned char lunid[8];
686
687 sdev = to_scsi_device(dev);
688 h = sdev_to_hba(sdev);
689 spin_lock_irqsave(&h->lock, flags);
690 hdev = sdev->hostdata;
691 if (!hdev) {
692 spin_unlock_irqrestore(&h->lock, flags);
693 return -ENODEV;
694 }
695 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
696 spin_unlock_irqrestore(&h->lock, flags);
697 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
698 lunid[0], lunid[1], lunid[2], lunid[3],
699 lunid[4], lunid[5], lunid[6], lunid[7]);
700 }
701
702 static ssize_t unique_id_show(struct device *dev,
703 struct device_attribute *attr, char *buf)
704 {
705 struct ctlr_info *h;
706 struct scsi_device *sdev;
707 struct hpsa_scsi_dev_t *hdev;
708 unsigned long flags;
709 unsigned char sn[16];
710
711 sdev = to_scsi_device(dev);
712 h = sdev_to_hba(sdev);
713 spin_lock_irqsave(&h->lock, flags);
714 hdev = sdev->hostdata;
715 if (!hdev) {
716 spin_unlock_irqrestore(&h->lock, flags);
717 return -ENODEV;
718 }
719 memcpy(sn, hdev->device_id, sizeof(sn));
720 spin_unlock_irqrestore(&h->lock, flags);
721 return snprintf(buf, 16 * 2 + 2,
722 "%02X%02X%02X%02X%02X%02X%02X%02X"
723 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
724 sn[0], sn[1], sn[2], sn[3],
725 sn[4], sn[5], sn[6], sn[7],
726 sn[8], sn[9], sn[10], sn[11],
727 sn[12], sn[13], sn[14], sn[15]);
728 }
729
730 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
731 struct device_attribute *attr, char *buf)
732 {
733 struct ctlr_info *h;
734 struct scsi_device *sdev;
735 struct hpsa_scsi_dev_t *hdev;
736 unsigned long flags;
737 int offload_enabled;
738
739 sdev = to_scsi_device(dev);
740 h = sdev_to_hba(sdev);
741 spin_lock_irqsave(&h->lock, flags);
742 hdev = sdev->hostdata;
743 if (!hdev) {
744 spin_unlock_irqrestore(&h->lock, flags);
745 return -ENODEV;
746 }
747 offload_enabled = hdev->offload_enabled;
748 spin_unlock_irqrestore(&h->lock, flags);
749 return snprintf(buf, 20, "%d\n", offload_enabled);
750 }
751
752 #define MAX_PATHS 8
753
754 static ssize_t path_info_show(struct device *dev,
755 struct device_attribute *attr, char *buf)
756 {
757 struct ctlr_info *h;
758 struct scsi_device *sdev;
759 struct hpsa_scsi_dev_t *hdev;
760 unsigned long flags;
761 int i;
762 int output_len = 0;
763 u8 box;
764 u8 bay;
765 u8 path_map_index = 0;
766 char *active;
767 unsigned char phys_connector[2];
768
769 sdev = to_scsi_device(dev);
770 h = sdev_to_hba(sdev);
771 spin_lock_irqsave(&h->devlock, flags);
772 hdev = sdev->hostdata;
773 if (!hdev) {
774 spin_unlock_irqrestore(&h->devlock, flags);
775 return -ENODEV;
776 }
777
778 bay = hdev->bay;
779 for (i = 0; i < MAX_PATHS; i++) {
780 path_map_index = 1<<i;
781 if (i == hdev->active_path_index)
782 active = "Active";
783 else if (hdev->path_map & path_map_index)
784 active = "Inactive";
785 else
786 continue;
787
788 output_len += scnprintf(buf + output_len,
789 PAGE_SIZE - output_len,
790 "[%d:%d:%d:%d] %20.20s ",
791 h->scsi_host->host_no,
792 hdev->bus, hdev->target, hdev->lun,
793 scsi_device_type(hdev->devtype));
794
795 if (hdev->external ||
796 hdev->devtype == TYPE_RAID ||
797 is_logical_device(hdev)) {
798 output_len += snprintf(buf + output_len,
799 PAGE_SIZE - output_len,
800 "%s\n", active);
801 continue;
802 }
803
804 box = hdev->box[i];
805 memcpy(&phys_connector, &hdev->phys_connector[i],
806 sizeof(phys_connector));
807 if (phys_connector[0] < '0')
808 phys_connector[0] = '0';
809 if (phys_connector[1] < '0')
810 phys_connector[1] = '0';
811 if (hdev->phys_connector[i] > 0)
812 output_len += snprintf(buf + output_len,
813 PAGE_SIZE - output_len,
814 "PORT: %.2s ",
815 phys_connector);
816 if (hdev->devtype == TYPE_DISK && hdev->expose_device) {
817 if (box == 0 || box == 0xFF) {
818 output_len += snprintf(buf + output_len,
819 PAGE_SIZE - output_len,
820 "BAY: %hhu %s\n",
821 bay, active);
822 } else {
823 output_len += snprintf(buf + output_len,
824 PAGE_SIZE - output_len,
825 "BOX: %hhu BAY: %hhu %s\n",
826 box, bay, active);
827 }
828 } else if (box != 0 && box != 0xFF) {
829 output_len += snprintf(buf + output_len,
830 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
831 box, active);
832 } else
833 output_len += snprintf(buf + output_len,
834 PAGE_SIZE - output_len, "%s\n", active);
835 }
836
837 spin_unlock_irqrestore(&h->devlock, flags);
838 return output_len;
839 }
840
841 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
842 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
843 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
844 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
845 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
846 host_show_hp_ssd_smart_path_enabled, NULL);
847 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL);
848 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
849 host_show_hp_ssd_smart_path_status,
850 host_store_hp_ssd_smart_path_status);
851 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
852 host_store_raid_offload_debug);
853 static DEVICE_ATTR(firmware_revision, S_IRUGO,
854 host_show_firmware_revision, NULL);
855 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
856 host_show_commands_outstanding, NULL);
857 static DEVICE_ATTR(transport_mode, S_IRUGO,
858 host_show_transport_mode, NULL);
859 static DEVICE_ATTR(resettable, S_IRUGO,
860 host_show_resettable, NULL);
861 static DEVICE_ATTR(lockup_detected, S_IRUGO,
862 host_show_lockup_detected, NULL);
863
864 static struct device_attribute *hpsa_sdev_attrs[] = {
865 &dev_attr_raid_level,
866 &dev_attr_lunid,
867 &dev_attr_unique_id,
868 &dev_attr_hp_ssd_smart_path_enabled,
869 &dev_attr_path_info,
870 NULL,
871 };
872
873 static struct device_attribute *hpsa_shost_attrs[] = {
874 &dev_attr_rescan,
875 &dev_attr_firmware_revision,
876 &dev_attr_commands_outstanding,
877 &dev_attr_transport_mode,
878 &dev_attr_resettable,
879 &dev_attr_hp_ssd_smart_path_status,
880 &dev_attr_raid_offload_debug,
881 &dev_attr_lockup_detected,
882 NULL,
883 };
884
885 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_ABORTS + \
886 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
887
888 static struct scsi_host_template hpsa_driver_template = {
889 .module = THIS_MODULE,
890 .name = HPSA,
891 .proc_name = HPSA,
892 .queuecommand = hpsa_scsi_queue_command,
893 .scan_start = hpsa_scan_start,
894 .scan_finished = hpsa_scan_finished,
895 .change_queue_depth = hpsa_change_queue_depth,
896 .this_id = -1,
897 .use_clustering = ENABLE_CLUSTERING,
898 .eh_abort_handler = hpsa_eh_abort_handler,
899 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
900 .ioctl = hpsa_ioctl,
901 .slave_alloc = hpsa_slave_alloc,
902 .slave_configure = hpsa_slave_configure,
903 .slave_destroy = hpsa_slave_destroy,
904 #ifdef CONFIG_COMPAT
905 .compat_ioctl = hpsa_compat_ioctl,
906 #endif
907 .sdev_attrs = hpsa_sdev_attrs,
908 .shost_attrs = hpsa_shost_attrs,
909 .max_sectors = 8192,
910 .no_write_same = 1,
911 };
912
913 static inline u32 next_command(struct ctlr_info *h, u8 q)
914 {
915 u32 a;
916 struct reply_queue_buffer *rq = &h->reply_queue[q];
917
918 if (h->transMethod & CFGTBL_Trans_io_accel1)
919 return h->access.command_completed(h, q);
920
921 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
922 return h->access.command_completed(h, q);
923
924 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
925 a = rq->head[rq->current_entry];
926 rq->current_entry++;
927 atomic_dec(&h->commands_outstanding);
928 } else {
929 a = FIFO_EMPTY;
930 }
931 /* Check for wraparound */
932 if (rq->current_entry == h->max_commands) {
933 rq->current_entry = 0;
934 rq->wraparound ^= 1;
935 }
936 return a;
937 }
938
939 /*
940 * There are some special bits in the bus address of the
941 * command that we have to set for the controller to know
942 * how to process the command:
943 *
944 * Normal performant mode:
945 * bit 0: 1 means performant mode, 0 means simple mode.
946 * bits 1-3 = block fetch table entry
947 * bits 4-6 = command type (== 0)
948 *
949 * ioaccel1 mode:
950 * bit 0 = "performant mode" bit.
951 * bits 1-3 = block fetch table entry
952 * bits 4-6 = command type (== 110)
953 * (command type is needed because ioaccel1 mode
954 * commands are submitted through the same register as normal
955 * mode commands, so this is how the controller knows whether
956 * the command is normal mode or ioaccel1 mode.)
957 *
958 * ioaccel2 mode:
959 * bit 0 = "performant mode" bit.
960 * bits 1-4 = block fetch table entry (note extra bit)
961 * bits 4-6 = not needed, because ioaccel2 mode has
962 * a separate special register for submitting commands.
963 */
964
965 /*
966 * set_performant_mode: Modify the tag for cciss performant
967 * set bit 0 for pull model, bits 3-1 for block fetch
968 * register number
969 */
970 #define DEFAULT_REPLY_QUEUE (-1)
971 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
972 int reply_queue)
973 {
974 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
975 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
976 if (unlikely(!h->msix_vector))
977 return;
978 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
979 c->Header.ReplyQueue =
980 raw_smp_processor_id() % h->nreply_queues;
981 else
982 c->Header.ReplyQueue = reply_queue % h->nreply_queues;
983 }
984 }
985
986 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
987 struct CommandList *c,
988 int reply_queue)
989 {
990 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
991
992 /*
993 * Tell the controller to post the reply to the queue for this
994 * processor. This seems to give the best I/O throughput.
995 */
996 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
997 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
998 else
999 cp->ReplyQueue = reply_queue % h->nreply_queues;
1000 /*
1001 * Set the bits in the address sent down to include:
1002 * - performant mode bit (bit 0)
1003 * - pull count (bits 1-3)
1004 * - command type (bits 4-6)
1005 */
1006 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1007 IOACCEL1_BUSADDR_CMDTYPE;
1008 }
1009
1010 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1011 struct CommandList *c,
1012 int reply_queue)
1013 {
1014 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1015 &h->ioaccel2_cmd_pool[c->cmdindex];
1016
1017 /* Tell the controller to post the reply to the queue for this
1018 * processor. This seems to give the best I/O throughput.
1019 */
1020 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1021 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1022 else
1023 cp->reply_queue = reply_queue % h->nreply_queues;
1024 /* Set the bits in the address sent down to include:
1025 * - performant mode bit not used in ioaccel mode 2
1026 * - pull count (bits 0-3)
1027 * - command type isn't needed for ioaccel2
1028 */
1029 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1030 }
1031
1032 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1033 struct CommandList *c,
1034 int reply_queue)
1035 {
1036 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1037
1038 /*
1039 * Tell the controller to post the reply to the queue for this
1040 * processor. This seems to give the best I/O throughput.
1041 */
1042 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
1043 cp->reply_queue = smp_processor_id() % h->nreply_queues;
1044 else
1045 cp->reply_queue = reply_queue % h->nreply_queues;
1046 /*
1047 * Set the bits in the address sent down to include:
1048 * - performant mode bit not used in ioaccel mode 2
1049 * - pull count (bits 0-3)
1050 * - command type isn't needed for ioaccel2
1051 */
1052 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1053 }
1054
1055 static int is_firmware_flash_cmd(u8 *cdb)
1056 {
1057 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1058 }
1059
1060 /*
1061 * During firmware flash, the heartbeat register may not update as frequently
1062 * as it should. So we dial down lockup detection during firmware flash. and
1063 * dial it back up when firmware flash completes.
1064 */
1065 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1066 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1067 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1068 struct CommandList *c)
1069 {
1070 if (!is_firmware_flash_cmd(c->Request.CDB))
1071 return;
1072 atomic_inc(&h->firmware_flash_in_progress);
1073 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1074 }
1075
1076 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1077 struct CommandList *c)
1078 {
1079 if (is_firmware_flash_cmd(c->Request.CDB) &&
1080 atomic_dec_and_test(&h->firmware_flash_in_progress))
1081 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1082 }
1083
1084 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1085 struct CommandList *c, int reply_queue)
1086 {
1087 dial_down_lockup_detection_during_fw_flash(h, c);
1088 atomic_inc(&h->commands_outstanding);
1089 switch (c->cmd_type) {
1090 case CMD_IOACCEL1:
1091 set_ioaccel1_performant_mode(h, c, reply_queue);
1092 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1093 break;
1094 case CMD_IOACCEL2:
1095 set_ioaccel2_performant_mode(h, c, reply_queue);
1096 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1097 break;
1098 case IOACCEL2_TMF:
1099 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1100 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1101 break;
1102 default:
1103 set_performant_mode(h, c, reply_queue);
1104 h->access.submit_command(h, c);
1105 }
1106 }
1107
1108 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1109 {
1110 if (unlikely(hpsa_is_pending_event(c)))
1111 return finish_cmd(c);
1112
1113 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1114 }
1115
1116 static inline int is_hba_lunid(unsigned char scsi3addr[])
1117 {
1118 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1119 }
1120
1121 static inline int is_scsi_rev_5(struct ctlr_info *h)
1122 {
1123 if (!h->hba_inquiry_data)
1124 return 0;
1125 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1126 return 1;
1127 return 0;
1128 }
1129
1130 static int hpsa_find_target_lun(struct ctlr_info *h,
1131 unsigned char scsi3addr[], int bus, int *target, int *lun)
1132 {
1133 /* finds an unused bus, target, lun for a new physical device
1134 * assumes h->devlock is held
1135 */
1136 int i, found = 0;
1137 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1138
1139 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1140
1141 for (i = 0; i < h->ndevices; i++) {
1142 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1143 __set_bit(h->dev[i]->target, lun_taken);
1144 }
1145
1146 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1147 if (i < HPSA_MAX_DEVICES) {
1148 /* *bus = 1; */
1149 *target = i;
1150 *lun = 0;
1151 found = 1;
1152 }
1153 return !found;
1154 }
1155
1156 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1157 struct hpsa_scsi_dev_t *dev, char *description)
1158 {
1159 #define LABEL_SIZE 25
1160 char label[LABEL_SIZE];
1161
1162 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1163 return;
1164
1165 switch (dev->devtype) {
1166 case TYPE_RAID:
1167 snprintf(label, LABEL_SIZE, "controller");
1168 break;
1169 case TYPE_ENCLOSURE:
1170 snprintf(label, LABEL_SIZE, "enclosure");
1171 break;
1172 case TYPE_DISK:
1173 if (dev->external)
1174 snprintf(label, LABEL_SIZE, "external");
1175 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1176 snprintf(label, LABEL_SIZE, "%s",
1177 raid_label[PHYSICAL_DRIVE]);
1178 else
1179 snprintf(label, LABEL_SIZE, "RAID-%s",
1180 dev->raid_level > RAID_UNKNOWN ? "?" :
1181 raid_label[dev->raid_level]);
1182 break;
1183 case TYPE_ROM:
1184 snprintf(label, LABEL_SIZE, "rom");
1185 break;
1186 case TYPE_TAPE:
1187 snprintf(label, LABEL_SIZE, "tape");
1188 break;
1189 case TYPE_MEDIUM_CHANGER:
1190 snprintf(label, LABEL_SIZE, "changer");
1191 break;
1192 default:
1193 snprintf(label, LABEL_SIZE, "UNKNOWN");
1194 break;
1195 }
1196
1197 dev_printk(level, &h->pdev->dev,
1198 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1199 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1200 description,
1201 scsi_device_type(dev->devtype),
1202 dev->vendor,
1203 dev->model,
1204 label,
1205 dev->offload_config ? '+' : '-',
1206 dev->offload_enabled ? '+' : '-',
1207 dev->expose_device);
1208 }
1209
1210 /* Add an entry into h->dev[] array. */
1211 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1212 struct hpsa_scsi_dev_t *device,
1213 struct hpsa_scsi_dev_t *added[], int *nadded)
1214 {
1215 /* assumes h->devlock is held */
1216 int n = h->ndevices;
1217 int i;
1218 unsigned char addr1[8], addr2[8];
1219 struct hpsa_scsi_dev_t *sd;
1220
1221 if (n >= HPSA_MAX_DEVICES) {
1222 dev_err(&h->pdev->dev, "too many devices, some will be "
1223 "inaccessible.\n");
1224 return -1;
1225 }
1226
1227 /* physical devices do not have lun or target assigned until now. */
1228 if (device->lun != -1)
1229 /* Logical device, lun is already assigned. */
1230 goto lun_assigned;
1231
1232 /* If this device a non-zero lun of a multi-lun device
1233 * byte 4 of the 8-byte LUN addr will contain the logical
1234 * unit no, zero otherwise.
1235 */
1236 if (device->scsi3addr[4] == 0) {
1237 /* This is not a non-zero lun of a multi-lun device */
1238 if (hpsa_find_target_lun(h, device->scsi3addr,
1239 device->bus, &device->target, &device->lun) != 0)
1240 return -1;
1241 goto lun_assigned;
1242 }
1243
1244 /* This is a non-zero lun of a multi-lun device.
1245 * Search through our list and find the device which
1246 * has the same 8 byte LUN address, excepting byte 4 and 5.
1247 * Assign the same bus and target for this new LUN.
1248 * Use the logical unit number from the firmware.
1249 */
1250 memcpy(addr1, device->scsi3addr, 8);
1251 addr1[4] = 0;
1252 addr1[5] = 0;
1253 for (i = 0; i < n; i++) {
1254 sd = h->dev[i];
1255 memcpy(addr2, sd->scsi3addr, 8);
1256 addr2[4] = 0;
1257 addr2[5] = 0;
1258 /* differ only in byte 4 and 5? */
1259 if (memcmp(addr1, addr2, 8) == 0) {
1260 device->bus = sd->bus;
1261 device->target = sd->target;
1262 device->lun = device->scsi3addr[4];
1263 break;
1264 }
1265 }
1266 if (device->lun == -1) {
1267 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1268 " suspect firmware bug or unsupported hardware "
1269 "configuration.\n");
1270 return -1;
1271 }
1272
1273 lun_assigned:
1274
1275 h->dev[n] = device;
1276 h->ndevices++;
1277 added[*nadded] = device;
1278 (*nadded)++;
1279 hpsa_show_dev_msg(KERN_INFO, h, device,
1280 device->expose_device ? "added" : "masked");
1281 device->offload_to_be_enabled = device->offload_enabled;
1282 device->offload_enabled = 0;
1283 return 0;
1284 }
1285
1286 /* Update an entry in h->dev[] array. */
1287 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1288 int entry, struct hpsa_scsi_dev_t *new_entry)
1289 {
1290 int offload_enabled;
1291 /* assumes h->devlock is held */
1292 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1293
1294 /* Raid level changed. */
1295 h->dev[entry]->raid_level = new_entry->raid_level;
1296
1297 /* Raid offload parameters changed. Careful about the ordering. */
1298 if (new_entry->offload_config && new_entry->offload_enabled) {
1299 /*
1300 * if drive is newly offload_enabled, we want to copy the
1301 * raid map data first. If previously offload_enabled and
1302 * offload_config were set, raid map data had better be
1303 * the same as it was before. if raid map data is changed
1304 * then it had better be the case that
1305 * h->dev[entry]->offload_enabled is currently 0.
1306 */
1307 h->dev[entry]->raid_map = new_entry->raid_map;
1308 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1309 }
1310 if (new_entry->hba_ioaccel_enabled) {
1311 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1312 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1313 }
1314 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1315 h->dev[entry]->offload_config = new_entry->offload_config;
1316 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1317 h->dev[entry]->queue_depth = new_entry->queue_depth;
1318
1319 /*
1320 * We can turn off ioaccel offload now, but need to delay turning
1321 * it on until we can update h->dev[entry]->phys_disk[], but we
1322 * can't do that until all the devices are updated.
1323 */
1324 h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1325 if (!new_entry->offload_enabled)
1326 h->dev[entry]->offload_enabled = 0;
1327
1328 offload_enabled = h->dev[entry]->offload_enabled;
1329 h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1330 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1331 h->dev[entry]->offload_enabled = offload_enabled;
1332 }
1333
1334 /* Replace an entry from h->dev[] array. */
1335 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1336 int entry, struct hpsa_scsi_dev_t *new_entry,
1337 struct hpsa_scsi_dev_t *added[], int *nadded,
1338 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1339 {
1340 /* assumes h->devlock is held */
1341 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1342 removed[*nremoved] = h->dev[entry];
1343 (*nremoved)++;
1344
1345 /*
1346 * New physical devices won't have target/lun assigned yet
1347 * so we need to preserve the values in the slot we are replacing.
1348 */
1349 if (new_entry->target == -1) {
1350 new_entry->target = h->dev[entry]->target;
1351 new_entry->lun = h->dev[entry]->lun;
1352 }
1353
1354 h->dev[entry] = new_entry;
1355 added[*nadded] = new_entry;
1356 (*nadded)++;
1357 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1358 new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1359 new_entry->offload_enabled = 0;
1360 }
1361
1362 /* Remove an entry from h->dev[] array. */
1363 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1364 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1365 {
1366 /* assumes h->devlock is held */
1367 int i;
1368 struct hpsa_scsi_dev_t *sd;
1369
1370 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1371
1372 sd = h->dev[entry];
1373 removed[*nremoved] = h->dev[entry];
1374 (*nremoved)++;
1375
1376 for (i = entry; i < h->ndevices-1; i++)
1377 h->dev[i] = h->dev[i+1];
1378 h->ndevices--;
1379 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1380 }
1381
1382 #define SCSI3ADDR_EQ(a, b) ( \
1383 (a)[7] == (b)[7] && \
1384 (a)[6] == (b)[6] && \
1385 (a)[5] == (b)[5] && \
1386 (a)[4] == (b)[4] && \
1387 (a)[3] == (b)[3] && \
1388 (a)[2] == (b)[2] && \
1389 (a)[1] == (b)[1] && \
1390 (a)[0] == (b)[0])
1391
1392 static void fixup_botched_add(struct ctlr_info *h,
1393 struct hpsa_scsi_dev_t *added)
1394 {
1395 /* called when scsi_add_device fails in order to re-adjust
1396 * h->dev[] to match the mid layer's view.
1397 */
1398 unsigned long flags;
1399 int i, j;
1400
1401 spin_lock_irqsave(&h->lock, flags);
1402 for (i = 0; i < h->ndevices; i++) {
1403 if (h->dev[i] == added) {
1404 for (j = i; j < h->ndevices-1; j++)
1405 h->dev[j] = h->dev[j+1];
1406 h->ndevices--;
1407 break;
1408 }
1409 }
1410 spin_unlock_irqrestore(&h->lock, flags);
1411 kfree(added);
1412 }
1413
1414 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1415 struct hpsa_scsi_dev_t *dev2)
1416 {
1417 /* we compare everything except lun and target as these
1418 * are not yet assigned. Compare parts likely
1419 * to differ first
1420 */
1421 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1422 sizeof(dev1->scsi3addr)) != 0)
1423 return 0;
1424 if (memcmp(dev1->device_id, dev2->device_id,
1425 sizeof(dev1->device_id)) != 0)
1426 return 0;
1427 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1428 return 0;
1429 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1430 return 0;
1431 if (dev1->devtype != dev2->devtype)
1432 return 0;
1433 if (dev1->bus != dev2->bus)
1434 return 0;
1435 return 1;
1436 }
1437
1438 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1439 struct hpsa_scsi_dev_t *dev2)
1440 {
1441 /* Device attributes that can change, but don't mean
1442 * that the device is a different device, nor that the OS
1443 * needs to be told anything about the change.
1444 */
1445 if (dev1->raid_level != dev2->raid_level)
1446 return 1;
1447 if (dev1->offload_config != dev2->offload_config)
1448 return 1;
1449 if (dev1->offload_enabled != dev2->offload_enabled)
1450 return 1;
1451 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1452 if (dev1->queue_depth != dev2->queue_depth)
1453 return 1;
1454 return 0;
1455 }
1456
1457 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1458 * and return needle location in *index. If scsi3addr matches, but not
1459 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1460 * location in *index.
1461 * In the case of a minor device attribute change, such as RAID level, just
1462 * return DEVICE_UPDATED, along with the updated device's location in index.
1463 * If needle not found, return DEVICE_NOT_FOUND.
1464 */
1465 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1466 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1467 int *index)
1468 {
1469 int i;
1470 #define DEVICE_NOT_FOUND 0
1471 #define DEVICE_CHANGED 1
1472 #define DEVICE_SAME 2
1473 #define DEVICE_UPDATED 3
1474 if (needle == NULL)
1475 return DEVICE_NOT_FOUND;
1476
1477 for (i = 0; i < haystack_size; i++) {
1478 if (haystack[i] == NULL) /* previously removed. */
1479 continue;
1480 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1481 *index = i;
1482 if (device_is_the_same(needle, haystack[i])) {
1483 if (device_updated(needle, haystack[i]))
1484 return DEVICE_UPDATED;
1485 return DEVICE_SAME;
1486 } else {
1487 /* Keep offline devices offline */
1488 if (needle->volume_offline)
1489 return DEVICE_NOT_FOUND;
1490 return DEVICE_CHANGED;
1491 }
1492 }
1493 }
1494 *index = -1;
1495 return DEVICE_NOT_FOUND;
1496 }
1497
1498 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1499 unsigned char scsi3addr[])
1500 {
1501 struct offline_device_entry *device;
1502 unsigned long flags;
1503
1504 /* Check to see if device is already on the list */
1505 spin_lock_irqsave(&h->offline_device_lock, flags);
1506 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1507 if (memcmp(device->scsi3addr, scsi3addr,
1508 sizeof(device->scsi3addr)) == 0) {
1509 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1510 return;
1511 }
1512 }
1513 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1514
1515 /* Device is not on the list, add it. */
1516 device = kmalloc(sizeof(*device), GFP_KERNEL);
1517 if (!device) {
1518 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1519 return;
1520 }
1521 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1522 spin_lock_irqsave(&h->offline_device_lock, flags);
1523 list_add_tail(&device->offline_list, &h->offline_device_list);
1524 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1525 }
1526
1527 /* Print a message explaining various offline volume states */
1528 static void hpsa_show_volume_status(struct ctlr_info *h,
1529 struct hpsa_scsi_dev_t *sd)
1530 {
1531 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1532 dev_info(&h->pdev->dev,
1533 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1534 h->scsi_host->host_no,
1535 sd->bus, sd->target, sd->lun);
1536 switch (sd->volume_offline) {
1537 case HPSA_LV_OK:
1538 break;
1539 case HPSA_LV_UNDERGOING_ERASE:
1540 dev_info(&h->pdev->dev,
1541 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1542 h->scsi_host->host_no,
1543 sd->bus, sd->target, sd->lun);
1544 break;
1545 case HPSA_LV_NOT_AVAILABLE:
1546 dev_info(&h->pdev->dev,
1547 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1548 h->scsi_host->host_no,
1549 sd->bus, sd->target, sd->lun);
1550 break;
1551 case HPSA_LV_UNDERGOING_RPI:
1552 dev_info(&h->pdev->dev,
1553 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1554 h->scsi_host->host_no,
1555 sd->bus, sd->target, sd->lun);
1556 break;
1557 case HPSA_LV_PENDING_RPI:
1558 dev_info(&h->pdev->dev,
1559 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1560 h->scsi_host->host_no,
1561 sd->bus, sd->target, sd->lun);
1562 break;
1563 case HPSA_LV_ENCRYPTED_NO_KEY:
1564 dev_info(&h->pdev->dev,
1565 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1566 h->scsi_host->host_no,
1567 sd->bus, sd->target, sd->lun);
1568 break;
1569 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1570 dev_info(&h->pdev->dev,
1571 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1572 h->scsi_host->host_no,
1573 sd->bus, sd->target, sd->lun);
1574 break;
1575 case HPSA_LV_UNDERGOING_ENCRYPTION:
1576 dev_info(&h->pdev->dev,
1577 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1578 h->scsi_host->host_no,
1579 sd->bus, sd->target, sd->lun);
1580 break;
1581 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1582 dev_info(&h->pdev->dev,
1583 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1584 h->scsi_host->host_no,
1585 sd->bus, sd->target, sd->lun);
1586 break;
1587 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1588 dev_info(&h->pdev->dev,
1589 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1590 h->scsi_host->host_no,
1591 sd->bus, sd->target, sd->lun);
1592 break;
1593 case HPSA_LV_PENDING_ENCRYPTION:
1594 dev_info(&h->pdev->dev,
1595 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1596 h->scsi_host->host_no,
1597 sd->bus, sd->target, sd->lun);
1598 break;
1599 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1600 dev_info(&h->pdev->dev,
1601 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1602 h->scsi_host->host_no,
1603 sd->bus, sd->target, sd->lun);
1604 break;
1605 }
1606 }
1607
1608 /*
1609 * Figure the list of physical drive pointers for a logical drive with
1610 * raid offload configured.
1611 */
1612 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1613 struct hpsa_scsi_dev_t *dev[], int ndevices,
1614 struct hpsa_scsi_dev_t *logical_drive)
1615 {
1616 struct raid_map_data *map = &logical_drive->raid_map;
1617 struct raid_map_disk_data *dd = &map->data[0];
1618 int i, j;
1619 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1620 le16_to_cpu(map->metadata_disks_per_row);
1621 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1622 le16_to_cpu(map->layout_map_count) *
1623 total_disks_per_row;
1624 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1625 total_disks_per_row;
1626 int qdepth;
1627
1628 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1629 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1630
1631 logical_drive->nphysical_disks = nraid_map_entries;
1632
1633 qdepth = 0;
1634 for (i = 0; i < nraid_map_entries; i++) {
1635 logical_drive->phys_disk[i] = NULL;
1636 if (!logical_drive->offload_config)
1637 continue;
1638 for (j = 0; j < ndevices; j++) {
1639 if (dev[j] == NULL)
1640 continue;
1641 if (dev[j]->devtype != TYPE_DISK)
1642 continue;
1643 if (is_logical_device(dev[j]))
1644 continue;
1645 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1646 continue;
1647
1648 logical_drive->phys_disk[i] = dev[j];
1649 if (i < nphys_disk)
1650 qdepth = min(h->nr_cmds, qdepth +
1651 logical_drive->phys_disk[i]->queue_depth);
1652 break;
1653 }
1654
1655 /*
1656 * This can happen if a physical drive is removed and
1657 * the logical drive is degraded. In that case, the RAID
1658 * map data will refer to a physical disk which isn't actually
1659 * present. And in that case offload_enabled should already
1660 * be 0, but we'll turn it off here just in case
1661 */
1662 if (!logical_drive->phys_disk[i]) {
1663 logical_drive->offload_enabled = 0;
1664 logical_drive->offload_to_be_enabled = 0;
1665 logical_drive->queue_depth = 8;
1666 }
1667 }
1668 if (nraid_map_entries)
1669 /*
1670 * This is correct for reads, too high for full stripe writes,
1671 * way too high for partial stripe writes
1672 */
1673 logical_drive->queue_depth = qdepth;
1674 else
1675 logical_drive->queue_depth = h->nr_cmds;
1676 }
1677
1678 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1679 struct hpsa_scsi_dev_t *dev[], int ndevices)
1680 {
1681 int i;
1682
1683 for (i = 0; i < ndevices; i++) {
1684 if (dev[i] == NULL)
1685 continue;
1686 if (dev[i]->devtype != TYPE_DISK)
1687 continue;
1688 if (!is_logical_device(dev[i]))
1689 continue;
1690
1691 /*
1692 * If offload is currently enabled, the RAID map and
1693 * phys_disk[] assignment *better* not be changing
1694 * and since it isn't changing, we do not need to
1695 * update it.
1696 */
1697 if (dev[i]->offload_enabled)
1698 continue;
1699
1700 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1701 }
1702 }
1703
1704 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1705 {
1706 int rc = 0;
1707
1708 if (!h->scsi_host)
1709 return 1;
1710
1711 if (is_logical_device(device)) /* RAID */
1712 rc = scsi_add_device(h->scsi_host, device->bus,
1713 device->target, device->lun);
1714 else /* HBA */
1715 rc = hpsa_add_sas_device(h->sas_host, device);
1716
1717 return rc;
1718 }
1719
1720 static void hpsa_remove_device(struct ctlr_info *h,
1721 struct hpsa_scsi_dev_t *device)
1722 {
1723 struct scsi_device *sdev = NULL;
1724
1725 if (!h->scsi_host)
1726 return;
1727
1728 if (is_logical_device(device)) { /* RAID */
1729 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1730 device->target, device->lun);
1731 if (sdev) {
1732 scsi_remove_device(sdev);
1733 scsi_device_put(sdev);
1734 } else {
1735 /*
1736 * We don't expect to get here. Future commands
1737 * to this device will get a selection timeout as
1738 * if the device were gone.
1739 */
1740 hpsa_show_dev_msg(KERN_WARNING, h, device,
1741 "didn't find device for removal.");
1742 }
1743 } else /* HBA */
1744 hpsa_remove_sas_device(device);
1745 }
1746
1747 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1748 struct hpsa_scsi_dev_t *sd[], int nsds)
1749 {
1750 /* sd contains scsi3 addresses and devtypes, and inquiry
1751 * data. This function takes what's in sd to be the current
1752 * reality and updates h->dev[] to reflect that reality.
1753 */
1754 int i, entry, device_change, changes = 0;
1755 struct hpsa_scsi_dev_t *csd;
1756 unsigned long flags;
1757 struct hpsa_scsi_dev_t **added, **removed;
1758 int nadded, nremoved;
1759
1760 /*
1761 * A reset can cause a device status to change
1762 * re-schedule the scan to see what happened.
1763 */
1764 if (h->reset_in_progress) {
1765 h->drv_req_rescan = 1;
1766 return;
1767 }
1768
1769 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1770 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1771
1772 if (!added || !removed) {
1773 dev_warn(&h->pdev->dev, "out of memory in "
1774 "adjust_hpsa_scsi_table\n");
1775 goto free_and_out;
1776 }
1777
1778 spin_lock_irqsave(&h->devlock, flags);
1779
1780 /* find any devices in h->dev[] that are not in
1781 * sd[] and remove them from h->dev[], and for any
1782 * devices which have changed, remove the old device
1783 * info and add the new device info.
1784 * If minor device attributes change, just update
1785 * the existing device structure.
1786 */
1787 i = 0;
1788 nremoved = 0;
1789 nadded = 0;
1790 while (i < h->ndevices) {
1791 csd = h->dev[i];
1792 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1793 if (device_change == DEVICE_NOT_FOUND) {
1794 changes++;
1795 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1796 continue; /* remove ^^^, hence i not incremented */
1797 } else if (device_change == DEVICE_CHANGED) {
1798 changes++;
1799 hpsa_scsi_replace_entry(h, i, sd[entry],
1800 added, &nadded, removed, &nremoved);
1801 /* Set it to NULL to prevent it from being freed
1802 * at the bottom of hpsa_update_scsi_devices()
1803 */
1804 sd[entry] = NULL;
1805 } else if (device_change == DEVICE_UPDATED) {
1806 hpsa_scsi_update_entry(h, i, sd[entry]);
1807 }
1808 i++;
1809 }
1810
1811 /* Now, make sure every device listed in sd[] is also
1812 * listed in h->dev[], adding them if they aren't found
1813 */
1814
1815 for (i = 0; i < nsds; i++) {
1816 if (!sd[i]) /* if already added above. */
1817 continue;
1818
1819 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1820 * as the SCSI mid-layer does not handle such devices well.
1821 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1822 * at 160Hz, and prevents the system from coming up.
1823 */
1824 if (sd[i]->volume_offline) {
1825 hpsa_show_volume_status(h, sd[i]);
1826 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1827 continue;
1828 }
1829
1830 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1831 h->ndevices, &entry);
1832 if (device_change == DEVICE_NOT_FOUND) {
1833 changes++;
1834 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1835 break;
1836 sd[i] = NULL; /* prevent from being freed later. */
1837 } else if (device_change == DEVICE_CHANGED) {
1838 /* should never happen... */
1839 changes++;
1840 dev_warn(&h->pdev->dev,
1841 "device unexpectedly changed.\n");
1842 /* but if it does happen, we just ignore that device */
1843 }
1844 }
1845 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1846
1847 /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1848 * any logical drives that need it enabled.
1849 */
1850 for (i = 0; i < h->ndevices; i++) {
1851 if (h->dev[i] == NULL)
1852 continue;
1853 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1854 }
1855
1856 spin_unlock_irqrestore(&h->devlock, flags);
1857
1858 /* Monitor devices which are in one of several NOT READY states to be
1859 * brought online later. This must be done without holding h->devlock,
1860 * so don't touch h->dev[]
1861 */
1862 for (i = 0; i < nsds; i++) {
1863 if (!sd[i]) /* if already added above. */
1864 continue;
1865 if (sd[i]->volume_offline)
1866 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1867 }
1868
1869 /* Don't notify scsi mid layer of any changes the first time through
1870 * (or if there are no changes) scsi_scan_host will do it later the
1871 * first time through.
1872 */
1873 if (!changes)
1874 goto free_and_out;
1875
1876 /* Notify scsi mid layer of any removed devices */
1877 for (i = 0; i < nremoved; i++) {
1878 if (removed[i] == NULL)
1879 continue;
1880 if (removed[i]->expose_device)
1881 hpsa_remove_device(h, removed[i]);
1882 kfree(removed[i]);
1883 removed[i] = NULL;
1884 }
1885
1886 /* Notify scsi mid layer of any added devices */
1887 for (i = 0; i < nadded; i++) {
1888 int rc = 0;
1889
1890 if (added[i] == NULL)
1891 continue;
1892 if (!(added[i]->expose_device))
1893 continue;
1894 rc = hpsa_add_device(h, added[i]);
1895 if (!rc)
1896 continue;
1897 dev_warn(&h->pdev->dev,
1898 "addition failed %d, device not added.", rc);
1899 /* now we have to remove it from h->dev,
1900 * since it didn't get added to scsi mid layer
1901 */
1902 fixup_botched_add(h, added[i]);
1903 h->drv_req_rescan = 1;
1904 }
1905
1906 free_and_out:
1907 kfree(added);
1908 kfree(removed);
1909 }
1910
1911 /*
1912 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1913 * Assume's h->devlock is held.
1914 */
1915 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1916 int bus, int target, int lun)
1917 {
1918 int i;
1919 struct hpsa_scsi_dev_t *sd;
1920
1921 for (i = 0; i < h->ndevices; i++) {
1922 sd = h->dev[i];
1923 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1924 return sd;
1925 }
1926 return NULL;
1927 }
1928
1929 static int hpsa_slave_alloc(struct scsi_device *sdev)
1930 {
1931 struct hpsa_scsi_dev_t *sd;
1932 unsigned long flags;
1933 struct ctlr_info *h;
1934
1935 h = sdev_to_hba(sdev);
1936 spin_lock_irqsave(&h->devlock, flags);
1937 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
1938 struct scsi_target *starget;
1939 struct sas_rphy *rphy;
1940
1941 starget = scsi_target(sdev);
1942 rphy = target_to_rphy(starget);
1943 sd = hpsa_find_device_by_sas_rphy(h, rphy);
1944 if (sd) {
1945 sd->target = sdev_id(sdev);
1946 sd->lun = sdev->lun;
1947 }
1948 } else
1949 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1950 sdev_id(sdev), sdev->lun);
1951
1952 if (sd && sd->expose_device) {
1953 atomic_set(&sd->ioaccel_cmds_out, 0);
1954 sdev->hostdata = sd;
1955 } else
1956 sdev->hostdata = NULL;
1957 spin_unlock_irqrestore(&h->devlock, flags);
1958 return 0;
1959 }
1960
1961 /* configure scsi device based on internal per-device structure */
1962 static int hpsa_slave_configure(struct scsi_device *sdev)
1963 {
1964 struct hpsa_scsi_dev_t *sd;
1965 int queue_depth;
1966
1967 sd = sdev->hostdata;
1968 sdev->no_uld_attach = !sd || !sd->expose_device;
1969
1970 if (sd)
1971 queue_depth = sd->queue_depth != 0 ?
1972 sd->queue_depth : sdev->host->can_queue;
1973 else
1974 queue_depth = sdev->host->can_queue;
1975
1976 scsi_change_queue_depth(sdev, queue_depth);
1977
1978 return 0;
1979 }
1980
1981 static void hpsa_slave_destroy(struct scsi_device *sdev)
1982 {
1983 /* nothing to do. */
1984 }
1985
1986 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1987 {
1988 int i;
1989
1990 if (!h->ioaccel2_cmd_sg_list)
1991 return;
1992 for (i = 0; i < h->nr_cmds; i++) {
1993 kfree(h->ioaccel2_cmd_sg_list[i]);
1994 h->ioaccel2_cmd_sg_list[i] = NULL;
1995 }
1996 kfree(h->ioaccel2_cmd_sg_list);
1997 h->ioaccel2_cmd_sg_list = NULL;
1998 }
1999
2000 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2001 {
2002 int i;
2003
2004 if (h->chainsize <= 0)
2005 return 0;
2006
2007 h->ioaccel2_cmd_sg_list =
2008 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2009 GFP_KERNEL);
2010 if (!h->ioaccel2_cmd_sg_list)
2011 return -ENOMEM;
2012 for (i = 0; i < h->nr_cmds; i++) {
2013 h->ioaccel2_cmd_sg_list[i] =
2014 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2015 h->maxsgentries, GFP_KERNEL);
2016 if (!h->ioaccel2_cmd_sg_list[i])
2017 goto clean;
2018 }
2019 return 0;
2020
2021 clean:
2022 hpsa_free_ioaccel2_sg_chain_blocks(h);
2023 return -ENOMEM;
2024 }
2025
2026 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2027 {
2028 int i;
2029
2030 if (!h->cmd_sg_list)
2031 return;
2032 for (i = 0; i < h->nr_cmds; i++) {
2033 kfree(h->cmd_sg_list[i]);
2034 h->cmd_sg_list[i] = NULL;
2035 }
2036 kfree(h->cmd_sg_list);
2037 h->cmd_sg_list = NULL;
2038 }
2039
2040 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2041 {
2042 int i;
2043
2044 if (h->chainsize <= 0)
2045 return 0;
2046
2047 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2048 GFP_KERNEL);
2049 if (!h->cmd_sg_list) {
2050 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
2051 return -ENOMEM;
2052 }
2053 for (i = 0; i < h->nr_cmds; i++) {
2054 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2055 h->chainsize, GFP_KERNEL);
2056 if (!h->cmd_sg_list[i]) {
2057 dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
2058 goto clean;
2059 }
2060 }
2061 return 0;
2062
2063 clean:
2064 hpsa_free_sg_chain_blocks(h);
2065 return -ENOMEM;
2066 }
2067
2068 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2069 struct io_accel2_cmd *cp, struct CommandList *c)
2070 {
2071 struct ioaccel2_sg_element *chain_block;
2072 u64 temp64;
2073 u32 chain_size;
2074
2075 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2076 chain_size = le32_to_cpu(cp->sg[0].length);
2077 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2078 PCI_DMA_TODEVICE);
2079 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2080 /* prevent subsequent unmapping */
2081 cp->sg->address = 0;
2082 return -1;
2083 }
2084 cp->sg->address = cpu_to_le64(temp64);
2085 return 0;
2086 }
2087
2088 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2089 struct io_accel2_cmd *cp)
2090 {
2091 struct ioaccel2_sg_element *chain_sg;
2092 u64 temp64;
2093 u32 chain_size;
2094
2095 chain_sg = cp->sg;
2096 temp64 = le64_to_cpu(chain_sg->address);
2097 chain_size = le32_to_cpu(cp->sg[0].length);
2098 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2099 }
2100
2101 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2102 struct CommandList *c)
2103 {
2104 struct SGDescriptor *chain_sg, *chain_block;
2105 u64 temp64;
2106 u32 chain_len;
2107
2108 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2109 chain_block = h->cmd_sg_list[c->cmdindex];
2110 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2111 chain_len = sizeof(*chain_sg) *
2112 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2113 chain_sg->Len = cpu_to_le32(chain_len);
2114 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2115 PCI_DMA_TODEVICE);
2116 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2117 /* prevent subsequent unmapping */
2118 chain_sg->Addr = cpu_to_le64(0);
2119 return -1;
2120 }
2121 chain_sg->Addr = cpu_to_le64(temp64);
2122 return 0;
2123 }
2124
2125 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2126 struct CommandList *c)
2127 {
2128 struct SGDescriptor *chain_sg;
2129
2130 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2131 return;
2132
2133 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2134 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2135 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2136 }
2137
2138
2139 /* Decode the various types of errors on ioaccel2 path.
2140 * Return 1 for any error that should generate a RAID path retry.
2141 * Return 0 for errors that don't require a RAID path retry.
2142 */
2143 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2144 struct CommandList *c,
2145 struct scsi_cmnd *cmd,
2146 struct io_accel2_cmd *c2)
2147 {
2148 int data_len;
2149 int retry = 0;
2150 u32 ioaccel2_resid = 0;
2151
2152 switch (c2->error_data.serv_response) {
2153 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2154 switch (c2->error_data.status) {
2155 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2156 break;
2157 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2158 cmd->result |= SAM_STAT_CHECK_CONDITION;
2159 if (c2->error_data.data_present !=
2160 IOACCEL2_SENSE_DATA_PRESENT) {
2161 memset(cmd->sense_buffer, 0,
2162 SCSI_SENSE_BUFFERSIZE);
2163 break;
2164 }
2165 /* copy the sense data */
2166 data_len = c2->error_data.sense_data_len;
2167 if (data_len > SCSI_SENSE_BUFFERSIZE)
2168 data_len = SCSI_SENSE_BUFFERSIZE;
2169 if (data_len > sizeof(c2->error_data.sense_data_buff))
2170 data_len =
2171 sizeof(c2->error_data.sense_data_buff);
2172 memcpy(cmd->sense_buffer,
2173 c2->error_data.sense_data_buff, data_len);
2174 retry = 1;
2175 break;
2176 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2177 retry = 1;
2178 break;
2179 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2180 retry = 1;
2181 break;
2182 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2183 retry = 1;
2184 break;
2185 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2186 retry = 1;
2187 break;
2188 default:
2189 retry = 1;
2190 break;
2191 }
2192 break;
2193 case IOACCEL2_SERV_RESPONSE_FAILURE:
2194 switch (c2->error_data.status) {
2195 case IOACCEL2_STATUS_SR_IO_ERROR:
2196 case IOACCEL2_STATUS_SR_IO_ABORTED:
2197 case IOACCEL2_STATUS_SR_OVERRUN:
2198 retry = 1;
2199 break;
2200 case IOACCEL2_STATUS_SR_UNDERRUN:
2201 cmd->result = (DID_OK << 16); /* host byte */
2202 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2203 ioaccel2_resid = get_unaligned_le32(
2204 &c2->error_data.resid_cnt[0]);
2205 scsi_set_resid(cmd, ioaccel2_resid);
2206 break;
2207 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2208 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2209 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2210 /* We will get an event from ctlr to trigger rescan */
2211 retry = 1;
2212 break;
2213 default:
2214 retry = 1;
2215 }
2216 break;
2217 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2218 break;
2219 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2220 break;
2221 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2222 retry = 1;
2223 break;
2224 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2225 break;
2226 default:
2227 retry = 1;
2228 break;
2229 }
2230
2231 return retry; /* retry on raid path? */
2232 }
2233
2234 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2235 struct CommandList *c)
2236 {
2237 bool do_wake = false;
2238
2239 /*
2240 * Prevent the following race in the abort handler:
2241 *
2242 * 1. LLD is requested to abort a SCSI command
2243 * 2. The SCSI command completes
2244 * 3. The struct CommandList associated with step 2 is made available
2245 * 4. New I/O request to LLD to another LUN re-uses struct CommandList
2246 * 5. Abort handler follows scsi_cmnd->host_scribble and
2247 * finds struct CommandList and tries to aborts it
2248 * Now we have aborted the wrong command.
2249 *
2250 * Reset c->scsi_cmd here so that the abort or reset handler will know
2251 * this command has completed. Then, check to see if the handler is
2252 * waiting for this command, and, if so, wake it.
2253 */
2254 c->scsi_cmd = SCSI_CMD_IDLE;
2255 mb(); /* Declare command idle before checking for pending events. */
2256 if (c->abort_pending) {
2257 do_wake = true;
2258 c->abort_pending = false;
2259 }
2260 if (c->reset_pending) {
2261 unsigned long flags;
2262 struct hpsa_scsi_dev_t *dev;
2263
2264 /*
2265 * There appears to be a reset pending; lock the lock and
2266 * reconfirm. If so, then decrement the count of outstanding
2267 * commands and wake the reset command if this is the last one.
2268 */
2269 spin_lock_irqsave(&h->lock, flags);
2270 dev = c->reset_pending; /* Re-fetch under the lock. */
2271 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2272 do_wake = true;
2273 c->reset_pending = NULL;
2274 spin_unlock_irqrestore(&h->lock, flags);
2275 }
2276
2277 if (do_wake)
2278 wake_up_all(&h->event_sync_wait_queue);
2279 }
2280
2281 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2282 struct CommandList *c)
2283 {
2284 hpsa_cmd_resolve_events(h, c);
2285 cmd_tagged_free(h, c);
2286 }
2287
2288 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2289 struct CommandList *c, struct scsi_cmnd *cmd)
2290 {
2291 hpsa_cmd_resolve_and_free(h, c);
2292 cmd->scsi_done(cmd);
2293 }
2294
2295 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2296 {
2297 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2298 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2299 }
2300
2301 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2302 {
2303 cmd->result = DID_ABORT << 16;
2304 }
2305
2306 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2307 struct scsi_cmnd *cmd)
2308 {
2309 hpsa_set_scsi_cmd_aborted(cmd);
2310 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2311 c->Request.CDB, c->err_info->ScsiStatus);
2312 hpsa_cmd_resolve_and_free(h, c);
2313 }
2314
2315 static void process_ioaccel2_completion(struct ctlr_info *h,
2316 struct CommandList *c, struct scsi_cmnd *cmd,
2317 struct hpsa_scsi_dev_t *dev)
2318 {
2319 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2320
2321 /* check for good status */
2322 if (likely(c2->error_data.serv_response == 0 &&
2323 c2->error_data.status == 0))
2324 return hpsa_cmd_free_and_done(h, c, cmd);
2325
2326 /*
2327 * Any RAID offload error results in retry which will use
2328 * the normal I/O path so the controller can handle whatever's
2329 * wrong.
2330 */
2331 if (is_logical_device(dev) &&
2332 c2->error_data.serv_response ==
2333 IOACCEL2_SERV_RESPONSE_FAILURE) {
2334 if (c2->error_data.status ==
2335 IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2336 dev->offload_enabled = 0;
2337
2338 return hpsa_retry_cmd(h, c);
2339 }
2340
2341 if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2342 return hpsa_retry_cmd(h, c);
2343
2344 return hpsa_cmd_free_and_done(h, c, cmd);
2345 }
2346
2347 /* Returns 0 on success, < 0 otherwise. */
2348 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2349 struct CommandList *cp)
2350 {
2351 u8 tmf_status = cp->err_info->ScsiStatus;
2352
2353 switch (tmf_status) {
2354 case CISS_TMF_COMPLETE:
2355 /*
2356 * CISS_TMF_COMPLETE never happens, instead,
2357 * ei->CommandStatus == 0 for this case.
2358 */
2359 case CISS_TMF_SUCCESS:
2360 return 0;
2361 case CISS_TMF_INVALID_FRAME:
2362 case CISS_TMF_NOT_SUPPORTED:
2363 case CISS_TMF_FAILED:
2364 case CISS_TMF_WRONG_LUN:
2365 case CISS_TMF_OVERLAPPED_TAG:
2366 break;
2367 default:
2368 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2369 tmf_status);
2370 break;
2371 }
2372 return -tmf_status;
2373 }
2374
2375 static void complete_scsi_command(struct CommandList *cp)
2376 {
2377 struct scsi_cmnd *cmd;
2378 struct ctlr_info *h;
2379 struct ErrorInfo *ei;
2380 struct hpsa_scsi_dev_t *dev;
2381 struct io_accel2_cmd *c2;
2382
2383 u8 sense_key;
2384 u8 asc; /* additional sense code */
2385 u8 ascq; /* additional sense code qualifier */
2386 unsigned long sense_data_size;
2387
2388 ei = cp->err_info;
2389 cmd = cp->scsi_cmd;
2390 h = cp->h;
2391 dev = cmd->device->hostdata;
2392 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2393
2394 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2395 if ((cp->cmd_type == CMD_SCSI) &&
2396 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2397 hpsa_unmap_sg_chain_block(h, cp);
2398
2399 if ((cp->cmd_type == CMD_IOACCEL2) &&
2400 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2401 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2402
2403 cmd->result = (DID_OK << 16); /* host byte */
2404 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2405
2406 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2407 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2408
2409 /*
2410 * We check for lockup status here as it may be set for
2411 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2412 * fail_all_oustanding_cmds()
2413 */
2414 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2415 /* DID_NO_CONNECT will prevent a retry */
2416 cmd->result = DID_NO_CONNECT << 16;
2417 return hpsa_cmd_free_and_done(h, cp, cmd);
2418 }
2419
2420 if ((unlikely(hpsa_is_pending_event(cp)))) {
2421 if (cp->reset_pending)
2422 return hpsa_cmd_resolve_and_free(h, cp);
2423 if (cp->abort_pending)
2424 return hpsa_cmd_abort_and_free(h, cp, cmd);
2425 }
2426
2427 if (cp->cmd_type == CMD_IOACCEL2)
2428 return process_ioaccel2_completion(h, cp, cmd, dev);
2429
2430 scsi_set_resid(cmd, ei->ResidualCnt);
2431 if (ei->CommandStatus == 0)
2432 return hpsa_cmd_free_and_done(h, cp, cmd);
2433
2434 /* For I/O accelerator commands, copy over some fields to the normal
2435 * CISS header used below for error handling.
2436 */
2437 if (cp->cmd_type == CMD_IOACCEL1) {
2438 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2439 cp->Header.SGList = scsi_sg_count(cmd);
2440 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2441 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2442 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2443 cp->Header.tag = c->tag;
2444 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2445 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2446
2447 /* Any RAID offload error results in retry which will use
2448 * the normal I/O path so the controller can handle whatever's
2449 * wrong.
2450 */
2451 if (is_logical_device(dev)) {
2452 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2453 dev->offload_enabled = 0;
2454 return hpsa_retry_cmd(h, cp);
2455 }
2456 }
2457
2458 /* an error has occurred */
2459 switch (ei->CommandStatus) {
2460
2461 case CMD_TARGET_STATUS:
2462 cmd->result |= ei->ScsiStatus;
2463 /* copy the sense data */
2464 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2465 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2466 else
2467 sense_data_size = sizeof(ei->SenseInfo);
2468 if (ei->SenseLen < sense_data_size)
2469 sense_data_size = ei->SenseLen;
2470 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2471 if (ei->ScsiStatus)
2472 decode_sense_data(ei->SenseInfo, sense_data_size,
2473 &sense_key, &asc, &ascq);
2474 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2475 if (sense_key == ABORTED_COMMAND) {
2476 cmd->result |= DID_SOFT_ERROR << 16;
2477 break;
2478 }
2479 break;
2480 }
2481 /* Problem was not a check condition
2482 * Pass it up to the upper layers...
2483 */
2484 if (ei->ScsiStatus) {
2485 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2486 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2487 "Returning result: 0x%x\n",
2488 cp, ei->ScsiStatus,
2489 sense_key, asc, ascq,
2490 cmd->result);
2491 } else { /* scsi status is zero??? How??? */
2492 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2493 "Returning no connection.\n", cp),
2494
2495 /* Ordinarily, this case should never happen,
2496 * but there is a bug in some released firmware
2497 * revisions that allows it to happen if, for
2498 * example, a 4100 backplane loses power and
2499 * the tape drive is in it. We assume that
2500 * it's a fatal error of some kind because we
2501 * can't show that it wasn't. We will make it
2502 * look like selection timeout since that is
2503 * the most common reason for this to occur,
2504 * and it's severe enough.
2505 */
2506
2507 cmd->result = DID_NO_CONNECT << 16;
2508 }
2509 break;
2510
2511 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2512 break;
2513 case CMD_DATA_OVERRUN:
2514 dev_warn(&h->pdev->dev,
2515 "CDB %16phN data overrun\n", cp->Request.CDB);
2516 break;
2517 case CMD_INVALID: {
2518 /* print_bytes(cp, sizeof(*cp), 1, 0);
2519 print_cmd(cp); */
2520 /* We get CMD_INVALID if you address a non-existent device
2521 * instead of a selection timeout (no response). You will
2522 * see this if you yank out a drive, then try to access it.
2523 * This is kind of a shame because it means that any other
2524 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2525 * missing target. */
2526 cmd->result = DID_NO_CONNECT << 16;
2527 }
2528 break;
2529 case CMD_PROTOCOL_ERR:
2530 cmd->result = DID_ERROR << 16;
2531 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2532 cp->Request.CDB);
2533 break;
2534 case CMD_HARDWARE_ERR:
2535 cmd->result = DID_ERROR << 16;
2536 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2537 cp->Request.CDB);
2538 break;
2539 case CMD_CONNECTION_LOST:
2540 cmd->result = DID_ERROR << 16;
2541 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2542 cp->Request.CDB);
2543 break;
2544 case CMD_ABORTED:
2545 /* Return now to avoid calling scsi_done(). */
2546 return hpsa_cmd_abort_and_free(h, cp, cmd);
2547 case CMD_ABORT_FAILED:
2548 cmd->result = DID_ERROR << 16;
2549 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2550 cp->Request.CDB);
2551 break;
2552 case CMD_UNSOLICITED_ABORT:
2553 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2554 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2555 cp->Request.CDB);
2556 break;
2557 case CMD_TIMEOUT:
2558 cmd->result = DID_TIME_OUT << 16;
2559 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2560 cp->Request.CDB);
2561 break;
2562 case CMD_UNABORTABLE:
2563 cmd->result = DID_ERROR << 16;
2564 dev_warn(&h->pdev->dev, "Command unabortable\n");
2565 break;
2566 case CMD_TMF_STATUS:
2567 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2568 cmd->result = DID_ERROR << 16;
2569 break;
2570 case CMD_IOACCEL_DISABLED:
2571 /* This only handles the direct pass-through case since RAID
2572 * offload is handled above. Just attempt a retry.
2573 */
2574 cmd->result = DID_SOFT_ERROR << 16;
2575 dev_warn(&h->pdev->dev,
2576 "cp %p had HP SSD Smart Path error\n", cp);
2577 break;
2578 default:
2579 cmd->result = DID_ERROR << 16;
2580 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2581 cp, ei->CommandStatus);
2582 }
2583
2584 return hpsa_cmd_free_and_done(h, cp, cmd);
2585 }
2586
2587 static void hpsa_pci_unmap(struct pci_dev *pdev,
2588 struct CommandList *c, int sg_used, int data_direction)
2589 {
2590 int i;
2591
2592 for (i = 0; i < sg_used; i++)
2593 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2594 le32_to_cpu(c->SG[i].Len),
2595 data_direction);
2596 }
2597
2598 static int hpsa_map_one(struct pci_dev *pdev,
2599 struct CommandList *cp,
2600 unsigned char *buf,
2601 size_t buflen,
2602 int data_direction)
2603 {
2604 u64 addr64;
2605
2606 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2607 cp->Header.SGList = 0;
2608 cp->Header.SGTotal = cpu_to_le16(0);
2609 return 0;
2610 }
2611
2612 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2613 if (dma_mapping_error(&pdev->dev, addr64)) {
2614 /* Prevent subsequent unmap of something never mapped */
2615 cp->Header.SGList = 0;
2616 cp->Header.SGTotal = cpu_to_le16(0);
2617 return -1;
2618 }
2619 cp->SG[0].Addr = cpu_to_le64(addr64);
2620 cp->SG[0].Len = cpu_to_le32(buflen);
2621 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2622 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2623 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2624 return 0;
2625 }
2626
2627 #define NO_TIMEOUT ((unsigned long) -1)
2628 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2629 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2630 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2631 {
2632 DECLARE_COMPLETION_ONSTACK(wait);
2633
2634 c->waiting = &wait;
2635 __enqueue_cmd_and_start_io(h, c, reply_queue);
2636 if (timeout_msecs == NO_TIMEOUT) {
2637 /* TODO: get rid of this no-timeout thing */
2638 wait_for_completion_io(&wait);
2639 return IO_OK;
2640 }
2641 if (!wait_for_completion_io_timeout(&wait,
2642 msecs_to_jiffies(timeout_msecs))) {
2643 dev_warn(&h->pdev->dev, "Command timed out.\n");
2644 return -ETIMEDOUT;
2645 }
2646 return IO_OK;
2647 }
2648
2649 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2650 int reply_queue, unsigned long timeout_msecs)
2651 {
2652 if (unlikely(lockup_detected(h))) {
2653 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2654 return IO_OK;
2655 }
2656 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2657 }
2658
2659 static u32 lockup_detected(struct ctlr_info *h)
2660 {
2661 int cpu;
2662 u32 rc, *lockup_detected;
2663
2664 cpu = get_cpu();
2665 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2666 rc = *lockup_detected;
2667 put_cpu();
2668 return rc;
2669 }
2670
2671 #define MAX_DRIVER_CMD_RETRIES 25
2672 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2673 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2674 {
2675 int backoff_time = 10, retry_count = 0;
2676 int rc;
2677
2678 do {
2679 memset(c->err_info, 0, sizeof(*c->err_info));
2680 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2681 timeout_msecs);
2682 if (rc)
2683 break;
2684 retry_count++;
2685 if (retry_count > 3) {
2686 msleep(backoff_time);
2687 if (backoff_time < 1000)
2688 backoff_time *= 2;
2689 }
2690 } while ((check_for_unit_attention(h, c) ||
2691 check_for_busy(h, c)) &&
2692 retry_count <= MAX_DRIVER_CMD_RETRIES);
2693 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2694 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2695 rc = -EIO;
2696 return rc;
2697 }
2698
2699 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2700 struct CommandList *c)
2701 {
2702 const u8 *cdb = c->Request.CDB;
2703 const u8 *lun = c->Header.LUN.LunAddrBytes;
2704
2705 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2706 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2707 txt, lun[0], lun[1], lun[2], lun[3],
2708 lun[4], lun[5], lun[6], lun[7],
2709 cdb[0], cdb[1], cdb[2], cdb[3],
2710 cdb[4], cdb[5], cdb[6], cdb[7],
2711 cdb[8], cdb[9], cdb[10], cdb[11],
2712 cdb[12], cdb[13], cdb[14], cdb[15]);
2713 }
2714
2715 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2716 struct CommandList *cp)
2717 {
2718 const struct ErrorInfo *ei = cp->err_info;
2719 struct device *d = &cp->h->pdev->dev;
2720 u8 sense_key, asc, ascq;
2721 int sense_len;
2722
2723 switch (ei->CommandStatus) {
2724 case CMD_TARGET_STATUS:
2725 if (ei->SenseLen > sizeof(ei->SenseInfo))
2726 sense_len = sizeof(ei->SenseInfo);
2727 else
2728 sense_len = ei->SenseLen;
2729 decode_sense_data(ei->SenseInfo, sense_len,
2730 &sense_key, &asc, &ascq);
2731 hpsa_print_cmd(h, "SCSI status", cp);
2732 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2733 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2734 sense_key, asc, ascq);
2735 else
2736 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2737 if (ei->ScsiStatus == 0)
2738 dev_warn(d, "SCSI status is abnormally zero. "
2739 "(probably indicates selection timeout "
2740 "reported incorrectly due to a known "
2741 "firmware bug, circa July, 2001.)\n");
2742 break;
2743 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2744 break;
2745 case CMD_DATA_OVERRUN:
2746 hpsa_print_cmd(h, "overrun condition", cp);
2747 break;
2748 case CMD_INVALID: {
2749 /* controller unfortunately reports SCSI passthru's
2750 * to non-existent targets as invalid commands.
2751 */
2752 hpsa_print_cmd(h, "invalid command", cp);
2753 dev_warn(d, "probably means device no longer present\n");
2754 }
2755 break;
2756 case CMD_PROTOCOL_ERR:
2757 hpsa_print_cmd(h, "protocol error", cp);
2758 break;
2759 case CMD_HARDWARE_ERR:
2760 hpsa_print_cmd(h, "hardware error", cp);
2761 break;
2762 case CMD_CONNECTION_LOST:
2763 hpsa_print_cmd(h, "connection lost", cp);
2764 break;
2765 case CMD_ABORTED:
2766 hpsa_print_cmd(h, "aborted", cp);
2767 break;
2768 case CMD_ABORT_FAILED:
2769 hpsa_print_cmd(h, "abort failed", cp);
2770 break;
2771 case CMD_UNSOLICITED_ABORT:
2772 hpsa_print_cmd(h, "unsolicited abort", cp);
2773 break;
2774 case CMD_TIMEOUT:
2775 hpsa_print_cmd(h, "timed out", cp);
2776 break;
2777 case CMD_UNABORTABLE:
2778 hpsa_print_cmd(h, "unabortable", cp);
2779 break;
2780 case CMD_CTLR_LOCKUP:
2781 hpsa_print_cmd(h, "controller lockup detected", cp);
2782 break;
2783 default:
2784 hpsa_print_cmd(h, "unknown status", cp);
2785 dev_warn(d, "Unknown command status %x\n",
2786 ei->CommandStatus);
2787 }
2788 }
2789
2790 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2791 u16 page, unsigned char *buf,
2792 unsigned char bufsize)
2793 {
2794 int rc = IO_OK;
2795 struct CommandList *c;
2796 struct ErrorInfo *ei;
2797
2798 c = cmd_alloc(h);
2799
2800 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2801 page, scsi3addr, TYPE_CMD)) {
2802 rc = -1;
2803 goto out;
2804 }
2805 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2806 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2807 if (rc)
2808 goto out;
2809 ei = c->err_info;
2810 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2811 hpsa_scsi_interpret_error(h, c);
2812 rc = -1;
2813 }
2814 out:
2815 cmd_free(h, c);
2816 return rc;
2817 }
2818
2819 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2820 u8 reset_type, int reply_queue)
2821 {
2822 int rc = IO_OK;
2823 struct CommandList *c;
2824 struct ErrorInfo *ei;
2825
2826 c = cmd_alloc(h);
2827
2828
2829 /* fill_cmd can't fail here, no data buffer to map. */
2830 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
2831 scsi3addr, TYPE_MSG);
2832 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2833 if (rc) {
2834 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2835 goto out;
2836 }
2837 /* no unmap needed here because no data xfer. */
2838
2839 ei = c->err_info;
2840 if (ei->CommandStatus != 0) {
2841 hpsa_scsi_interpret_error(h, c);
2842 rc = -1;
2843 }
2844 out:
2845 cmd_free(h, c);
2846 return rc;
2847 }
2848
2849 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
2850 struct hpsa_scsi_dev_t *dev,
2851 unsigned char *scsi3addr)
2852 {
2853 int i;
2854 bool match = false;
2855 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2856 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
2857
2858 if (hpsa_is_cmd_idle(c))
2859 return false;
2860
2861 switch (c->cmd_type) {
2862 case CMD_SCSI:
2863 case CMD_IOCTL_PEND:
2864 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
2865 sizeof(c->Header.LUN.LunAddrBytes));
2866 break;
2867
2868 case CMD_IOACCEL1:
2869 case CMD_IOACCEL2:
2870 if (c->phys_disk == dev) {
2871 /* HBA mode match */
2872 match = true;
2873 } else {
2874 /* Possible RAID mode -- check each phys dev. */
2875 /* FIXME: Do we need to take out a lock here? If
2876 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
2877 * instead. */
2878 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2879 /* FIXME: an alternate test might be
2880 *
2881 * match = dev->phys_disk[i]->ioaccel_handle
2882 * == c2->scsi_nexus; */
2883 match = dev->phys_disk[i] == c->phys_disk;
2884 }
2885 }
2886 break;
2887
2888 case IOACCEL2_TMF:
2889 for (i = 0; i < dev->nphysical_disks && !match; i++) {
2890 match = dev->phys_disk[i]->ioaccel_handle ==
2891 le32_to_cpu(ac->it_nexus);
2892 }
2893 break;
2894
2895 case 0: /* The command is in the middle of being initialized. */
2896 match = false;
2897 break;
2898
2899 default:
2900 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
2901 c->cmd_type);
2902 BUG();
2903 }
2904
2905 return match;
2906 }
2907
2908 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
2909 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
2910 {
2911 int i;
2912 int rc = 0;
2913
2914 /* We can really only handle one reset at a time */
2915 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
2916 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
2917 return -EINTR;
2918 }
2919
2920 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
2921
2922 for (i = 0; i < h->nr_cmds; i++) {
2923 struct CommandList *c = h->cmd_pool + i;
2924 int refcount = atomic_inc_return(&c->refcount);
2925
2926 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
2927 unsigned long flags;
2928
2929 /*
2930 * Mark the target command as having a reset pending,
2931 * then lock a lock so that the command cannot complete
2932 * while we're considering it. If the command is not
2933 * idle then count it; otherwise revoke the event.
2934 */
2935 c->reset_pending = dev;
2936 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
2937 if (!hpsa_is_cmd_idle(c))
2938 atomic_inc(&dev->reset_cmds_out);
2939 else
2940 c->reset_pending = NULL;
2941 spin_unlock_irqrestore(&h->lock, flags);
2942 }
2943
2944 cmd_free(h, c);
2945 }
2946
2947 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
2948 if (!rc)
2949 wait_event(h->event_sync_wait_queue,
2950 atomic_read(&dev->reset_cmds_out) == 0 ||
2951 lockup_detected(h));
2952
2953 if (unlikely(lockup_detected(h))) {
2954 dev_warn(&h->pdev->dev,
2955 "Controller lockup detected during reset wait\n");
2956 rc = -ENODEV;
2957 }
2958
2959 if (unlikely(rc))
2960 atomic_set(&dev->reset_cmds_out, 0);
2961
2962 mutex_unlock(&h->reset_mutex);
2963 return rc;
2964 }
2965
2966 static void hpsa_get_raid_level(struct ctlr_info *h,
2967 unsigned char *scsi3addr, unsigned char *raid_level)
2968 {
2969 int rc;
2970 unsigned char *buf;
2971
2972 *raid_level = RAID_UNKNOWN;
2973 buf = kzalloc(64, GFP_KERNEL);
2974 if (!buf)
2975 return;
2976 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2977 if (rc == 0)
2978 *raid_level = buf[8];
2979 if (*raid_level > RAID_UNKNOWN)
2980 *raid_level = RAID_UNKNOWN;
2981 kfree(buf);
2982 return;
2983 }
2984
2985 #define HPSA_MAP_DEBUG
2986 #ifdef HPSA_MAP_DEBUG
2987 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2988 struct raid_map_data *map_buff)
2989 {
2990 struct raid_map_disk_data *dd = &map_buff->data[0];
2991 int map, row, col;
2992 u16 map_cnt, row_cnt, disks_per_row;
2993
2994 if (rc != 0)
2995 return;
2996
2997 /* Show details only if debugging has been activated. */
2998 if (h->raid_offload_debug < 2)
2999 return;
3000
3001 dev_info(&h->pdev->dev, "structure_size = %u\n",
3002 le32_to_cpu(map_buff->structure_size));
3003 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3004 le32_to_cpu(map_buff->volume_blk_size));
3005 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3006 le64_to_cpu(map_buff->volume_blk_cnt));
3007 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3008 map_buff->phys_blk_shift);
3009 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3010 map_buff->parity_rotation_shift);
3011 dev_info(&h->pdev->dev, "strip_size = %u\n",
3012 le16_to_cpu(map_buff->strip_size));
3013 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3014 le64_to_cpu(map_buff->disk_starting_blk));
3015 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3016 le64_to_cpu(map_buff->disk_blk_cnt));
3017 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3018 le16_to_cpu(map_buff->data_disks_per_row));
3019 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3020 le16_to_cpu(map_buff->metadata_disks_per_row));
3021 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3022 le16_to_cpu(map_buff->row_cnt));
3023 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3024 le16_to_cpu(map_buff->layout_map_count));
3025 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3026 le16_to_cpu(map_buff->flags));
3027 dev_info(&h->pdev->dev, "encrypytion = %s\n",
3028 le16_to_cpu(map_buff->flags) &
3029 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3030 dev_info(&h->pdev->dev, "dekindex = %u\n",
3031 le16_to_cpu(map_buff->dekindex));
3032 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3033 for (map = 0; map < map_cnt; map++) {
3034 dev_info(&h->pdev->dev, "Map%u:\n", map);
3035 row_cnt = le16_to_cpu(map_buff->row_cnt);
3036 for (row = 0; row < row_cnt; row++) {
3037 dev_info(&h->pdev->dev, " Row%u:\n", row);
3038 disks_per_row =
3039 le16_to_cpu(map_buff->data_disks_per_row);
3040 for (col = 0; col < disks_per_row; col++, dd++)
3041 dev_info(&h->pdev->dev,
3042 " D%02u: h=0x%04x xor=%u,%u\n",
3043 col, dd->ioaccel_handle,
3044 dd->xor_mult[0], dd->xor_mult[1]);
3045 disks_per_row =
3046 le16_to_cpu(map_buff->metadata_disks_per_row);
3047 for (col = 0; col < disks_per_row; col++, dd++)
3048 dev_info(&h->pdev->dev,
3049 " M%02u: h=0x%04x xor=%u,%u\n",
3050 col, dd->ioaccel_handle,
3051 dd->xor_mult[0], dd->xor_mult[1]);
3052 }
3053 }
3054 }
3055 #else
3056 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3057 __attribute__((unused)) int rc,
3058 __attribute__((unused)) struct raid_map_data *map_buff)
3059 {
3060 }
3061 #endif
3062
3063 static int hpsa_get_raid_map(struct ctlr_info *h,
3064 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3065 {
3066 int rc = 0;
3067 struct CommandList *c;
3068 struct ErrorInfo *ei;
3069
3070 c = cmd_alloc(h);
3071
3072 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3073 sizeof(this_device->raid_map), 0,
3074 scsi3addr, TYPE_CMD)) {
3075 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3076 cmd_free(h, c);
3077 return -1;
3078 }
3079 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3080 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3081 if (rc)
3082 goto out;
3083 ei = c->err_info;
3084 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3085 hpsa_scsi_interpret_error(h, c);
3086 rc = -1;
3087 goto out;
3088 }
3089 cmd_free(h, c);
3090
3091 /* @todo in the future, dynamically allocate RAID map memory */
3092 if (le32_to_cpu(this_device->raid_map.structure_size) >
3093 sizeof(this_device->raid_map)) {
3094 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3095 rc = -1;
3096 }
3097 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3098 return rc;
3099 out:
3100 cmd_free(h, c);
3101 return rc;
3102 }
3103
3104 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3105 unsigned char scsi3addr[], u16 bmic_device_index,
3106 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3107 {
3108 int rc = IO_OK;
3109 struct CommandList *c;
3110 struct ErrorInfo *ei;
3111
3112 c = cmd_alloc(h);
3113
3114 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3115 0, RAID_CTLR_LUNID, TYPE_CMD);
3116 if (rc)
3117 goto out;
3118
3119 c->Request.CDB[2] = bmic_device_index & 0xff;
3120 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3121
3122 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3123 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3124 if (rc)
3125 goto out;
3126 ei = c->err_info;
3127 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3128 hpsa_scsi_interpret_error(h, c);
3129 rc = -1;
3130 }
3131 out:
3132 cmd_free(h, c);
3133 return rc;
3134 }
3135
3136 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3137 struct bmic_identify_controller *buf, size_t bufsize)
3138 {
3139 int rc = IO_OK;
3140 struct CommandList *c;
3141 struct ErrorInfo *ei;
3142
3143 c = cmd_alloc(h);
3144
3145 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3146 0, RAID_CTLR_LUNID, TYPE_CMD);
3147 if (rc)
3148 goto out;
3149
3150 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3151 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3152 if (rc)
3153 goto out;
3154 ei = c->err_info;
3155 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3156 hpsa_scsi_interpret_error(h, c);
3157 rc = -1;
3158 }
3159 out:
3160 cmd_free(h, c);
3161 return rc;
3162 }
3163
3164 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3165 unsigned char scsi3addr[], u16 bmic_device_index,
3166 struct bmic_identify_physical_device *buf, size_t bufsize)
3167 {
3168 int rc = IO_OK;
3169 struct CommandList *c;
3170 struct ErrorInfo *ei;
3171
3172 c = cmd_alloc(h);
3173 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3174 0, RAID_CTLR_LUNID, TYPE_CMD);
3175 if (rc)
3176 goto out;
3177
3178 c->Request.CDB[2] = bmic_device_index & 0xff;
3179 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3180
3181 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3182 NO_TIMEOUT);
3183 ei = c->err_info;
3184 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3185 hpsa_scsi_interpret_error(h, c);
3186 rc = -1;
3187 }
3188 out:
3189 cmd_free(h, c);
3190
3191 return rc;
3192 }
3193
3194 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3195 unsigned char *scsi3addr)
3196 {
3197 struct ReportExtendedLUNdata *physdev;
3198 u32 nphysicals;
3199 u64 sa = 0;
3200 int i;
3201
3202 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3203 if (!physdev)
3204 return 0;
3205
3206 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3207 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3208 kfree(physdev);
3209 return 0;
3210 }
3211 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3212
3213 for (i = 0; i < nphysicals; i++)
3214 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3215 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3216 break;
3217 }
3218
3219 kfree(physdev);
3220
3221 return sa;
3222 }
3223
3224 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3225 struct hpsa_scsi_dev_t *dev)
3226 {
3227 int rc;
3228 u64 sa = 0;
3229
3230 if (is_hba_lunid(scsi3addr)) {
3231 struct bmic_sense_subsystem_info *ssi;
3232
3233 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3234 if (ssi == NULL) {
3235 dev_warn(&h->pdev->dev,
3236 "%s: out of memory\n", __func__);
3237 return;
3238 }
3239
3240 rc = hpsa_bmic_sense_subsystem_information(h,
3241 scsi3addr, 0, ssi, sizeof(*ssi));
3242 if (rc == 0) {
3243 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3244 h->sas_address = sa;
3245 }
3246
3247 kfree(ssi);
3248 } else
3249 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3250
3251 dev->sas_address = sa;
3252 }
3253
3254 /* Get a device id from inquiry page 0x83 */
3255 static int hpsa_vpd_page_supported(struct ctlr_info *h,
3256 unsigned char scsi3addr[], u8 page)
3257 {
3258 int rc;
3259 int i;
3260 int pages;
3261 unsigned char *buf, bufsize;
3262
3263 buf = kzalloc(256, GFP_KERNEL);
3264 if (!buf)
3265 return 0;
3266
3267 /* Get the size of the page list first */
3268 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3269 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3270 buf, HPSA_VPD_HEADER_SZ);
3271 if (rc != 0)
3272 goto exit_unsupported;
3273 pages = buf[3];
3274 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3275 bufsize = pages + HPSA_VPD_HEADER_SZ;
3276 else
3277 bufsize = 255;
3278
3279 /* Get the whole VPD page list */
3280 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3281 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3282 buf, bufsize);
3283 if (rc != 0)
3284 goto exit_unsupported;
3285
3286 pages = buf[3];
3287 for (i = 1; i <= pages; i++)
3288 if (buf[3 + i] == page)
3289 goto exit_supported;
3290 exit_unsupported:
3291 kfree(buf);
3292 return 0;
3293 exit_supported:
3294 kfree(buf);
3295 return 1;
3296 }
3297
3298 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3299 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3300 {
3301 int rc;
3302 unsigned char *buf;
3303 u8 ioaccel_status;
3304
3305 this_device->offload_config = 0;
3306 this_device->offload_enabled = 0;
3307 this_device->offload_to_be_enabled = 0;
3308
3309 buf = kzalloc(64, GFP_KERNEL);
3310 if (!buf)
3311 return;
3312 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3313 goto out;
3314 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3315 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3316 if (rc != 0)
3317 goto out;
3318
3319 #define IOACCEL_STATUS_BYTE 4
3320 #define OFFLOAD_CONFIGURED_BIT 0x01
3321 #define OFFLOAD_ENABLED_BIT 0x02
3322 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3323 this_device->offload_config =
3324 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3325 if (this_device->offload_config) {
3326 this_device->offload_enabled =
3327 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3328 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3329 this_device->offload_enabled = 0;
3330 }
3331 this_device->offload_to_be_enabled = this_device->offload_enabled;
3332 out:
3333 kfree(buf);
3334 return;
3335 }
3336
3337 /* Get the device id from inquiry page 0x83 */
3338 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3339 unsigned char *device_id, int index, int buflen)
3340 {
3341 int rc;
3342 unsigned char *buf;
3343
3344 if (buflen > 16)
3345 buflen = 16;
3346 buf = kzalloc(64, GFP_KERNEL);
3347 if (!buf)
3348 return -ENOMEM;
3349 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
3350 if (rc == 0)
3351 memcpy(device_id, &buf[index], buflen);
3352
3353 kfree(buf);
3354
3355 return rc != 0;
3356 }
3357
3358 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3359 void *buf, int bufsize,
3360 int extended_response)
3361 {
3362 int rc = IO_OK;
3363 struct CommandList *c;
3364 unsigned char scsi3addr[8];
3365 struct ErrorInfo *ei;
3366
3367 c = cmd_alloc(h);
3368
3369 /* address the controller */
3370 memset(scsi3addr, 0, sizeof(scsi3addr));
3371 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3372 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3373 rc = -1;
3374 goto out;
3375 }
3376 if (extended_response)
3377 c->Request.CDB[1] = extended_response;
3378 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3379 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3380 if (rc)
3381 goto out;
3382 ei = c->err_info;
3383 if (ei->CommandStatus != 0 &&
3384 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3385 hpsa_scsi_interpret_error(h, c);
3386 rc = -1;
3387 } else {
3388 struct ReportLUNdata *rld = buf;
3389
3390 if (rld->extended_response_flag != extended_response) {
3391 dev_err(&h->pdev->dev,
3392 "report luns requested format %u, got %u\n",
3393 extended_response,
3394 rld->extended_response_flag);
3395 rc = -1;
3396 }
3397 }
3398 out:
3399 cmd_free(h, c);
3400 return rc;
3401 }
3402
3403 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3404 struct ReportExtendedLUNdata *buf, int bufsize)
3405 {
3406 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3407 HPSA_REPORT_PHYS_EXTENDED);
3408 }
3409
3410 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3411 struct ReportLUNdata *buf, int bufsize)
3412 {
3413 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3414 }
3415
3416 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3417 int bus, int target, int lun)
3418 {
3419 device->bus = bus;
3420 device->target = target;
3421 device->lun = lun;
3422 }
3423
3424 /* Use VPD inquiry to get details of volume status */
3425 static int hpsa_get_volume_status(struct ctlr_info *h,
3426 unsigned char scsi3addr[])
3427 {
3428 int rc;
3429 int status;
3430 int size;
3431 unsigned char *buf;
3432
3433 buf = kzalloc(64, GFP_KERNEL);
3434 if (!buf)
3435 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3436
3437 /* Does controller have VPD for logical volume status? */
3438 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3439 goto exit_failed;
3440
3441 /* Get the size of the VPD return buffer */
3442 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3443 buf, HPSA_VPD_HEADER_SZ);
3444 if (rc != 0)
3445 goto exit_failed;
3446 size = buf[3];
3447
3448 /* Now get the whole VPD buffer */
3449 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3450 buf, size + HPSA_VPD_HEADER_SZ);
3451 if (rc != 0)
3452 goto exit_failed;
3453 status = buf[4]; /* status byte */
3454
3455 kfree(buf);
3456 return status;
3457 exit_failed:
3458 kfree(buf);
3459 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3460 }
3461
3462 /* Determine offline status of a volume.
3463 * Return either:
3464 * 0 (not offline)
3465 * 0xff (offline for unknown reasons)
3466 * # (integer code indicating one of several NOT READY states
3467 * describing why a volume is to be kept offline)
3468 */
3469 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3470 unsigned char scsi3addr[])
3471 {
3472 struct CommandList *c;
3473 unsigned char *sense;
3474 u8 sense_key, asc, ascq;
3475 int sense_len;
3476 int rc, ldstat = 0;
3477 u16 cmd_status;
3478 u8 scsi_status;
3479 #define ASC_LUN_NOT_READY 0x04
3480 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3481 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3482
3483 c = cmd_alloc(h);
3484
3485 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3486 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3487 if (rc) {
3488 cmd_free(h, c);
3489 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3490 }
3491 sense = c->err_info->SenseInfo;
3492 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3493 sense_len = sizeof(c->err_info->SenseInfo);
3494 else
3495 sense_len = c->err_info->SenseLen;
3496 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3497 cmd_status = c->err_info->CommandStatus;
3498 scsi_status = c->err_info->ScsiStatus;
3499 cmd_free(h, c);
3500
3501 /* Determine the reason for not ready state */
3502 ldstat = hpsa_get_volume_status(h, scsi3addr);
3503
3504 /* Keep volume offline in certain cases: */
3505 switch (ldstat) {
3506 case HPSA_LV_FAILED:
3507 case HPSA_LV_UNDERGOING_ERASE:
3508 case HPSA_LV_NOT_AVAILABLE:
3509 case HPSA_LV_UNDERGOING_RPI:
3510 case HPSA_LV_PENDING_RPI:
3511 case HPSA_LV_ENCRYPTED_NO_KEY:
3512 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3513 case HPSA_LV_UNDERGOING_ENCRYPTION:
3514 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3515 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3516 return ldstat;
3517 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3518 /* If VPD status page isn't available,
3519 * use ASC/ASCQ to determine state
3520 */
3521 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3522 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3523 return ldstat;
3524 break;
3525 default:
3526 break;
3527 }
3528 return HPSA_LV_OK;
3529 }
3530
3531 /*
3532 * Find out if a logical device supports aborts by simply trying one.
3533 * Smart Array may claim not to support aborts on logical drives, but
3534 * if a MSA2000 * is connected, the drives on that will be presented
3535 * by the Smart Array as logical drives, and aborts may be sent to
3536 * those devices successfully. So the simplest way to find out is
3537 * to simply try an abort and see how the device responds.
3538 */
3539 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3540 unsigned char *scsi3addr)
3541 {
3542 struct CommandList *c;
3543 struct ErrorInfo *ei;
3544 int rc = 0;
3545
3546 u64 tag = (u64) -1; /* bogus tag */
3547
3548 /* Assume that physical devices support aborts */
3549 if (!is_logical_dev_addr_mode(scsi3addr))
3550 return 1;
3551
3552 c = cmd_alloc(h);
3553
3554 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3555 (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3556 /* no unmap needed here because no data xfer. */
3557 ei = c->err_info;
3558 switch (ei->CommandStatus) {
3559 case CMD_INVALID:
3560 rc = 0;
3561 break;
3562 case CMD_UNABORTABLE:
3563 case CMD_ABORT_FAILED:
3564 rc = 1;
3565 break;
3566 case CMD_TMF_STATUS:
3567 rc = hpsa_evaluate_tmf_status(h, c);
3568 break;
3569 default:
3570 rc = 0;
3571 break;
3572 }
3573 cmd_free(h, c);
3574 return rc;
3575 }
3576
3577 static void sanitize_inquiry_string(unsigned char *s, int len)
3578 {
3579 bool terminated = false;
3580
3581 for (; len > 0; (--len, ++s)) {
3582 if (*s == 0)
3583 terminated = true;
3584 if (terminated || *s < 0x20 || *s > 0x7e)
3585 *s = ' ';
3586 }
3587 }
3588
3589 static int hpsa_update_device_info(struct ctlr_info *h,
3590 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3591 unsigned char *is_OBDR_device)
3592 {
3593
3594 #define OBDR_SIG_OFFSET 43
3595 #define OBDR_TAPE_SIG "$DR-10"
3596 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3597 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3598
3599 unsigned char *inq_buff;
3600 unsigned char *obdr_sig;
3601 int rc = 0;
3602
3603 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3604 if (!inq_buff) {
3605 rc = -ENOMEM;
3606 goto bail_out;
3607 }
3608
3609 /* Do an inquiry to the device to see what it is. */
3610 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3611 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3612 dev_err(&h->pdev->dev,
3613 "%s: inquiry failed, device will be skipped.\n",
3614 __func__);
3615 rc = HPSA_INQUIRY_FAILED;
3616 goto bail_out;
3617 }
3618
3619 sanitize_inquiry_string(&inq_buff[8], 8);
3620 sanitize_inquiry_string(&inq_buff[16], 16);
3621
3622 this_device->devtype = (inq_buff[0] & 0x1f);
3623 memcpy(this_device->scsi3addr, scsi3addr, 8);
3624 memcpy(this_device->vendor, &inq_buff[8],
3625 sizeof(this_device->vendor));
3626 memcpy(this_device->model, &inq_buff[16],
3627 sizeof(this_device->model));
3628 memset(this_device->device_id, 0,
3629 sizeof(this_device->device_id));
3630 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3631 sizeof(this_device->device_id));
3632
3633 if (this_device->devtype == TYPE_DISK &&
3634 is_logical_dev_addr_mode(scsi3addr)) {
3635 unsigned char volume_offline;
3636
3637 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3638 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3639 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3640 volume_offline = hpsa_volume_offline(h, scsi3addr);
3641 this_device->volume_offline = volume_offline;
3642 if (volume_offline == HPSA_LV_FAILED) {
3643 rc = HPSA_LV_FAILED;
3644 dev_err(&h->pdev->dev,
3645 "%s: LV failed, device will be skipped.\n",
3646 __func__);
3647 goto bail_out;
3648 }
3649 } else {
3650 this_device->raid_level = RAID_UNKNOWN;
3651 this_device->offload_config = 0;
3652 this_device->offload_enabled = 0;
3653 this_device->offload_to_be_enabled = 0;
3654 this_device->hba_ioaccel_enabled = 0;
3655 this_device->volume_offline = 0;
3656 this_device->queue_depth = h->nr_cmds;
3657 }
3658
3659 if (is_OBDR_device) {
3660 /* See if this is a One-Button-Disaster-Recovery device
3661 * by looking for "$DR-10" at offset 43 in inquiry data.
3662 */
3663 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3664 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3665 strncmp(obdr_sig, OBDR_TAPE_SIG,
3666 OBDR_SIG_LEN) == 0);
3667 }
3668 kfree(inq_buff);
3669 return 0;
3670
3671 bail_out:
3672 kfree(inq_buff);
3673 return rc;
3674 }
3675
3676 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3677 struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3678 {
3679 unsigned long flags;
3680 int rc, entry;
3681 /*
3682 * See if this device supports aborts. If we already know
3683 * the device, we already know if it supports aborts, otherwise
3684 * we have to find out if it supports aborts by trying one.
3685 */
3686 spin_lock_irqsave(&h->devlock, flags);
3687 rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3688 if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3689 entry >= 0 && entry < h->ndevices) {
3690 dev->supports_aborts = h->dev[entry]->supports_aborts;
3691 spin_unlock_irqrestore(&h->devlock, flags);
3692 } else {
3693 spin_unlock_irqrestore(&h->devlock, flags);
3694 dev->supports_aborts =
3695 hpsa_device_supports_aborts(h, scsi3addr);
3696 if (dev->supports_aborts < 0)
3697 dev->supports_aborts = 0;
3698 }
3699 }
3700
3701 /*
3702 * Helper function to assign bus, target, lun mapping of devices.
3703 * Logical drive target and lun are assigned at this time, but
3704 * physical device lun and target assignment are deferred (assigned
3705 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3706 */
3707 static void figure_bus_target_lun(struct ctlr_info *h,
3708 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3709 {
3710 u32 lunid = get_unaligned_le32(lunaddrbytes);
3711
3712 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3713 /* physical device, target and lun filled in later */
3714 if (is_hba_lunid(lunaddrbytes))
3715 hpsa_set_bus_target_lun(device,
3716 HPSA_HBA_BUS, 0, lunid & 0x3fff);
3717 else
3718 /* defer target, lun assignment for physical devices */
3719 hpsa_set_bus_target_lun(device,
3720 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
3721 return;
3722 }
3723 /* It's a logical device */
3724 if (device->external) {
3725 hpsa_set_bus_target_lun(device,
3726 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
3727 lunid & 0x00ff);
3728 return;
3729 }
3730 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
3731 0, lunid & 0x3fff);
3732 }
3733
3734
3735 /*
3736 * Get address of physical disk used for an ioaccel2 mode command:
3737 * 1. Extract ioaccel2 handle from the command.
3738 * 2. Find a matching ioaccel2 handle from list of physical disks.
3739 * 3. Return:
3740 * 1 and set scsi3addr to address of matching physical
3741 * 0 if no matching physical disk was found.
3742 */
3743 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3744 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3745 {
3746 struct io_accel2_cmd *c2 =
3747 &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3748 unsigned long flags;
3749 int i;
3750
3751 spin_lock_irqsave(&h->devlock, flags);
3752 for (i = 0; i < h->ndevices; i++)
3753 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3754 memcpy(scsi3addr, h->dev[i]->scsi3addr,
3755 sizeof(h->dev[i]->scsi3addr));
3756 spin_unlock_irqrestore(&h->devlock, flags);
3757 return 1;
3758 }
3759 spin_unlock_irqrestore(&h->devlock, flags);
3760 return 0;
3761 }
3762
3763 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
3764 int i, int nphysicals, int nlocal_logicals)
3765 {
3766 /* In report logicals, local logicals are listed first,
3767 * then any externals.
3768 */
3769 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3770
3771 if (i == raid_ctlr_position)
3772 return 0;
3773
3774 if (i < logicals_start)
3775 return 0;
3776
3777 /* i is in logicals range, but still within local logicals */
3778 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
3779 return 0;
3780
3781 return 1; /* it's an external lun */
3782 }
3783
3784 /*
3785 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
3786 * logdev. The number of luns in physdev and logdev are returned in
3787 * *nphysicals and *nlogicals, respectively.
3788 * Returns 0 on success, -1 otherwise.
3789 */
3790 static int hpsa_gather_lun_info(struct ctlr_info *h,
3791 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3792 struct ReportLUNdata *logdev, u32 *nlogicals)
3793 {
3794 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3795 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3796 return -1;
3797 }
3798 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3799 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3800 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3801 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3802 *nphysicals = HPSA_MAX_PHYS_LUN;
3803 }
3804 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3805 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3806 return -1;
3807 }
3808 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3809 /* Reject Logicals in excess of our max capability. */
3810 if (*nlogicals > HPSA_MAX_LUN) {
3811 dev_warn(&h->pdev->dev,
3812 "maximum logical LUNs (%d) exceeded. "
3813 "%d LUNs ignored.\n", HPSA_MAX_LUN,
3814 *nlogicals - HPSA_MAX_LUN);
3815 *nlogicals = HPSA_MAX_LUN;
3816 }
3817 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3818 dev_warn(&h->pdev->dev,
3819 "maximum logical + physical LUNs (%d) exceeded. "
3820 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3821 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3822 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3823 }
3824 return 0;
3825 }
3826
3827 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3828 int i, int nphysicals, int nlogicals,
3829 struct ReportExtendedLUNdata *physdev_list,
3830 struct ReportLUNdata *logdev_list)
3831 {
3832 /* Helper function, figure out where the LUN ID info is coming from
3833 * given index i, lists of physical and logical devices, where in
3834 * the list the raid controller is supposed to appear (first or last)
3835 */
3836
3837 int logicals_start = nphysicals + (raid_ctlr_position == 0);
3838 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3839
3840 if (i == raid_ctlr_position)
3841 return RAID_CTLR_LUNID;
3842
3843 if (i < logicals_start)
3844 return &physdev_list->LUN[i -
3845 (raid_ctlr_position == 0)].lunid[0];
3846
3847 if (i < last_device)
3848 return &logdev_list->LUN[i - nphysicals -
3849 (raid_ctlr_position == 0)][0];
3850 BUG();
3851 return NULL;
3852 }
3853
3854 /* get physical drive ioaccel handle and queue depth */
3855 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3856 struct hpsa_scsi_dev_t *dev,
3857 struct ReportExtendedLUNdata *rlep, int rle_index,
3858 struct bmic_identify_physical_device *id_phys)
3859 {
3860 int rc;
3861 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3862
3863 dev->ioaccel_handle = rle->ioaccel_handle;
3864 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
3865 dev->hba_ioaccel_enabled = 1;
3866 memset(id_phys, 0, sizeof(*id_phys));
3867 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
3868 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
3869 sizeof(*id_phys));
3870 if (!rc)
3871 /* Reserve space for FW operations */
3872 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3873 #define DRIVE_QUEUE_DEPTH 7
3874 dev->queue_depth =
3875 le16_to_cpu(id_phys->current_queue_depth_limit) -
3876 DRIVE_CMDS_RESERVED_FOR_FW;
3877 else
3878 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3879 }
3880
3881 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
3882 struct ReportExtendedLUNdata *rlep, int rle_index,
3883 struct bmic_identify_physical_device *id_phys)
3884 {
3885 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3886
3887 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
3888 this_device->hba_ioaccel_enabled = 1;
3889
3890 memcpy(&this_device->active_path_index,
3891 &id_phys->active_path_number,
3892 sizeof(this_device->active_path_index));
3893 memcpy(&this_device->path_map,
3894 &id_phys->redundant_path_present_map,
3895 sizeof(this_device->path_map));
3896 memcpy(&this_device->box,
3897 &id_phys->alternate_paths_phys_box_on_port,
3898 sizeof(this_device->box));
3899 memcpy(&this_device->phys_connector,
3900 &id_phys->alternate_paths_phys_connector,
3901 sizeof(this_device->phys_connector));
3902 memcpy(&this_device->bay,
3903 &id_phys->phys_bay_in_box,
3904 sizeof(this_device->bay));
3905 }
3906
3907 /* get number of local logical disks. */
3908 static int hpsa_set_local_logical_count(struct ctlr_info *h,
3909 struct bmic_identify_controller *id_ctlr,
3910 u32 *nlocals)
3911 {
3912 int rc;
3913
3914 if (!id_ctlr) {
3915 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
3916 __func__);
3917 return -ENOMEM;
3918 }
3919 memset(id_ctlr, 0, sizeof(*id_ctlr));
3920 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
3921 if (!rc)
3922 if (id_ctlr->configured_logical_drive_count < 256)
3923 *nlocals = id_ctlr->configured_logical_drive_count;
3924 else
3925 *nlocals = le16_to_cpu(
3926 id_ctlr->extended_logical_unit_count);
3927 else
3928 *nlocals = -1;
3929 return rc;
3930 }
3931
3932 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
3933 {
3934 struct bmic_identify_physical_device *id_phys;
3935 bool is_spare = false;
3936 int rc;
3937
3938 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3939 if (!id_phys)
3940 return false;
3941
3942 rc = hpsa_bmic_id_physical_device(h,
3943 lunaddrbytes,
3944 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
3945 id_phys, sizeof(*id_phys));
3946 if (rc == 0)
3947 is_spare = (id_phys->more_flags >> 6) & 0x01;
3948
3949 kfree(id_phys);
3950 return is_spare;
3951 }
3952
3953 #define RPL_DEV_FLAG_NON_DISK 0x1
3954 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
3955 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
3956
3957 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
3958
3959 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
3960 struct ext_report_lun_entry *rle)
3961 {
3962 u8 device_flags;
3963 u8 device_type;
3964
3965 if (!MASKED_DEVICE(lunaddrbytes))
3966 return false;
3967
3968 device_flags = rle->device_flags;
3969 device_type = rle->device_type;
3970
3971 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
3972 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
3973 return false;
3974 return true;
3975 }
3976
3977 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
3978 return false;
3979
3980 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
3981 return false;
3982
3983 /*
3984 * Spares may be spun down, we do not want to
3985 * do an Inquiry to a RAID set spare drive as
3986 * that would have them spun up, that is a
3987 * performance hit because I/O to the RAID device
3988 * stops while the spin up occurs which can take
3989 * over 50 seconds.
3990 */
3991 if (hpsa_is_disk_spare(h, lunaddrbytes))
3992 return true;
3993
3994 return false;
3995 }
3996
3997 static void hpsa_update_scsi_devices(struct ctlr_info *h)
3998 {
3999 /* the idea here is we could get notified
4000 * that some devices have changed, so we do a report
4001 * physical luns and report logical luns cmd, and adjust
4002 * our list of devices accordingly.
4003 *
4004 * The scsi3addr's of devices won't change so long as the
4005 * adapter is not reset. That means we can rescan and
4006 * tell which devices we already know about, vs. new
4007 * devices, vs. disappearing devices.
4008 */
4009 struct ReportExtendedLUNdata *physdev_list = NULL;
4010 struct ReportLUNdata *logdev_list = NULL;
4011 struct bmic_identify_physical_device *id_phys = NULL;
4012 struct bmic_identify_controller *id_ctlr = NULL;
4013 u32 nphysicals = 0;
4014 u32 nlogicals = 0;
4015 u32 nlocal_logicals = 0;
4016 u32 ndev_allocated = 0;
4017 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4018 int ncurrent = 0;
4019 int i, n_ext_target_devs, ndevs_to_allocate;
4020 int raid_ctlr_position;
4021 bool physical_device;
4022 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4023
4024 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4025 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4026 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4027 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4028 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4029 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4030
4031 if (!currentsd || !physdev_list || !logdev_list ||
4032 !tmpdevice || !id_phys || !id_ctlr) {
4033 dev_err(&h->pdev->dev, "out of memory\n");
4034 goto out;
4035 }
4036 memset(lunzerobits, 0, sizeof(lunzerobits));
4037
4038 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4039
4040 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4041 logdev_list, &nlogicals)) {
4042 h->drv_req_rescan = 1;
4043 goto out;
4044 }
4045
4046 /* Set number of local logicals (non PTRAID) */
4047 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4048 dev_warn(&h->pdev->dev,
4049 "%s: Can't determine number of local logical devices.\n",
4050 __func__);
4051 }
4052
4053 /* We might see up to the maximum number of logical and physical disks
4054 * plus external target devices, and a device for the local RAID
4055 * controller.
4056 */
4057 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4058
4059 /* Allocate the per device structures */
4060 for (i = 0; i < ndevs_to_allocate; i++) {
4061 if (i >= HPSA_MAX_DEVICES) {
4062 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4063 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4064 ndevs_to_allocate - HPSA_MAX_DEVICES);
4065 break;
4066 }
4067
4068 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4069 if (!currentsd[i]) {
4070 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
4071 __FILE__, __LINE__);
4072 h->drv_req_rescan = 1;
4073 goto out;
4074 }
4075 ndev_allocated++;
4076 }
4077
4078 if (is_scsi_rev_5(h))
4079 raid_ctlr_position = 0;
4080 else
4081 raid_ctlr_position = nphysicals + nlogicals;
4082
4083 /* adjust our table of devices */
4084 n_ext_target_devs = 0;
4085 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4086 u8 *lunaddrbytes, is_OBDR = 0;
4087 int rc = 0;
4088 int phys_dev_index = i - (raid_ctlr_position == 0);
4089 bool skip_device = false;
4090
4091 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4092
4093 /* Figure out where the LUN ID info is coming from */
4094 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4095 i, nphysicals, nlogicals, physdev_list, logdev_list);
4096
4097 /*
4098 * Skip over some devices such as a spare.
4099 */
4100 if (!tmpdevice->external && physical_device) {
4101 skip_device = hpsa_skip_device(h, lunaddrbytes,
4102 &physdev_list->LUN[phys_dev_index]);
4103 if (skip_device)
4104 continue;
4105 }
4106
4107 /* Get device type, vendor, model, device id */
4108 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4109 &is_OBDR);
4110 if (rc == -ENOMEM) {
4111 dev_warn(&h->pdev->dev,
4112 "Out of memory, rescan deferred.\n");
4113 h->drv_req_rescan = 1;
4114 goto out;
4115 }
4116 if (rc) {
4117 h->drv_req_rescan = 1;
4118 continue;
4119 }
4120
4121 /* Determine if this is a lun from an external target array */
4122 tmpdevice->external =
4123 figure_external_status(h, raid_ctlr_position, i,
4124 nphysicals, nlocal_logicals);
4125
4126 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4127 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
4128 this_device = currentsd[ncurrent];
4129
4130 /* Turn on discovery_polling if there are ext target devices.
4131 * Event-based change notification is unreliable for those.
4132 */
4133 if (!h->discovery_polling) {
4134 if (tmpdevice->external) {
4135 h->discovery_polling = 1;
4136 dev_info(&h->pdev->dev,
4137 "External target, activate discovery polling.\n");
4138 }
4139 }
4140
4141
4142 *this_device = *tmpdevice;
4143 this_device->physical_device = physical_device;
4144
4145 /*
4146 * Expose all devices except for physical devices that
4147 * are masked.
4148 */
4149 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4150 this_device->expose_device = 0;
4151 else
4152 this_device->expose_device = 1;
4153
4154
4155 /*
4156 * Get the SAS address for physical devices that are exposed.
4157 */
4158 if (this_device->physical_device && this_device->expose_device)
4159 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4160
4161 switch (this_device->devtype) {
4162 case TYPE_ROM:
4163 /* We don't *really* support actual CD-ROM devices,
4164 * just "One Button Disaster Recovery" tape drive
4165 * which temporarily pretends to be a CD-ROM drive.
4166 * So we check that the device is really an OBDR tape
4167 * device by checking for "$DR-10" in bytes 43-48 of
4168 * the inquiry data.
4169 */
4170 if (is_OBDR)
4171 ncurrent++;
4172 break;
4173 case TYPE_DISK:
4174 if (this_device->physical_device) {
4175 /* The disk is in HBA mode. */
4176 /* Never use RAID mapper in HBA mode. */
4177 this_device->offload_enabled = 0;
4178 hpsa_get_ioaccel_drive_info(h, this_device,
4179 physdev_list, phys_dev_index, id_phys);
4180 hpsa_get_path_info(this_device,
4181 physdev_list, phys_dev_index, id_phys);
4182 }
4183 ncurrent++;
4184 break;
4185 case TYPE_TAPE:
4186 case TYPE_MEDIUM_CHANGER:
4187 case TYPE_ENCLOSURE:
4188 ncurrent++;
4189 break;
4190 case TYPE_RAID:
4191 /* Only present the Smartarray HBA as a RAID controller.
4192 * If it's a RAID controller other than the HBA itself
4193 * (an external RAID controller, MSA500 or similar)
4194 * don't present it.
4195 */
4196 if (!is_hba_lunid(lunaddrbytes))
4197 break;
4198 ncurrent++;
4199 break;
4200 default:
4201 break;
4202 }
4203 if (ncurrent >= HPSA_MAX_DEVICES)
4204 break;
4205 }
4206
4207 if (h->sas_host == NULL) {
4208 int rc = 0;
4209
4210 rc = hpsa_add_sas_host(h);
4211 if (rc) {
4212 dev_warn(&h->pdev->dev,
4213 "Could not add sas host %d\n", rc);
4214 goto out;
4215 }
4216 }
4217
4218 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4219 out:
4220 kfree(tmpdevice);
4221 for (i = 0; i < ndev_allocated; i++)
4222 kfree(currentsd[i]);
4223 kfree(currentsd);
4224 kfree(physdev_list);
4225 kfree(logdev_list);
4226 kfree(id_ctlr);
4227 kfree(id_phys);
4228 }
4229
4230 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4231 struct scatterlist *sg)
4232 {
4233 u64 addr64 = (u64) sg_dma_address(sg);
4234 unsigned int len = sg_dma_len(sg);
4235
4236 desc->Addr = cpu_to_le64(addr64);
4237 desc->Len = cpu_to_le32(len);
4238 desc->Ext = 0;
4239 }
4240
4241 /*
4242 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4243 * dma mapping and fills in the scatter gather entries of the
4244 * hpsa command, cp.
4245 */
4246 static int hpsa_scatter_gather(struct ctlr_info *h,
4247 struct CommandList *cp,
4248 struct scsi_cmnd *cmd)
4249 {
4250 struct scatterlist *sg;
4251 int use_sg, i, sg_limit, chained, last_sg;
4252 struct SGDescriptor *curr_sg;
4253
4254 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4255
4256 use_sg = scsi_dma_map(cmd);
4257 if (use_sg < 0)
4258 return use_sg;
4259
4260 if (!use_sg)
4261 goto sglist_finished;
4262
4263 /*
4264 * If the number of entries is greater than the max for a single list,
4265 * then we have a chained list; we will set up all but one entry in the
4266 * first list (the last entry is saved for link information);
4267 * otherwise, we don't have a chained list and we'll set up at each of
4268 * the entries in the one list.
4269 */
4270 curr_sg = cp->SG;
4271 chained = use_sg > h->max_cmd_sg_entries;
4272 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4273 last_sg = scsi_sg_count(cmd) - 1;
4274 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4275 hpsa_set_sg_descriptor(curr_sg, sg);
4276 curr_sg++;
4277 }
4278
4279 if (chained) {
4280 /*
4281 * Continue with the chained list. Set curr_sg to the chained
4282 * list. Modify the limit to the total count less the entries
4283 * we've already set up. Resume the scan at the list entry
4284 * where the previous loop left off.
4285 */
4286 curr_sg = h->cmd_sg_list[cp->cmdindex];
4287 sg_limit = use_sg - sg_limit;
4288 for_each_sg(sg, sg, sg_limit, i) {
4289 hpsa_set_sg_descriptor(curr_sg, sg);
4290 curr_sg++;
4291 }
4292 }
4293
4294 /* Back the pointer up to the last entry and mark it as "last". */
4295 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4296
4297 if (use_sg + chained > h->maxSG)
4298 h->maxSG = use_sg + chained;
4299
4300 if (chained) {
4301 cp->Header.SGList = h->max_cmd_sg_entries;
4302 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4303 if (hpsa_map_sg_chain_block(h, cp)) {
4304 scsi_dma_unmap(cmd);
4305 return -1;
4306 }
4307 return 0;
4308 }
4309
4310 sglist_finished:
4311
4312 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4313 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4314 return 0;
4315 }
4316
4317 #define IO_ACCEL_INELIGIBLE (1)
4318 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4319 {
4320 int is_write = 0;
4321 u32 block;
4322 u32 block_cnt;
4323
4324 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4325 switch (cdb[0]) {
4326 case WRITE_6:
4327 case WRITE_12:
4328 is_write = 1;
4329 case READ_6:
4330 case READ_12:
4331 if (*cdb_len == 6) {
4332 block = get_unaligned_be16(&cdb[2]);
4333 block_cnt = cdb[4];
4334 if (block_cnt == 0)
4335 block_cnt = 256;
4336 } else {
4337 BUG_ON(*cdb_len != 12);
4338 block = get_unaligned_be32(&cdb[2]);
4339 block_cnt = get_unaligned_be32(&cdb[6]);
4340 }
4341 if (block_cnt > 0xffff)
4342 return IO_ACCEL_INELIGIBLE;
4343
4344 cdb[0] = is_write ? WRITE_10 : READ_10;
4345 cdb[1] = 0;
4346 cdb[2] = (u8) (block >> 24);
4347 cdb[3] = (u8) (block >> 16);
4348 cdb[4] = (u8) (block >> 8);
4349 cdb[5] = (u8) (block);
4350 cdb[6] = 0;
4351 cdb[7] = (u8) (block_cnt >> 8);
4352 cdb[8] = (u8) (block_cnt);
4353 cdb[9] = 0;
4354 *cdb_len = 10;
4355 break;
4356 }
4357 return 0;
4358 }
4359
4360 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4361 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4362 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4363 {
4364 struct scsi_cmnd *cmd = c->scsi_cmd;
4365 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4366 unsigned int len;
4367 unsigned int total_len = 0;
4368 struct scatterlist *sg;
4369 u64 addr64;
4370 int use_sg, i;
4371 struct SGDescriptor *curr_sg;
4372 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4373
4374 /* TODO: implement chaining support */
4375 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4376 atomic_dec(&phys_disk->ioaccel_cmds_out);
4377 return IO_ACCEL_INELIGIBLE;
4378 }
4379
4380 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4381
4382 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4383 atomic_dec(&phys_disk->ioaccel_cmds_out);
4384 return IO_ACCEL_INELIGIBLE;
4385 }
4386
4387 c->cmd_type = CMD_IOACCEL1;
4388
4389 /* Adjust the DMA address to point to the accelerated command buffer */
4390 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4391 (c->cmdindex * sizeof(*cp));
4392 BUG_ON(c->busaddr & 0x0000007F);
4393
4394 use_sg = scsi_dma_map(cmd);
4395 if (use_sg < 0) {
4396 atomic_dec(&phys_disk->ioaccel_cmds_out);
4397 return use_sg;
4398 }
4399
4400 if (use_sg) {
4401 curr_sg = cp->SG;
4402 scsi_for_each_sg(cmd, sg, use_sg, i) {
4403 addr64 = (u64) sg_dma_address(sg);
4404 len = sg_dma_len(sg);
4405 total_len += len;
4406 curr_sg->Addr = cpu_to_le64(addr64);
4407 curr_sg->Len = cpu_to_le32(len);
4408 curr_sg->Ext = cpu_to_le32(0);
4409 curr_sg++;
4410 }
4411 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4412
4413 switch (cmd->sc_data_direction) {
4414 case DMA_TO_DEVICE:
4415 control |= IOACCEL1_CONTROL_DATA_OUT;
4416 break;
4417 case DMA_FROM_DEVICE:
4418 control |= IOACCEL1_CONTROL_DATA_IN;
4419 break;
4420 case DMA_NONE:
4421 control |= IOACCEL1_CONTROL_NODATAXFER;
4422 break;
4423 default:
4424 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4425 cmd->sc_data_direction);
4426 BUG();
4427 break;
4428 }
4429 } else {
4430 control |= IOACCEL1_CONTROL_NODATAXFER;
4431 }
4432
4433 c->Header.SGList = use_sg;
4434 /* Fill out the command structure to submit */
4435 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4436 cp->transfer_len = cpu_to_le32(total_len);
4437 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4438 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4439 cp->control = cpu_to_le32(control);
4440 memcpy(cp->CDB, cdb, cdb_len);
4441 memcpy(cp->CISS_LUN, scsi3addr, 8);
4442 /* Tag was already set at init time. */
4443 enqueue_cmd_and_start_io(h, c);
4444 return 0;
4445 }
4446
4447 /*
4448 * Queue a command directly to a device behind the controller using the
4449 * I/O accelerator path.
4450 */
4451 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4452 struct CommandList *c)
4453 {
4454 struct scsi_cmnd *cmd = c->scsi_cmd;
4455 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4456
4457 c->phys_disk = dev;
4458
4459 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4460 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4461 }
4462
4463 /*
4464 * Set encryption parameters for the ioaccel2 request
4465 */
4466 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4467 struct CommandList *c, struct io_accel2_cmd *cp)
4468 {
4469 struct scsi_cmnd *cmd = c->scsi_cmd;
4470 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4471 struct raid_map_data *map = &dev->raid_map;
4472 u64 first_block;
4473
4474 /* Are we doing encryption on this device */
4475 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4476 return;
4477 /* Set the data encryption key index. */
4478 cp->dekindex = map->dekindex;
4479
4480 /* Set the encryption enable flag, encoded into direction field. */
4481 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4482
4483 /* Set encryption tweak values based on logical block address
4484 * If block size is 512, tweak value is LBA.
4485 * For other block sizes, tweak is (LBA * block size)/ 512)
4486 */
4487 switch (cmd->cmnd[0]) {
4488 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4489 case WRITE_6:
4490 case READ_6:
4491 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4492 break;
4493 case WRITE_10:
4494 case READ_10:
4495 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4496 case WRITE_12:
4497 case READ_12:
4498 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4499 break;
4500 case WRITE_16:
4501 case READ_16:
4502 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4503 break;
4504 default:
4505 dev_err(&h->pdev->dev,
4506 "ERROR: %s: size (0x%x) not supported for encryption\n",
4507 __func__, cmd->cmnd[0]);
4508 BUG();
4509 break;
4510 }
4511
4512 if (le32_to_cpu(map->volume_blk_size) != 512)
4513 first_block = first_block *
4514 le32_to_cpu(map->volume_blk_size)/512;
4515
4516 cp->tweak_lower = cpu_to_le32(first_block);
4517 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4518 }
4519
4520 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4521 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4522 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4523 {
4524 struct scsi_cmnd *cmd = c->scsi_cmd;
4525 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4526 struct ioaccel2_sg_element *curr_sg;
4527 int use_sg, i;
4528 struct scatterlist *sg;
4529 u64 addr64;
4530 u32 len;
4531 u32 total_len = 0;
4532
4533 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4534
4535 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4536 atomic_dec(&phys_disk->ioaccel_cmds_out);
4537 return IO_ACCEL_INELIGIBLE;
4538 }
4539
4540 c->cmd_type = CMD_IOACCEL2;
4541 /* Adjust the DMA address to point to the accelerated command buffer */
4542 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4543 (c->cmdindex * sizeof(*cp));
4544 BUG_ON(c->busaddr & 0x0000007F);
4545
4546 memset(cp, 0, sizeof(*cp));
4547 cp->IU_type = IOACCEL2_IU_TYPE;
4548
4549 use_sg = scsi_dma_map(cmd);
4550 if (use_sg < 0) {
4551 atomic_dec(&phys_disk->ioaccel_cmds_out);
4552 return use_sg;
4553 }
4554
4555 if (use_sg) {
4556 curr_sg = cp->sg;
4557 if (use_sg > h->ioaccel_maxsg) {
4558 addr64 = le64_to_cpu(
4559 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4560 curr_sg->address = cpu_to_le64(addr64);
4561 curr_sg->length = 0;
4562 curr_sg->reserved[0] = 0;
4563 curr_sg->reserved[1] = 0;
4564 curr_sg->reserved[2] = 0;
4565 curr_sg->chain_indicator = 0x80;
4566
4567 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4568 }
4569 scsi_for_each_sg(cmd, sg, use_sg, i) {
4570 addr64 = (u64) sg_dma_address(sg);
4571 len = sg_dma_len(sg);
4572 total_len += len;
4573 curr_sg->address = cpu_to_le64(addr64);
4574 curr_sg->length = cpu_to_le32(len);
4575 curr_sg->reserved[0] = 0;
4576 curr_sg->reserved[1] = 0;
4577 curr_sg->reserved[2] = 0;
4578 curr_sg->chain_indicator = 0;
4579 curr_sg++;
4580 }
4581
4582 switch (cmd->sc_data_direction) {
4583 case DMA_TO_DEVICE:
4584 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4585 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4586 break;
4587 case DMA_FROM_DEVICE:
4588 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4589 cp->direction |= IOACCEL2_DIR_DATA_IN;
4590 break;
4591 case DMA_NONE:
4592 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4593 cp->direction |= IOACCEL2_DIR_NO_DATA;
4594 break;
4595 default:
4596 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4597 cmd->sc_data_direction);
4598 BUG();
4599 break;
4600 }
4601 } else {
4602 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4603 cp->direction |= IOACCEL2_DIR_NO_DATA;
4604 }
4605
4606 /* Set encryption parameters, if necessary */
4607 set_encrypt_ioaccel2(h, c, cp);
4608
4609 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4610 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4611 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4612
4613 cp->data_len = cpu_to_le32(total_len);
4614 cp->err_ptr = cpu_to_le64(c->busaddr +
4615 offsetof(struct io_accel2_cmd, error_data));
4616 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4617
4618 /* fill in sg elements */
4619 if (use_sg > h->ioaccel_maxsg) {
4620 cp->sg_count = 1;
4621 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4622 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4623 atomic_dec(&phys_disk->ioaccel_cmds_out);
4624 scsi_dma_unmap(cmd);
4625 return -1;
4626 }
4627 } else
4628 cp->sg_count = (u8) use_sg;
4629
4630 enqueue_cmd_and_start_io(h, c);
4631 return 0;
4632 }
4633
4634 /*
4635 * Queue a command to the correct I/O accelerator path.
4636 */
4637 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4638 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4639 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4640 {
4641 /* Try to honor the device's queue depth */
4642 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4643 phys_disk->queue_depth) {
4644 atomic_dec(&phys_disk->ioaccel_cmds_out);
4645 return IO_ACCEL_INELIGIBLE;
4646 }
4647 if (h->transMethod & CFGTBL_Trans_io_accel1)
4648 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4649 cdb, cdb_len, scsi3addr,
4650 phys_disk);
4651 else
4652 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4653 cdb, cdb_len, scsi3addr,
4654 phys_disk);
4655 }
4656
4657 static void raid_map_helper(struct raid_map_data *map,
4658 int offload_to_mirror, u32 *map_index, u32 *current_group)
4659 {
4660 if (offload_to_mirror == 0) {
4661 /* use physical disk in the first mirrored group. */
4662 *map_index %= le16_to_cpu(map->data_disks_per_row);
4663 return;
4664 }
4665 do {
4666 /* determine mirror group that *map_index indicates */
4667 *current_group = *map_index /
4668 le16_to_cpu(map->data_disks_per_row);
4669 if (offload_to_mirror == *current_group)
4670 continue;
4671 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4672 /* select map index from next group */
4673 *map_index += le16_to_cpu(map->data_disks_per_row);
4674 (*current_group)++;
4675 } else {
4676 /* select map index from first group */
4677 *map_index %= le16_to_cpu(map->data_disks_per_row);
4678 *current_group = 0;
4679 }
4680 } while (offload_to_mirror != *current_group);
4681 }
4682
4683 /*
4684 * Attempt to perform offload RAID mapping for a logical volume I/O.
4685 */
4686 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4687 struct CommandList *c)
4688 {
4689 struct scsi_cmnd *cmd = c->scsi_cmd;
4690 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4691 struct raid_map_data *map = &dev->raid_map;
4692 struct raid_map_disk_data *dd = &map->data[0];
4693 int is_write = 0;
4694 u32 map_index;
4695 u64 first_block, last_block;
4696 u32 block_cnt;
4697 u32 blocks_per_row;
4698 u64 first_row, last_row;
4699 u32 first_row_offset, last_row_offset;
4700 u32 first_column, last_column;
4701 u64 r0_first_row, r0_last_row;
4702 u32 r5or6_blocks_per_row;
4703 u64 r5or6_first_row, r5or6_last_row;
4704 u32 r5or6_first_row_offset, r5or6_last_row_offset;
4705 u32 r5or6_first_column, r5or6_last_column;
4706 u32 total_disks_per_row;
4707 u32 stripesize;
4708 u32 first_group, last_group, current_group;
4709 u32 map_row;
4710 u32 disk_handle;
4711 u64 disk_block;
4712 u32 disk_block_cnt;
4713 u8 cdb[16];
4714 u8 cdb_len;
4715 u16 strip_size;
4716 #if BITS_PER_LONG == 32
4717 u64 tmpdiv;
4718 #endif
4719 int offload_to_mirror;
4720
4721 /* check for valid opcode, get LBA and block count */
4722 switch (cmd->cmnd[0]) {
4723 case WRITE_6:
4724 is_write = 1;
4725 case READ_6:
4726 first_block = get_unaligned_be16(&cmd->cmnd[2]);
4727 block_cnt = cmd->cmnd[4];
4728 if (block_cnt == 0)
4729 block_cnt = 256;
4730 break;
4731 case WRITE_10:
4732 is_write = 1;
4733 case READ_10:
4734 first_block =
4735 (((u64) cmd->cmnd[2]) << 24) |
4736 (((u64) cmd->cmnd[3]) << 16) |
4737 (((u64) cmd->cmnd[4]) << 8) |
4738 cmd->cmnd[5];
4739 block_cnt =
4740 (((u32) cmd->cmnd[7]) << 8) |
4741 cmd->cmnd[8];
4742 break;
4743 case WRITE_12:
4744 is_write = 1;
4745 case READ_12:
4746 first_block =
4747 (((u64) cmd->cmnd[2]) << 24) |
4748 (((u64) cmd->cmnd[3]) << 16) |
4749 (((u64) cmd->cmnd[4]) << 8) |
4750 cmd->cmnd[5];
4751 block_cnt =
4752 (((u32) cmd->cmnd[6]) << 24) |
4753 (((u32) cmd->cmnd[7]) << 16) |
4754 (((u32) cmd->cmnd[8]) << 8) |
4755 cmd->cmnd[9];
4756 break;
4757 case WRITE_16:
4758 is_write = 1;
4759 case READ_16:
4760 first_block =
4761 (((u64) cmd->cmnd[2]) << 56) |
4762 (((u64) cmd->cmnd[3]) << 48) |
4763 (((u64) cmd->cmnd[4]) << 40) |
4764 (((u64) cmd->cmnd[5]) << 32) |
4765 (((u64) cmd->cmnd[6]) << 24) |
4766 (((u64) cmd->cmnd[7]) << 16) |
4767 (((u64) cmd->cmnd[8]) << 8) |
4768 cmd->cmnd[9];
4769 block_cnt =
4770 (((u32) cmd->cmnd[10]) << 24) |
4771 (((u32) cmd->cmnd[11]) << 16) |
4772 (((u32) cmd->cmnd[12]) << 8) |
4773 cmd->cmnd[13];
4774 break;
4775 default:
4776 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4777 }
4778 last_block = first_block + block_cnt - 1;
4779
4780 /* check for write to non-RAID-0 */
4781 if (is_write && dev->raid_level != 0)
4782 return IO_ACCEL_INELIGIBLE;
4783
4784 /* check for invalid block or wraparound */
4785 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4786 last_block < first_block)
4787 return IO_ACCEL_INELIGIBLE;
4788
4789 /* calculate stripe information for the request */
4790 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4791 le16_to_cpu(map->strip_size);
4792 strip_size = le16_to_cpu(map->strip_size);
4793 #if BITS_PER_LONG == 32
4794 tmpdiv = first_block;
4795 (void) do_div(tmpdiv, blocks_per_row);
4796 first_row = tmpdiv;
4797 tmpdiv = last_block;
4798 (void) do_div(tmpdiv, blocks_per_row);
4799 last_row = tmpdiv;
4800 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4801 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4802 tmpdiv = first_row_offset;
4803 (void) do_div(tmpdiv, strip_size);
4804 first_column = tmpdiv;
4805 tmpdiv = last_row_offset;
4806 (void) do_div(tmpdiv, strip_size);
4807 last_column = tmpdiv;
4808 #else
4809 first_row = first_block / blocks_per_row;
4810 last_row = last_block / blocks_per_row;
4811 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4812 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4813 first_column = first_row_offset / strip_size;
4814 last_column = last_row_offset / strip_size;
4815 #endif
4816
4817 /* if this isn't a single row/column then give to the controller */
4818 if ((first_row != last_row) || (first_column != last_column))
4819 return IO_ACCEL_INELIGIBLE;
4820
4821 /* proceeding with driver mapping */
4822 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4823 le16_to_cpu(map->metadata_disks_per_row);
4824 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4825 le16_to_cpu(map->row_cnt);
4826 map_index = (map_row * total_disks_per_row) + first_column;
4827
4828 switch (dev->raid_level) {
4829 case HPSA_RAID_0:
4830 break; /* nothing special to do */
4831 case HPSA_RAID_1:
4832 /* Handles load balance across RAID 1 members.
4833 * (2-drive R1 and R10 with even # of drives.)
4834 * Appropriate for SSDs, not optimal for HDDs
4835 */
4836 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4837 if (dev->offload_to_mirror)
4838 map_index += le16_to_cpu(map->data_disks_per_row);
4839 dev->offload_to_mirror = !dev->offload_to_mirror;
4840 break;
4841 case HPSA_RAID_ADM:
4842 /* Handles N-way mirrors (R1-ADM)
4843 * and R10 with # of drives divisible by 3.)
4844 */
4845 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4846
4847 offload_to_mirror = dev->offload_to_mirror;
4848 raid_map_helper(map, offload_to_mirror,
4849 &map_index, &current_group);
4850 /* set mirror group to use next time */
4851 offload_to_mirror =
4852 (offload_to_mirror >=
4853 le16_to_cpu(map->layout_map_count) - 1)
4854 ? 0 : offload_to_mirror + 1;
4855 dev->offload_to_mirror = offload_to_mirror;
4856 /* Avoid direct use of dev->offload_to_mirror within this
4857 * function since multiple threads might simultaneously
4858 * increment it beyond the range of dev->layout_map_count -1.
4859 */
4860 break;
4861 case HPSA_RAID_5:
4862 case HPSA_RAID_6:
4863 if (le16_to_cpu(map->layout_map_count) <= 1)
4864 break;
4865
4866 /* Verify first and last block are in same RAID group */
4867 r5or6_blocks_per_row =
4868 le16_to_cpu(map->strip_size) *
4869 le16_to_cpu(map->data_disks_per_row);
4870 BUG_ON(r5or6_blocks_per_row == 0);
4871 stripesize = r5or6_blocks_per_row *
4872 le16_to_cpu(map->layout_map_count);
4873 #if BITS_PER_LONG == 32
4874 tmpdiv = first_block;
4875 first_group = do_div(tmpdiv, stripesize);
4876 tmpdiv = first_group;
4877 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4878 first_group = tmpdiv;
4879 tmpdiv = last_block;
4880 last_group = do_div(tmpdiv, stripesize);
4881 tmpdiv = last_group;
4882 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4883 last_group = tmpdiv;
4884 #else
4885 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4886 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4887 #endif
4888 if (first_group != last_group)
4889 return IO_ACCEL_INELIGIBLE;
4890
4891 /* Verify request is in a single row of RAID 5/6 */
4892 #if BITS_PER_LONG == 32
4893 tmpdiv = first_block;
4894 (void) do_div(tmpdiv, stripesize);
4895 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4896 tmpdiv = last_block;
4897 (void) do_div(tmpdiv, stripesize);
4898 r5or6_last_row = r0_last_row = tmpdiv;
4899 #else
4900 first_row = r5or6_first_row = r0_first_row =
4901 first_block / stripesize;
4902 r5or6_last_row = r0_last_row = last_block / stripesize;
4903 #endif
4904 if (r5or6_first_row != r5or6_last_row)
4905 return IO_ACCEL_INELIGIBLE;
4906
4907
4908 /* Verify request is in a single column */
4909 #if BITS_PER_LONG == 32
4910 tmpdiv = first_block;
4911 first_row_offset = do_div(tmpdiv, stripesize);
4912 tmpdiv = first_row_offset;
4913 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4914 r5or6_first_row_offset = first_row_offset;
4915 tmpdiv = last_block;
4916 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4917 tmpdiv = r5or6_last_row_offset;
4918 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4919 tmpdiv = r5or6_first_row_offset;
4920 (void) do_div(tmpdiv, map->strip_size);
4921 first_column = r5or6_first_column = tmpdiv;
4922 tmpdiv = r5or6_last_row_offset;
4923 (void) do_div(tmpdiv, map->strip_size);
4924 r5or6_last_column = tmpdiv;
4925 #else
4926 first_row_offset = r5or6_first_row_offset =
4927 (u32)((first_block % stripesize) %
4928 r5or6_blocks_per_row);
4929
4930 r5or6_last_row_offset =
4931 (u32)((last_block % stripesize) %
4932 r5or6_blocks_per_row);
4933
4934 first_column = r5or6_first_column =
4935 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4936 r5or6_last_column =
4937 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4938 #endif
4939 if (r5or6_first_column != r5or6_last_column)
4940 return IO_ACCEL_INELIGIBLE;
4941
4942 /* Request is eligible */
4943 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4944 le16_to_cpu(map->row_cnt);
4945
4946 map_index = (first_group *
4947 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4948 (map_row * total_disks_per_row) + first_column;
4949 break;
4950 default:
4951 return IO_ACCEL_INELIGIBLE;
4952 }
4953
4954 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4955 return IO_ACCEL_INELIGIBLE;
4956
4957 c->phys_disk = dev->phys_disk[map_index];
4958
4959 disk_handle = dd[map_index].ioaccel_handle;
4960 disk_block = le64_to_cpu(map->disk_starting_blk) +
4961 first_row * le16_to_cpu(map->strip_size) +
4962 (first_row_offset - first_column *
4963 le16_to_cpu(map->strip_size));
4964 disk_block_cnt = block_cnt;
4965
4966 /* handle differing logical/physical block sizes */
4967 if (map->phys_blk_shift) {
4968 disk_block <<= map->phys_blk_shift;
4969 disk_block_cnt <<= map->phys_blk_shift;
4970 }
4971 BUG_ON(disk_block_cnt > 0xffff);
4972
4973 /* build the new CDB for the physical disk I/O */
4974 if (disk_block > 0xffffffff) {
4975 cdb[0] = is_write ? WRITE_16 : READ_16;
4976 cdb[1] = 0;
4977 cdb[2] = (u8) (disk_block >> 56);
4978 cdb[3] = (u8) (disk_block >> 48);
4979 cdb[4] = (u8) (disk_block >> 40);
4980 cdb[5] = (u8) (disk_block >> 32);
4981 cdb[6] = (u8) (disk_block >> 24);
4982 cdb[7] = (u8) (disk_block >> 16);
4983 cdb[8] = (u8) (disk_block >> 8);
4984 cdb[9] = (u8) (disk_block);
4985 cdb[10] = (u8) (disk_block_cnt >> 24);
4986 cdb[11] = (u8) (disk_block_cnt >> 16);
4987 cdb[12] = (u8) (disk_block_cnt >> 8);
4988 cdb[13] = (u8) (disk_block_cnt);
4989 cdb[14] = 0;
4990 cdb[15] = 0;
4991 cdb_len = 16;
4992 } else {
4993 cdb[0] = is_write ? WRITE_10 : READ_10;
4994 cdb[1] = 0;
4995 cdb[2] = (u8) (disk_block >> 24);
4996 cdb[3] = (u8) (disk_block >> 16);
4997 cdb[4] = (u8) (disk_block >> 8);
4998 cdb[5] = (u8) (disk_block);
4999 cdb[6] = 0;
5000 cdb[7] = (u8) (disk_block_cnt >> 8);
5001 cdb[8] = (u8) (disk_block_cnt);
5002 cdb[9] = 0;
5003 cdb_len = 10;
5004 }
5005 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5006 dev->scsi3addr,
5007 dev->phys_disk[map_index]);
5008 }
5009
5010 /*
5011 * Submit commands down the "normal" RAID stack path
5012 * All callers to hpsa_ciss_submit must check lockup_detected
5013 * beforehand, before (opt.) and after calling cmd_alloc
5014 */
5015 static int hpsa_ciss_submit(struct ctlr_info *h,
5016 struct CommandList *c, struct scsi_cmnd *cmd,
5017 unsigned char scsi3addr[])
5018 {
5019 cmd->host_scribble = (unsigned char *) c;
5020 c->cmd_type = CMD_SCSI;
5021 c->scsi_cmd = cmd;
5022 c->Header.ReplyQueue = 0; /* unused in simple mode */
5023 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5024 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5025
5026 /* Fill in the request block... */
5027
5028 c->Request.Timeout = 0;
5029 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5030 c->Request.CDBLen = cmd->cmd_len;
5031 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5032 switch (cmd->sc_data_direction) {
5033 case DMA_TO_DEVICE:
5034 c->Request.type_attr_dir =
5035 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5036 break;
5037 case DMA_FROM_DEVICE:
5038 c->Request.type_attr_dir =
5039 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5040 break;
5041 case DMA_NONE:
5042 c->Request.type_attr_dir =
5043 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5044 break;
5045 case DMA_BIDIRECTIONAL:
5046 /* This can happen if a buggy application does a scsi passthru
5047 * and sets both inlen and outlen to non-zero. ( see
5048 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5049 */
5050
5051 c->Request.type_attr_dir =
5052 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5053 /* This is technically wrong, and hpsa controllers should
5054 * reject it with CMD_INVALID, which is the most correct
5055 * response, but non-fibre backends appear to let it
5056 * slide by, and give the same results as if this field
5057 * were set correctly. Either way is acceptable for
5058 * our purposes here.
5059 */
5060
5061 break;
5062
5063 default:
5064 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5065 cmd->sc_data_direction);
5066 BUG();
5067 break;
5068 }
5069
5070 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5071 hpsa_cmd_resolve_and_free(h, c);
5072 return SCSI_MLQUEUE_HOST_BUSY;
5073 }
5074 enqueue_cmd_and_start_io(h, c);
5075 /* the cmd'll come back via intr handler in complete_scsi_command() */
5076 return 0;
5077 }
5078
5079 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5080 struct CommandList *c)
5081 {
5082 dma_addr_t cmd_dma_handle, err_dma_handle;
5083
5084 /* Zero out all of commandlist except the last field, refcount */
5085 memset(c, 0, offsetof(struct CommandList, refcount));
5086 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5087 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5088 c->err_info = h->errinfo_pool + index;
5089 memset(c->err_info, 0, sizeof(*c->err_info));
5090 err_dma_handle = h->errinfo_pool_dhandle
5091 + index * sizeof(*c->err_info);
5092 c->cmdindex = index;
5093 c->busaddr = (u32) cmd_dma_handle;
5094 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5095 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5096 c->h = h;
5097 c->scsi_cmd = SCSI_CMD_IDLE;
5098 }
5099
5100 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5101 {
5102 int i;
5103
5104 for (i = 0; i < h->nr_cmds; i++) {
5105 struct CommandList *c = h->cmd_pool + i;
5106
5107 hpsa_cmd_init(h, i, c);
5108 atomic_set(&c->refcount, 0);
5109 }
5110 }
5111
5112 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5113 struct CommandList *c)
5114 {
5115 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5116
5117 BUG_ON(c->cmdindex != index);
5118
5119 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5120 memset(c->err_info, 0, sizeof(*c->err_info));
5121 c->busaddr = (u32) cmd_dma_handle;
5122 }
5123
5124 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5125 struct CommandList *c, struct scsi_cmnd *cmd,
5126 unsigned char *scsi3addr)
5127 {
5128 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5129 int rc = IO_ACCEL_INELIGIBLE;
5130
5131 cmd->host_scribble = (unsigned char *) c;
5132
5133 if (dev->offload_enabled) {
5134 hpsa_cmd_init(h, c->cmdindex, c);
5135 c->cmd_type = CMD_SCSI;
5136 c->scsi_cmd = cmd;
5137 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5138 if (rc < 0) /* scsi_dma_map failed. */
5139 rc = SCSI_MLQUEUE_HOST_BUSY;
5140 } else if (dev->hba_ioaccel_enabled) {
5141 hpsa_cmd_init(h, c->cmdindex, c);
5142 c->cmd_type = CMD_SCSI;
5143 c->scsi_cmd = cmd;
5144 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5145 if (rc < 0) /* scsi_dma_map failed. */
5146 rc = SCSI_MLQUEUE_HOST_BUSY;
5147 }
5148 return rc;
5149 }
5150
5151 static void hpsa_command_resubmit_worker(struct work_struct *work)
5152 {
5153 struct scsi_cmnd *cmd;
5154 struct hpsa_scsi_dev_t *dev;
5155 struct CommandList *c = container_of(work, struct CommandList, work);
5156
5157 cmd = c->scsi_cmd;
5158 dev = cmd->device->hostdata;
5159 if (!dev) {
5160 cmd->result = DID_NO_CONNECT << 16;
5161 return hpsa_cmd_free_and_done(c->h, c, cmd);
5162 }
5163 if (c->reset_pending)
5164 return hpsa_cmd_resolve_and_free(c->h, c);
5165 if (c->abort_pending)
5166 return hpsa_cmd_abort_and_free(c->h, c, cmd);
5167 if (c->cmd_type == CMD_IOACCEL2) {
5168 struct ctlr_info *h = c->h;
5169 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5170 int rc;
5171
5172 if (c2->error_data.serv_response ==
5173 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5174 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5175 if (rc == 0)
5176 return;
5177 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5178 /*
5179 * If we get here, it means dma mapping failed.
5180 * Try again via scsi mid layer, which will
5181 * then get SCSI_MLQUEUE_HOST_BUSY.
5182 */
5183 cmd->result = DID_IMM_RETRY << 16;
5184 return hpsa_cmd_free_and_done(h, c, cmd);
5185 }
5186 /* else, fall thru and resubmit down CISS path */
5187 }
5188 }
5189 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5190 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5191 /*
5192 * If we get here, it means dma mapping failed. Try
5193 * again via scsi mid layer, which will then get
5194 * SCSI_MLQUEUE_HOST_BUSY.
5195 *
5196 * hpsa_ciss_submit will have already freed c
5197 * if it encountered a dma mapping failure.
5198 */
5199 cmd->result = DID_IMM_RETRY << 16;
5200 cmd->scsi_done(cmd);
5201 }
5202 }
5203
5204 /* Running in struct Scsi_Host->host_lock less mode */
5205 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5206 {
5207 struct ctlr_info *h;
5208 struct hpsa_scsi_dev_t *dev;
5209 unsigned char scsi3addr[8];
5210 struct CommandList *c;
5211 int rc = 0;
5212
5213 /* Get the ptr to our adapter structure out of cmd->host. */
5214 h = sdev_to_hba(cmd->device);
5215
5216 BUG_ON(cmd->request->tag < 0);
5217
5218 dev = cmd->device->hostdata;
5219 if (!dev) {
5220 cmd->result = DID_NO_CONNECT << 16;
5221 cmd->scsi_done(cmd);
5222 return 0;
5223 }
5224
5225 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5226
5227 if (unlikely(lockup_detected(h))) {
5228 cmd->result = DID_NO_CONNECT << 16;
5229 cmd->scsi_done(cmd);
5230 return 0;
5231 }
5232 c = cmd_tagged_alloc(h, cmd);
5233
5234 /*
5235 * Call alternate submit routine for I/O accelerated commands.
5236 * Retries always go down the normal I/O path.
5237 */
5238 if (likely(cmd->retries == 0 &&
5239 cmd->request->cmd_type == REQ_TYPE_FS &&
5240 h->acciopath_status)) {
5241 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5242 if (rc == 0)
5243 return 0;
5244 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5245 hpsa_cmd_resolve_and_free(h, c);
5246 return SCSI_MLQUEUE_HOST_BUSY;
5247 }
5248 }
5249 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5250 }
5251
5252 static void hpsa_scan_complete(struct ctlr_info *h)
5253 {
5254 unsigned long flags;
5255
5256 spin_lock_irqsave(&h->scan_lock, flags);
5257 h->scan_finished = 1;
5258 wake_up(&h->scan_wait_queue);
5259 spin_unlock_irqrestore(&h->scan_lock, flags);
5260 }
5261
5262 static void hpsa_scan_start(struct Scsi_Host *sh)
5263 {
5264 struct ctlr_info *h = shost_to_hba(sh);
5265 unsigned long flags;
5266
5267 /*
5268 * Don't let rescans be initiated on a controller known to be locked
5269 * up. If the controller locks up *during* a rescan, that thread is
5270 * probably hosed, but at least we can prevent new rescan threads from
5271 * piling up on a locked up controller.
5272 */
5273 if (unlikely(lockup_detected(h)))
5274 return hpsa_scan_complete(h);
5275
5276 /*
5277 * If a scan is already waiting to run, no need to add another
5278 */
5279 spin_lock_irqsave(&h->scan_lock, flags);
5280 if (h->scan_waiting) {
5281 spin_unlock_irqrestore(&h->scan_lock, flags);
5282 return;
5283 }
5284
5285 spin_unlock_irqrestore(&h->scan_lock, flags);
5286
5287 /* wait until any scan already in progress is finished. */
5288 while (1) {
5289 spin_lock_irqsave(&h->scan_lock, flags);
5290 if (h->scan_finished)
5291 break;
5292 h->scan_waiting = 1;
5293 spin_unlock_irqrestore(&h->scan_lock, flags);
5294 wait_event(h->scan_wait_queue, h->scan_finished);
5295 /* Note: We don't need to worry about a race between this
5296 * thread and driver unload because the midlayer will
5297 * have incremented the reference count, so unload won't
5298 * happen if we're in here.
5299 */
5300 }
5301 h->scan_finished = 0; /* mark scan as in progress */
5302 h->scan_waiting = 0;
5303 spin_unlock_irqrestore(&h->scan_lock, flags);
5304
5305 if (unlikely(lockup_detected(h)))
5306 return hpsa_scan_complete(h);
5307
5308 hpsa_update_scsi_devices(h);
5309
5310 hpsa_scan_complete(h);
5311 }
5312
5313 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5314 {
5315 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5316
5317 if (!logical_drive)
5318 return -ENODEV;
5319
5320 if (qdepth < 1)
5321 qdepth = 1;
5322 else if (qdepth > logical_drive->queue_depth)
5323 qdepth = logical_drive->queue_depth;
5324
5325 return scsi_change_queue_depth(sdev, qdepth);
5326 }
5327
5328 static int hpsa_scan_finished(struct Scsi_Host *sh,
5329 unsigned long elapsed_time)
5330 {
5331 struct ctlr_info *h = shost_to_hba(sh);
5332 unsigned long flags;
5333 int finished;
5334
5335 spin_lock_irqsave(&h->scan_lock, flags);
5336 finished = h->scan_finished;
5337 spin_unlock_irqrestore(&h->scan_lock, flags);
5338 return finished;
5339 }
5340
5341 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5342 {
5343 struct Scsi_Host *sh;
5344
5345 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5346 if (sh == NULL) {
5347 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5348 return -ENOMEM;
5349 }
5350
5351 sh->io_port = 0;
5352 sh->n_io_port = 0;
5353 sh->this_id = -1;
5354 sh->max_channel = 3;
5355 sh->max_cmd_len = MAX_COMMAND_SIZE;
5356 sh->max_lun = HPSA_MAX_LUN;
5357 sh->max_id = HPSA_MAX_LUN;
5358 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5359 sh->cmd_per_lun = sh->can_queue;
5360 sh->sg_tablesize = h->maxsgentries;
5361 sh->transportt = hpsa_sas_transport_template;
5362 sh->hostdata[0] = (unsigned long) h;
5363 sh->irq = h->intr[h->intr_mode];
5364 sh->unique_id = sh->irq;
5365
5366 h->scsi_host = sh;
5367 return 0;
5368 }
5369
5370 static int hpsa_scsi_add_host(struct ctlr_info *h)
5371 {
5372 int rv;
5373
5374 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5375 if (rv) {
5376 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5377 return rv;
5378 }
5379 scsi_scan_host(h->scsi_host);
5380 return 0;
5381 }
5382
5383 /*
5384 * The block layer has already gone to the trouble of picking out a unique,
5385 * small-integer tag for this request. We use an offset from that value as
5386 * an index to select our command block. (The offset allows us to reserve the
5387 * low-numbered entries for our own uses.)
5388 */
5389 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5390 {
5391 int idx = scmd->request->tag;
5392
5393 if (idx < 0)
5394 return idx;
5395
5396 /* Offset to leave space for internal cmds. */
5397 return idx += HPSA_NRESERVED_CMDS;
5398 }
5399
5400 /*
5401 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5402 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5403 */
5404 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5405 struct CommandList *c, unsigned char lunaddr[],
5406 int reply_queue)
5407 {
5408 int rc;
5409
5410 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5411 (void) fill_cmd(c, TEST_UNIT_READY, h,
5412 NULL, 0, 0, lunaddr, TYPE_CMD);
5413 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5414 if (rc)
5415 return rc;
5416 /* no unmap needed here because no data xfer. */
5417
5418 /* Check if the unit is already ready. */
5419 if (c->err_info->CommandStatus == CMD_SUCCESS)
5420 return 0;
5421
5422 /*
5423 * The first command sent after reset will receive "unit attention" to
5424 * indicate that the LUN has been reset...this is actually what we're
5425 * looking for (but, success is good too).
5426 */
5427 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5428 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5429 (c->err_info->SenseInfo[2] == NO_SENSE ||
5430 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5431 return 0;
5432
5433 return 1;
5434 }
5435
5436 /*
5437 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5438 * returns zero when the unit is ready, and non-zero when giving up.
5439 */
5440 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5441 struct CommandList *c,
5442 unsigned char lunaddr[], int reply_queue)
5443 {
5444 int rc;
5445 int count = 0;
5446 int waittime = 1; /* seconds */
5447
5448 /* Send test unit ready until device ready, or give up. */
5449 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5450
5451 /*
5452 * Wait for a bit. do this first, because if we send
5453 * the TUR right away, the reset will just abort it.
5454 */
5455 msleep(1000 * waittime);
5456
5457 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5458 if (!rc)
5459 break;
5460
5461 /* Increase wait time with each try, up to a point. */
5462 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5463 waittime *= 2;
5464
5465 dev_warn(&h->pdev->dev,
5466 "waiting %d secs for device to become ready.\n",
5467 waittime);
5468 }
5469
5470 return rc;
5471 }
5472
5473 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5474 unsigned char lunaddr[],
5475 int reply_queue)
5476 {
5477 int first_queue;
5478 int last_queue;
5479 int rq;
5480 int rc = 0;
5481 struct CommandList *c;
5482
5483 c = cmd_alloc(h);
5484
5485 /*
5486 * If no specific reply queue was requested, then send the TUR
5487 * repeatedly, requesting a reply on each reply queue; otherwise execute
5488 * the loop exactly once using only the specified queue.
5489 */
5490 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5491 first_queue = 0;
5492 last_queue = h->nreply_queues - 1;
5493 } else {
5494 first_queue = reply_queue;
5495 last_queue = reply_queue;
5496 }
5497
5498 for (rq = first_queue; rq <= last_queue; rq++) {
5499 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5500 if (rc)
5501 break;
5502 }
5503
5504 if (rc)
5505 dev_warn(&h->pdev->dev, "giving up on device.\n");
5506 else
5507 dev_warn(&h->pdev->dev, "device is ready.\n");
5508
5509 cmd_free(h, c);
5510 return rc;
5511 }
5512
5513 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5514 * complaining. Doing a host- or bus-reset can't do anything good here.
5515 */
5516 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5517 {
5518 int rc;
5519 struct ctlr_info *h;
5520 struct hpsa_scsi_dev_t *dev;
5521 u8 reset_type;
5522 char msg[48];
5523
5524 /* find the controller to which the command to be aborted was sent */
5525 h = sdev_to_hba(scsicmd->device);
5526 if (h == NULL) /* paranoia */
5527 return FAILED;
5528
5529 if (lockup_detected(h))
5530 return FAILED;
5531
5532 dev = scsicmd->device->hostdata;
5533 if (!dev) {
5534 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5535 return FAILED;
5536 }
5537
5538 /* if controller locked up, we can guarantee command won't complete */
5539 if (lockup_detected(h)) {
5540 snprintf(msg, sizeof(msg),
5541 "cmd %d RESET FAILED, lockup detected",
5542 hpsa_get_cmd_index(scsicmd));
5543 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5544 return FAILED;
5545 }
5546
5547 /* this reset request might be the result of a lockup; check */
5548 if (detect_controller_lockup(h)) {
5549 snprintf(msg, sizeof(msg),
5550 "cmd %d RESET FAILED, new lockup detected",
5551 hpsa_get_cmd_index(scsicmd));
5552 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5553 return FAILED;
5554 }
5555
5556 /* Do not attempt on controller */
5557 if (is_hba_lunid(dev->scsi3addr))
5558 return SUCCESS;
5559
5560 if (is_logical_dev_addr_mode(dev->scsi3addr))
5561 reset_type = HPSA_DEVICE_RESET_MSG;
5562 else
5563 reset_type = HPSA_PHYS_TARGET_RESET;
5564
5565 sprintf(msg, "resetting %s",
5566 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5567 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5568
5569 h->reset_in_progress = 1;
5570
5571 /* send a reset to the SCSI LUN which the command was sent to */
5572 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5573 DEFAULT_REPLY_QUEUE);
5574 sprintf(msg, "reset %s %s",
5575 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5576 rc == 0 ? "completed successfully" : "failed");
5577 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5578 h->reset_in_progress = 0;
5579 return rc == 0 ? SUCCESS : FAILED;
5580 }
5581
5582 static void swizzle_abort_tag(u8 *tag)
5583 {
5584 u8 original_tag[8];
5585
5586 memcpy(original_tag, tag, 8);
5587 tag[0] = original_tag[3];
5588 tag[1] = original_tag[2];
5589 tag[2] = original_tag[1];
5590 tag[3] = original_tag[0];
5591 tag[4] = original_tag[7];
5592 tag[5] = original_tag[6];
5593 tag[6] = original_tag[5];
5594 tag[7] = original_tag[4];
5595 }
5596
5597 static void hpsa_get_tag(struct ctlr_info *h,
5598 struct CommandList *c, __le32 *taglower, __le32 *tagupper)
5599 {
5600 u64 tag;
5601 if (c->cmd_type == CMD_IOACCEL1) {
5602 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
5603 &h->ioaccel_cmd_pool[c->cmdindex];
5604 tag = le64_to_cpu(cm1->tag);
5605 *tagupper = cpu_to_le32(tag >> 32);
5606 *taglower = cpu_to_le32(tag);
5607 return;
5608 }
5609 if (c->cmd_type == CMD_IOACCEL2) {
5610 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5611 &h->ioaccel2_cmd_pool[c->cmdindex];
5612 /* upper tag not used in ioaccel2 mode */
5613 memset(tagupper, 0, sizeof(*tagupper));
5614 *taglower = cm2->Tag;
5615 return;
5616 }
5617 tag = le64_to_cpu(c->Header.tag);
5618 *tagupper = cpu_to_le32(tag >> 32);
5619 *taglower = cpu_to_le32(tag);
5620 }
5621
5622 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5623 struct CommandList *abort, int reply_queue)
5624 {
5625 int rc = IO_OK;
5626 struct CommandList *c;
5627 struct ErrorInfo *ei;
5628 __le32 tagupper, taglower;
5629
5630 c = cmd_alloc(h);
5631
5632 /* fill_cmd can't fail here, no buffer to map */
5633 (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5634 0, 0, scsi3addr, TYPE_MSG);
5635 if (h->needs_abort_tags_swizzled)
5636 swizzle_abort_tag(&c->Request.CDB[4]);
5637 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5638 hpsa_get_tag(h, abort, &taglower, &tagupper);
5639 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5640 __func__, tagupper, taglower);
5641 /* no unmap needed here because no data xfer. */
5642
5643 ei = c->err_info;
5644 switch (ei->CommandStatus) {
5645 case CMD_SUCCESS:
5646 break;
5647 case CMD_TMF_STATUS:
5648 rc = hpsa_evaluate_tmf_status(h, c);
5649 break;
5650 case CMD_UNABORTABLE: /* Very common, don't make noise. */
5651 rc = -1;
5652 break;
5653 default:
5654 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5655 __func__, tagupper, taglower);
5656 hpsa_scsi_interpret_error(h, c);
5657 rc = -1;
5658 break;
5659 }
5660 cmd_free(h, c);
5661 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5662 __func__, tagupper, taglower);
5663 return rc;
5664 }
5665
5666 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5667 struct CommandList *command_to_abort, int reply_queue)
5668 {
5669 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5670 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5671 struct io_accel2_cmd *c2a =
5672 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5673 struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5674 struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5675
5676 /*
5677 * We're overlaying struct hpsa_tmf_struct on top of something which
5678 * was allocated as a struct io_accel2_cmd, so we better be sure it
5679 * actually fits, and doesn't overrun the error info space.
5680 */
5681 BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5682 sizeof(struct io_accel2_cmd));
5683 BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5684 offsetof(struct hpsa_tmf_struct, error_len) +
5685 sizeof(ac->error_len));
5686
5687 c->cmd_type = IOACCEL2_TMF;
5688 c->scsi_cmd = SCSI_CMD_BUSY;
5689
5690 /* Adjust the DMA address to point to the accelerated command buffer */
5691 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5692 (c->cmdindex * sizeof(struct io_accel2_cmd));
5693 BUG_ON(c->busaddr & 0x0000007F);
5694
5695 memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5696 ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5697 ac->reply_queue = reply_queue;
5698 ac->tmf = IOACCEL2_TMF_ABORT;
5699 ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5700 memset(ac->lun_id, 0, sizeof(ac->lun_id));
5701 ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5702 ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5703 ac->error_ptr = cpu_to_le64(c->busaddr +
5704 offsetof(struct io_accel2_cmd, error_data));
5705 ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5706 }
5707
5708 /* ioaccel2 path firmware cannot handle abort task requests.
5709 * Change abort requests to physical target reset, and send to the
5710 * address of the physical disk used for the ioaccel 2 command.
5711 * Return 0 on success (IO_OK)
5712 * -1 on failure
5713 */
5714
5715 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5716 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5717 {
5718 int rc = IO_OK;
5719 struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5720 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5721 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5722 unsigned char *psa = &phys_scsi3addr[0];
5723
5724 /* Get a pointer to the hpsa logical device. */
5725 scmd = abort->scsi_cmd;
5726 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5727 if (dev == NULL) {
5728 dev_warn(&h->pdev->dev,
5729 "Cannot abort: no device pointer for command.\n");
5730 return -1; /* not abortable */
5731 }
5732
5733 if (h->raid_offload_debug > 0)
5734 dev_info(&h->pdev->dev,
5735 "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5736 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5737 "Reset as abort",
5738 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5739 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5740
5741 if (!dev->offload_enabled) {
5742 dev_warn(&h->pdev->dev,
5743 "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5744 return -1; /* not abortable */
5745 }
5746
5747 /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5748 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5749 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5750 return -1; /* not abortable */
5751 }
5752
5753 /* send the reset */
5754 if (h->raid_offload_debug > 0)
5755 dev_info(&h->pdev->dev,
5756 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5757 psa[0], psa[1], psa[2], psa[3],
5758 psa[4], psa[5], psa[6], psa[7]);
5759 rc = hpsa_do_reset(h, dev, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5760 if (rc != 0) {
5761 dev_warn(&h->pdev->dev,
5762 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5763 psa[0], psa[1], psa[2], psa[3],
5764 psa[4], psa[5], psa[6], psa[7]);
5765 return rc; /* failed to reset */
5766 }
5767
5768 /* wait for device to recover */
5769 if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5770 dev_warn(&h->pdev->dev,
5771 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5772 psa[0], psa[1], psa[2], psa[3],
5773 psa[4], psa[5], psa[6], psa[7]);
5774 return -1; /* failed to recover */
5775 }
5776
5777 /* device recovered */
5778 dev_info(&h->pdev->dev,
5779 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5780 psa[0], psa[1], psa[2], psa[3],
5781 psa[4], psa[5], psa[6], psa[7]);
5782
5783 return rc; /* success */
5784 }
5785
5786 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5787 struct CommandList *abort, int reply_queue)
5788 {
5789 int rc = IO_OK;
5790 struct CommandList *c;
5791 __le32 taglower, tagupper;
5792 struct hpsa_scsi_dev_t *dev;
5793 struct io_accel2_cmd *c2;
5794
5795 dev = abort->scsi_cmd->device->hostdata;
5796 if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5797 return -1;
5798
5799 c = cmd_alloc(h);
5800 setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5801 c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5802 (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5803 hpsa_get_tag(h, abort, &taglower, &tagupper);
5804 dev_dbg(&h->pdev->dev,
5805 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5806 __func__, tagupper, taglower);
5807 /* no unmap needed here because no data xfer. */
5808
5809 dev_dbg(&h->pdev->dev,
5810 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5811 __func__, tagupper, taglower, c2->error_data.serv_response);
5812 switch (c2->error_data.serv_response) {
5813 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5814 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5815 rc = 0;
5816 break;
5817 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5818 case IOACCEL2_SERV_RESPONSE_FAILURE:
5819 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5820 rc = -1;
5821 break;
5822 default:
5823 dev_warn(&h->pdev->dev,
5824 "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5825 __func__, tagupper, taglower,
5826 c2->error_data.serv_response);
5827 rc = -1;
5828 }
5829 cmd_free(h, c);
5830 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5831 tagupper, taglower);
5832 return rc;
5833 }
5834
5835 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5836 unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5837 {
5838 /*
5839 * ioccelerator mode 2 commands should be aborted via the
5840 * accelerated path, since RAID path is unaware of these commands,
5841 * but not all underlying firmware can handle abort TMF.
5842 * Change abort to physical device reset when abort TMF is unsupported.
5843 */
5844 if (abort->cmd_type == CMD_IOACCEL2) {
5845 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5846 return hpsa_send_abort_ioaccel2(h, abort,
5847 reply_queue);
5848 else
5849 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5850 abort, reply_queue);
5851 }
5852 return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5853 }
5854
5855 /* Find out which reply queue a command was meant to return on */
5856 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5857 struct CommandList *c)
5858 {
5859 if (c->cmd_type == CMD_IOACCEL2)
5860 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5861 return c->Header.ReplyQueue;
5862 }
5863
5864 /*
5865 * Limit concurrency of abort commands to prevent
5866 * over-subscription of commands
5867 */
5868 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5869 {
5870 #define ABORT_CMD_WAIT_MSECS 5000
5871 return !wait_event_timeout(h->abort_cmd_wait_queue,
5872 atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5873 msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5874 }
5875
5876 /* Send an abort for the specified command.
5877 * If the device and controller support it,
5878 * send a task abort request.
5879 */
5880 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5881 {
5882
5883 int rc;
5884 struct ctlr_info *h;
5885 struct hpsa_scsi_dev_t *dev;
5886 struct CommandList *abort; /* pointer to command to be aborted */
5887 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
5888 char msg[256]; /* For debug messaging. */
5889 int ml = 0;
5890 __le32 tagupper, taglower;
5891 int refcount, reply_queue;
5892
5893 if (sc == NULL)
5894 return FAILED;
5895
5896 if (sc->device == NULL)
5897 return FAILED;
5898
5899 /* Find the controller of the command to be aborted */
5900 h = sdev_to_hba(sc->device);
5901 if (h == NULL)
5902 return FAILED;
5903
5904 /* Find the device of the command to be aborted */
5905 dev = sc->device->hostdata;
5906 if (!dev) {
5907 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5908 msg);
5909 return FAILED;
5910 }
5911
5912 /* If controller locked up, we can guarantee command won't complete */
5913 if (lockup_detected(h)) {
5914 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5915 "ABORT FAILED, lockup detected");
5916 return FAILED;
5917 }
5918
5919 /* This is a good time to check if controller lockup has occurred */
5920 if (detect_controller_lockup(h)) {
5921 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5922 "ABORT FAILED, new lockup detected");
5923 return FAILED;
5924 }
5925
5926 /* Check that controller supports some kind of task abort */
5927 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5928 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5929 return FAILED;
5930
5931 memset(msg, 0, sizeof(msg));
5932 ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5933 h->scsi_host->host_no, sc->device->channel,
5934 sc->device->id, sc->device->lun,
5935 "Aborting command", sc);
5936
5937 /* Get SCSI command to be aborted */
5938 abort = (struct CommandList *) sc->host_scribble;
5939 if (abort == NULL) {
5940 /* This can happen if the command already completed. */
5941 return SUCCESS;
5942 }
5943 refcount = atomic_inc_return(&abort->refcount);
5944 if (refcount == 1) { /* Command is done already. */
5945 cmd_free(h, abort);
5946 return SUCCESS;
5947 }
5948
5949 /* Don't bother trying the abort if we know it won't work. */
5950 if (abort->cmd_type != CMD_IOACCEL2 &&
5951 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5952 cmd_free(h, abort);
5953 return FAILED;
5954 }
5955
5956 /*
5957 * Check that we're aborting the right command.
5958 * It's possible the CommandList already completed and got re-used.
5959 */
5960 if (abort->scsi_cmd != sc) {
5961 cmd_free(h, abort);
5962 return SUCCESS;
5963 }
5964
5965 abort->abort_pending = true;
5966 hpsa_get_tag(h, abort, &taglower, &tagupper);
5967 reply_queue = hpsa_extract_reply_queue(h, abort);
5968 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5969 as = abort->scsi_cmd;
5970 if (as != NULL)
5971 ml += sprintf(msg+ml,
5972 "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5973 as->cmd_len, as->cmnd[0], as->cmnd[1],
5974 as->serial_number);
5975 dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5976 hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5977
5978 /*
5979 * Command is in flight, or possibly already completed
5980 * by the firmware (but not to the scsi mid layer) but we can't
5981 * distinguish which. Send the abort down.
5982 */
5983 if (wait_for_available_abort_cmd(h)) {
5984 dev_warn(&h->pdev->dev,
5985 "%s FAILED, timeout waiting for an abort command to become available.\n",
5986 msg);
5987 cmd_free(h, abort);
5988 return FAILED;
5989 }
5990 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5991 atomic_inc(&h->abort_cmds_available);
5992 wake_up_all(&h->abort_cmd_wait_queue);
5993 if (rc != 0) {
5994 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5995 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5996 "FAILED to abort command");
5997 cmd_free(h, abort);
5998 return FAILED;
5999 }
6000 dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
6001 wait_event(h->event_sync_wait_queue,
6002 abort->scsi_cmd != sc || lockup_detected(h));
6003 cmd_free(h, abort);
6004 return !lockup_detected(h) ? SUCCESS : FAILED;
6005 }
6006
6007 /*
6008 * For operations with an associated SCSI command, a command block is allocated
6009 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6010 * block request tag as an index into a table of entries. cmd_tagged_free() is
6011 * the complement, although cmd_free() may be called instead.
6012 */
6013 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6014 struct scsi_cmnd *scmd)
6015 {
6016 int idx = hpsa_get_cmd_index(scmd);
6017 struct CommandList *c = h->cmd_pool + idx;
6018
6019 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6020 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6021 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6022 /* The index value comes from the block layer, so if it's out of
6023 * bounds, it's probably not our bug.
6024 */
6025 BUG();
6026 }
6027
6028 atomic_inc(&c->refcount);
6029 if (unlikely(!hpsa_is_cmd_idle(c))) {
6030 /*
6031 * We expect that the SCSI layer will hand us a unique tag
6032 * value. Thus, there should never be a collision here between
6033 * two requests...because if the selected command isn't idle
6034 * then someone is going to be very disappointed.
6035 */
6036 dev_err(&h->pdev->dev,
6037 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6038 idx);
6039 if (c->scsi_cmd != NULL)
6040 scsi_print_command(c->scsi_cmd);
6041 scsi_print_command(scmd);
6042 }
6043
6044 hpsa_cmd_partial_init(h, idx, c);
6045 return c;
6046 }
6047
6048 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6049 {
6050 /*
6051 * Release our reference to the block. We don't need to do anything
6052 * else to free it, because it is accessed by index. (There's no point
6053 * in checking the result of the decrement, since we cannot guarantee
6054 * that there isn't a concurrent abort which is also accessing it.)
6055 */
6056 (void)atomic_dec(&c->refcount);
6057 }
6058
6059 /*
6060 * For operations that cannot sleep, a command block is allocated at init,
6061 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6062 * which ones are free or in use. Lock must be held when calling this.
6063 * cmd_free() is the complement.
6064 * This function never gives up and returns NULL. If it hangs,
6065 * another thread must call cmd_free() to free some tags.
6066 */
6067
6068 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6069 {
6070 struct CommandList *c;
6071 int refcount, i;
6072 int offset = 0;
6073
6074 /*
6075 * There is some *extremely* small but non-zero chance that that
6076 * multiple threads could get in here, and one thread could
6077 * be scanning through the list of bits looking for a free
6078 * one, but the free ones are always behind him, and other
6079 * threads sneak in behind him and eat them before he can
6080 * get to them, so that while there is always a free one, a
6081 * very unlucky thread might be starved anyway, never able to
6082 * beat the other threads. In reality, this happens so
6083 * infrequently as to be indistinguishable from never.
6084 *
6085 * Note that we start allocating commands before the SCSI host structure
6086 * is initialized. Since the search starts at bit zero, this
6087 * all works, since we have at least one command structure available;
6088 * however, it means that the structures with the low indexes have to be
6089 * reserved for driver-initiated requests, while requests from the block
6090 * layer will use the higher indexes.
6091 */
6092
6093 for (;;) {
6094 i = find_next_zero_bit(h->cmd_pool_bits,
6095 HPSA_NRESERVED_CMDS,
6096 offset);
6097 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6098 offset = 0;
6099 continue;
6100 }
6101 c = h->cmd_pool + i;
6102 refcount = atomic_inc_return(&c->refcount);
6103 if (unlikely(refcount > 1)) {
6104 cmd_free(h, c); /* already in use */
6105 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6106 continue;
6107 }
6108 set_bit(i & (BITS_PER_LONG - 1),
6109 h->cmd_pool_bits + (i / BITS_PER_LONG));
6110 break; /* it's ours now. */
6111 }
6112 hpsa_cmd_partial_init(h, i, c);
6113 return c;
6114 }
6115
6116 /*
6117 * This is the complementary operation to cmd_alloc(). Note, however, in some
6118 * corner cases it may also be used to free blocks allocated by
6119 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6120 * the clear-bit is harmless.
6121 */
6122 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6123 {
6124 if (atomic_dec_and_test(&c->refcount)) {
6125 int i;
6126
6127 i = c - h->cmd_pool;
6128 clear_bit(i & (BITS_PER_LONG - 1),
6129 h->cmd_pool_bits + (i / BITS_PER_LONG));
6130 }
6131 }
6132
6133 #ifdef CONFIG_COMPAT
6134
6135 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6136 void __user *arg)
6137 {
6138 IOCTL32_Command_struct __user *arg32 =
6139 (IOCTL32_Command_struct __user *) arg;
6140 IOCTL_Command_struct arg64;
6141 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6142 int err;
6143 u32 cp;
6144
6145 memset(&arg64, 0, sizeof(arg64));
6146 err = 0;
6147 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6148 sizeof(arg64.LUN_info));
6149 err |= copy_from_user(&arg64.Request, &arg32->Request,
6150 sizeof(arg64.Request));
6151 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6152 sizeof(arg64.error_info));
6153 err |= get_user(arg64.buf_size, &arg32->buf_size);
6154 err |= get_user(cp, &arg32->buf);
6155 arg64.buf = compat_ptr(cp);
6156 err |= copy_to_user(p, &arg64, sizeof(arg64));
6157
6158 if (err)
6159 return -EFAULT;
6160
6161 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6162 if (err)
6163 return err;
6164 err |= copy_in_user(&arg32->error_info, &p->error_info,
6165 sizeof(arg32->error_info));
6166 if (err)
6167 return -EFAULT;
6168 return err;
6169 }
6170
6171 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6172 int cmd, void __user *arg)
6173 {
6174 BIG_IOCTL32_Command_struct __user *arg32 =
6175 (BIG_IOCTL32_Command_struct __user *) arg;
6176 BIG_IOCTL_Command_struct arg64;
6177 BIG_IOCTL_Command_struct __user *p =
6178 compat_alloc_user_space(sizeof(arg64));
6179 int err;
6180 u32 cp;
6181
6182 memset(&arg64, 0, sizeof(arg64));
6183 err = 0;
6184 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6185 sizeof(arg64.LUN_info));
6186 err |= copy_from_user(&arg64.Request, &arg32->Request,
6187 sizeof(arg64.Request));
6188 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6189 sizeof(arg64.error_info));
6190 err |= get_user(arg64.buf_size, &arg32->buf_size);
6191 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6192 err |= get_user(cp, &arg32->buf);
6193 arg64.buf = compat_ptr(cp);
6194 err |= copy_to_user(p, &arg64, sizeof(arg64));
6195
6196 if (err)
6197 return -EFAULT;
6198
6199 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6200 if (err)
6201 return err;
6202 err |= copy_in_user(&arg32->error_info, &p->error_info,
6203 sizeof(arg32->error_info));
6204 if (err)
6205 return -EFAULT;
6206 return err;
6207 }
6208
6209 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6210 {
6211 switch (cmd) {
6212 case CCISS_GETPCIINFO:
6213 case CCISS_GETINTINFO:
6214 case CCISS_SETINTINFO:
6215 case CCISS_GETNODENAME:
6216 case CCISS_SETNODENAME:
6217 case CCISS_GETHEARTBEAT:
6218 case CCISS_GETBUSTYPES:
6219 case CCISS_GETFIRMVER:
6220 case CCISS_GETDRIVVER:
6221 case CCISS_REVALIDVOLS:
6222 case CCISS_DEREGDISK:
6223 case CCISS_REGNEWDISK:
6224 case CCISS_REGNEWD:
6225 case CCISS_RESCANDISK:
6226 case CCISS_GETLUNINFO:
6227 return hpsa_ioctl(dev, cmd, arg);
6228
6229 case CCISS_PASSTHRU32:
6230 return hpsa_ioctl32_passthru(dev, cmd, arg);
6231 case CCISS_BIG_PASSTHRU32:
6232 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6233
6234 default:
6235 return -ENOIOCTLCMD;
6236 }
6237 }
6238 #endif
6239
6240 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6241 {
6242 struct hpsa_pci_info pciinfo;
6243
6244 if (!argp)
6245 return -EINVAL;
6246 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6247 pciinfo.bus = h->pdev->bus->number;
6248 pciinfo.dev_fn = h->pdev->devfn;
6249 pciinfo.board_id = h->board_id;
6250 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6251 return -EFAULT;
6252 return 0;
6253 }
6254
6255 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6256 {
6257 DriverVer_type DriverVer;
6258 unsigned char vmaj, vmin, vsubmin;
6259 int rc;
6260
6261 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6262 &vmaj, &vmin, &vsubmin);
6263 if (rc != 3) {
6264 dev_info(&h->pdev->dev, "driver version string '%s' "
6265 "unrecognized.", HPSA_DRIVER_VERSION);
6266 vmaj = 0;
6267 vmin = 0;
6268 vsubmin = 0;
6269 }
6270 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6271 if (!argp)
6272 return -EINVAL;
6273 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6274 return -EFAULT;
6275 return 0;
6276 }
6277
6278 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6279 {
6280 IOCTL_Command_struct iocommand;
6281 struct CommandList *c;
6282 char *buff = NULL;
6283 u64 temp64;
6284 int rc = 0;
6285
6286 if (!argp)
6287 return -EINVAL;
6288 if (!capable(CAP_SYS_RAWIO))
6289 return -EPERM;
6290 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6291 return -EFAULT;
6292 if ((iocommand.buf_size < 1) &&
6293 (iocommand.Request.Type.Direction != XFER_NONE)) {
6294 return -EINVAL;
6295 }
6296 if (iocommand.buf_size > 0) {
6297 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6298 if (buff == NULL)
6299 return -ENOMEM;
6300 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6301 /* Copy the data into the buffer we created */
6302 if (copy_from_user(buff, iocommand.buf,
6303 iocommand.buf_size)) {
6304 rc = -EFAULT;
6305 goto out_kfree;
6306 }
6307 } else {
6308 memset(buff, 0, iocommand.buf_size);
6309 }
6310 }
6311 c = cmd_alloc(h);
6312
6313 /* Fill in the command type */
6314 c->cmd_type = CMD_IOCTL_PEND;
6315 c->scsi_cmd = SCSI_CMD_BUSY;
6316 /* Fill in Command Header */
6317 c->Header.ReplyQueue = 0; /* unused in simple mode */
6318 if (iocommand.buf_size > 0) { /* buffer to fill */
6319 c->Header.SGList = 1;
6320 c->Header.SGTotal = cpu_to_le16(1);
6321 } else { /* no buffers to fill */
6322 c->Header.SGList = 0;
6323 c->Header.SGTotal = cpu_to_le16(0);
6324 }
6325 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6326
6327 /* Fill in Request block */
6328 memcpy(&c->Request, &iocommand.Request,
6329 sizeof(c->Request));
6330
6331 /* Fill in the scatter gather information */
6332 if (iocommand.buf_size > 0) {
6333 temp64 = pci_map_single(h->pdev, buff,
6334 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6335 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6336 c->SG[0].Addr = cpu_to_le64(0);
6337 c->SG[0].Len = cpu_to_le32(0);
6338 rc = -ENOMEM;
6339 goto out;
6340 }
6341 c->SG[0].Addr = cpu_to_le64(temp64);
6342 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6343 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6344 }
6345 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6346 if (iocommand.buf_size > 0)
6347 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6348 check_ioctl_unit_attention(h, c);
6349 if (rc) {
6350 rc = -EIO;
6351 goto out;
6352 }
6353
6354 /* Copy the error information out */
6355 memcpy(&iocommand.error_info, c->err_info,
6356 sizeof(iocommand.error_info));
6357 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6358 rc = -EFAULT;
6359 goto out;
6360 }
6361 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6362 iocommand.buf_size > 0) {
6363 /* Copy the data out of the buffer we created */
6364 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6365 rc = -EFAULT;
6366 goto out;
6367 }
6368 }
6369 out:
6370 cmd_free(h, c);
6371 out_kfree:
6372 kfree(buff);
6373 return rc;
6374 }
6375
6376 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6377 {
6378 BIG_IOCTL_Command_struct *ioc;
6379 struct CommandList *c;
6380 unsigned char **buff = NULL;
6381 int *buff_size = NULL;
6382 u64 temp64;
6383 BYTE sg_used = 0;
6384 int status = 0;
6385 u32 left;
6386 u32 sz;
6387 BYTE __user *data_ptr;
6388
6389 if (!argp)
6390 return -EINVAL;
6391 if (!capable(CAP_SYS_RAWIO))
6392 return -EPERM;
6393 ioc = (BIG_IOCTL_Command_struct *)
6394 kmalloc(sizeof(*ioc), GFP_KERNEL);
6395 if (!ioc) {
6396 status = -ENOMEM;
6397 goto cleanup1;
6398 }
6399 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6400 status = -EFAULT;
6401 goto cleanup1;
6402 }
6403 if ((ioc->buf_size < 1) &&
6404 (ioc->Request.Type.Direction != XFER_NONE)) {
6405 status = -EINVAL;
6406 goto cleanup1;
6407 }
6408 /* Check kmalloc limits using all SGs */
6409 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6410 status = -EINVAL;
6411 goto cleanup1;
6412 }
6413 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6414 status = -EINVAL;
6415 goto cleanup1;
6416 }
6417 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6418 if (!buff) {
6419 status = -ENOMEM;
6420 goto cleanup1;
6421 }
6422 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6423 if (!buff_size) {
6424 status = -ENOMEM;
6425 goto cleanup1;
6426 }
6427 left = ioc->buf_size;
6428 data_ptr = ioc->buf;
6429 while (left) {
6430 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6431 buff_size[sg_used] = sz;
6432 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6433 if (buff[sg_used] == NULL) {
6434 status = -ENOMEM;
6435 goto cleanup1;
6436 }
6437 if (ioc->Request.Type.Direction & XFER_WRITE) {
6438 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6439 status = -EFAULT;
6440 goto cleanup1;
6441 }
6442 } else
6443 memset(buff[sg_used], 0, sz);
6444 left -= sz;
6445 data_ptr += sz;
6446 sg_used++;
6447 }
6448 c = cmd_alloc(h);
6449
6450 c->cmd_type = CMD_IOCTL_PEND;
6451 c->scsi_cmd = SCSI_CMD_BUSY;
6452 c->Header.ReplyQueue = 0;
6453 c->Header.SGList = (u8) sg_used;
6454 c->Header.SGTotal = cpu_to_le16(sg_used);
6455 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6456 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6457 if (ioc->buf_size > 0) {
6458 int i;
6459 for (i = 0; i < sg_used; i++) {
6460 temp64 = pci_map_single(h->pdev, buff[i],
6461 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6462 if (dma_mapping_error(&h->pdev->dev,
6463 (dma_addr_t) temp64)) {
6464 c->SG[i].Addr = cpu_to_le64(0);
6465 c->SG[i].Len = cpu_to_le32(0);
6466 hpsa_pci_unmap(h->pdev, c, i,
6467 PCI_DMA_BIDIRECTIONAL);
6468 status = -ENOMEM;
6469 goto cleanup0;
6470 }
6471 c->SG[i].Addr = cpu_to_le64(temp64);
6472 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6473 c->SG[i].Ext = cpu_to_le32(0);
6474 }
6475 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6476 }
6477 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
6478 if (sg_used)
6479 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6480 check_ioctl_unit_attention(h, c);
6481 if (status) {
6482 status = -EIO;
6483 goto cleanup0;
6484 }
6485
6486 /* Copy the error information out */
6487 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6488 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6489 status = -EFAULT;
6490 goto cleanup0;
6491 }
6492 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6493 int i;
6494
6495 /* Copy the data out of the buffer we created */
6496 BYTE __user *ptr = ioc->buf;
6497 for (i = 0; i < sg_used; i++) {
6498 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6499 status = -EFAULT;
6500 goto cleanup0;
6501 }
6502 ptr += buff_size[i];
6503 }
6504 }
6505 status = 0;
6506 cleanup0:
6507 cmd_free(h, c);
6508 cleanup1:
6509 if (buff) {
6510 int i;
6511
6512 for (i = 0; i < sg_used; i++)
6513 kfree(buff[i]);
6514 kfree(buff);
6515 }
6516 kfree(buff_size);
6517 kfree(ioc);
6518 return status;
6519 }
6520
6521 static void check_ioctl_unit_attention(struct ctlr_info *h,
6522 struct CommandList *c)
6523 {
6524 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6525 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6526 (void) check_for_unit_attention(h, c);
6527 }
6528
6529 /*
6530 * ioctl
6531 */
6532 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6533 {
6534 struct ctlr_info *h;
6535 void __user *argp = (void __user *)arg;
6536 int rc;
6537
6538 h = sdev_to_hba(dev);
6539
6540 switch (cmd) {
6541 case CCISS_DEREGDISK:
6542 case CCISS_REGNEWDISK:
6543 case CCISS_REGNEWD:
6544 hpsa_scan_start(h->scsi_host);
6545 return 0;
6546 case CCISS_GETPCIINFO:
6547 return hpsa_getpciinfo_ioctl(h, argp);
6548 case CCISS_GETDRIVVER:
6549 return hpsa_getdrivver_ioctl(h, argp);
6550 case CCISS_PASSTHRU:
6551 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6552 return -EAGAIN;
6553 rc = hpsa_passthru_ioctl(h, argp);
6554 atomic_inc(&h->passthru_cmds_avail);
6555 return rc;
6556 case CCISS_BIG_PASSTHRU:
6557 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6558 return -EAGAIN;
6559 rc = hpsa_big_passthru_ioctl(h, argp);
6560 atomic_inc(&h->passthru_cmds_avail);
6561 return rc;
6562 default:
6563 return -ENOTTY;
6564 }
6565 }
6566
6567 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6568 u8 reset_type)
6569 {
6570 struct CommandList *c;
6571
6572 c = cmd_alloc(h);
6573
6574 /* fill_cmd can't fail here, no data buffer to map */
6575 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6576 RAID_CTLR_LUNID, TYPE_MSG);
6577 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6578 c->waiting = NULL;
6579 enqueue_cmd_and_start_io(h, c);
6580 /* Don't wait for completion, the reset won't complete. Don't free
6581 * the command either. This is the last command we will send before
6582 * re-initializing everything, so it doesn't matter and won't leak.
6583 */
6584 return;
6585 }
6586
6587 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6588 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6589 int cmd_type)
6590 {
6591 int pci_dir = XFER_NONE;
6592 u64 tag; /* for commands to be aborted */
6593
6594 c->cmd_type = CMD_IOCTL_PEND;
6595 c->scsi_cmd = SCSI_CMD_BUSY;
6596 c->Header.ReplyQueue = 0;
6597 if (buff != NULL && size > 0) {
6598 c->Header.SGList = 1;
6599 c->Header.SGTotal = cpu_to_le16(1);
6600 } else {
6601 c->Header.SGList = 0;
6602 c->Header.SGTotal = cpu_to_le16(0);
6603 }
6604 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6605
6606 if (cmd_type == TYPE_CMD) {
6607 switch (cmd) {
6608 case HPSA_INQUIRY:
6609 /* are we trying to read a vital product page */
6610 if (page_code & VPD_PAGE) {
6611 c->Request.CDB[1] = 0x01;
6612 c->Request.CDB[2] = (page_code & 0xff);
6613 }
6614 c->Request.CDBLen = 6;
6615 c->Request.type_attr_dir =
6616 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6617 c->Request.Timeout = 0;
6618 c->Request.CDB[0] = HPSA_INQUIRY;
6619 c->Request.CDB[4] = size & 0xFF;
6620 break;
6621 case HPSA_REPORT_LOG:
6622 case HPSA_REPORT_PHYS:
6623 /* Talking to controller so It's a physical command
6624 mode = 00 target = 0. Nothing to write.
6625 */
6626 c->Request.CDBLen = 12;
6627 c->Request.type_attr_dir =
6628 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6629 c->Request.Timeout = 0;
6630 c->Request.CDB[0] = cmd;
6631 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6632 c->Request.CDB[7] = (size >> 16) & 0xFF;
6633 c->Request.CDB[8] = (size >> 8) & 0xFF;
6634 c->Request.CDB[9] = size & 0xFF;
6635 break;
6636 case BMIC_SENSE_DIAG_OPTIONS:
6637 c->Request.CDBLen = 16;
6638 c->Request.type_attr_dir =
6639 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6640 c->Request.Timeout = 0;
6641 /* Spec says this should be BMIC_WRITE */
6642 c->Request.CDB[0] = BMIC_READ;
6643 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6644 break;
6645 case BMIC_SET_DIAG_OPTIONS:
6646 c->Request.CDBLen = 16;
6647 c->Request.type_attr_dir =
6648 TYPE_ATTR_DIR(cmd_type,
6649 ATTR_SIMPLE, XFER_WRITE);
6650 c->Request.Timeout = 0;
6651 c->Request.CDB[0] = BMIC_WRITE;
6652 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6653 break;
6654 case HPSA_CACHE_FLUSH:
6655 c->Request.CDBLen = 12;
6656 c->Request.type_attr_dir =
6657 TYPE_ATTR_DIR(cmd_type,
6658 ATTR_SIMPLE, XFER_WRITE);
6659 c->Request.Timeout = 0;
6660 c->Request.CDB[0] = BMIC_WRITE;
6661 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6662 c->Request.CDB[7] = (size >> 8) & 0xFF;
6663 c->Request.CDB[8] = size & 0xFF;
6664 break;
6665 case TEST_UNIT_READY:
6666 c->Request.CDBLen = 6;
6667 c->Request.type_attr_dir =
6668 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6669 c->Request.Timeout = 0;
6670 break;
6671 case HPSA_GET_RAID_MAP:
6672 c->Request.CDBLen = 12;
6673 c->Request.type_attr_dir =
6674 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6675 c->Request.Timeout = 0;
6676 c->Request.CDB[0] = HPSA_CISS_READ;
6677 c->Request.CDB[1] = cmd;
6678 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6679 c->Request.CDB[7] = (size >> 16) & 0xFF;
6680 c->Request.CDB[8] = (size >> 8) & 0xFF;
6681 c->Request.CDB[9] = size & 0xFF;
6682 break;
6683 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6684 c->Request.CDBLen = 10;
6685 c->Request.type_attr_dir =
6686 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6687 c->Request.Timeout = 0;
6688 c->Request.CDB[0] = BMIC_READ;
6689 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6690 c->Request.CDB[7] = (size >> 16) & 0xFF;
6691 c->Request.CDB[8] = (size >> 8) & 0xFF;
6692 break;
6693 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6694 c->Request.CDBLen = 10;
6695 c->Request.type_attr_dir =
6696 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6697 c->Request.Timeout = 0;
6698 c->Request.CDB[0] = BMIC_READ;
6699 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6700 c->Request.CDB[7] = (size >> 16) & 0xFF;
6701 c->Request.CDB[8] = (size >> 8) & 0XFF;
6702 break;
6703 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6704 c->Request.CDBLen = 10;
6705 c->Request.type_attr_dir =
6706 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6707 c->Request.Timeout = 0;
6708 c->Request.CDB[0] = BMIC_READ;
6709 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6710 c->Request.CDB[7] = (size >> 16) & 0xFF;
6711 c->Request.CDB[8] = (size >> 8) & 0XFF;
6712 break;
6713 case BMIC_IDENTIFY_CONTROLLER:
6714 c->Request.CDBLen = 10;
6715 c->Request.type_attr_dir =
6716 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6717 c->Request.Timeout = 0;
6718 c->Request.CDB[0] = BMIC_READ;
6719 c->Request.CDB[1] = 0;
6720 c->Request.CDB[2] = 0;
6721 c->Request.CDB[3] = 0;
6722 c->Request.CDB[4] = 0;
6723 c->Request.CDB[5] = 0;
6724 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6725 c->Request.CDB[7] = (size >> 16) & 0xFF;
6726 c->Request.CDB[8] = (size >> 8) & 0XFF;
6727 c->Request.CDB[9] = 0;
6728 break;
6729 default:
6730 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6731 BUG();
6732 return -1;
6733 }
6734 } else if (cmd_type == TYPE_MSG) {
6735 switch (cmd) {
6736
6737 case HPSA_PHYS_TARGET_RESET:
6738 c->Request.CDBLen = 16;
6739 c->Request.type_attr_dir =
6740 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6741 c->Request.Timeout = 0; /* Don't time out */
6742 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6743 c->Request.CDB[0] = HPSA_RESET;
6744 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6745 /* Physical target reset needs no control bytes 4-7*/
6746 c->Request.CDB[4] = 0x00;
6747 c->Request.CDB[5] = 0x00;
6748 c->Request.CDB[6] = 0x00;
6749 c->Request.CDB[7] = 0x00;
6750 break;
6751 case HPSA_DEVICE_RESET_MSG:
6752 c->Request.CDBLen = 16;
6753 c->Request.type_attr_dir =
6754 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6755 c->Request.Timeout = 0; /* Don't time out */
6756 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6757 c->Request.CDB[0] = cmd;
6758 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6759 /* If bytes 4-7 are zero, it means reset the */
6760 /* LunID device */
6761 c->Request.CDB[4] = 0x00;
6762 c->Request.CDB[5] = 0x00;
6763 c->Request.CDB[6] = 0x00;
6764 c->Request.CDB[7] = 0x00;
6765 break;
6766 case HPSA_ABORT_MSG:
6767 memcpy(&tag, buff, sizeof(tag));
6768 dev_dbg(&h->pdev->dev,
6769 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6770 tag, c->Header.tag);
6771 c->Request.CDBLen = 16;
6772 c->Request.type_attr_dir =
6773 TYPE_ATTR_DIR(cmd_type,
6774 ATTR_SIMPLE, XFER_WRITE);
6775 c->Request.Timeout = 0; /* Don't time out */
6776 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6777 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6778 c->Request.CDB[2] = 0x00; /* reserved */
6779 c->Request.CDB[3] = 0x00; /* reserved */
6780 /* Tag to abort goes in CDB[4]-CDB[11] */
6781 memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6782 c->Request.CDB[12] = 0x00; /* reserved */
6783 c->Request.CDB[13] = 0x00; /* reserved */
6784 c->Request.CDB[14] = 0x00; /* reserved */
6785 c->Request.CDB[15] = 0x00; /* reserved */
6786 break;
6787 default:
6788 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6789 cmd);
6790 BUG();
6791 }
6792 } else {
6793 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6794 BUG();
6795 }
6796
6797 switch (GET_DIR(c->Request.type_attr_dir)) {
6798 case XFER_READ:
6799 pci_dir = PCI_DMA_FROMDEVICE;
6800 break;
6801 case XFER_WRITE:
6802 pci_dir = PCI_DMA_TODEVICE;
6803 break;
6804 case XFER_NONE:
6805 pci_dir = PCI_DMA_NONE;
6806 break;
6807 default:
6808 pci_dir = PCI_DMA_BIDIRECTIONAL;
6809 }
6810 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6811 return -1;
6812 return 0;
6813 }
6814
6815 /*
6816 * Map (physical) PCI mem into (virtual) kernel space
6817 */
6818 static void __iomem *remap_pci_mem(ulong base, ulong size)
6819 {
6820 ulong page_base = ((ulong) base) & PAGE_MASK;
6821 ulong page_offs = ((ulong) base) - page_base;
6822 void __iomem *page_remapped = ioremap_nocache(page_base,
6823 page_offs + size);
6824
6825 return page_remapped ? (page_remapped + page_offs) : NULL;
6826 }
6827
6828 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6829 {
6830 return h->access.command_completed(h, q);
6831 }
6832
6833 static inline bool interrupt_pending(struct ctlr_info *h)
6834 {
6835 return h->access.intr_pending(h);
6836 }
6837
6838 static inline long interrupt_not_for_us(struct ctlr_info *h)
6839 {
6840 return (h->access.intr_pending(h) == 0) ||
6841 (h->interrupts_enabled == 0);
6842 }
6843
6844 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6845 u32 raw_tag)
6846 {
6847 if (unlikely(tag_index >= h->nr_cmds)) {
6848 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6849 return 1;
6850 }
6851 return 0;
6852 }
6853
6854 static inline void finish_cmd(struct CommandList *c)
6855 {
6856 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6857 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6858 || c->cmd_type == CMD_IOACCEL2))
6859 complete_scsi_command(c);
6860 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6861 complete(c->waiting);
6862 }
6863
6864 /* process completion of an indexed ("direct lookup") command */
6865 static inline void process_indexed_cmd(struct ctlr_info *h,
6866 u32 raw_tag)
6867 {
6868 u32 tag_index;
6869 struct CommandList *c;
6870
6871 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6872 if (!bad_tag(h, tag_index, raw_tag)) {
6873 c = h->cmd_pool + tag_index;
6874 finish_cmd(c);
6875 }
6876 }
6877
6878 /* Some controllers, like p400, will give us one interrupt
6879 * after a soft reset, even if we turned interrupts off.
6880 * Only need to check for this in the hpsa_xxx_discard_completions
6881 * functions.
6882 */
6883 static int ignore_bogus_interrupt(struct ctlr_info *h)
6884 {
6885 if (likely(!reset_devices))
6886 return 0;
6887
6888 if (likely(h->interrupts_enabled))
6889 return 0;
6890
6891 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6892 "(known firmware bug.) Ignoring.\n");
6893
6894 return 1;
6895 }
6896
6897 /*
6898 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6899 * Relies on (h-q[x] == x) being true for x such that
6900 * 0 <= x < MAX_REPLY_QUEUES.
6901 */
6902 static struct ctlr_info *queue_to_hba(u8 *queue)
6903 {
6904 return container_of((queue - *queue), struct ctlr_info, q[0]);
6905 }
6906
6907 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6908 {
6909 struct ctlr_info *h = queue_to_hba(queue);
6910 u8 q = *(u8 *) queue;
6911 u32 raw_tag;
6912
6913 if (ignore_bogus_interrupt(h))
6914 return IRQ_NONE;
6915
6916 if (interrupt_not_for_us(h))
6917 return IRQ_NONE;
6918 h->last_intr_timestamp = get_jiffies_64();
6919 while (interrupt_pending(h)) {
6920 raw_tag = get_next_completion(h, q);
6921 while (raw_tag != FIFO_EMPTY)
6922 raw_tag = next_command(h, q);
6923 }
6924 return IRQ_HANDLED;
6925 }
6926
6927 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6928 {
6929 struct ctlr_info *h = queue_to_hba(queue);
6930 u32 raw_tag;
6931 u8 q = *(u8 *) queue;
6932
6933 if (ignore_bogus_interrupt(h))
6934 return IRQ_NONE;
6935
6936 h->last_intr_timestamp = get_jiffies_64();
6937 raw_tag = get_next_completion(h, q);
6938 while (raw_tag != FIFO_EMPTY)
6939 raw_tag = next_command(h, q);
6940 return IRQ_HANDLED;
6941 }
6942
6943 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6944 {
6945 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6946 u32 raw_tag;
6947 u8 q = *(u8 *) queue;
6948
6949 if (interrupt_not_for_us(h))
6950 return IRQ_NONE;
6951 h->last_intr_timestamp = get_jiffies_64();
6952 while (interrupt_pending(h)) {
6953 raw_tag = get_next_completion(h, q);
6954 while (raw_tag != FIFO_EMPTY) {
6955 process_indexed_cmd(h, raw_tag);
6956 raw_tag = next_command(h, q);
6957 }
6958 }
6959 return IRQ_HANDLED;
6960 }
6961
6962 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6963 {
6964 struct ctlr_info *h = queue_to_hba(queue);
6965 u32 raw_tag;
6966 u8 q = *(u8 *) queue;
6967
6968 h->last_intr_timestamp = get_jiffies_64();
6969 raw_tag = get_next_completion(h, q);
6970 while (raw_tag != FIFO_EMPTY) {
6971 process_indexed_cmd(h, raw_tag);
6972 raw_tag = next_command(h, q);
6973 }
6974 return IRQ_HANDLED;
6975 }
6976
6977 /* Send a message CDB to the firmware. Careful, this only works
6978 * in simple mode, not performant mode due to the tag lookup.
6979 * We only ever use this immediately after a controller reset.
6980 */
6981 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6982 unsigned char type)
6983 {
6984 struct Command {
6985 struct CommandListHeader CommandHeader;
6986 struct RequestBlock Request;
6987 struct ErrDescriptor ErrorDescriptor;
6988 };
6989 struct Command *cmd;
6990 static const size_t cmd_sz = sizeof(*cmd) +
6991 sizeof(cmd->ErrorDescriptor);
6992 dma_addr_t paddr64;
6993 __le32 paddr32;
6994 u32 tag;
6995 void __iomem *vaddr;
6996 int i, err;
6997
6998 vaddr = pci_ioremap_bar(pdev, 0);
6999 if (vaddr == NULL)
7000 return -ENOMEM;
7001
7002 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
7003 * CCISS commands, so they must be allocated from the lower 4GiB of
7004 * memory.
7005 */
7006 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7007 if (err) {
7008 iounmap(vaddr);
7009 return err;
7010 }
7011
7012 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7013 if (cmd == NULL) {
7014 iounmap(vaddr);
7015 return -ENOMEM;
7016 }
7017
7018 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7019 * although there's no guarantee, we assume that the address is at
7020 * least 4-byte aligned (most likely, it's page-aligned).
7021 */
7022 paddr32 = cpu_to_le32(paddr64);
7023
7024 cmd->CommandHeader.ReplyQueue = 0;
7025 cmd->CommandHeader.SGList = 0;
7026 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7027 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7028 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7029
7030 cmd->Request.CDBLen = 16;
7031 cmd->Request.type_attr_dir =
7032 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7033 cmd->Request.Timeout = 0; /* Don't time out */
7034 cmd->Request.CDB[0] = opcode;
7035 cmd->Request.CDB[1] = type;
7036 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7037 cmd->ErrorDescriptor.Addr =
7038 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7039 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7040
7041 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7042
7043 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7044 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7045 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7046 break;
7047 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7048 }
7049
7050 iounmap(vaddr);
7051
7052 /* we leak the DMA buffer here ... no choice since the controller could
7053 * still complete the command.
7054 */
7055 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7056 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7057 opcode, type);
7058 return -ETIMEDOUT;
7059 }
7060
7061 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7062
7063 if (tag & HPSA_ERROR_BIT) {
7064 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7065 opcode, type);
7066 return -EIO;
7067 }
7068
7069 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7070 opcode, type);
7071 return 0;
7072 }
7073
7074 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7075
7076 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7077 void __iomem *vaddr, u32 use_doorbell)
7078 {
7079
7080 if (use_doorbell) {
7081 /* For everything after the P600, the PCI power state method
7082 * of resetting the controller doesn't work, so we have this
7083 * other way using the doorbell register.
7084 */
7085 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7086 writel(use_doorbell, vaddr + SA5_DOORBELL);
7087
7088 /* PMC hardware guys tell us we need a 10 second delay after
7089 * doorbell reset and before any attempt to talk to the board
7090 * at all to ensure that this actually works and doesn't fall
7091 * over in some weird corner cases.
7092 */
7093 msleep(10000);
7094 } else { /* Try to do it the PCI power state way */
7095
7096 /* Quoting from the Open CISS Specification: "The Power
7097 * Management Control/Status Register (CSR) controls the power
7098 * state of the device. The normal operating state is D0,
7099 * CSR=00h. The software off state is D3, CSR=03h. To reset
7100 * the controller, place the interface device in D3 then to D0,
7101 * this causes a secondary PCI reset which will reset the
7102 * controller." */
7103
7104 int rc = 0;
7105
7106 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7107
7108 /* enter the D3hot power management state */
7109 rc = pci_set_power_state(pdev, PCI_D3hot);
7110 if (rc)
7111 return rc;
7112
7113 msleep(500);
7114
7115 /* enter the D0 power management state */
7116 rc = pci_set_power_state(pdev, PCI_D0);
7117 if (rc)
7118 return rc;
7119
7120 /*
7121 * The P600 requires a small delay when changing states.
7122 * Otherwise we may think the board did not reset and we bail.
7123 * This for kdump only and is particular to the P600.
7124 */
7125 msleep(500);
7126 }
7127 return 0;
7128 }
7129
7130 static void init_driver_version(char *driver_version, int len)
7131 {
7132 memset(driver_version, 0, len);
7133 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7134 }
7135
7136 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7137 {
7138 char *driver_version;
7139 int i, size = sizeof(cfgtable->driver_version);
7140
7141 driver_version = kmalloc(size, GFP_KERNEL);
7142 if (!driver_version)
7143 return -ENOMEM;
7144
7145 init_driver_version(driver_version, size);
7146 for (i = 0; i < size; i++)
7147 writeb(driver_version[i], &cfgtable->driver_version[i]);
7148 kfree(driver_version);
7149 return 0;
7150 }
7151
7152 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7153 unsigned char *driver_ver)
7154 {
7155 int i;
7156
7157 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7158 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7159 }
7160
7161 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7162 {
7163
7164 char *driver_ver, *old_driver_ver;
7165 int rc, size = sizeof(cfgtable->driver_version);
7166
7167 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7168 if (!old_driver_ver)
7169 return -ENOMEM;
7170 driver_ver = old_driver_ver + size;
7171
7172 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7173 * should have been changed, otherwise we know the reset failed.
7174 */
7175 init_driver_version(old_driver_ver, size);
7176 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7177 rc = !memcmp(driver_ver, old_driver_ver, size);
7178 kfree(old_driver_ver);
7179 return rc;
7180 }
7181 /* This does a hard reset of the controller using PCI power management
7182 * states or the using the doorbell register.
7183 */
7184 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7185 {
7186 u64 cfg_offset;
7187 u32 cfg_base_addr;
7188 u64 cfg_base_addr_index;
7189 void __iomem *vaddr;
7190 unsigned long paddr;
7191 u32 misc_fw_support;
7192 int rc;
7193 struct CfgTable __iomem *cfgtable;
7194 u32 use_doorbell;
7195 u16 command_register;
7196
7197 /* For controllers as old as the P600, this is very nearly
7198 * the same thing as
7199 *
7200 * pci_save_state(pci_dev);
7201 * pci_set_power_state(pci_dev, PCI_D3hot);
7202 * pci_set_power_state(pci_dev, PCI_D0);
7203 * pci_restore_state(pci_dev);
7204 *
7205 * For controllers newer than the P600, the pci power state
7206 * method of resetting doesn't work so we have another way
7207 * using the doorbell register.
7208 */
7209
7210 if (!ctlr_is_resettable(board_id)) {
7211 dev_warn(&pdev->dev, "Controller not resettable\n");
7212 return -ENODEV;
7213 }
7214
7215 /* if controller is soft- but not hard resettable... */
7216 if (!ctlr_is_hard_resettable(board_id))
7217 return -ENOTSUPP; /* try soft reset later. */
7218
7219 /* Save the PCI command register */
7220 pci_read_config_word(pdev, 4, &command_register);
7221 pci_save_state(pdev);
7222
7223 /* find the first memory BAR, so we can find the cfg table */
7224 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7225 if (rc)
7226 return rc;
7227 vaddr = remap_pci_mem(paddr, 0x250);
7228 if (!vaddr)
7229 return -ENOMEM;
7230
7231 /* find cfgtable in order to check if reset via doorbell is supported */
7232 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7233 &cfg_base_addr_index, &cfg_offset);
7234 if (rc)
7235 goto unmap_vaddr;
7236 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7237 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7238 if (!cfgtable) {
7239 rc = -ENOMEM;
7240 goto unmap_vaddr;
7241 }
7242 rc = write_driver_ver_to_cfgtable(cfgtable);
7243 if (rc)
7244 goto unmap_cfgtable;
7245
7246 /* If reset via doorbell register is supported, use that.
7247 * There are two such methods. Favor the newest method.
7248 */
7249 misc_fw_support = readl(&cfgtable->misc_fw_support);
7250 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7251 if (use_doorbell) {
7252 use_doorbell = DOORBELL_CTLR_RESET2;
7253 } else {
7254 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7255 if (use_doorbell) {
7256 dev_warn(&pdev->dev,
7257 "Soft reset not supported. Firmware update is required.\n");
7258 rc = -ENOTSUPP; /* try soft reset */
7259 goto unmap_cfgtable;
7260 }
7261 }
7262
7263 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7264 if (rc)
7265 goto unmap_cfgtable;
7266
7267 pci_restore_state(pdev);
7268 pci_write_config_word(pdev, 4, command_register);
7269
7270 /* Some devices (notably the HP Smart Array 5i Controller)
7271 need a little pause here */
7272 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7273
7274 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7275 if (rc) {
7276 dev_warn(&pdev->dev,
7277 "Failed waiting for board to become ready after hard reset\n");
7278 goto unmap_cfgtable;
7279 }
7280
7281 rc = controller_reset_failed(vaddr);
7282 if (rc < 0)
7283 goto unmap_cfgtable;
7284 if (rc) {
7285 dev_warn(&pdev->dev, "Unable to successfully reset "
7286 "controller. Will try soft reset.\n");
7287 rc = -ENOTSUPP;
7288 } else {
7289 dev_info(&pdev->dev, "board ready after hard reset.\n");
7290 }
7291
7292 unmap_cfgtable:
7293 iounmap(cfgtable);
7294
7295 unmap_vaddr:
7296 iounmap(vaddr);
7297 return rc;
7298 }
7299
7300 /*
7301 * We cannot read the structure directly, for portability we must use
7302 * the io functions.
7303 * This is for debug only.
7304 */
7305 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7306 {
7307 #ifdef HPSA_DEBUG
7308 int i;
7309 char temp_name[17];
7310
7311 dev_info(dev, "Controller Configuration information\n");
7312 dev_info(dev, "------------------------------------\n");
7313 for (i = 0; i < 4; i++)
7314 temp_name[i] = readb(&(tb->Signature[i]));
7315 temp_name[4] = '\0';
7316 dev_info(dev, " Signature = %s\n", temp_name);
7317 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7318 dev_info(dev, " Transport methods supported = 0x%x\n",
7319 readl(&(tb->TransportSupport)));
7320 dev_info(dev, " Transport methods active = 0x%x\n",
7321 readl(&(tb->TransportActive)));
7322 dev_info(dev, " Requested transport Method = 0x%x\n",
7323 readl(&(tb->HostWrite.TransportRequest)));
7324 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7325 readl(&(tb->HostWrite.CoalIntDelay)));
7326 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7327 readl(&(tb->HostWrite.CoalIntCount)));
7328 dev_info(dev, " Max outstanding commands = %d\n",
7329 readl(&(tb->CmdsOutMax)));
7330 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7331 for (i = 0; i < 16; i++)
7332 temp_name[i] = readb(&(tb->ServerName[i]));
7333 temp_name[16] = '\0';
7334 dev_info(dev, " Server Name = %s\n", temp_name);
7335 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7336 readl(&(tb->HeartBeat)));
7337 #endif /* HPSA_DEBUG */
7338 }
7339
7340 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7341 {
7342 int i, offset, mem_type, bar_type;
7343
7344 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7345 return 0;
7346 offset = 0;
7347 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7348 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7349 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7350 offset += 4;
7351 else {
7352 mem_type = pci_resource_flags(pdev, i) &
7353 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7354 switch (mem_type) {
7355 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7356 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7357 offset += 4; /* 32 bit */
7358 break;
7359 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7360 offset += 8;
7361 break;
7362 default: /* reserved in PCI 2.2 */
7363 dev_warn(&pdev->dev,
7364 "base address is invalid\n");
7365 return -1;
7366 break;
7367 }
7368 }
7369 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7370 return i + 1;
7371 }
7372 return -1;
7373 }
7374
7375 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7376 {
7377 if (h->msix_vector) {
7378 if (h->pdev->msix_enabled)
7379 pci_disable_msix(h->pdev);
7380 h->msix_vector = 0;
7381 } else if (h->msi_vector) {
7382 if (h->pdev->msi_enabled)
7383 pci_disable_msi(h->pdev);
7384 h->msi_vector = 0;
7385 }
7386 }
7387
7388 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7389 * controllers that are capable. If not, we use legacy INTx mode.
7390 */
7391 static void hpsa_interrupt_mode(struct ctlr_info *h)
7392 {
7393 #ifdef CONFIG_PCI_MSI
7394 int err, i;
7395 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
7396
7397 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
7398 hpsa_msix_entries[i].vector = 0;
7399 hpsa_msix_entries[i].entry = i;
7400 }
7401
7402 /* Some boards advertise MSI but don't really support it */
7403 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
7404 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
7405 goto default_int_mode;
7406 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
7407 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
7408 h->msix_vector = MAX_REPLY_QUEUES;
7409 if (h->msix_vector > num_online_cpus())
7410 h->msix_vector = num_online_cpus();
7411 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
7412 1, h->msix_vector);
7413 if (err < 0) {
7414 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
7415 h->msix_vector = 0;
7416 goto single_msi_mode;
7417 } else if (err < h->msix_vector) {
7418 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
7419 "available\n", err);
7420 }
7421 h->msix_vector = err;
7422 for (i = 0; i < h->msix_vector; i++)
7423 h->intr[i] = hpsa_msix_entries[i].vector;
7424 return;
7425 }
7426 single_msi_mode:
7427 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
7428 dev_info(&h->pdev->dev, "MSI capable controller\n");
7429 if (!pci_enable_msi(h->pdev))
7430 h->msi_vector = 1;
7431 else
7432 dev_warn(&h->pdev->dev, "MSI init failed\n");
7433 }
7434 default_int_mode:
7435 #endif /* CONFIG_PCI_MSI */
7436 /* if we get here we're going to use the default interrupt mode */
7437 h->intr[h->intr_mode] = h->pdev->irq;
7438 }
7439
7440 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
7441 {
7442 int i;
7443 u32 subsystem_vendor_id, subsystem_device_id;
7444
7445 subsystem_vendor_id = pdev->subsystem_vendor;
7446 subsystem_device_id = pdev->subsystem_device;
7447 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7448 subsystem_vendor_id;
7449
7450 for (i = 0; i < ARRAY_SIZE(products); i++)
7451 if (*board_id == products[i].board_id)
7452 return i;
7453
7454 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
7455 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
7456 !hpsa_allow_any) {
7457 dev_warn(&pdev->dev, "unrecognized board ID: "
7458 "0x%08x, ignoring.\n", *board_id);
7459 return -ENODEV;
7460 }
7461 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7462 }
7463
7464 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7465 unsigned long *memory_bar)
7466 {
7467 int i;
7468
7469 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7470 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7471 /* addressing mode bits already removed */
7472 *memory_bar = pci_resource_start(pdev, i);
7473 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7474 *memory_bar);
7475 return 0;
7476 }
7477 dev_warn(&pdev->dev, "no memory BAR found\n");
7478 return -ENODEV;
7479 }
7480
7481 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7482 int wait_for_ready)
7483 {
7484 int i, iterations;
7485 u32 scratchpad;
7486 if (wait_for_ready)
7487 iterations = HPSA_BOARD_READY_ITERATIONS;
7488 else
7489 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7490
7491 for (i = 0; i < iterations; i++) {
7492 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7493 if (wait_for_ready) {
7494 if (scratchpad == HPSA_FIRMWARE_READY)
7495 return 0;
7496 } else {
7497 if (scratchpad != HPSA_FIRMWARE_READY)
7498 return 0;
7499 }
7500 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7501 }
7502 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7503 return -ENODEV;
7504 }
7505
7506 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7507 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7508 u64 *cfg_offset)
7509 {
7510 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7511 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7512 *cfg_base_addr &= (u32) 0x0000ffff;
7513 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7514 if (*cfg_base_addr_index == -1) {
7515 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7516 return -ENODEV;
7517 }
7518 return 0;
7519 }
7520
7521 static void hpsa_free_cfgtables(struct ctlr_info *h)
7522 {
7523 if (h->transtable) {
7524 iounmap(h->transtable);
7525 h->transtable = NULL;
7526 }
7527 if (h->cfgtable) {
7528 iounmap(h->cfgtable);
7529 h->cfgtable = NULL;
7530 }
7531 }
7532
7533 /* Find and map CISS config table and transfer table
7534 + * several items must be unmapped (freed) later
7535 + * */
7536 static int hpsa_find_cfgtables(struct ctlr_info *h)
7537 {
7538 u64 cfg_offset;
7539 u32 cfg_base_addr;
7540 u64 cfg_base_addr_index;
7541 u32 trans_offset;
7542 int rc;
7543
7544 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7545 &cfg_base_addr_index, &cfg_offset);
7546 if (rc)
7547 return rc;
7548 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7549 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7550 if (!h->cfgtable) {
7551 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7552 return -ENOMEM;
7553 }
7554 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7555 if (rc)
7556 return rc;
7557 /* Find performant mode table. */
7558 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7559 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7560 cfg_base_addr_index)+cfg_offset+trans_offset,
7561 sizeof(*h->transtable));
7562 if (!h->transtable) {
7563 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7564 hpsa_free_cfgtables(h);
7565 return -ENOMEM;
7566 }
7567 return 0;
7568 }
7569
7570 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7571 {
7572 #define MIN_MAX_COMMANDS 16
7573 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7574
7575 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7576
7577 /* Limit commands in memory limited kdump scenario. */
7578 if (reset_devices && h->max_commands > 32)
7579 h->max_commands = 32;
7580
7581 if (h->max_commands < MIN_MAX_COMMANDS) {
7582 dev_warn(&h->pdev->dev,
7583 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7584 h->max_commands,
7585 MIN_MAX_COMMANDS);
7586 h->max_commands = MIN_MAX_COMMANDS;
7587 }
7588 }
7589
7590 /* If the controller reports that the total max sg entries is greater than 512,
7591 * then we know that chained SG blocks work. (Original smart arrays did not
7592 * support chained SG blocks and would return zero for max sg entries.)
7593 */
7594 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7595 {
7596 return h->maxsgentries > 512;
7597 }
7598
7599 /* Interrogate the hardware for some limits:
7600 * max commands, max SG elements without chaining, and with chaining,
7601 * SG chain block size, etc.
7602 */
7603 static void hpsa_find_board_params(struct ctlr_info *h)
7604 {
7605 hpsa_get_max_perf_mode_cmds(h);
7606 h->nr_cmds = h->max_commands;
7607 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7608 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7609 if (hpsa_supports_chained_sg_blocks(h)) {
7610 /* Limit in-command s/g elements to 32 save dma'able memory. */
7611 h->max_cmd_sg_entries = 32;
7612 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7613 h->maxsgentries--; /* save one for chain pointer */
7614 } else {
7615 /*
7616 * Original smart arrays supported at most 31 s/g entries
7617 * embedded inline in the command (trying to use more
7618 * would lock up the controller)
7619 */
7620 h->max_cmd_sg_entries = 31;
7621 h->maxsgentries = 31; /* default to traditional values */
7622 h->chainsize = 0;
7623 }
7624
7625 /* Find out what task management functions are supported and cache */
7626 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7627 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7628 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7629 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7630 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7631 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7632 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7633 }
7634
7635 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7636 {
7637 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7638 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7639 return false;
7640 }
7641 return true;
7642 }
7643
7644 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7645 {
7646 u32 driver_support;
7647
7648 driver_support = readl(&(h->cfgtable->driver_support));
7649 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7650 #ifdef CONFIG_X86
7651 driver_support |= ENABLE_SCSI_PREFETCH;
7652 #endif
7653 driver_support |= ENABLE_UNIT_ATTN;
7654 writel(driver_support, &(h->cfgtable->driver_support));
7655 }
7656
7657 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7658 * in a prefetch beyond physical memory.
7659 */
7660 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7661 {
7662 u32 dma_prefetch;
7663
7664 if (h->board_id != 0x3225103C)
7665 return;
7666 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7667 dma_prefetch |= 0x8000;
7668 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7669 }
7670
7671 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7672 {
7673 int i;
7674 u32 doorbell_value;
7675 unsigned long flags;
7676 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7677 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7678 spin_lock_irqsave(&h->lock, flags);
7679 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7680 spin_unlock_irqrestore(&h->lock, flags);
7681 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7682 goto done;
7683 /* delay and try again */
7684 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7685 }
7686 return -ENODEV;
7687 done:
7688 return 0;
7689 }
7690
7691 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7692 {
7693 int i;
7694 u32 doorbell_value;
7695 unsigned long flags;
7696
7697 /* under certain very rare conditions, this can take awhile.
7698 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7699 * as we enter this code.)
7700 */
7701 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7702 if (h->remove_in_progress)
7703 goto done;
7704 spin_lock_irqsave(&h->lock, flags);
7705 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7706 spin_unlock_irqrestore(&h->lock, flags);
7707 if (!(doorbell_value & CFGTBL_ChangeReq))
7708 goto done;
7709 /* delay and try again */
7710 msleep(MODE_CHANGE_WAIT_INTERVAL);
7711 }
7712 return -ENODEV;
7713 done:
7714 return 0;
7715 }
7716
7717 /* return -ENODEV or other reason on error, 0 on success */
7718 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7719 {
7720 u32 trans_support;
7721
7722 trans_support = readl(&(h->cfgtable->TransportSupport));
7723 if (!(trans_support & SIMPLE_MODE))
7724 return -ENOTSUPP;
7725
7726 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7727
7728 /* Update the field, and then ring the doorbell */
7729 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7730 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7731 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7732 if (hpsa_wait_for_mode_change_ack(h))
7733 goto error;
7734 print_cfg_table(&h->pdev->dev, h->cfgtable);
7735 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7736 goto error;
7737 h->transMethod = CFGTBL_Trans_Simple;
7738 return 0;
7739 error:
7740 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7741 return -ENODEV;
7742 }
7743
7744 /* free items allocated or mapped by hpsa_pci_init */
7745 static void hpsa_free_pci_init(struct ctlr_info *h)
7746 {
7747 hpsa_free_cfgtables(h); /* pci_init 4 */
7748 iounmap(h->vaddr); /* pci_init 3 */
7749 h->vaddr = NULL;
7750 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7751 /*
7752 * call pci_disable_device before pci_release_regions per
7753 * Documentation/PCI/pci.txt
7754 */
7755 pci_disable_device(h->pdev); /* pci_init 1 */
7756 pci_release_regions(h->pdev); /* pci_init 2 */
7757 }
7758
7759 /* several items must be freed later */
7760 static int hpsa_pci_init(struct ctlr_info *h)
7761 {
7762 int prod_index, err;
7763
7764 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7765 if (prod_index < 0)
7766 return prod_index;
7767 h->product_name = products[prod_index].product_name;
7768 h->access = *(products[prod_index].access);
7769
7770 h->needs_abort_tags_swizzled =
7771 ctlr_needs_abort_tags_swizzled(h->board_id);
7772
7773 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7774 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7775
7776 err = pci_enable_device(h->pdev);
7777 if (err) {
7778 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7779 pci_disable_device(h->pdev);
7780 return err;
7781 }
7782
7783 err = pci_request_regions(h->pdev, HPSA);
7784 if (err) {
7785 dev_err(&h->pdev->dev,
7786 "failed to obtain PCI resources\n");
7787 pci_disable_device(h->pdev);
7788 return err;
7789 }
7790
7791 pci_set_master(h->pdev);
7792
7793 hpsa_interrupt_mode(h);
7794 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7795 if (err)
7796 goto clean2; /* intmode+region, pci */
7797 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7798 if (!h->vaddr) {
7799 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7800 err = -ENOMEM;
7801 goto clean2; /* intmode+region, pci */
7802 }
7803 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7804 if (err)
7805 goto clean3; /* vaddr, intmode+region, pci */
7806 err = hpsa_find_cfgtables(h);
7807 if (err)
7808 goto clean3; /* vaddr, intmode+region, pci */
7809 hpsa_find_board_params(h);
7810
7811 if (!hpsa_CISS_signature_present(h)) {
7812 err = -ENODEV;
7813 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7814 }
7815 hpsa_set_driver_support_bits(h);
7816 hpsa_p600_dma_prefetch_quirk(h);
7817 err = hpsa_enter_simple_mode(h);
7818 if (err)
7819 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7820 return 0;
7821
7822 clean4: /* cfgtables, vaddr, intmode+region, pci */
7823 hpsa_free_cfgtables(h);
7824 clean3: /* vaddr, intmode+region, pci */
7825 iounmap(h->vaddr);
7826 h->vaddr = NULL;
7827 clean2: /* intmode+region, pci */
7828 hpsa_disable_interrupt_mode(h);
7829 /*
7830 * call pci_disable_device before pci_release_regions per
7831 * Documentation/PCI/pci.txt
7832 */
7833 pci_disable_device(h->pdev);
7834 pci_release_regions(h->pdev);
7835 return err;
7836 }
7837
7838 static void hpsa_hba_inquiry(struct ctlr_info *h)
7839 {
7840 int rc;
7841
7842 #define HBA_INQUIRY_BYTE_COUNT 64
7843 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7844 if (!h->hba_inquiry_data)
7845 return;
7846 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7847 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7848 if (rc != 0) {
7849 kfree(h->hba_inquiry_data);
7850 h->hba_inquiry_data = NULL;
7851 }
7852 }
7853
7854 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7855 {
7856 int rc, i;
7857 void __iomem *vaddr;
7858
7859 if (!reset_devices)
7860 return 0;
7861
7862 /* kdump kernel is loading, we don't know in which state is
7863 * the pci interface. The dev->enable_cnt is equal zero
7864 * so we call enable+disable, wait a while and switch it on.
7865 */
7866 rc = pci_enable_device(pdev);
7867 if (rc) {
7868 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7869 return -ENODEV;
7870 }
7871 pci_disable_device(pdev);
7872 msleep(260); /* a randomly chosen number */
7873 rc = pci_enable_device(pdev);
7874 if (rc) {
7875 dev_warn(&pdev->dev, "failed to enable device.\n");
7876 return -ENODEV;
7877 }
7878
7879 pci_set_master(pdev);
7880
7881 vaddr = pci_ioremap_bar(pdev, 0);
7882 if (vaddr == NULL) {
7883 rc = -ENOMEM;
7884 goto out_disable;
7885 }
7886 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7887 iounmap(vaddr);
7888
7889 /* Reset the controller with a PCI power-cycle or via doorbell */
7890 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7891
7892 /* -ENOTSUPP here means we cannot reset the controller
7893 * but it's already (and still) up and running in
7894 * "performant mode". Or, it might be 640x, which can't reset
7895 * due to concerns about shared bbwc between 6402/6404 pair.
7896 */
7897 if (rc)
7898 goto out_disable;
7899
7900 /* Now try to get the controller to respond to a no-op */
7901 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7902 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7903 if (hpsa_noop(pdev) == 0)
7904 break;
7905 else
7906 dev_warn(&pdev->dev, "no-op failed%s\n",
7907 (i < 11 ? "; re-trying" : ""));
7908 }
7909
7910 out_disable:
7911
7912 pci_disable_device(pdev);
7913 return rc;
7914 }
7915
7916 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7917 {
7918 kfree(h->cmd_pool_bits);
7919 h->cmd_pool_bits = NULL;
7920 if (h->cmd_pool) {
7921 pci_free_consistent(h->pdev,
7922 h->nr_cmds * sizeof(struct CommandList),
7923 h->cmd_pool,
7924 h->cmd_pool_dhandle);
7925 h->cmd_pool = NULL;
7926 h->cmd_pool_dhandle = 0;
7927 }
7928 if (h->errinfo_pool) {
7929 pci_free_consistent(h->pdev,
7930 h->nr_cmds * sizeof(struct ErrorInfo),
7931 h->errinfo_pool,
7932 h->errinfo_pool_dhandle);
7933 h->errinfo_pool = NULL;
7934 h->errinfo_pool_dhandle = 0;
7935 }
7936 }
7937
7938 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7939 {
7940 h->cmd_pool_bits = kzalloc(
7941 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7942 sizeof(unsigned long), GFP_KERNEL);
7943 h->cmd_pool = pci_alloc_consistent(h->pdev,
7944 h->nr_cmds * sizeof(*h->cmd_pool),
7945 &(h->cmd_pool_dhandle));
7946 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7947 h->nr_cmds * sizeof(*h->errinfo_pool),
7948 &(h->errinfo_pool_dhandle));
7949 if ((h->cmd_pool_bits == NULL)
7950 || (h->cmd_pool == NULL)
7951 || (h->errinfo_pool == NULL)) {
7952 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7953 goto clean_up;
7954 }
7955 hpsa_preinitialize_commands(h);
7956 return 0;
7957 clean_up:
7958 hpsa_free_cmd_pool(h);
7959 return -ENOMEM;
7960 }
7961
7962 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7963 {
7964 int i, cpu;
7965
7966 cpu = cpumask_first(cpu_online_mask);
7967 for (i = 0; i < h->msix_vector; i++) {
7968 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7969 cpu = cpumask_next(cpu, cpu_online_mask);
7970 }
7971 }
7972
7973 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7974 static void hpsa_free_irqs(struct ctlr_info *h)
7975 {
7976 int i;
7977
7978 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7979 /* Single reply queue, only one irq to free */
7980 i = h->intr_mode;
7981 irq_set_affinity_hint(h->intr[i], NULL);
7982 free_irq(h->intr[i], &h->q[i]);
7983 h->q[i] = 0;
7984 return;
7985 }
7986
7987 for (i = 0; i < h->msix_vector; i++) {
7988 irq_set_affinity_hint(h->intr[i], NULL);
7989 free_irq(h->intr[i], &h->q[i]);
7990 h->q[i] = 0;
7991 }
7992 for (; i < MAX_REPLY_QUEUES; i++)
7993 h->q[i] = 0;
7994 }
7995
7996 /* returns 0 on success; cleans up and returns -Enn on error */
7997 static int hpsa_request_irqs(struct ctlr_info *h,
7998 irqreturn_t (*msixhandler)(int, void *),
7999 irqreturn_t (*intxhandler)(int, void *))
8000 {
8001 int rc, i;
8002
8003 /*
8004 * initialize h->q[x] = x so that interrupt handlers know which
8005 * queue to process.
8006 */
8007 for (i = 0; i < MAX_REPLY_QUEUES; i++)
8008 h->q[i] = (u8) i;
8009
8010 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
8011 /* If performant mode and MSI-X, use multiple reply queues */
8012 for (i = 0; i < h->msix_vector; i++) {
8013 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8014 rc = request_irq(h->intr[i], msixhandler,
8015 0, h->intrname[i],
8016 &h->q[i]);
8017 if (rc) {
8018 int j;
8019
8020 dev_err(&h->pdev->dev,
8021 "failed to get irq %d for %s\n",
8022 h->intr[i], h->devname);
8023 for (j = 0; j < i; j++) {
8024 free_irq(h->intr[j], &h->q[j]);
8025 h->q[j] = 0;
8026 }
8027 for (; j < MAX_REPLY_QUEUES; j++)
8028 h->q[j] = 0;
8029 return rc;
8030 }
8031 }
8032 hpsa_irq_affinity_hints(h);
8033 } else {
8034 /* Use single reply pool */
8035 if (h->msix_vector > 0 || h->msi_vector) {
8036 if (h->msix_vector)
8037 sprintf(h->intrname[h->intr_mode],
8038 "%s-msix", h->devname);
8039 else
8040 sprintf(h->intrname[h->intr_mode],
8041 "%s-msi", h->devname);
8042 rc = request_irq(h->intr[h->intr_mode],
8043 msixhandler, 0,
8044 h->intrname[h->intr_mode],
8045 &h->q[h->intr_mode]);
8046 } else {
8047 sprintf(h->intrname[h->intr_mode],
8048 "%s-intx", h->devname);
8049 rc = request_irq(h->intr[h->intr_mode],
8050 intxhandler, IRQF_SHARED,
8051 h->intrname[h->intr_mode],
8052 &h->q[h->intr_mode]);
8053 }
8054 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
8055 }
8056 if (rc) {
8057 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8058 h->intr[h->intr_mode], h->devname);
8059 hpsa_free_irqs(h);
8060 return -ENODEV;
8061 }
8062 return 0;
8063 }
8064
8065 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8066 {
8067 int rc;
8068 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8069
8070 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8071 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8072 if (rc) {
8073 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8074 return rc;
8075 }
8076
8077 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8078 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8079 if (rc) {
8080 dev_warn(&h->pdev->dev, "Board failed to become ready "
8081 "after soft reset.\n");
8082 return rc;
8083 }
8084
8085 return 0;
8086 }
8087
8088 static void hpsa_free_reply_queues(struct ctlr_info *h)
8089 {
8090 int i;
8091
8092 for (i = 0; i < h->nreply_queues; i++) {
8093 if (!h->reply_queue[i].head)
8094 continue;
8095 pci_free_consistent(h->pdev,
8096 h->reply_queue_size,
8097 h->reply_queue[i].head,
8098 h->reply_queue[i].busaddr);
8099 h->reply_queue[i].head = NULL;
8100 h->reply_queue[i].busaddr = 0;
8101 }
8102 h->reply_queue_size = 0;
8103 }
8104
8105 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8106 {
8107 hpsa_free_performant_mode(h); /* init_one 7 */
8108 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8109 hpsa_free_cmd_pool(h); /* init_one 5 */
8110 hpsa_free_irqs(h); /* init_one 4 */
8111 scsi_host_put(h->scsi_host); /* init_one 3 */
8112 h->scsi_host = NULL; /* init_one 3 */
8113 hpsa_free_pci_init(h); /* init_one 2_5 */
8114 free_percpu(h->lockup_detected); /* init_one 2 */
8115 h->lockup_detected = NULL; /* init_one 2 */
8116 if (h->resubmit_wq) {
8117 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8118 h->resubmit_wq = NULL;
8119 }
8120 if (h->rescan_ctlr_wq) {
8121 destroy_workqueue(h->rescan_ctlr_wq);
8122 h->rescan_ctlr_wq = NULL;
8123 }
8124 kfree(h); /* init_one 1 */
8125 }
8126
8127 /* Called when controller lockup detected. */
8128 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8129 {
8130 int i, refcount;
8131 struct CommandList *c;
8132 int failcount = 0;
8133
8134 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8135 for (i = 0; i < h->nr_cmds; i++) {
8136 c = h->cmd_pool + i;
8137 refcount = atomic_inc_return(&c->refcount);
8138 if (refcount > 1) {
8139 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8140 finish_cmd(c);
8141 atomic_dec(&h->commands_outstanding);
8142 failcount++;
8143 }
8144 cmd_free(h, c);
8145 }
8146 dev_warn(&h->pdev->dev,
8147 "failed %d commands in fail_all\n", failcount);
8148 }
8149
8150 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8151 {
8152 int cpu;
8153
8154 for_each_online_cpu(cpu) {
8155 u32 *lockup_detected;
8156 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8157 *lockup_detected = value;
8158 }
8159 wmb(); /* be sure the per-cpu variables are out to memory */
8160 }
8161
8162 static void controller_lockup_detected(struct ctlr_info *h)
8163 {
8164 unsigned long flags;
8165 u32 lockup_detected;
8166
8167 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8168 spin_lock_irqsave(&h->lock, flags);
8169 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8170 if (!lockup_detected) {
8171 /* no heartbeat, but controller gave us a zero. */
8172 dev_warn(&h->pdev->dev,
8173 "lockup detected after %d but scratchpad register is zero\n",
8174 h->heartbeat_sample_interval / HZ);
8175 lockup_detected = 0xffffffff;
8176 }
8177 set_lockup_detected_for_all_cpus(h, lockup_detected);
8178 spin_unlock_irqrestore(&h->lock, flags);
8179 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8180 lockup_detected, h->heartbeat_sample_interval / HZ);
8181 pci_disable_device(h->pdev);
8182 fail_all_outstanding_cmds(h);
8183 }
8184
8185 static int detect_controller_lockup(struct ctlr_info *h)
8186 {
8187 u64 now;
8188 u32 heartbeat;
8189 unsigned long flags;
8190
8191 now = get_jiffies_64();
8192 /* If we've received an interrupt recently, we're ok. */
8193 if (time_after64(h->last_intr_timestamp +
8194 (h->heartbeat_sample_interval), now))
8195 return false;
8196
8197 /*
8198 * If we've already checked the heartbeat recently, we're ok.
8199 * This could happen if someone sends us a signal. We
8200 * otherwise don't care about signals in this thread.
8201 */
8202 if (time_after64(h->last_heartbeat_timestamp +
8203 (h->heartbeat_sample_interval), now))
8204 return false;
8205
8206 /* If heartbeat has not changed since we last looked, we're not ok. */
8207 spin_lock_irqsave(&h->lock, flags);
8208 heartbeat = readl(&h->cfgtable->HeartBeat);
8209 spin_unlock_irqrestore(&h->lock, flags);
8210 if (h->last_heartbeat == heartbeat) {
8211 controller_lockup_detected(h);
8212 return true;
8213 }
8214
8215 /* We're ok. */
8216 h->last_heartbeat = heartbeat;
8217 h->last_heartbeat_timestamp = now;
8218 return false;
8219 }
8220
8221 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8222 {
8223 int i;
8224 char *event_type;
8225
8226 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8227 return;
8228
8229 /* Ask the controller to clear the events we're handling. */
8230 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8231 | CFGTBL_Trans_io_accel2)) &&
8232 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8233 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8234
8235 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8236 event_type = "state change";
8237 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8238 event_type = "configuration change";
8239 /* Stop sending new RAID offload reqs via the IO accelerator */
8240 scsi_block_requests(h->scsi_host);
8241 for (i = 0; i < h->ndevices; i++)
8242 h->dev[i]->offload_enabled = 0;
8243 hpsa_drain_accel_commands(h);
8244 /* Set 'accelerator path config change' bit */
8245 dev_warn(&h->pdev->dev,
8246 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8247 h->events, event_type);
8248 writel(h->events, &(h->cfgtable->clear_event_notify));
8249 /* Set the "clear event notify field update" bit 6 */
8250 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8251 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8252 hpsa_wait_for_clear_event_notify_ack(h);
8253 scsi_unblock_requests(h->scsi_host);
8254 } else {
8255 /* Acknowledge controller notification events. */
8256 writel(h->events, &(h->cfgtable->clear_event_notify));
8257 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8258 hpsa_wait_for_clear_event_notify_ack(h);
8259 #if 0
8260 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8261 hpsa_wait_for_mode_change_ack(h);
8262 #endif
8263 }
8264 return;
8265 }
8266
8267 /* Check a register on the controller to see if there are configuration
8268 * changes (added/changed/removed logical drives, etc.) which mean that
8269 * we should rescan the controller for devices.
8270 * Also check flag for driver-initiated rescan.
8271 */
8272 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8273 {
8274 if (h->drv_req_rescan) {
8275 h->drv_req_rescan = 0;
8276 return 1;
8277 }
8278
8279 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8280 return 0;
8281
8282 h->events = readl(&(h->cfgtable->event_notify));
8283 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8284 }
8285
8286 /*
8287 * Check if any of the offline devices have become ready
8288 */
8289 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8290 {
8291 unsigned long flags;
8292 struct offline_device_entry *d;
8293 struct list_head *this, *tmp;
8294
8295 spin_lock_irqsave(&h->offline_device_lock, flags);
8296 list_for_each_safe(this, tmp, &h->offline_device_list) {
8297 d = list_entry(this, struct offline_device_entry,
8298 offline_list);
8299 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8300 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8301 spin_lock_irqsave(&h->offline_device_lock, flags);
8302 list_del(&d->offline_list);
8303 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8304 return 1;
8305 }
8306 spin_lock_irqsave(&h->offline_device_lock, flags);
8307 }
8308 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8309 return 0;
8310 }
8311
8312 static int hpsa_luns_changed(struct ctlr_info *h)
8313 {
8314 int rc = 1; /* assume there are changes */
8315 struct ReportLUNdata *logdev = NULL;
8316
8317 /* if we can't find out if lun data has changed,
8318 * assume that it has.
8319 */
8320
8321 if (!h->lastlogicals)
8322 goto out;
8323
8324 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8325 if (!logdev) {
8326 dev_warn(&h->pdev->dev,
8327 "Out of memory, can't track lun changes.\n");
8328 goto out;
8329 }
8330 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8331 dev_warn(&h->pdev->dev,
8332 "report luns failed, can't track lun changes.\n");
8333 goto out;
8334 }
8335 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8336 dev_info(&h->pdev->dev,
8337 "Lun changes detected.\n");
8338 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8339 goto out;
8340 } else
8341 rc = 0; /* no changes detected. */
8342 out:
8343 kfree(logdev);
8344 return rc;
8345 }
8346
8347 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8348 {
8349 unsigned long flags;
8350 struct ctlr_info *h = container_of(to_delayed_work(work),
8351 struct ctlr_info, rescan_ctlr_work);
8352
8353
8354 if (h->remove_in_progress)
8355 return;
8356
8357 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
8358 scsi_host_get(h->scsi_host);
8359 hpsa_ack_ctlr_events(h);
8360 hpsa_scan_start(h->scsi_host);
8361 scsi_host_put(h->scsi_host);
8362 } else if (h->discovery_polling) {
8363 hpsa_disable_rld_caching(h);
8364 if (hpsa_luns_changed(h)) {
8365 struct Scsi_Host *sh = NULL;
8366
8367 dev_info(&h->pdev->dev,
8368 "driver discovery polling rescan.\n");
8369 sh = scsi_host_get(h->scsi_host);
8370 if (sh != NULL) {
8371 hpsa_scan_start(sh);
8372 scsi_host_put(sh);
8373 }
8374 }
8375 }
8376 spin_lock_irqsave(&h->lock, flags);
8377 if (!h->remove_in_progress)
8378 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8379 h->heartbeat_sample_interval);
8380 spin_unlock_irqrestore(&h->lock, flags);
8381 }
8382
8383 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8384 {
8385 unsigned long flags;
8386 struct ctlr_info *h = container_of(to_delayed_work(work),
8387 struct ctlr_info, monitor_ctlr_work);
8388
8389 detect_controller_lockup(h);
8390 if (lockup_detected(h))
8391 return;
8392
8393 spin_lock_irqsave(&h->lock, flags);
8394 if (!h->remove_in_progress)
8395 schedule_delayed_work(&h->monitor_ctlr_work,
8396 h->heartbeat_sample_interval);
8397 spin_unlock_irqrestore(&h->lock, flags);
8398 }
8399
8400 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8401 char *name)
8402 {
8403 struct workqueue_struct *wq = NULL;
8404
8405 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8406 if (!wq)
8407 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8408
8409 return wq;
8410 }
8411
8412 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8413 {
8414 int dac, rc;
8415 struct ctlr_info *h;
8416 int try_soft_reset = 0;
8417 unsigned long flags;
8418 u32 board_id;
8419
8420 if (number_of_controllers == 0)
8421 printk(KERN_INFO DRIVER_NAME "\n");
8422
8423 rc = hpsa_lookup_board_id(pdev, &board_id);
8424 if (rc < 0) {
8425 dev_warn(&pdev->dev, "Board ID not found\n");
8426 return rc;
8427 }
8428
8429 rc = hpsa_init_reset_devices(pdev, board_id);
8430 if (rc) {
8431 if (rc != -ENOTSUPP)
8432 return rc;
8433 /* If the reset fails in a particular way (it has no way to do
8434 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8435 * a soft reset once we get the controller configured up to the
8436 * point that it can accept a command.
8437 */
8438 try_soft_reset = 1;
8439 rc = 0;
8440 }
8441
8442 reinit_after_soft_reset:
8443
8444 /* Command structures must be aligned on a 32-byte boundary because
8445 * the 5 lower bits of the address are used by the hardware. and by
8446 * the driver. See comments in hpsa.h for more info.
8447 */
8448 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8449 h = kzalloc(sizeof(*h), GFP_KERNEL);
8450 if (!h) {
8451 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8452 return -ENOMEM;
8453 }
8454
8455 h->pdev = pdev;
8456
8457 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8458 INIT_LIST_HEAD(&h->offline_device_list);
8459 spin_lock_init(&h->lock);
8460 spin_lock_init(&h->offline_device_lock);
8461 spin_lock_init(&h->scan_lock);
8462 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8463 atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
8464
8465 /* Allocate and clear per-cpu variable lockup_detected */
8466 h->lockup_detected = alloc_percpu(u32);
8467 if (!h->lockup_detected) {
8468 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8469 rc = -ENOMEM;
8470 goto clean1; /* aer/h */
8471 }
8472 set_lockup_detected_for_all_cpus(h, 0);
8473
8474 rc = hpsa_pci_init(h);
8475 if (rc)
8476 goto clean2; /* lu, aer/h */
8477
8478 /* relies on h-> settings made by hpsa_pci_init, including
8479 * interrupt_mode h->intr */
8480 rc = hpsa_scsi_host_alloc(h);
8481 if (rc)
8482 goto clean2_5; /* pci, lu, aer/h */
8483
8484 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8485 h->ctlr = number_of_controllers;
8486 number_of_controllers++;
8487
8488 /* configure PCI DMA stuff */
8489 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8490 if (rc == 0) {
8491 dac = 1;
8492 } else {
8493 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8494 if (rc == 0) {
8495 dac = 0;
8496 } else {
8497 dev_err(&pdev->dev, "no suitable DMA available\n");
8498 goto clean3; /* shost, pci, lu, aer/h */
8499 }
8500 }
8501
8502 /* make sure the board interrupts are off */
8503 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8504
8505 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8506 if (rc)
8507 goto clean3; /* shost, pci, lu, aer/h */
8508 rc = hpsa_alloc_cmd_pool(h);
8509 if (rc)
8510 goto clean4; /* irq, shost, pci, lu, aer/h */
8511 rc = hpsa_alloc_sg_chain_blocks(h);
8512 if (rc)
8513 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8514 init_waitqueue_head(&h->scan_wait_queue);
8515 init_waitqueue_head(&h->abort_cmd_wait_queue);
8516 init_waitqueue_head(&h->event_sync_wait_queue);
8517 mutex_init(&h->reset_mutex);
8518 h->scan_finished = 1; /* no scan currently in progress */
8519 h->scan_waiting = 0;
8520
8521 pci_set_drvdata(pdev, h);
8522 h->ndevices = 0;
8523
8524 spin_lock_init(&h->devlock);
8525 rc = hpsa_put_ctlr_into_performant_mode(h);
8526 if (rc)
8527 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8528
8529 /* hook into SCSI subsystem */
8530 rc = hpsa_scsi_add_host(h);
8531 if (rc)
8532 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8533
8534 /* create the resubmit workqueue */
8535 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8536 if (!h->rescan_ctlr_wq) {
8537 rc = -ENOMEM;
8538 goto clean7;
8539 }
8540
8541 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8542 if (!h->resubmit_wq) {
8543 rc = -ENOMEM;
8544 goto clean7; /* aer/h */
8545 }
8546
8547 /*
8548 * At this point, the controller is ready to take commands.
8549 * Now, if reset_devices and the hard reset didn't work, try
8550 * the soft reset and see if that works.
8551 */
8552 if (try_soft_reset) {
8553
8554 /* This is kind of gross. We may or may not get a completion
8555 * from the soft reset command, and if we do, then the value
8556 * from the fifo may or may not be valid. So, we wait 10 secs
8557 * after the reset throwing away any completions we get during
8558 * that time. Unregister the interrupt handler and register
8559 * fake ones to scoop up any residual completions.
8560 */
8561 spin_lock_irqsave(&h->lock, flags);
8562 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8563 spin_unlock_irqrestore(&h->lock, flags);
8564 hpsa_free_irqs(h);
8565 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8566 hpsa_intx_discard_completions);
8567 if (rc) {
8568 dev_warn(&h->pdev->dev,
8569 "Failed to request_irq after soft reset.\n");
8570 /*
8571 * cannot goto clean7 or free_irqs will be called
8572 * again. Instead, do its work
8573 */
8574 hpsa_free_performant_mode(h); /* clean7 */
8575 hpsa_free_sg_chain_blocks(h); /* clean6 */
8576 hpsa_free_cmd_pool(h); /* clean5 */
8577 /*
8578 * skip hpsa_free_irqs(h) clean4 since that
8579 * was just called before request_irqs failed
8580 */
8581 goto clean3;
8582 }
8583
8584 rc = hpsa_kdump_soft_reset(h);
8585 if (rc)
8586 /* Neither hard nor soft reset worked, we're hosed. */
8587 goto clean7;
8588
8589 dev_info(&h->pdev->dev, "Board READY.\n");
8590 dev_info(&h->pdev->dev,
8591 "Waiting for stale completions to drain.\n");
8592 h->access.set_intr_mask(h, HPSA_INTR_ON);
8593 msleep(10000);
8594 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8595
8596 rc = controller_reset_failed(h->cfgtable);
8597 if (rc)
8598 dev_info(&h->pdev->dev,
8599 "Soft reset appears to have failed.\n");
8600
8601 /* since the controller's reset, we have to go back and re-init
8602 * everything. Easiest to just forget what we've done and do it
8603 * all over again.
8604 */
8605 hpsa_undo_allocations_after_kdump_soft_reset(h);
8606 try_soft_reset = 0;
8607 if (rc)
8608 /* don't goto clean, we already unallocated */
8609 return -ENODEV;
8610
8611 goto reinit_after_soft_reset;
8612 }
8613
8614 /* Enable Accelerated IO path at driver layer */
8615 h->acciopath_status = 1;
8616 /* Disable discovery polling.*/
8617 h->discovery_polling = 0;
8618
8619
8620 /* Turn the interrupts on so we can service requests */
8621 h->access.set_intr_mask(h, HPSA_INTR_ON);
8622
8623 hpsa_hba_inquiry(h);
8624
8625 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8626 if (!h->lastlogicals)
8627 dev_info(&h->pdev->dev,
8628 "Can't track change to report lun data\n");
8629
8630 /* Monitor the controller for firmware lockups */
8631 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8632 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8633 schedule_delayed_work(&h->monitor_ctlr_work,
8634 h->heartbeat_sample_interval);
8635 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8636 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8637 h->heartbeat_sample_interval);
8638 return 0;
8639
8640 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8641 hpsa_free_performant_mode(h);
8642 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8643 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8644 hpsa_free_sg_chain_blocks(h);
8645 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8646 hpsa_free_cmd_pool(h);
8647 clean4: /* irq, shost, pci, lu, aer/h */
8648 hpsa_free_irqs(h);
8649 clean3: /* shost, pci, lu, aer/h */
8650 scsi_host_put(h->scsi_host);
8651 h->scsi_host = NULL;
8652 clean2_5: /* pci, lu, aer/h */
8653 hpsa_free_pci_init(h);
8654 clean2: /* lu, aer/h */
8655 if (h->lockup_detected) {
8656 free_percpu(h->lockup_detected);
8657 h->lockup_detected = NULL;
8658 }
8659 clean1: /* wq/aer/h */
8660 if (h->resubmit_wq) {
8661 destroy_workqueue(h->resubmit_wq);
8662 h->resubmit_wq = NULL;
8663 }
8664 if (h->rescan_ctlr_wq) {
8665 destroy_workqueue(h->rescan_ctlr_wq);
8666 h->rescan_ctlr_wq = NULL;
8667 }
8668 kfree(h);
8669 return rc;
8670 }
8671
8672 static void hpsa_flush_cache(struct ctlr_info *h)
8673 {
8674 char *flush_buf;
8675 struct CommandList *c;
8676 int rc;
8677
8678 if (unlikely(lockup_detected(h)))
8679 return;
8680 flush_buf = kzalloc(4, GFP_KERNEL);
8681 if (!flush_buf)
8682 return;
8683
8684 c = cmd_alloc(h);
8685
8686 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8687 RAID_CTLR_LUNID, TYPE_CMD)) {
8688 goto out;
8689 }
8690 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8691 PCI_DMA_TODEVICE, NO_TIMEOUT);
8692 if (rc)
8693 goto out;
8694 if (c->err_info->CommandStatus != 0)
8695 out:
8696 dev_warn(&h->pdev->dev,
8697 "error flushing cache on controller\n");
8698 cmd_free(h, c);
8699 kfree(flush_buf);
8700 }
8701
8702 /* Make controller gather fresh report lun data each time we
8703 * send down a report luns request
8704 */
8705 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8706 {
8707 u32 *options;
8708 struct CommandList *c;
8709 int rc;
8710
8711 /* Don't bother trying to set diag options if locked up */
8712 if (unlikely(h->lockup_detected))
8713 return;
8714
8715 options = kzalloc(sizeof(*options), GFP_KERNEL);
8716 if (!options) {
8717 dev_err(&h->pdev->dev,
8718 "Error: failed to disable rld caching, during alloc.\n");
8719 return;
8720 }
8721
8722 c = cmd_alloc(h);
8723
8724 /* first, get the current diag options settings */
8725 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8726 RAID_CTLR_LUNID, TYPE_CMD))
8727 goto errout;
8728
8729 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8730 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8731 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8732 goto errout;
8733
8734 /* Now, set the bit for disabling the RLD caching */
8735 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8736
8737 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8738 RAID_CTLR_LUNID, TYPE_CMD))
8739 goto errout;
8740
8741 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8742 PCI_DMA_TODEVICE, NO_TIMEOUT);
8743 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8744 goto errout;
8745
8746 /* Now verify that it got set: */
8747 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8748 RAID_CTLR_LUNID, TYPE_CMD))
8749 goto errout;
8750
8751 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8752 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8753 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8754 goto errout;
8755
8756 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8757 goto out;
8758
8759 errout:
8760 dev_err(&h->pdev->dev,
8761 "Error: failed to disable report lun data caching.\n");
8762 out:
8763 cmd_free(h, c);
8764 kfree(options);
8765 }
8766
8767 static void hpsa_shutdown(struct pci_dev *pdev)
8768 {
8769 struct ctlr_info *h;
8770
8771 h = pci_get_drvdata(pdev);
8772 /* Turn board interrupts off and send the flush cache command
8773 * sendcmd will turn off interrupt, and send the flush...
8774 * To write all data in the battery backed cache to disks
8775 */
8776 hpsa_flush_cache(h);
8777 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8778 hpsa_free_irqs(h); /* init_one 4 */
8779 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8780 }
8781
8782 static void hpsa_free_device_info(struct ctlr_info *h)
8783 {
8784 int i;
8785
8786 for (i = 0; i < h->ndevices; i++) {
8787 kfree(h->dev[i]);
8788 h->dev[i] = NULL;
8789 }
8790 }
8791
8792 static void hpsa_remove_one(struct pci_dev *pdev)
8793 {
8794 struct ctlr_info *h;
8795 unsigned long flags;
8796
8797 if (pci_get_drvdata(pdev) == NULL) {
8798 dev_err(&pdev->dev, "unable to remove device\n");
8799 return;
8800 }
8801 h = pci_get_drvdata(pdev);
8802
8803 /* Get rid of any controller monitoring work items */
8804 spin_lock_irqsave(&h->lock, flags);
8805 h->remove_in_progress = 1;
8806 spin_unlock_irqrestore(&h->lock, flags);
8807 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8808 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8809 destroy_workqueue(h->rescan_ctlr_wq);
8810 destroy_workqueue(h->resubmit_wq);
8811
8812 hpsa_delete_sas_host(h);
8813
8814 /*
8815 * Call before disabling interrupts.
8816 * scsi_remove_host can trigger I/O operations especially
8817 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8818 * operations which cannot complete and will hang the system.
8819 */
8820 if (h->scsi_host)
8821 scsi_remove_host(h->scsi_host); /* init_one 8 */
8822 /* includes hpsa_free_irqs - init_one 4 */
8823 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8824 hpsa_shutdown(pdev);
8825
8826 hpsa_free_device_info(h); /* scan */
8827
8828 kfree(h->hba_inquiry_data); /* init_one 10 */
8829 h->hba_inquiry_data = NULL; /* init_one 10 */
8830 hpsa_free_ioaccel2_sg_chain_blocks(h);
8831 hpsa_free_performant_mode(h); /* init_one 7 */
8832 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8833 hpsa_free_cmd_pool(h); /* init_one 5 */
8834 kfree(h->lastlogicals);
8835
8836 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8837
8838 scsi_host_put(h->scsi_host); /* init_one 3 */
8839 h->scsi_host = NULL; /* init_one 3 */
8840
8841 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8842 hpsa_free_pci_init(h); /* init_one 2.5 */
8843
8844 free_percpu(h->lockup_detected); /* init_one 2 */
8845 h->lockup_detected = NULL; /* init_one 2 */
8846 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8847
8848 kfree(h); /* init_one 1 */
8849 }
8850
8851 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8852 __attribute__((unused)) pm_message_t state)
8853 {
8854 return -ENOSYS;
8855 }
8856
8857 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8858 {
8859 return -ENOSYS;
8860 }
8861
8862 static struct pci_driver hpsa_pci_driver = {
8863 .name = HPSA,
8864 .probe = hpsa_init_one,
8865 .remove = hpsa_remove_one,
8866 .id_table = hpsa_pci_device_id, /* id_table */
8867 .shutdown = hpsa_shutdown,
8868 .suspend = hpsa_suspend,
8869 .resume = hpsa_resume,
8870 };
8871
8872 /* Fill in bucket_map[], given nsgs (the max number of
8873 * scatter gather elements supported) and bucket[],
8874 * which is an array of 8 integers. The bucket[] array
8875 * contains 8 different DMA transfer sizes (in 16
8876 * byte increments) which the controller uses to fetch
8877 * commands. This function fills in bucket_map[], which
8878 * maps a given number of scatter gather elements to one of
8879 * the 8 DMA transfer sizes. The point of it is to allow the
8880 * controller to only do as much DMA as needed to fetch the
8881 * command, with the DMA transfer size encoded in the lower
8882 * bits of the command address.
8883 */
8884 static void calc_bucket_map(int bucket[], int num_buckets,
8885 int nsgs, int min_blocks, u32 *bucket_map)
8886 {
8887 int i, j, b, size;
8888
8889 /* Note, bucket_map must have nsgs+1 entries. */
8890 for (i = 0; i <= nsgs; i++) {
8891 /* Compute size of a command with i SG entries */
8892 size = i + min_blocks;
8893 b = num_buckets; /* Assume the biggest bucket */
8894 /* Find the bucket that is just big enough */
8895 for (j = 0; j < num_buckets; j++) {
8896 if (bucket[j] >= size) {
8897 b = j;
8898 break;
8899 }
8900 }
8901 /* for a command with i SG entries, use bucket b. */
8902 bucket_map[i] = b;
8903 }
8904 }
8905
8906 /*
8907 * return -ENODEV on err, 0 on success (or no action)
8908 * allocates numerous items that must be freed later
8909 */
8910 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8911 {
8912 int i;
8913 unsigned long register_value;
8914 unsigned long transMethod = CFGTBL_Trans_Performant |
8915 (trans_support & CFGTBL_Trans_use_short_tags) |
8916 CFGTBL_Trans_enable_directed_msix |
8917 (trans_support & (CFGTBL_Trans_io_accel1 |
8918 CFGTBL_Trans_io_accel2));
8919 struct access_method access = SA5_performant_access;
8920
8921 /* This is a bit complicated. There are 8 registers on
8922 * the controller which we write to to tell it 8 different
8923 * sizes of commands which there may be. It's a way of
8924 * reducing the DMA done to fetch each command. Encoded into
8925 * each command's tag are 3 bits which communicate to the controller
8926 * which of the eight sizes that command fits within. The size of
8927 * each command depends on how many scatter gather entries there are.
8928 * Each SG entry requires 16 bytes. The eight registers are programmed
8929 * with the number of 16-byte blocks a command of that size requires.
8930 * The smallest command possible requires 5 such 16 byte blocks.
8931 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8932 * blocks. Note, this only extends to the SG entries contained
8933 * within the command block, and does not extend to chained blocks
8934 * of SG elements. bft[] contains the eight values we write to
8935 * the registers. They are not evenly distributed, but have more
8936 * sizes for small commands, and fewer sizes for larger commands.
8937 */
8938 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8939 #define MIN_IOACCEL2_BFT_ENTRY 5
8940 #define HPSA_IOACCEL2_HEADER_SZ 4
8941 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8942 13, 14, 15, 16, 17, 18, 19,
8943 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8944 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8945 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8946 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8947 16 * MIN_IOACCEL2_BFT_ENTRY);
8948 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8949 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8950 /* 5 = 1 s/g entry or 4k
8951 * 6 = 2 s/g entry or 8k
8952 * 8 = 4 s/g entry or 16k
8953 * 10 = 6 s/g entry or 24k
8954 */
8955
8956 /* If the controller supports either ioaccel method then
8957 * we can also use the RAID stack submit path that does not
8958 * perform the superfluous readl() after each command submission.
8959 */
8960 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8961 access = SA5_performant_access_no_read;
8962
8963 /* Controller spec: zero out this buffer. */
8964 for (i = 0; i < h->nreply_queues; i++)
8965 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8966
8967 bft[7] = SG_ENTRIES_IN_CMD + 4;
8968 calc_bucket_map(bft, ARRAY_SIZE(bft),
8969 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8970 for (i = 0; i < 8; i++)
8971 writel(bft[i], &h->transtable->BlockFetch[i]);
8972
8973 /* size of controller ring buffer */
8974 writel(h->max_commands, &h->transtable->RepQSize);
8975 writel(h->nreply_queues, &h->transtable->RepQCount);
8976 writel(0, &h->transtable->RepQCtrAddrLow32);
8977 writel(0, &h->transtable->RepQCtrAddrHigh32);
8978
8979 for (i = 0; i < h->nreply_queues; i++) {
8980 writel(0, &h->transtable->RepQAddr[i].upper);
8981 writel(h->reply_queue[i].busaddr,
8982 &h->transtable->RepQAddr[i].lower);
8983 }
8984
8985 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8986 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8987 /*
8988 * enable outbound interrupt coalescing in accelerator mode;
8989 */
8990 if (trans_support & CFGTBL_Trans_io_accel1) {
8991 access = SA5_ioaccel_mode1_access;
8992 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8993 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8994 } else {
8995 if (trans_support & CFGTBL_Trans_io_accel2) {
8996 access = SA5_ioaccel_mode2_access;
8997 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8998 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8999 }
9000 }
9001 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9002 if (hpsa_wait_for_mode_change_ack(h)) {
9003 dev_err(&h->pdev->dev,
9004 "performant mode problem - doorbell timeout\n");
9005 return -ENODEV;
9006 }
9007 register_value = readl(&(h->cfgtable->TransportActive));
9008 if (!(register_value & CFGTBL_Trans_Performant)) {
9009 dev_err(&h->pdev->dev,
9010 "performant mode problem - transport not active\n");
9011 return -ENODEV;
9012 }
9013 /* Change the access methods to the performant access methods */
9014 h->access = access;
9015 h->transMethod = transMethod;
9016
9017 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9018 (trans_support & CFGTBL_Trans_io_accel2)))
9019 return 0;
9020
9021 if (trans_support & CFGTBL_Trans_io_accel1) {
9022 /* Set up I/O accelerator mode */
9023 for (i = 0; i < h->nreply_queues; i++) {
9024 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9025 h->reply_queue[i].current_entry =
9026 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9027 }
9028 bft[7] = h->ioaccel_maxsg + 8;
9029 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9030 h->ioaccel1_blockFetchTable);
9031
9032 /* initialize all reply queue entries to unused */
9033 for (i = 0; i < h->nreply_queues; i++)
9034 memset(h->reply_queue[i].head,
9035 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9036 h->reply_queue_size);
9037
9038 /* set all the constant fields in the accelerator command
9039 * frames once at init time to save CPU cycles later.
9040 */
9041 for (i = 0; i < h->nr_cmds; i++) {
9042 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9043
9044 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9045 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9046 (i * sizeof(struct ErrorInfo)));
9047 cp->err_info_len = sizeof(struct ErrorInfo);
9048 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9049 cp->host_context_flags =
9050 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9051 cp->timeout_sec = 0;
9052 cp->ReplyQueue = 0;
9053 cp->tag =
9054 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9055 cp->host_addr =
9056 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9057 (i * sizeof(struct io_accel1_cmd)));
9058 }
9059 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9060 u64 cfg_offset, cfg_base_addr_index;
9061 u32 bft2_offset, cfg_base_addr;
9062 int rc;
9063
9064 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9065 &cfg_base_addr_index, &cfg_offset);
9066 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9067 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9068 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9069 4, h->ioaccel2_blockFetchTable);
9070 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9071 BUILD_BUG_ON(offsetof(struct CfgTable,
9072 io_accel_request_size_offset) != 0xb8);
9073 h->ioaccel2_bft2_regs =
9074 remap_pci_mem(pci_resource_start(h->pdev,
9075 cfg_base_addr_index) +
9076 cfg_offset + bft2_offset,
9077 ARRAY_SIZE(bft2) *
9078 sizeof(*h->ioaccel2_bft2_regs));
9079 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9080 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9081 }
9082 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9083 if (hpsa_wait_for_mode_change_ack(h)) {
9084 dev_err(&h->pdev->dev,
9085 "performant mode problem - enabling ioaccel mode\n");
9086 return -ENODEV;
9087 }
9088 return 0;
9089 }
9090
9091 /* Free ioaccel1 mode command blocks and block fetch table */
9092 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9093 {
9094 if (h->ioaccel_cmd_pool) {
9095 pci_free_consistent(h->pdev,
9096 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9097 h->ioaccel_cmd_pool,
9098 h->ioaccel_cmd_pool_dhandle);
9099 h->ioaccel_cmd_pool = NULL;
9100 h->ioaccel_cmd_pool_dhandle = 0;
9101 }
9102 kfree(h->ioaccel1_blockFetchTable);
9103 h->ioaccel1_blockFetchTable = NULL;
9104 }
9105
9106 /* Allocate ioaccel1 mode command blocks and block fetch table */
9107 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9108 {
9109 h->ioaccel_maxsg =
9110 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9111 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9112 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9113
9114 /* Command structures must be aligned on a 128-byte boundary
9115 * because the 7 lower bits of the address are used by the
9116 * hardware.
9117 */
9118 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9119 IOACCEL1_COMMANDLIST_ALIGNMENT);
9120 h->ioaccel_cmd_pool =
9121 pci_alloc_consistent(h->pdev,
9122 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9123 &(h->ioaccel_cmd_pool_dhandle));
9124
9125 h->ioaccel1_blockFetchTable =
9126 kmalloc(((h->ioaccel_maxsg + 1) *
9127 sizeof(u32)), GFP_KERNEL);
9128
9129 if ((h->ioaccel_cmd_pool == NULL) ||
9130 (h->ioaccel1_blockFetchTable == NULL))
9131 goto clean_up;
9132
9133 memset(h->ioaccel_cmd_pool, 0,
9134 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9135 return 0;
9136
9137 clean_up:
9138 hpsa_free_ioaccel1_cmd_and_bft(h);
9139 return -ENOMEM;
9140 }
9141
9142 /* Free ioaccel2 mode command blocks and block fetch table */
9143 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9144 {
9145 hpsa_free_ioaccel2_sg_chain_blocks(h);
9146
9147 if (h->ioaccel2_cmd_pool) {
9148 pci_free_consistent(h->pdev,
9149 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9150 h->ioaccel2_cmd_pool,
9151 h->ioaccel2_cmd_pool_dhandle);
9152 h->ioaccel2_cmd_pool = NULL;
9153 h->ioaccel2_cmd_pool_dhandle = 0;
9154 }
9155 kfree(h->ioaccel2_blockFetchTable);
9156 h->ioaccel2_blockFetchTable = NULL;
9157 }
9158
9159 /* Allocate ioaccel2 mode command blocks and block fetch table */
9160 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9161 {
9162 int rc;
9163
9164 /* Allocate ioaccel2 mode command blocks and block fetch table */
9165
9166 h->ioaccel_maxsg =
9167 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9168 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9169 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9170
9171 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9172 IOACCEL2_COMMANDLIST_ALIGNMENT);
9173 h->ioaccel2_cmd_pool =
9174 pci_alloc_consistent(h->pdev,
9175 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9176 &(h->ioaccel2_cmd_pool_dhandle));
9177
9178 h->ioaccel2_blockFetchTable =
9179 kmalloc(((h->ioaccel_maxsg + 1) *
9180 sizeof(u32)), GFP_KERNEL);
9181
9182 if ((h->ioaccel2_cmd_pool == NULL) ||
9183 (h->ioaccel2_blockFetchTable == NULL)) {
9184 rc = -ENOMEM;
9185 goto clean_up;
9186 }
9187
9188 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9189 if (rc)
9190 goto clean_up;
9191
9192 memset(h->ioaccel2_cmd_pool, 0,
9193 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9194 return 0;
9195
9196 clean_up:
9197 hpsa_free_ioaccel2_cmd_and_bft(h);
9198 return rc;
9199 }
9200
9201 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9202 static void hpsa_free_performant_mode(struct ctlr_info *h)
9203 {
9204 kfree(h->blockFetchTable);
9205 h->blockFetchTable = NULL;
9206 hpsa_free_reply_queues(h);
9207 hpsa_free_ioaccel1_cmd_and_bft(h);
9208 hpsa_free_ioaccel2_cmd_and_bft(h);
9209 }
9210
9211 /* return -ENODEV on error, 0 on success (or no action)
9212 * allocates numerous items that must be freed later
9213 */
9214 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9215 {
9216 u32 trans_support;
9217 unsigned long transMethod = CFGTBL_Trans_Performant |
9218 CFGTBL_Trans_use_short_tags;
9219 int i, rc;
9220
9221 if (hpsa_simple_mode)
9222 return 0;
9223
9224 trans_support = readl(&(h->cfgtable->TransportSupport));
9225 if (!(trans_support & PERFORMANT_MODE))
9226 return 0;
9227
9228 /* Check for I/O accelerator mode support */
9229 if (trans_support & CFGTBL_Trans_io_accel1) {
9230 transMethod |= CFGTBL_Trans_io_accel1 |
9231 CFGTBL_Trans_enable_directed_msix;
9232 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9233 if (rc)
9234 return rc;
9235 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9236 transMethod |= CFGTBL_Trans_io_accel2 |
9237 CFGTBL_Trans_enable_directed_msix;
9238 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9239 if (rc)
9240 return rc;
9241 }
9242
9243 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
9244 hpsa_get_max_perf_mode_cmds(h);
9245 /* Performant mode ring buffer and supporting data structures */
9246 h->reply_queue_size = h->max_commands * sizeof(u64);
9247
9248 for (i = 0; i < h->nreply_queues; i++) {
9249 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9250 h->reply_queue_size,
9251 &(h->reply_queue[i].busaddr));
9252 if (!h->reply_queue[i].head) {
9253 rc = -ENOMEM;
9254 goto clean1; /* rq, ioaccel */
9255 }
9256 h->reply_queue[i].size = h->max_commands;
9257 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9258 h->reply_queue[i].current_entry = 0;
9259 }
9260
9261 /* Need a block fetch table for performant mode */
9262 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9263 sizeof(u32)), GFP_KERNEL);
9264 if (!h->blockFetchTable) {
9265 rc = -ENOMEM;
9266 goto clean1; /* rq, ioaccel */
9267 }
9268
9269 rc = hpsa_enter_performant_mode(h, trans_support);
9270 if (rc)
9271 goto clean2; /* bft, rq, ioaccel */
9272 return 0;
9273
9274 clean2: /* bft, rq, ioaccel */
9275 kfree(h->blockFetchTable);
9276 h->blockFetchTable = NULL;
9277 clean1: /* rq, ioaccel */
9278 hpsa_free_reply_queues(h);
9279 hpsa_free_ioaccel1_cmd_and_bft(h);
9280 hpsa_free_ioaccel2_cmd_and_bft(h);
9281 return rc;
9282 }
9283
9284 static int is_accelerated_cmd(struct CommandList *c)
9285 {
9286 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9287 }
9288
9289 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9290 {
9291 struct CommandList *c = NULL;
9292 int i, accel_cmds_out;
9293 int refcount;
9294
9295 do { /* wait for all outstanding ioaccel commands to drain out */
9296 accel_cmds_out = 0;
9297 for (i = 0; i < h->nr_cmds; i++) {
9298 c = h->cmd_pool + i;
9299 refcount = atomic_inc_return(&c->refcount);
9300 if (refcount > 1) /* Command is allocated */
9301 accel_cmds_out += is_accelerated_cmd(c);
9302 cmd_free(h, c);
9303 }
9304 if (accel_cmds_out <= 0)
9305 break;
9306 msleep(100);
9307 } while (1);
9308 }
9309
9310 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9311 struct hpsa_sas_port *hpsa_sas_port)
9312 {
9313 struct hpsa_sas_phy *hpsa_sas_phy;
9314 struct sas_phy *phy;
9315
9316 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9317 if (!hpsa_sas_phy)
9318 return NULL;
9319
9320 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9321 hpsa_sas_port->next_phy_index);
9322 if (!phy) {
9323 kfree(hpsa_sas_phy);
9324 return NULL;
9325 }
9326
9327 hpsa_sas_port->next_phy_index++;
9328 hpsa_sas_phy->phy = phy;
9329 hpsa_sas_phy->parent_port = hpsa_sas_port;
9330
9331 return hpsa_sas_phy;
9332 }
9333
9334 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9335 {
9336 struct sas_phy *phy = hpsa_sas_phy->phy;
9337
9338 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9339 if (hpsa_sas_phy->added_to_port)
9340 list_del(&hpsa_sas_phy->phy_list_entry);
9341 sas_phy_delete(phy);
9342 kfree(hpsa_sas_phy);
9343 }
9344
9345 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9346 {
9347 int rc;
9348 struct hpsa_sas_port *hpsa_sas_port;
9349 struct sas_phy *phy;
9350 struct sas_identify *identify;
9351
9352 hpsa_sas_port = hpsa_sas_phy->parent_port;
9353 phy = hpsa_sas_phy->phy;
9354
9355 identify = &phy->identify;
9356 memset(identify, 0, sizeof(*identify));
9357 identify->sas_address = hpsa_sas_port->sas_address;
9358 identify->device_type = SAS_END_DEVICE;
9359 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9360 identify->target_port_protocols = SAS_PROTOCOL_STP;
9361 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9362 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9363 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9364 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9365 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9366
9367 rc = sas_phy_add(hpsa_sas_phy->phy);
9368 if (rc)
9369 return rc;
9370
9371 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9372 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9373 &hpsa_sas_port->phy_list_head);
9374 hpsa_sas_phy->added_to_port = true;
9375
9376 return 0;
9377 }
9378
9379 static int
9380 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9381 struct sas_rphy *rphy)
9382 {
9383 struct sas_identify *identify;
9384
9385 identify = &rphy->identify;
9386 identify->sas_address = hpsa_sas_port->sas_address;
9387 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9388 identify->target_port_protocols = SAS_PROTOCOL_STP;
9389
9390 return sas_rphy_add(rphy);
9391 }
9392
9393 static struct hpsa_sas_port
9394 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9395 u64 sas_address)
9396 {
9397 int rc;
9398 struct hpsa_sas_port *hpsa_sas_port;
9399 struct sas_port *port;
9400
9401 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9402 if (!hpsa_sas_port)
9403 return NULL;
9404
9405 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9406 hpsa_sas_port->parent_node = hpsa_sas_node;
9407
9408 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9409 if (!port)
9410 goto free_hpsa_port;
9411
9412 rc = sas_port_add(port);
9413 if (rc)
9414 goto free_sas_port;
9415
9416 hpsa_sas_port->port = port;
9417 hpsa_sas_port->sas_address = sas_address;
9418 list_add_tail(&hpsa_sas_port->port_list_entry,
9419 &hpsa_sas_node->port_list_head);
9420
9421 return hpsa_sas_port;
9422
9423 free_sas_port:
9424 sas_port_free(port);
9425 free_hpsa_port:
9426 kfree(hpsa_sas_port);
9427
9428 return NULL;
9429 }
9430
9431 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9432 {
9433 struct hpsa_sas_phy *hpsa_sas_phy;
9434 struct hpsa_sas_phy *next;
9435
9436 list_for_each_entry_safe(hpsa_sas_phy, next,
9437 &hpsa_sas_port->phy_list_head, phy_list_entry)
9438 hpsa_free_sas_phy(hpsa_sas_phy);
9439
9440 sas_port_delete(hpsa_sas_port->port);
9441 list_del(&hpsa_sas_port->port_list_entry);
9442 kfree(hpsa_sas_port);
9443 }
9444
9445 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9446 {
9447 struct hpsa_sas_node *hpsa_sas_node;
9448
9449 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9450 if (hpsa_sas_node) {
9451 hpsa_sas_node->parent_dev = parent_dev;
9452 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9453 }
9454
9455 return hpsa_sas_node;
9456 }
9457
9458 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9459 {
9460 struct hpsa_sas_port *hpsa_sas_port;
9461 struct hpsa_sas_port *next;
9462
9463 if (!hpsa_sas_node)
9464 return;
9465
9466 list_for_each_entry_safe(hpsa_sas_port, next,
9467 &hpsa_sas_node->port_list_head, port_list_entry)
9468 hpsa_free_sas_port(hpsa_sas_port);
9469
9470 kfree(hpsa_sas_node);
9471 }
9472
9473 static struct hpsa_scsi_dev_t
9474 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9475 struct sas_rphy *rphy)
9476 {
9477 int i;
9478 struct hpsa_scsi_dev_t *device;
9479
9480 for (i = 0; i < h->ndevices; i++) {
9481 device = h->dev[i];
9482 if (!device->sas_port)
9483 continue;
9484 if (device->sas_port->rphy == rphy)
9485 return device;
9486 }
9487
9488 return NULL;
9489 }
9490
9491 static int hpsa_add_sas_host(struct ctlr_info *h)
9492 {
9493 int rc;
9494 struct device *parent_dev;
9495 struct hpsa_sas_node *hpsa_sas_node;
9496 struct hpsa_sas_port *hpsa_sas_port;
9497 struct hpsa_sas_phy *hpsa_sas_phy;
9498
9499 parent_dev = &h->scsi_host->shost_gendev;
9500
9501 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9502 if (!hpsa_sas_node)
9503 return -ENOMEM;
9504
9505 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9506 if (!hpsa_sas_port) {
9507 rc = -ENODEV;
9508 goto free_sas_node;
9509 }
9510
9511 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9512 if (!hpsa_sas_phy) {
9513 rc = -ENODEV;
9514 goto free_sas_port;
9515 }
9516
9517 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9518 if (rc)
9519 goto free_sas_phy;
9520
9521 h->sas_host = hpsa_sas_node;
9522
9523 return 0;
9524
9525 free_sas_phy:
9526 hpsa_free_sas_phy(hpsa_sas_phy);
9527 free_sas_port:
9528 hpsa_free_sas_port(hpsa_sas_port);
9529 free_sas_node:
9530 hpsa_free_sas_node(hpsa_sas_node);
9531
9532 return rc;
9533 }
9534
9535 static void hpsa_delete_sas_host(struct ctlr_info *h)
9536 {
9537 hpsa_free_sas_node(h->sas_host);
9538 }
9539
9540 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9541 struct hpsa_scsi_dev_t *device)
9542 {
9543 int rc;
9544 struct hpsa_sas_port *hpsa_sas_port;
9545 struct sas_rphy *rphy;
9546
9547 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9548 if (!hpsa_sas_port)
9549 return -ENOMEM;
9550
9551 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9552 if (!rphy) {
9553 rc = -ENODEV;
9554 goto free_sas_port;
9555 }
9556
9557 hpsa_sas_port->rphy = rphy;
9558 device->sas_port = hpsa_sas_port;
9559
9560 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9561 if (rc)
9562 goto free_sas_port;
9563
9564 return 0;
9565
9566 free_sas_port:
9567 hpsa_free_sas_port(hpsa_sas_port);
9568 device->sas_port = NULL;
9569
9570 return rc;
9571 }
9572
9573 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9574 {
9575 if (device->sas_port) {
9576 hpsa_free_sas_port(device->sas_port);
9577 device->sas_port = NULL;
9578 }
9579 }
9580
9581 static int
9582 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9583 {
9584 return 0;
9585 }
9586
9587 static int
9588 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9589 {
9590 return 0;
9591 }
9592
9593 static int
9594 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9595 {
9596 return -ENXIO;
9597 }
9598
9599 static int
9600 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9601 {
9602 return 0;
9603 }
9604
9605 static int
9606 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9607 {
9608 return 0;
9609 }
9610
9611 static int
9612 hpsa_sas_phy_setup(struct sas_phy *phy)
9613 {
9614 return 0;
9615 }
9616
9617 static void
9618 hpsa_sas_phy_release(struct sas_phy *phy)
9619 {
9620 }
9621
9622 static int
9623 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9624 {
9625 return -EINVAL;
9626 }
9627
9628 /* SMP = Serial Management Protocol */
9629 static int
9630 hpsa_sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
9631 struct request *req)
9632 {
9633 return -EINVAL;
9634 }
9635
9636 static struct sas_function_template hpsa_sas_transport_functions = {
9637 .get_linkerrors = hpsa_sas_get_linkerrors,
9638 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9639 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9640 .phy_reset = hpsa_sas_phy_reset,
9641 .phy_enable = hpsa_sas_phy_enable,
9642 .phy_setup = hpsa_sas_phy_setup,
9643 .phy_release = hpsa_sas_phy_release,
9644 .set_phy_speed = hpsa_sas_phy_speed,
9645 .smp_handler = hpsa_sas_smp_handler,
9646 };
9647
9648 /*
9649 * This is it. Register the PCI driver information for the cards we control
9650 * the OS will call our registered routines when it finds one of our cards.
9651 */
9652 static int __init hpsa_init(void)
9653 {
9654 int rc;
9655
9656 hpsa_sas_transport_template =
9657 sas_attach_transport(&hpsa_sas_transport_functions);
9658 if (!hpsa_sas_transport_template)
9659 return -ENODEV;
9660
9661 rc = pci_register_driver(&hpsa_pci_driver);
9662
9663 if (rc)
9664 sas_release_transport(hpsa_sas_transport_template);
9665
9666 return rc;
9667 }
9668
9669 static void __exit hpsa_cleanup(void)
9670 {
9671 pci_unregister_driver(&hpsa_pci_driver);
9672 sas_release_transport(hpsa_sas_transport_template);
9673 }
9674
9675 static void __attribute__((unused)) verify_offsets(void)
9676 {
9677 #define VERIFY_OFFSET(member, offset) \
9678 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9679
9680 VERIFY_OFFSET(structure_size, 0);
9681 VERIFY_OFFSET(volume_blk_size, 4);
9682 VERIFY_OFFSET(volume_blk_cnt, 8);
9683 VERIFY_OFFSET(phys_blk_shift, 16);
9684 VERIFY_OFFSET(parity_rotation_shift, 17);
9685 VERIFY_OFFSET(strip_size, 18);
9686 VERIFY_OFFSET(disk_starting_blk, 20);
9687 VERIFY_OFFSET(disk_blk_cnt, 28);
9688 VERIFY_OFFSET(data_disks_per_row, 36);
9689 VERIFY_OFFSET(metadata_disks_per_row, 38);
9690 VERIFY_OFFSET(row_cnt, 40);
9691 VERIFY_OFFSET(layout_map_count, 42);
9692 VERIFY_OFFSET(flags, 44);
9693 VERIFY_OFFSET(dekindex, 46);
9694 /* VERIFY_OFFSET(reserved, 48 */
9695 VERIFY_OFFSET(data, 64);
9696
9697 #undef VERIFY_OFFSET
9698
9699 #define VERIFY_OFFSET(member, offset) \
9700 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9701
9702 VERIFY_OFFSET(IU_type, 0);
9703 VERIFY_OFFSET(direction, 1);
9704 VERIFY_OFFSET(reply_queue, 2);
9705 /* VERIFY_OFFSET(reserved1, 3); */
9706 VERIFY_OFFSET(scsi_nexus, 4);
9707 VERIFY_OFFSET(Tag, 8);
9708 VERIFY_OFFSET(cdb, 16);
9709 VERIFY_OFFSET(cciss_lun, 32);
9710 VERIFY_OFFSET(data_len, 40);
9711 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9712 VERIFY_OFFSET(sg_count, 45);
9713 /* VERIFY_OFFSET(reserved3 */
9714 VERIFY_OFFSET(err_ptr, 48);
9715 VERIFY_OFFSET(err_len, 56);
9716 /* VERIFY_OFFSET(reserved4 */
9717 VERIFY_OFFSET(sg, 64);
9718
9719 #undef VERIFY_OFFSET
9720
9721 #define VERIFY_OFFSET(member, offset) \
9722 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9723
9724 VERIFY_OFFSET(dev_handle, 0x00);
9725 VERIFY_OFFSET(reserved1, 0x02);
9726 VERIFY_OFFSET(function, 0x03);
9727 VERIFY_OFFSET(reserved2, 0x04);
9728 VERIFY_OFFSET(err_info, 0x0C);
9729 VERIFY_OFFSET(reserved3, 0x10);
9730 VERIFY_OFFSET(err_info_len, 0x12);
9731 VERIFY_OFFSET(reserved4, 0x13);
9732 VERIFY_OFFSET(sgl_offset, 0x14);
9733 VERIFY_OFFSET(reserved5, 0x15);
9734 VERIFY_OFFSET(transfer_len, 0x1C);
9735 VERIFY_OFFSET(reserved6, 0x20);
9736 VERIFY_OFFSET(io_flags, 0x24);
9737 VERIFY_OFFSET(reserved7, 0x26);
9738 VERIFY_OFFSET(LUN, 0x34);
9739 VERIFY_OFFSET(control, 0x3C);
9740 VERIFY_OFFSET(CDB, 0x40);
9741 VERIFY_OFFSET(reserved8, 0x50);
9742 VERIFY_OFFSET(host_context_flags, 0x60);
9743 VERIFY_OFFSET(timeout_sec, 0x62);
9744 VERIFY_OFFSET(ReplyQueue, 0x64);
9745 VERIFY_OFFSET(reserved9, 0x65);
9746 VERIFY_OFFSET(tag, 0x68);
9747 VERIFY_OFFSET(host_addr, 0x70);
9748 VERIFY_OFFSET(CISS_LUN, 0x78);
9749 VERIFY_OFFSET(SG, 0x78 + 8);
9750 #undef VERIFY_OFFSET
9751 }
9752
9753 module_init(hpsa_init);
9754 module_exit(hpsa_cleanup);
Linux with added FPC-III support