arch/mips/boot/dts/brcm/bcm6328.dtsi

   1 / {
   2         #address-cells = <1>;
   3         #size-cells = <1>;
   4         compatible = "brcm,bcm6328";
   5
   6         cpus {
   7                 #address-cells = <1>;
   8                 #size-cells = <0>;
   9
  10                 mips-hpt-frequency = <160000000>;
  11
  12                 cpu@0 {
  13                         compatible = "brcm,bmips4350";
  14                         device_type = "cpu";
  15                         reg = <0>;
  16                 };
  17
  18                 cpu@1 {
  19                         compatible = "brcm,bmips4350";
  20                         device_type = "cpu";
  21                         reg = <1>;
  22                 };
  23         };
  24
  25         clocks {
  26                 periph_clk: periph_clk {
  27                         compatible = "fixed-clock";
  28                         #clock-cells = <0>;
  29                         clock-frequency = <50000000>;
  30                 };
  31         };
  32
  33         aliases {
  34                 leds0 = &leds0;
  35                 uart0 = &uart0;
  36         };
  37
  38         cpu_intc: cpu_intc {
  39                 #address-cells = <0>;
  40                 compatible = "mti,cpu-interrupt-controller";
  41
  42                 interrupt-controller;
  43                 #interrupt-cells = <1>;
  44         };
  45
  46         ubus {
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49
  50                 compatible = "simple-bus";
  51                 ranges;
  52
  53                 periph_intc: periph_intc@10000020 {
  54                         compatible = "brcm,bcm3380-l2-intc";
  55                         reg = <0x10000024 0x4 0x1000002c 0x4>,
  56                               <0x10000020 0x4 0x10000028 0x4>;
  57
  58                         interrupt-controller;
  59                         #interrupt-cells = <1>;
  60
  61                         interrupt-parent = <&cpu_intc>;
  62                         interrupts = <2>;
  63                 };
  64
  65                 uart0: serial@10000100 {
  66                         compatible = "brcm,bcm6345-uart";
  67                         reg = <0x10000100 0x18>;
  68                         interrupt-parent = <&periph_intc>;
  69                         interrupts = <28>;
  70                         clocks = <&periph_clk>;
  71                         status = "disabled";
  72                 };
  73
  74                 timer: timer@10000040 {
  75                         compatible = "syscon";
  76                         reg = <0x10000040 0x2c>;
  77                         native-endian;
  78                 };
  79
  80                 reboot {
  81                         compatible = "syscon-reboot";
  82                         regmap = <&timer>;
  83                         offset = <0x28>;
  84                         mask = <0x1>;
  85                 };
  86
  87                 leds0: led-controller@10000800 {
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         compatible = "brcm,bcm6328-leds";
  91                         reg = <0x10000800 0x24>;
  92                         status = "disabled";
  93                 };
  94         };
  95 };