2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
10 * Handle hardware traps and faults.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/context_tracking.h>
16 #include <linux/interrupt.h>
17 #include <linux/kallsyms.h>
18 #include <linux/spinlock.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/kdebug.h>
22 #include <linux/kgdb.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/ptrace.h>
26 #include <linux/uprobes.h>
27 #include <linux/string.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/kexec.h>
31 #include <linux/sched.h>
32 #include <linux/timer.h>
33 #include <linux/init.h>
34 #include <linux/bug.h>
35 #include <linux/nmi.h>
37 #include <linux/smp.h>
41 #include <linux/ioport.h>
42 #include <linux/eisa.h>
45 #if defined(CONFIG_EDAC)
46 #include <linux/edac.h>
49 #include <asm/kmemcheck.h>
50 #include <asm/stacktrace.h>
51 #include <asm/processor.h>
52 #include <asm/debugreg.h>
53 #include <linux/atomic.h>
54 #include <asm/ftrace.h>
55 #include <asm/traps.h>
57 #include <asm/fpu/internal.h>
59 #include <asm/fixmap.h>
60 #include <asm/mach_traps.h>
61 #include <asm/alternative.h>
62 #include <asm/fpu/xstate.h>
63 #include <asm/trace/mpx.h>
68 #include <asm/x86_init.h>
69 #include <asm/pgalloc.h>
70 #include <asm/proto.h>
72 /* No need to be aligned, but done to keep all IDTs defined the same way. */
73 gate_desc debug_idt_table
[NR_VECTORS
] __page_aligned_bss
;
75 #include <asm/processor-flags.h>
76 #include <asm/setup.h>
77 #include <asm/proto.h>
80 /* Must be page-aligned because the real IDT is used in a fixmap. */
81 gate_desc idt_table
[NR_VECTORS
] __page_aligned_bss
;
83 DECLARE_BITMAP(used_vectors
, NR_VECTORS
);
84 EXPORT_SYMBOL_GPL(used_vectors
);
86 static inline void cond_local_irq_enable(struct pt_regs
*regs
)
88 if (regs
->flags
& X86_EFLAGS_IF
)
92 static inline void cond_local_irq_disable(struct pt_regs
*regs
)
94 if (regs
->flags
& X86_EFLAGS_IF
)
98 void ist_enter(struct pt_regs
*regs
)
100 if (user_mode(regs
)) {
101 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
104 * We might have interrupted pretty much anything. In
105 * fact, if we're a machine check, we can even interrupt
106 * NMI processing. We don't want in_nmi() to return true,
107 * but we need to notify RCU.
113 * We are atomic because we're on the IST stack; or we're on
114 * x86_32, in which case we still shouldn't schedule; or we're
115 * on x86_64 and entered from user mode, in which case we're
116 * still atomic unless ist_begin_non_atomic is called.
118 preempt_count_add(HARDIRQ_OFFSET
);
120 /* This code is a bit fragile. Test it. */
121 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
124 void ist_exit(struct pt_regs
*regs
)
126 preempt_count_sub(HARDIRQ_OFFSET
);
128 if (!user_mode(regs
))
133 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
134 * @regs: regs passed to the IST exception handler
136 * IST exception handlers normally cannot schedule. As a special
137 * exception, if the exception interrupted userspace code (i.e.
138 * user_mode(regs) would return true) and the exception was not
139 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
140 * begins a non-atomic section within an ist_enter()/ist_exit() region.
141 * Callers are responsible for enabling interrupts themselves inside
142 * the non-atomic section, and callers must call ist_end_non_atomic()
145 void ist_begin_non_atomic(struct pt_regs
*regs
)
147 BUG_ON(!user_mode(regs
));
150 * Sanity check: we need to be on the normal thread stack. This
151 * will catch asm bugs and any attempt to use ist_preempt_enable
154 BUG_ON((unsigned long)(current_top_of_stack() -
155 current_stack_pointer()) >= THREAD_SIZE
);
157 preempt_count_sub(HARDIRQ_OFFSET
);
161 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
163 * Ends a non-atomic section started with ist_begin_non_atomic().
165 void ist_end_non_atomic(void)
167 preempt_count_add(HARDIRQ_OFFSET
);
170 static nokprobe_inline
int
171 do_trap_no_signal(struct task_struct
*tsk
, int trapnr
, char *str
,
172 struct pt_regs
*regs
, long error_code
)
174 if (v8086_mode(regs
)) {
176 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
177 * On nmi (interrupt 2), do_trap should not be called.
179 if (trapnr
< X86_TRAP_UD
) {
180 if (!handle_vm86_trap((struct kernel_vm86_regs
*) regs
,
187 if (!user_mode(regs
)) {
188 if (!fixup_exception(regs
, trapnr
)) {
189 tsk
->thread
.error_code
= error_code
;
190 tsk
->thread
.trap_nr
= trapnr
;
191 die(str
, regs
, error_code
);
199 static siginfo_t
*fill_trap_info(struct pt_regs
*regs
, int signr
, int trapnr
,
202 unsigned long siaddr
;
207 return SEND_SIG_PRIV
;
211 siaddr
= uprobe_get_trap_addr(regs
);
215 siaddr
= uprobe_get_trap_addr(regs
);
223 info
->si_signo
= signr
;
225 info
->si_code
= sicode
;
226 info
->si_addr
= (void __user
*)siaddr
;
231 do_trap(int trapnr
, int signr
, char *str
, struct pt_regs
*regs
,
232 long error_code
, siginfo_t
*info
)
234 struct task_struct
*tsk
= current
;
237 if (!do_trap_no_signal(tsk
, trapnr
, str
, regs
, error_code
))
240 * We want error_code and trap_nr set for userspace faults and
241 * kernelspace faults which result in die(), but not
242 * kernelspace faults which are fixed up. die() gives the
243 * process no chance to handle the signal and notice the
244 * kernel fault information, so that won't result in polluting
245 * the information about previously queued, but not yet
246 * delivered, faults. See also do_general_protection below.
248 tsk
->thread
.error_code
= error_code
;
249 tsk
->thread
.trap_nr
= trapnr
;
251 if (show_unhandled_signals
&& unhandled_signal(tsk
, signr
) &&
252 printk_ratelimit()) {
253 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
254 tsk
->comm
, tsk
->pid
, str
,
255 regs
->ip
, regs
->sp
, error_code
);
256 print_vma_addr(" in ", regs
->ip
);
260 force_sig_info(signr
, info
?: SEND_SIG_PRIV
, tsk
);
262 NOKPROBE_SYMBOL(do_trap
);
264 static void do_error_trap(struct pt_regs
*regs
, long error_code
, char *str
,
265 unsigned long trapnr
, int signr
)
269 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
271 if (notify_die(DIE_TRAP
, str
, regs
, error_code
, trapnr
, signr
) !=
273 cond_local_irq_enable(regs
);
274 do_trap(trapnr
, signr
, str
, regs
, error_code
,
275 fill_trap_info(regs
, signr
, trapnr
, &info
));
279 #define DO_ERROR(trapnr, signr, str, name) \
280 dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
282 do_error_trap(regs, error_code, str, trapnr, signr); \
285 DO_ERROR(X86_TRAP_DE
, SIGFPE
, "divide error", divide_error
)
286 DO_ERROR(X86_TRAP_OF
, SIGSEGV
, "overflow", overflow
)
287 DO_ERROR(X86_TRAP_UD
, SIGILL
, "invalid opcode", invalid_op
)
288 DO_ERROR(X86_TRAP_OLD_MF
, SIGFPE
, "coprocessor segment overrun",coprocessor_segment_overrun
)
289 DO_ERROR(X86_TRAP_TS
, SIGSEGV
, "invalid TSS", invalid_TSS
)
290 DO_ERROR(X86_TRAP_NP
, SIGBUS
, "segment not present", segment_not_present
)
291 DO_ERROR(X86_TRAP_SS
, SIGBUS
, "stack segment", stack_segment
)
292 DO_ERROR(X86_TRAP_AC
, SIGBUS
, "alignment check", alignment_check
)
295 /* Runs on IST stack */
296 dotraplinkage
void do_double_fault(struct pt_regs
*regs
, long error_code
)
298 static const char str
[] = "double fault";
299 struct task_struct
*tsk
= current
;
301 #ifdef CONFIG_X86_ESPFIX64
302 extern unsigned char native_irq_return_iret
[];
305 * If IRET takes a non-IST fault on the espfix64 stack, then we
306 * end up promoting it to a doublefault. In that case, modify
307 * the stack to make it look like we just entered the #GP
308 * handler from user space, similar to bad_iret.
310 * No need for ist_enter here because we don't use RCU.
312 if (((long)regs
->sp
>> PGDIR_SHIFT
) == ESPFIX_PGD_ENTRY
&&
313 regs
->cs
== __KERNEL_CS
&&
314 regs
->ip
== (unsigned long)native_irq_return_iret
)
316 struct pt_regs
*normal_regs
= task_pt_regs(current
);
318 /* Fake a #GP(0) from userspace. */
319 memmove(&normal_regs
->ip
, (void *)regs
->sp
, 5*8);
320 normal_regs
->orig_ax
= 0; /* Missing (lost) #GP error code */
321 regs
->ip
= (unsigned long)general_protection
;
322 regs
->sp
= (unsigned long)&normal_regs
->orig_ax
;
329 notify_die(DIE_TRAP
, str
, regs
, error_code
, X86_TRAP_DF
, SIGSEGV
);
331 tsk
->thread
.error_code
= error_code
;
332 tsk
->thread
.trap_nr
= X86_TRAP_DF
;
334 #ifdef CONFIG_DOUBLEFAULT
335 df_debug(regs
, error_code
);
338 * This is always a kernel trap and never fixable (and thus must
342 die(str
, regs
, error_code
);
346 dotraplinkage
void do_bounds(struct pt_regs
*regs
, long error_code
)
348 const struct mpx_bndcsr
*bndcsr
;
351 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
352 if (notify_die(DIE_TRAP
, "bounds", regs
, error_code
,
353 X86_TRAP_BR
, SIGSEGV
) == NOTIFY_STOP
)
355 cond_local_irq_enable(regs
);
357 if (!user_mode(regs
))
358 die("bounds", regs
, error_code
);
360 if (!cpu_feature_enabled(X86_FEATURE_MPX
)) {
361 /* The exception is not from Intel MPX */
366 * We need to look at BNDSTATUS to resolve this exception.
367 * A NULL here might mean that it is in its 'init state',
368 * which is all zeros which indicates MPX was not
369 * responsible for the exception.
371 bndcsr
= get_xsave_field_ptr(XFEATURE_MASK_BNDCSR
);
375 trace_bounds_exception_mpx(bndcsr
);
377 * The error code field of the BNDSTATUS register communicates status
378 * information of a bound range exception #BR or operation involving
381 switch (bndcsr
->bndstatus
& MPX_BNDSTA_ERROR_CODE
) {
382 case 2: /* Bound directory has invalid entry. */
383 if (mpx_handle_bd_fault())
385 break; /* Success, it was handled */
386 case 1: /* Bound violation. */
387 info
= mpx_generate_siginfo(regs
);
390 * We failed to decode the MPX instruction. Act as if
391 * the exception was not caused by MPX.
396 * Success, we decoded the instruction and retrieved
397 * an 'info' containing the address being accessed
398 * which caused the exception. This information
399 * allows and application to possibly handle the
400 * #BR exception itself.
402 do_trap(X86_TRAP_BR
, SIGSEGV
, "bounds", regs
, error_code
, info
);
405 case 0: /* No exception caused by Intel MPX operations. */
408 die("bounds", regs
, error_code
);
415 * This path out is for all the cases where we could not
416 * handle the exception in some way (like allocating a
417 * table or telling userspace about it. We will also end
418 * up here if the kernel has MPX turned off at compile
421 do_trap(X86_TRAP_BR
, SIGSEGV
, "bounds", regs
, error_code
, NULL
);
425 do_general_protection(struct pt_regs
*regs
, long error_code
)
427 struct task_struct
*tsk
;
429 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
430 cond_local_irq_enable(regs
);
432 if (v8086_mode(regs
)) {
434 handle_vm86_fault((struct kernel_vm86_regs
*) regs
, error_code
);
439 if (!user_mode(regs
)) {
440 if (fixup_exception(regs
, X86_TRAP_GP
))
443 tsk
->thread
.error_code
= error_code
;
444 tsk
->thread
.trap_nr
= X86_TRAP_GP
;
445 if (notify_die(DIE_GPF
, "general protection fault", regs
, error_code
,
446 X86_TRAP_GP
, SIGSEGV
) != NOTIFY_STOP
)
447 die("general protection fault", regs
, error_code
);
451 tsk
->thread
.error_code
= error_code
;
452 tsk
->thread
.trap_nr
= X86_TRAP_GP
;
454 if (show_unhandled_signals
&& unhandled_signal(tsk
, SIGSEGV
) &&
455 printk_ratelimit()) {
456 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
457 tsk
->comm
, task_pid_nr(tsk
),
458 regs
->ip
, regs
->sp
, error_code
);
459 print_vma_addr(" in ", regs
->ip
);
463 force_sig_info(SIGSEGV
, SEND_SIG_PRIV
, tsk
);
465 NOKPROBE_SYMBOL(do_general_protection
);
467 /* May run on IST stack. */
468 dotraplinkage
void notrace
do_int3(struct pt_regs
*regs
, long error_code
)
470 #ifdef CONFIG_DYNAMIC_FTRACE
472 * ftrace must be first, everything else may cause a recursive crash.
473 * See note by declaration of modifying_ftrace_code in ftrace.c
475 if (unlikely(atomic_read(&modifying_ftrace_code
)) &&
476 ftrace_int3_handler(regs
))
479 if (poke_int3_handler(regs
))
483 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
484 #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
485 if (kgdb_ll_trap(DIE_INT3
, "int3", regs
, error_code
, X86_TRAP_BP
,
486 SIGTRAP
) == NOTIFY_STOP
)
488 #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
490 #ifdef CONFIG_KPROBES
491 if (kprobe_int3_handler(regs
))
495 if (notify_die(DIE_INT3
, "int3", regs
, error_code
, X86_TRAP_BP
,
496 SIGTRAP
) == NOTIFY_STOP
)
500 * Let others (NMI) know that the debug stack is in use
501 * as we may switch to the interrupt stack.
503 debug_stack_usage_inc();
505 cond_local_irq_enable(regs
);
506 do_trap(X86_TRAP_BP
, SIGTRAP
, "int3", regs
, error_code
, NULL
);
507 cond_local_irq_disable(regs
);
508 preempt_enable_no_resched();
509 debug_stack_usage_dec();
513 NOKPROBE_SYMBOL(do_int3
);
517 * Help handler running on IST stack to switch off the IST stack if the
518 * interrupted code was in user mode. The actual stack switch is done in
521 asmlinkage __visible notrace
struct pt_regs
*sync_regs(struct pt_regs
*eregs
)
523 struct pt_regs
*regs
= task_pt_regs(current
);
527 NOKPROBE_SYMBOL(sync_regs
);
529 struct bad_iret_stack
{
530 void *error_entry_ret
;
534 asmlinkage __visible notrace
535 struct bad_iret_stack
*fixup_bad_iret(struct bad_iret_stack
*s
)
538 * This is called from entry_64.S early in handling a fault
539 * caused by a bad iret to user mode. To handle the fault
540 * correctly, we want move our stack frame to task_pt_regs
541 * and we want to pretend that the exception came from the
544 struct bad_iret_stack
*new_stack
=
545 container_of(task_pt_regs(current
),
546 struct bad_iret_stack
, regs
);
548 /* Copy the IRET target to the new stack. */
549 memmove(&new_stack
->regs
.ip
, (void *)s
->regs
.sp
, 5*8);
551 /* Copy the remainder of the stack from the current stack. */
552 memmove(new_stack
, s
, offsetof(struct bad_iret_stack
, regs
.ip
));
554 BUG_ON(!user_mode(&new_stack
->regs
));
557 NOKPROBE_SYMBOL(fixup_bad_iret
);
560 static bool is_sysenter_singlestep(struct pt_regs
*regs
)
563 * We don't try for precision here. If we're anywhere in the region of
564 * code that can be single-stepped in the SYSENTER entry path, then
565 * assume that this is a useless single-step trap due to SYSENTER
566 * being invoked with TF set. (We don't know in advance exactly
567 * which instructions will be hit because BTF could plausibly
571 return (regs
->ip
- (unsigned long)__begin_SYSENTER_singlestep_region
) <
572 (unsigned long)__end_SYSENTER_singlestep_region
-
573 (unsigned long)__begin_SYSENTER_singlestep_region
;
574 #elif defined(CONFIG_IA32_EMULATION)
575 return (regs
->ip
- (unsigned long)entry_SYSENTER_compat
) <
576 (unsigned long)__end_entry_SYSENTER_compat
-
577 (unsigned long)entry_SYSENTER_compat
;
584 * Our handling of the processor debug registers is non-trivial.
585 * We do not clear them on entry and exit from the kernel. Therefore
586 * it is possible to get a watchpoint trap here from inside the kernel.
587 * However, the code in ./ptrace.c has ensured that the user can
588 * only set watchpoints on userspace addresses. Therefore the in-kernel
589 * watchpoint trap can only occur in code which is reading/writing
590 * from user space. Such code must not hold kernel locks (since it
591 * can equally take a page fault), therefore it is safe to call
592 * force_sig_info even though that claims and releases locks.
594 * Code in ./signal.c ensures that the debug control register
595 * is restored before we deliver any signal, and therefore that
596 * user code runs with the correct debug control register even though
599 * Being careful here means that we don't have to be as careful in a
600 * lot of more complicated places (task switching can be a bit lazy
601 * about restoring all the debug state, and ptrace doesn't have to
602 * find every occurrence of the TF bit that could be saved away even
605 * May run on IST stack.
607 dotraplinkage
void do_debug(struct pt_regs
*regs
, long error_code
)
609 struct task_struct
*tsk
= current
;
616 get_debugreg(dr6
, 6);
618 * The Intel SDM says:
620 * Certain debug exceptions may clear bits 0-3. The remaining
621 * contents of the DR6 register are never cleared by the
622 * processor. To avoid confusion in identifying debug
623 * exceptions, debug handlers should clear the register before
624 * returning to the interrupted task.
626 * Keep it simple: clear DR6 immediately.
630 /* Filter out all the reserved bits which are preset to 1 */
631 dr6
&= ~DR6_RESERVED
;
634 * The SDM says "The processor clears the BTF flag when it
635 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
636 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
638 clear_tsk_thread_flag(tsk
, TIF_BLOCKSTEP
);
640 if (unlikely(!user_mode(regs
) && (dr6
& DR_STEP
) &&
641 is_sysenter_singlestep(regs
))) {
646 * else we might have gotten a single-step trap and hit a
647 * watchpoint at the same time, in which case we should fall
648 * through and handle the watchpoint.
653 * If dr6 has no reason to give us about the origin of this trap,
654 * then it's very likely the result of an icebp/int01 trap.
655 * User wants a sigtrap for that.
657 if (!dr6
&& user_mode(regs
))
660 /* Catch kmemcheck conditions! */
661 if ((dr6
& DR_STEP
) && kmemcheck_trap(regs
))
664 /* Store the virtualized DR6 value */
665 tsk
->thread
.debugreg6
= dr6
;
667 #ifdef CONFIG_KPROBES
668 if (kprobe_debug_handler(regs
))
672 if (notify_die(DIE_DEBUG
, "debug", regs
, (long)&dr6
, error_code
,
673 SIGTRAP
) == NOTIFY_STOP
)
677 * Let others (NMI) know that the debug stack is in use
678 * as we may switch to the interrupt stack.
680 debug_stack_usage_inc();
682 /* It's safe to allow irq's after DR6 has been saved */
684 cond_local_irq_enable(regs
);
686 if (v8086_mode(regs
)) {
687 handle_vm86_trap((struct kernel_vm86_regs
*) regs
, error_code
,
689 cond_local_irq_disable(regs
);
690 preempt_enable_no_resched();
691 debug_stack_usage_dec();
695 if (WARN_ON_ONCE((dr6
& DR_STEP
) && !user_mode(regs
))) {
697 * Historical junk that used to handle SYSENTER single-stepping.
698 * This should be unreachable now. If we survive for a while
699 * without anyone hitting this warning, we'll turn this into
702 tsk
->thread
.debugreg6
&= ~DR_STEP
;
703 set_tsk_thread_flag(tsk
, TIF_SINGLESTEP
);
704 regs
->flags
&= ~X86_EFLAGS_TF
;
706 si_code
= get_si_code(tsk
->thread
.debugreg6
);
707 if (tsk
->thread
.debugreg6
& (DR_STEP
| DR_TRAP_BITS
) || user_icebp
)
708 send_sigtrap(tsk
, regs
, error_code
, si_code
);
709 cond_local_irq_disable(regs
);
710 preempt_enable_no_resched();
711 debug_stack_usage_dec();
714 #if defined(CONFIG_X86_32)
716 * This is the most likely code path that involves non-trivial use
717 * of the SYSENTER stack. Check that we haven't overrun it.
719 WARN(this_cpu_read(cpu_tss
.SYSENTER_stack_canary
) != STACK_END_MAGIC
,
720 "Overran or corrupted SYSENTER stack\n");
724 NOKPROBE_SYMBOL(do_debug
);
727 * Note that we play around with the 'TS' bit in an attempt to get
728 * the correct behaviour even in the presence of the asynchronous
731 static void math_error(struct pt_regs
*regs
, int error_code
, int trapnr
)
733 struct task_struct
*task
= current
;
734 struct fpu
*fpu
= &task
->thread
.fpu
;
736 char *str
= (trapnr
== X86_TRAP_MF
) ? "fpu exception" :
739 if (notify_die(DIE_TRAP
, str
, regs
, error_code
, trapnr
, SIGFPE
) == NOTIFY_STOP
)
741 cond_local_irq_enable(regs
);
743 if (!user_mode(regs
)) {
744 if (!fixup_exception(regs
, trapnr
)) {
745 task
->thread
.error_code
= error_code
;
746 task
->thread
.trap_nr
= trapnr
;
747 die(str
, regs
, error_code
);
753 * Save the info for the exception handler and clear the error.
757 task
->thread
.trap_nr
= trapnr
;
758 task
->thread
.error_code
= error_code
;
759 info
.si_signo
= SIGFPE
;
761 info
.si_addr
= (void __user
*)uprobe_get_trap_addr(regs
);
763 info
.si_code
= fpu__exception_code(fpu
, trapnr
);
765 /* Retry when we get spurious exceptions: */
769 force_sig_info(SIGFPE
, &info
, task
);
772 dotraplinkage
void do_coprocessor_error(struct pt_regs
*regs
, long error_code
)
774 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
775 math_error(regs
, error_code
, X86_TRAP_MF
);
779 do_simd_coprocessor_error(struct pt_regs
*regs
, long error_code
)
781 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
782 math_error(regs
, error_code
, X86_TRAP_XF
);
786 do_spurious_interrupt_bug(struct pt_regs
*regs
, long error_code
)
788 cond_local_irq_enable(regs
);
792 do_device_not_available(struct pt_regs
*regs
, long error_code
)
794 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
796 #ifdef CONFIG_MATH_EMULATION
797 if (!boot_cpu_has(X86_FEATURE_FPU
) && (read_cr0() & X86_CR0_EM
)) {
798 struct math_emu_info info
= { };
800 cond_local_irq_enable(regs
);
807 fpu__restore(¤t
->thread
.fpu
); /* interrupts still off */
809 cond_local_irq_enable(regs
);
812 NOKPROBE_SYMBOL(do_device_not_available
);
815 dotraplinkage
void do_iret_error(struct pt_regs
*regs
, long error_code
)
819 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
822 info
.si_signo
= SIGILL
;
824 info
.si_code
= ILL_BADSTK
;
826 if (notify_die(DIE_TRAP
, "iret exception", regs
, error_code
,
827 X86_TRAP_IRET
, SIGILL
) != NOTIFY_STOP
) {
828 do_trap(X86_TRAP_IRET
, SIGILL
, "iret exception", regs
, error_code
,
834 /* Set of traps needed for early debugging. */
835 void __init
early_trap_init(void)
838 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
839 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
840 * CPU runs at ring 0 so it is impossible to hit an invalid
841 * stack. Using the original stack works well enough at this
842 * early stage. DEBUG_STACK will be equipped after cpu_init() in
845 * We don't need to set trace_idt_table like set_intr_gate(),
846 * since we don't have trace_debug and it will be reset to
847 * 'debug' in trap_init() by set_intr_gate_ist().
849 set_intr_gate_notrace(X86_TRAP_DB
, debug
);
850 /* int3 can be called from all */
851 set_system_intr_gate(X86_TRAP_BP
, &int3
);
853 set_intr_gate(X86_TRAP_PF
, page_fault
);
855 load_idt(&idt_descr
);
858 void __init
early_trap_pf_init(void)
861 set_intr_gate(X86_TRAP_PF
, page_fault
);
865 void __init
trap_init(void)
870 void __iomem
*p
= early_ioremap(0x0FFFD9, 4);
872 if (readl(p
) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
877 set_intr_gate(X86_TRAP_DE
, divide_error
);
878 set_intr_gate_ist(X86_TRAP_NMI
, &nmi
, NMI_STACK
);
879 /* int4 can be called from all */
880 set_system_intr_gate(X86_TRAP_OF
, &overflow
);
881 set_intr_gate(X86_TRAP_BR
, bounds
);
882 set_intr_gate(X86_TRAP_UD
, invalid_op
);
883 set_intr_gate(X86_TRAP_NM
, device_not_available
);
885 set_task_gate(X86_TRAP_DF
, GDT_ENTRY_DOUBLEFAULT_TSS
);
887 set_intr_gate_ist(X86_TRAP_DF
, &double_fault
, DOUBLEFAULT_STACK
);
889 set_intr_gate(X86_TRAP_OLD_MF
, coprocessor_segment_overrun
);
890 set_intr_gate(X86_TRAP_TS
, invalid_TSS
);
891 set_intr_gate(X86_TRAP_NP
, segment_not_present
);
892 set_intr_gate(X86_TRAP_SS
, stack_segment
);
893 set_intr_gate(X86_TRAP_GP
, general_protection
);
894 set_intr_gate(X86_TRAP_SPURIOUS
, spurious_interrupt_bug
);
895 set_intr_gate(X86_TRAP_MF
, coprocessor_error
);
896 set_intr_gate(X86_TRAP_AC
, alignment_check
);
897 #ifdef CONFIG_X86_MCE
898 set_intr_gate_ist(X86_TRAP_MC
, &machine_check
, MCE_STACK
);
900 set_intr_gate(X86_TRAP_XF
, simd_coprocessor_error
);
902 /* Reserve all the builtin and the syscall vector: */
903 for (i
= 0; i
< FIRST_EXTERNAL_VECTOR
; i
++)
904 set_bit(i
, used_vectors
);
906 #ifdef CONFIG_IA32_EMULATION
907 set_system_intr_gate(IA32_SYSCALL_VECTOR
, entry_INT80_compat
);
908 set_bit(IA32_SYSCALL_VECTOR
, used_vectors
);
912 set_system_intr_gate(IA32_SYSCALL_VECTOR
, entry_INT80_32
);
913 set_bit(IA32_SYSCALL_VECTOR
, used_vectors
);
917 * Set the IDT descriptor to a fixed read-only location, so that the
918 * "sidt" instruction will not leak the location of the kernel, and
919 * to defend the IDT against arbitrary memory write vulnerabilities.
920 * It will be reloaded in cpu_init() */
921 __set_fixmap(FIX_RO_IDT
, __pa_symbol(idt_table
), PAGE_KERNEL_RO
);
922 idt_descr
.address
= fix_to_virt(FIX_RO_IDT
);
925 * Should be a barrier for any external CPU state:
930 * X86_TRAP_DB and X86_TRAP_BP have been set
931 * in early_trap_init(). However, ITS works only after
932 * cpu_init() loads TSS. See comments in early_trap_init().
934 set_intr_gate_ist(X86_TRAP_DB
, &debug
, DEBUG_STACK
);
935 /* int3 can be called from all */
936 set_system_intr_gate_ist(X86_TRAP_BP
, &int3
, DEBUG_STACK
);
938 x86_init
.irqs
.trap_init();
941 memcpy(&debug_idt_table
, &idt_table
, IDT_ENTRIES
* 16);
942 set_nmi_gate(X86_TRAP_DB
, &debug
);
943 set_nmi_gate(X86_TRAP_BP
, &int3
);