arch/arm/boot/dts/omap3-lilly-a83x.dtsi

   1 /*
   2  * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "omap36xx.dtsi"
  11
  12 / {
  13         model = "INCOstartec LILLY-A83X module (DM3730)";
  14         compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
  15
  16         chosen {
  17                         bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
  18         };
  19
  20         memory {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x8000000>;   /* 128 MB */
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 led1 {
  29                         label = "lilly-a83x::led1";
  30                         gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
  31                         linux,default-trigger = "default-on";
  32                 };
  33
  34         };
  35
  36         sound {
  37                 compatible = "ti,omap-twl4030";
  38                 ti,model = "lilly-a83x";
  39
  40                 ti,mcbsp = <&mcbsp2>;
  41         };
  42
  43         reg_vcc3: vcc3 {
  44                 compatible = "regulator-fixed";
  45                 regulator-name = "VCC3";
  46                 regulator-min-microvolt = <3300000>;
  47                 regulator-max-microvolt = <3300000>;
  48                 regulator-always-on;
  49         };
  50
  51         hsusb1_phy: hsusb1_phy {
  52                 compatible = "usb-nop-xceiv";
  53                 vcc-supply = <&reg_vcc3>;
  54         };
  55 };
  56
  57 &omap3_pmx_wkup {
  58         pinctrl-names = "default";
  59
  60         lan9221_pins: pinmux_lan9221_pins {
  61                 pinctrl-single,pins = <
  62                         OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_129 */
  63                 >;
  64         };
  65
  66         tsc2048_pins: pinmux_tsc2048_pins {
  67                 pinctrl-single,pins = <
  68                         OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4)   /* sys_boot6.gpio_8 */
  69                 >;
  70         };
  71
  72         mmc1cd_pins: pinmux_mmc1cd_pins {
  73                 pinctrl-single,pins = <
  74                         OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_126 */
  75                 >;
  76         };
  77 };
  78
  79 &omap3_pmx_core {
  80         pinctrl-names = "default";
  81
  82         uart1_pins: pinmux_uart1_pins {
  83                 pinctrl-single,pins = <
  84                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)   /* uart1_tx.uart1_tx */
  85                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)   /* uart1_rts.uart1_rts */
  86                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)    /* uart1_cts.uart1_cts */
  87                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)    /* uart1_rx.uart1_rx */
  88                 >;
  89         };
  90
  91         uart2_pins: pinmux_uart2_pins {
  92                 pinctrl-single,pins = <
  93                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)   /* mcbsp3_clkx.uart2_tx */
  94                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)    /* mcbsp3_fsx.uart2_rx */
  95                 >;
  96         };
  97
  98         uart3_pins: pinmux_uart3_pins {
  99                 pinctrl-single,pins = <
 100                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)    /* uart3_rx_irrx.uart3_rx_irrx */
 101                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   /* uart3_tx_irtx.uart3_tx_irtx */
 102                 >;
 103         };
 104
 105         i2c1_pins: pinmux_i2c1_pins {
 106                 pinctrl-single,pins = <
 107                         OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.i2c1_scl */
 108                         OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.i2c1_sda */
 109                 >;
 110         };
 111
 112         i2c2_pins: pinmux_i2c2_pins {
 113                 pinctrl-single,pins = <
 114                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
 115                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
 116                 >;
 117         };
 118
 119         i2c3_pins: pinmux_i2c3_pins {
 120                 pinctrl-single,pins = <
 121                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
 122                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
 123                 >;
 124         };
 125
 126         hsusb1_pins: pinmux_hsusb1_pins {
 127                 pinctrl-single,pins = <
 128
 129                         /* GPIO 182 controls USB-Hub reset. But USB-Phy its
 130                          * reset can't be controlled. So we clamp this GPIO to
 131                          * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
 132                          */
 133
 134                         OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcspi2_cs1.gpio_182 */
 135                 >;
 136         };
 137
 138         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 139                 pinctrl-single,pins = <
 140                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
 141                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
 142                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
 143                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
 144                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
 145                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
 146                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
 147                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
 148                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
 149                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
 150                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
 151                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
 152                 >;
 153         };
 154
 155         mmc1_pins: pinmux_mmc1_pins {
 156                 pinctrl-single,pins = <
 157                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
 158                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
 159                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat0.sdmmc1_dat0 */
 160                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat1.sdmmc1_dat1 */
 161                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat2.sdmmc1_dat2 */
 162                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat3.sdmmc1_dat3 */
 163                 >;
 164         };
 165
 166         spi2_pins: pinmux_spi2_pins {
 167                 pinctrl-single,pins = <
 168                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_clk.mcspi2_clk */
 169                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_simo.mcspi2_simo */
 170                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_somi.mcspi2_somi */
 171                         OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0)   /* mcspi2_cs0.mcspi2_cs0 */
 172                 >;
 173         };
 174 };
 175
 176 &omap3_pmx_core2 {
 177         pinctrl-names = "default";
 178
 179         hsusb1_2_pins: pinmux_hsusb1_2_pins {
 180                 pinctrl-single,pins = <
 181                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)  /* etk_clk.hsusb1_stp */
 182                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3)   /* etk_ctl.hsusb1_clk */
 183                         OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)   /* etk_d0.hsusb1_data0 */
 184                         OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)   /* etk_d1.hsusb1_data1 */
 185                         OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)   /* etk_d2.hsusb1_data2 */
 186                         OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)   /* etk_d3.hsusb1_data7 */
 187                         OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)   /* etk_d4.hsusb1_data4 */
 188                         OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)   /* etk_d5.hsusb1_data5 */
 189                         OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)   /* etk_d6.hsusb1_data6 */
 190                         OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)   /* etk_d7.hsusb1_data3 */
 191                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)   /* etk_d8.hsusb1_dir */
 192                         OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)   /* etk_d9.hsusb1_nxt */
 193                 >;
 194         };
 195
 196         gpio1_pins: pinmux_gpio1_pins {
 197                 pinctrl-single,pins = <
 198                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)   /* etk_d15.gpio_29 */
 199                 >;
 200         };
 201
 202 };
 203
 204 &gpio1 {
 205         pinctrl-names = "default";
 206         pinctrl-0 = <&gpio1_pins>;
 207 };
 208
 209 &gpio6 {
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&hsusb1_pins>;
 212 };
 213
 214 &i2c1 {
 215         clock-frequency = <2600000>;
 216         pinctrl-names = "default";
 217         pinctrl-0 = <&i2c1_pins>;
 218
 219         twl: twl@48 {
 220                 reg = <0x48>;
 221                 interrupts = <7>;   /* SYS_NIRQ cascaded to intc */
 222                 interrupt-parent = <&intc>;
 223
 224                 twl_audio: audio {
 225                         compatible = "ti,twl4030-audio";
 226                         codec {
 227                         };
 228                 };
 229         };
 230 };
 231
 232 #include "twl4030.dtsi"
 233 #include "twl4030_omap3.dtsi"
 234
 235 &twl {
 236         vmmc1: regulator-vmmc1 {
 237                 regulator-always-on;
 238         };
 239
 240         vdd1: regulator-vdd1 {
 241                 regulator-always-on;
 242         };
 243
 244         vdd2: regulator-vdd2 {
 245                 regulator-always-on;
 246         };
 247 };
 248
 249 &i2c2 {
 250         clock-frequency = <2600000>;
 251         pinctrl-names = "default";
 252         pinctrl-0 = <&i2c2_pins>;
 253 };
 254
 255 &i2c3 {
 256         clock-frequency = <2600000>;
 257         pinctrl-names = "default";
 258         pinctrl-0 = <&i2c3_pins>;
 259                 gpiom1: gpio@20 {
 260                         compatible = "mcp,mcp23017";
 261                         gpio-controller;
 262                         #gpio-cells = <2>;
 263                         reg = <0x20>;
 264                 };
 265 };
 266
 267 &uart1 {
 268         pinctrl-names = "default";
 269         pinctrl-0 = <&uart1_pins>;
 270 };
 271
 272 &uart2 {
 273         pinctrl-names = "default";
 274         pinctrl-0 = <&uart2_pins>;
 275 };
 276
 277 &uart3 {
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&uart3_pins>;
 280 };
 281
 282 &uart4 {
 283         status = "disabled";
 284 };
 285
 286 &mmc1 {
 287         cd-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
 288         cd-inverted;
 289         vmmc-supply = <&vmmc1>;
 290         bus-width = <4>;
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
 293         cap-sdio-irq;
 294         cap-sd-highspeed;
 295         cap-mmc-highspeed;
 296 };
 297
 298 &mmc2 {
 299         status = "disabled";
 300 };
 301
 302 &mmc3 {
 303         status = "disabled";
 304 };
 305
 306 &mcspi2 {
 307         status = "okay";
 308         pinctrl-names = "default";
 309         pinctrl-0 = <&spi2_pins>;
 310
 311         tsc2046@0 {
 312                 reg = <0>;   /* CS0 */
 313                 compatible = "ti,tsc2046";
 314                 interrupt-parent = <&gpio1>;
 315                 interrupts = <8 0>;   /* boot6 / gpio_8 */
 316                 spi-max-frequency = <1000000>;
 317                 pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
 318                 vcc-supply = <&reg_vcc3>;
 319                 pinctrl-names = "default";
 320                 pinctrl-0 = <&tsc2048_pins>;
 321
 322                 ti,x-min = /bits/ 16 <300>;
 323                 ti,x-max = /bits/ 16 <3000>;
 324                 ti,y-min = /bits/ 16 <600>;
 325                 ti,y-max = /bits/ 16 <3600>;
 326                 ti,x-plate-ohms = /bits/ 16 <80>;
 327                 ti,pressure-max = /bits/ 16 <255>;
 328                 ti,swap-xy;
 329
 330                 linux,wakeup;
 331         };
 332 };
 333
 334 &usbhsehci {
 335         phys = <&hsusb1_phy>;
 336 };
 337
 338 &usbhshost {
 339         pinctrl-names = "default";
 340         pinctrl-0 = <&hsusb1_2_pins>;
 341         num-ports = <2>;
 342         port1-mode = "ehci-phy";
 343 };
 344
 345 &usb_otg_hs {
 346         pinctrl-names = "default";
 347         pinctrl-0 = <&hsusb_otg_pins>;
 348         interface-type = <0>;
 349         usb-phy = <&usb2_phy>;
 350         phys = <&usb2_phy>;
 351         phy-names = "usb2-phy";
 352         mode = <3>;
 353         power = <50>;
 354 };
 355
 356 &mcbsp2 {
 357         status = "okay";
 358 };
 359
 360 &gpmc {
 361         ranges = <0 0 0x30000000 0x1000000>,
 362                 <7 0 0x15000000 0x01000000>;
 363
 364         nand@0,0 {
 365                 reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
 366                 nand-bus-width = <16>;
 367                 ti,nand-ecc-opt = "bch8";
 368                 /* no elm on omap3 */
 369
 370                 gpmc,mux-add-data = <0>;
 371                 gpmc,device-width = <2>;
 372                 gpmc,wait-pin = <0>;
 373                 gpmc,wait-monitoring-ns = <0>;
 374                 gpmc,burst-length= <4>;
 375                 gpmc,cs-on-ns = <0>;
 376                 gpmc,cs-rd-off-ns = <100>;
 377                 gpmc,cs-wr-off-ns = <100>;
 378                 gpmc,adv-on-ns = <0>;
 379                 gpmc,adv-rd-off-ns = <100>;
 380                 gpmc,adv-wr-off-ns = <100>;
 381                 gpmc,oe-on-ns = <5>;
 382                 gpmc,oe-off-ns = <75>;
 383                 gpmc,we-on-ns = <5>;
 384                 gpmc,we-off-ns = <75>;
 385                 gpmc,rd-cycle-ns = <100>;
 386                 gpmc,wr-cycle-ns = <100>;
 387                 gpmc,access-ns = <60>;
 388                 gpmc,page-burst-access-ns = <5>;
 389                 gpmc,bus-turnaround-ns = <0>;
 390                 gpmc,cycle2cycle-samecsen;
 391                 gpmc,cycle2cycle-delay-ns = <50>;
 392                 gpmc,wr-data-mux-bus-ns = <75>;
 393                 gpmc,wr-access-ns = <155>;
 394
 395                 #address-cells = <1>;
 396                 #size-cells = <1>;
 397
 398                 partition@0 {
 399                         label = "MLO";
 400                         reg = <0 0x80000>;
 401                 };
 402
 403                 partition@0x80000 {
 404                         label = "u-boot";
 405                         reg = <0x80000 0x1e0000>;
 406                 };
 407
 408                 partition@0x260000 {
 409                         label = "u-boot-environment";
 410                         reg = <0x260000 0x20000>;
 411                 };
 412
 413                 partition@0x280000 {
 414                         label = "kernel";
 415                         reg = <0x280000 0x500000>;
 416                 };
 417
 418                 partition@0x780000 {
 419                         label = "filesystem";
 420                         reg = <0x780000 0xf880000>;
 421                 };
 422         };
 423
 424         ethernet@7,0 {
 425                 compatible = "smsc,lan9221", "smsc,lan9115";
 426                 bank-width = <2>;
 427                 gpmc,mux-add-data = <2>;
 428                 gpmc,cs-on-ns = <10>;
 429                 gpmc,cs-rd-off-ns = <60>;
 430                 gpmc,cs-wr-off-ns = <60>;
 431                 gpmc,adv-on-ns = <0>;
 432                 gpmc,adv-rd-off-ns = <10>;
 433                 gpmc,adv-wr-off-ns = <10>;
 434                 gpmc,oe-on-ns = <10>;
 435                 gpmc,oe-off-ns = <60>;
 436                 gpmc,we-on-ns = <10>;
 437                 gpmc,we-off-ns = <60>;
 438                 gpmc,rd-cycle-ns = <100>;
 439                 gpmc,wr-cycle-ns = <100>;
 440                 gpmc,access-ns = <50>;
 441                 gpmc,page-burst-access-ns = <5>;
 442                 gpmc,bus-turnaround-ns = <0>;
 443                 gpmc,cycle2cycle-delay-ns = <75>;
 444                 gpmc,wr-data-mux-bus-ns = <15>;
 445                 gpmc,wr-access-ns = <75>;
 446                 gpmc,cycle2cycle-samecsen;
 447                 gpmc,cycle2cycle-diffcsen;
 448                 vddvario-supply = <&reg_vcc3>;
 449                 vdd33a-supply = <&reg_vcc3>;
 450                 reg-io-width = <4>;
 451                 interrupt-parent = <&gpio5>;
 452                 interrupts = <1 0x2>;
 453                 reg = <7 0 0xff>;
 454                 pinctrl-names = "default";
 455                 pinctrl-0 = <&lan9221_pins>;
 456                 phy-mode = "mii";
 457         };
 458 };