arch/arm64/kernel/process.c

   1 /*
   2  * Based on arch/arm/kernel/process.c
   3  *
   4  * Original Copyright (C) 1995  Linus Torvalds
   5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
   6  * Copyright (C) 2012 ARM Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdarg.h>
  22
  23 #include <linux/compat.h>
  24 #include <linux/efi.h>
  25 #include <linux/export.h>
  26 #include <linux/sched.h>
  27 #include <linux/kernel.h>
  28 #include <linux/mm.h>
  29 #include <linux/stddef.h>
  30 #include <linux/unistd.h>
  31 #include <linux/user.h>
  32 #include <linux/delay.h>
  33 #include <linux/reboot.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kallsyms.h>
  36 #include <linux/init.h>
  37 #include <linux/cpu.h>
  38 #include <linux/elfcore.h>
  39 #include <linux/pm.h>
  40 #include <linux/tick.h>
  41 #include <linux/utsname.h>
  42 #include <linux/uaccess.h>
  43 #include <linux/random.h>
  44 #include <linux/hw_breakpoint.h>
  45 #include <linux/personality.h>
  46 #include <linux/notifier.h>
  47 #include <trace/events/power.h>
  48
  49 #include <asm/compat.h>
  50 #include <asm/cacheflush.h>
  51 #include <asm/fpsimd.h>
  52 #include <asm/mmu_context.h>
  53 #include <asm/processor.h>
  54 #include <asm/stacktrace.h>
  55
  56 #ifdef CONFIG_CC_STACKPROTECTOR
  57 #include <linux/stackprotector.h>
  58 unsigned long __stack_chk_guard __read_mostly;
  59 EXPORT_SYMBOL(__stack_chk_guard);
  60 #endif
  61
  62 /*
  63  * Function pointers to optional machine specific functions
  64  */
  65 void (*pm_power_off)(void);
  66 EXPORT_SYMBOL_GPL(pm_power_off);
  67
  68 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
  69
  70 /*
  71  * This is our default idle handler.
  72  */
  73 void arch_cpu_idle(void)
  74 {
  75         /*
  76          * This should do all the clock switching and wait for interrupt
  77          * tricks
  78          */
  79         trace_cpu_idle_rcuidle(1, smp_processor_id());
  80         cpu_do_idle();
  81         local_irq_enable();
  82         trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
  83 }
  84
  85 #ifdef CONFIG_HOTPLUG_CPU
  86 void arch_cpu_idle_dead(void)
  87 {
  88        cpu_die();
  89 }
  90 #endif
  91
  92 /*
  93  * Called by kexec, immediately prior to machine_kexec().
  94  *
  95  * This must completely disable all secondary CPUs; simply causing those CPUs
  96  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
  97  * kexec'd kernel to use any and all RAM as it sees fit, without having to
  98  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
  99  * functionality embodied in disable_nonboot_cpus() to achieve this.
 100  */
 101 void machine_shutdown(void)
 102 {
 103         disable_nonboot_cpus();
 104 }
 105
 106 /*
 107  * Halting simply requires that the secondary CPUs stop performing any
 108  * activity (executing tasks, handling interrupts). smp_send_stop()
 109  * achieves this.
 110  */
 111 void machine_halt(void)
 112 {
 113         local_irq_disable();
 114         smp_send_stop();
 115         while (1);
 116 }
 117
 118 /*
 119  * Power-off simply requires that the secondary CPUs stop performing any
 120  * activity (executing tasks, handling interrupts). smp_send_stop()
 121  * achieves this. When the system power is turned off, it will take all CPUs
 122  * with it.
 123  */
 124 void machine_power_off(void)
 125 {
 126         local_irq_disable();
 127         smp_send_stop();
 128         if (pm_power_off)
 129                 pm_power_off();
 130 }
 131
 132 /*
 133  * Restart requires that the secondary CPUs stop performing any activity
 134  * while the primary CPU resets the system. Systems with multiple CPUs must
 135  * provide a HW restart implementation, to ensure that all CPUs reset at once.
 136  * This is required so that any code running after reset on the primary CPU
 137  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 138  * executing pre-reset code, and using RAM that the primary CPU's code wishes
 139  * to use. Implementing such co-ordination would be essentially impossible.
 140  */
 141 void machine_restart(char *cmd)
 142 {
 143         /* Disable interrupts first */
 144         local_irq_disable();
 145         smp_send_stop();
 146
 147         /*
 148          * UpdateCapsule() depends on the system being reset via
 149          * ResetSystem().
 150          */
 151         if (efi_enabled(EFI_RUNTIME_SERVICES))
 152                 efi_reboot(reboot_mode, NULL);
 153
 154         /* Now call the architecture specific reboot code. */
 155         if (arm_pm_restart)
 156                 arm_pm_restart(reboot_mode, cmd);
 157         else
 158                 do_kernel_restart(cmd);
 159
 160         /*
 161          * Whoops - the architecture was unable to reboot.
 162          */
 163         printk("Reboot failed -- System halted\n");
 164         while (1);
 165 }
 166
 167 void __show_regs(struct pt_regs *regs)
 168 {
 169         int i, top_reg;
 170         u64 lr, sp;
 171
 172         if (compat_user_mode(regs)) {
 173                 lr = regs->compat_lr;
 174                 sp = regs->compat_sp;
 175                 top_reg = 12;
 176         } else {
 177                 lr = regs->regs[30];
 178                 sp = regs->sp;
 179                 top_reg = 29;
 180         }
 181
 182         show_regs_print_info(KERN_DEFAULT);
 183         print_symbol("PC is at %s\n", instruction_pointer(regs));
 184         print_symbol("LR is at %s\n", lr);
 185         printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
 186                regs->pc, lr, regs->pstate);
 187         printk("sp : %016llx\n", sp);
 188         for (i = top_reg; i >= 0; i--) {
 189                 printk("x%-2d: %016llx ", i, regs->regs[i]);
 190                 if (i % 2 == 0)
 191                         printk("\n");
 192         }
 193         printk("\n");
 194 }
 195
 196 void show_regs(struct pt_regs * regs)
 197 {
 198         printk("\n");
 199         __show_regs(regs);
 200 }
 201
 202 /*
 203  * Free current thread data structures etc..
 204  */
 205 void exit_thread(void)
 206 {
 207 }
 208
 209 static void tls_thread_flush(void)
 210 {
 211         asm ("msr tpidr_el0, xzr");
 212
 213         if (is_compat_task()) {
 214                 current->thread.tp_value = 0;
 215
 216                 /*
 217                  * We need to ensure ordering between the shadow state and the
 218                  * hardware state, so that we don't corrupt the hardware state
 219                  * with a stale shadow state during context switch.
 220                  */
 221                 barrier();
 222                 asm ("msr tpidrro_el0, xzr");
 223         }
 224 }
 225
 226 void flush_thread(void)
 227 {
 228         fpsimd_flush_thread();
 229         tls_thread_flush();
 230         flush_ptrace_hw_breakpoint(current);
 231 }
 232
 233 void release_thread(struct task_struct *dead_task)
 234 {
 235 }
 236
 237 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 238 {
 239         if (current->mm)
 240                 fpsimd_preserve_current_state();
 241         *dst = *src;
 242         return 0;
 243 }
 244
 245 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
 246
 247 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
 248                 unsigned long stk_sz, struct task_struct *p)
 249 {
 250         struct pt_regs *childregs = task_pt_regs(p);
 251
 252         memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
 253
 254         if (likely(!(p->flags & PF_KTHREAD))) {
 255                 *childregs = *current_pt_regs();
 256                 childregs->regs[0] = 0;
 257
 258                 /*
 259                  * Read the current TLS pointer from tpidr_el0 as it may be
 260                  * out-of-sync with the saved value.
 261                  */
 262                 asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p)));
 263
 264                 if (stack_start) {
 265                         if (is_compat_thread(task_thread_info(p)))
 266                                 childregs->compat_sp = stack_start;
 267                         /* 16-byte aligned stack mandatory on AArch64 */
 268                         else if (stack_start & 15)
 269                                 return -EINVAL;
 270                         else
 271                                 childregs->sp = stack_start;
 272                 }
 273
 274                 /*
 275                  * If a TLS pointer was passed to clone (4th argument), use it
 276                  * for the new thread.
 277                  */
 278                 if (clone_flags & CLONE_SETTLS)
 279                         p->thread.tp_value = childregs->regs[3];
 280         } else {
 281                 memset(childregs, 0, sizeof(struct pt_regs));
 282                 childregs->pstate = PSR_MODE_EL1h;
 283                 p->thread.cpu_context.x19 = stack_start;
 284                 p->thread.cpu_context.x20 = stk_sz;
 285         }
 286         p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
 287         p->thread.cpu_context.sp = (unsigned long)childregs;
 288
 289         ptrace_hw_copy_thread(p);
 290
 291         return 0;
 292 }
 293
 294 static void tls_thread_switch(struct task_struct *next)
 295 {
 296         unsigned long tpidr, tpidrro;
 297
 298         asm("mrs %0, tpidr_el0" : "=r" (tpidr));
 299         *task_user_tls(current) = tpidr;
 300
 301         tpidr = *task_user_tls(next);
 302         tpidrro = is_compat_thread(task_thread_info(next)) ?
 303                   next->thread.tp_value : 0;
 304
 305         asm(
 306         "       msr     tpidr_el0, %0\n"
 307         "       msr     tpidrro_el0, %1"
 308         : : "r" (tpidr), "r" (tpidrro));
 309 }
 310
 311 /*
 312  * Thread switching.
 313  */
 314 struct task_struct *__switch_to(struct task_struct *prev,
 315                                 struct task_struct *next)
 316 {
 317         struct task_struct *last;
 318
 319         fpsimd_thread_switch(next);
 320         tls_thread_switch(next);
 321         hw_breakpoint_thread_switch(next);
 322         contextidr_thread_switch(next);
 323
 324         /*
 325          * Complete any pending TLB or cache maintenance on this CPU in case
 326          * the thread migrates to a different CPU.
 327          */
 328         dsb(ish);
 329
 330         /* the actual thread switch */
 331         last = cpu_switch_to(prev, next);
 332
 333         return last;
 334 }
 335
 336 unsigned long get_wchan(struct task_struct *p)
 337 {
 338         struct stackframe frame;
 339         unsigned long stack_page;
 340         int count = 0;
 341         if (!p || p == current || p->state == TASK_RUNNING)
 342                 return 0;
 343
 344         frame.fp = thread_saved_fp(p);
 345         frame.sp = thread_saved_sp(p);
 346         frame.pc = thread_saved_pc(p);
 347         stack_page = (unsigned long)task_stack_page(p);
 348         do {
 349                 if (frame.sp < stack_page ||
 350                     frame.sp >= stack_page + THREAD_SIZE ||
 351                     unwind_frame(&frame))
 352                         return 0;
 353                 if (!in_sched_functions(frame.pc))
 354                         return frame.pc;
 355         } while (count ++ < 16);
 356         return 0;
 357 }
 358
 359 unsigned long arch_align_stack(unsigned long sp)
 360 {
 361         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 362                 sp -= get_random_int() & ~PAGE_MASK;
 363         return sp & ~0xf;
 364 }
 365
 366 static unsigned long randomize_base(unsigned long base)
 367 {
 368         unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
 369         return randomize_range(base, range_end, 0) ? : base;
 370 }
 371
 372 unsigned long arch_randomize_brk(struct mm_struct *mm)
 373 {
 374         return randomize_base(mm->brk);
 375 }