1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for NEC VR4100 series Serial Interface Unit.
5 * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
7 * Based on drivers/serial/8250.c, by Russell King.
10 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/serial.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial_reg.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
28 #include <asm/vr41xx/siu.h>
29 #include <asm/vr41xx/vr41xx.h>
31 #define SIU_BAUD_BASE 1152000
33 #define SIU_MINOR_BASE 82
35 #define RX_MAX_COUNT 256
36 #define TX_MAX_COUNT 15
42 #define IRMSEL_HP 0x08
43 #define IRMSEL_TEMIC 0x04
44 #define IRMSEL_SHARP 0x00
48 static struct uart_port siu_uart_ports
[SIU_PORTS_MAX
] = {
49 [0 ... SIU_PORTS_MAX
-1] = {
50 .lock
= __SPIN_LOCK_UNLOCKED(siu_uart_ports
->lock
),
55 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
56 static uint8_t lsr_break_flag
[SIU_PORTS_MAX
];
59 #define siu_read(port, offset) readb((port)->membase + (offset))
60 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
62 void vr41xx_select_siu_interface(siu_interface_t interface
)
64 struct uart_port
*port
;
68 port
= &siu_uart_ports
[0];
70 spin_lock_irqsave(&port
->lock
, flags
);
72 irsel
= siu_read(port
, SIUIRSEL
);
73 if (interface
== SIU_INTERFACE_IRDA
)
77 siu_write(port
, SIUIRSEL
, irsel
);
79 spin_unlock_irqrestore(&port
->lock
, flags
);
81 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface
);
83 void vr41xx_use_irda(irda_use_t use
)
85 struct uart_port
*port
;
89 port
= &siu_uart_ports
[0];
91 spin_lock_irqsave(&port
->lock
, flags
);
93 irsel
= siu_read(port
, SIUIRSEL
);
94 if (use
== FIR_USE_IRDA
)
98 siu_write(port
, SIUIRSEL
, irsel
);
100 spin_unlock_irqrestore(&port
->lock
, flags
);
102 EXPORT_SYMBOL_GPL(vr41xx_use_irda
);
104 void vr41xx_select_irda_module(irda_module_t module
, irda_speed_t speed
)
106 struct uart_port
*port
;
110 port
= &siu_uart_ports
[0];
112 spin_lock_irqsave(&port
->lock
, flags
);
114 irsel
= siu_read(port
, SIUIRSEL
);
115 irsel
&= ~(IRMSEL
| TMICTX
| TMICMODE
);
118 irsel
|= IRMSEL_SHARP
;
121 irsel
|= IRMSEL_TEMIC
| TMICMODE
;
122 if (speed
== IRDA_TX_4MBPS
)
131 siu_write(port
, SIUIRSEL
, irsel
);
133 spin_unlock_irqrestore(&port
->lock
, flags
);
135 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module
);
137 static inline void siu_clear_fifo(struct uart_port
*port
)
139 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
140 siu_write(port
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR_CLEAR_RCVR
|
141 UART_FCR_CLEAR_XMIT
);
142 siu_write(port
, UART_FCR
, 0);
145 static inline unsigned long siu_port_size(struct uart_port
*port
)
147 switch (port
->type
) {
148 case PORT_VR41XX_SIU
:
150 case PORT_VR41XX_DSIU
:
157 static inline unsigned int siu_check_type(struct uart_port
*port
)
160 return PORT_VR41XX_SIU
;
161 if (port
->line
== 1 && port
->irq
)
162 return PORT_VR41XX_DSIU
;
167 static inline const char *siu_type_name(struct uart_port
*port
)
169 switch (port
->type
) {
170 case PORT_VR41XX_SIU
:
172 case PORT_VR41XX_DSIU
:
179 static unsigned int siu_tx_empty(struct uart_port
*port
)
183 lsr
= siu_read(port
, UART_LSR
);
184 if (lsr
& UART_LSR_TEMT
)
190 static void siu_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
194 if (mctrl
& TIOCM_DTR
)
196 if (mctrl
& TIOCM_RTS
)
198 if (mctrl
& TIOCM_OUT1
)
199 mcr
|= UART_MCR_OUT1
;
200 if (mctrl
& TIOCM_OUT2
)
201 mcr
|= UART_MCR_OUT2
;
202 if (mctrl
& TIOCM_LOOP
)
203 mcr
|= UART_MCR_LOOP
;
205 siu_write(port
, UART_MCR
, mcr
);
208 static unsigned int siu_get_mctrl(struct uart_port
*port
)
211 unsigned int mctrl
= 0;
213 msr
= siu_read(port
, UART_MSR
);
214 if (msr
& UART_MSR_DCD
)
216 if (msr
& UART_MSR_RI
)
218 if (msr
& UART_MSR_DSR
)
220 if (msr
& UART_MSR_CTS
)
226 static void siu_stop_tx(struct uart_port
*port
)
231 spin_lock_irqsave(&port
->lock
, flags
);
233 ier
= siu_read(port
, UART_IER
);
234 ier
&= ~UART_IER_THRI
;
235 siu_write(port
, UART_IER
, ier
);
237 spin_unlock_irqrestore(&port
->lock
, flags
);
240 static void siu_start_tx(struct uart_port
*port
)
245 spin_lock_irqsave(&port
->lock
, flags
);
247 ier
= siu_read(port
, UART_IER
);
248 ier
|= UART_IER_THRI
;
249 siu_write(port
, UART_IER
, ier
);
251 spin_unlock_irqrestore(&port
->lock
, flags
);
254 static void siu_stop_rx(struct uart_port
*port
)
259 spin_lock_irqsave(&port
->lock
, flags
);
261 ier
= siu_read(port
, UART_IER
);
262 ier
&= ~UART_IER_RLSI
;
263 siu_write(port
, UART_IER
, ier
);
265 port
->read_status_mask
&= ~UART_LSR_DR
;
267 spin_unlock_irqrestore(&port
->lock
, flags
);
270 static void siu_enable_ms(struct uart_port
*port
)
275 spin_lock_irqsave(&port
->lock
, flags
);
277 ier
= siu_read(port
, UART_IER
);
279 siu_write(port
, UART_IER
, ier
);
281 spin_unlock_irqrestore(&port
->lock
, flags
);
284 static void siu_break_ctl(struct uart_port
*port
, int ctl
)
289 spin_lock_irqsave(&port
->lock
, flags
);
291 lcr
= siu_read(port
, UART_LCR
);
295 lcr
&= ~UART_LCR_SBC
;
296 siu_write(port
, UART_LCR
, lcr
);
298 spin_unlock_irqrestore(&port
->lock
, flags
);
301 static inline void receive_chars(struct uart_port
*port
, uint8_t *status
)
305 int max_count
= RX_MAX_COUNT
;
310 ch
= siu_read(port
, UART_RX
);
314 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
315 lsr
|= lsr_break_flag
[port
->line
];
316 lsr_break_flag
[port
->line
] = 0;
318 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_FE
|
319 UART_LSR_PE
| UART_LSR_OE
))) {
320 if (lsr
& UART_LSR_BI
) {
321 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
324 if (uart_handle_break(port
))
328 if (lsr
& UART_LSR_FE
)
329 port
->icount
.frame
++;
330 if (lsr
& UART_LSR_PE
)
331 port
->icount
.parity
++;
332 if (lsr
& UART_LSR_OE
)
333 port
->icount
.overrun
++;
335 lsr
&= port
->read_status_mask
;
336 if (lsr
& UART_LSR_BI
)
338 if (lsr
& UART_LSR_FE
)
340 if (lsr
& UART_LSR_PE
)
344 if (uart_handle_sysrq_char(port
, ch
))
347 uart_insert_char(port
, lsr
, UART_LSR_OE
, ch
, flag
);
350 lsr
= siu_read(port
, UART_LSR
);
351 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
353 tty_flip_buffer_push(&port
->state
->port
);
358 static inline void check_modem_status(struct uart_port
*port
)
362 msr
= siu_read(port
, UART_MSR
);
363 if ((msr
& UART_MSR_ANY_DELTA
) == 0)
365 if (msr
& UART_MSR_DDCD
)
366 uart_handle_dcd_change(port
, msr
& UART_MSR_DCD
);
367 if (msr
& UART_MSR_TERI
)
369 if (msr
& UART_MSR_DDSR
)
371 if (msr
& UART_MSR_DCTS
)
372 uart_handle_cts_change(port
, msr
& UART_MSR_CTS
);
374 wake_up_interruptible(&port
->state
->port
.delta_msr_wait
);
377 static inline void transmit_chars(struct uart_port
*port
)
379 struct circ_buf
*xmit
;
380 int max_count
= TX_MAX_COUNT
;
382 xmit
= &port
->state
->xmit
;
385 siu_write(port
, UART_TX
, port
->x_char
);
391 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
397 siu_write(port
, UART_TX
, xmit
->buf
[xmit
->tail
]);
398 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
400 if (uart_circ_empty(xmit
))
402 } while (max_count
-- > 0);
404 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
405 uart_write_wakeup(port
);
407 if (uart_circ_empty(xmit
))
411 static irqreturn_t
siu_interrupt(int irq
, void *dev_id
)
413 struct uart_port
*port
;
416 port
= (struct uart_port
*)dev_id
;
418 iir
= siu_read(port
, UART_IIR
);
419 if (iir
& UART_IIR_NO_INT
)
422 lsr
= siu_read(port
, UART_LSR
);
423 if (lsr
& UART_LSR_DR
)
424 receive_chars(port
, &lsr
);
426 check_modem_status(port
);
428 if (lsr
& UART_LSR_THRE
)
429 transmit_chars(port
);
434 static int siu_startup(struct uart_port
*port
)
438 if (port
->membase
== NULL
)
441 siu_clear_fifo(port
);
443 (void)siu_read(port
, UART_LSR
);
444 (void)siu_read(port
, UART_RX
);
445 (void)siu_read(port
, UART_IIR
);
446 (void)siu_read(port
, UART_MSR
);
448 if (siu_read(port
, UART_LSR
) == 0xff)
451 retval
= request_irq(port
->irq
, siu_interrupt
, 0, siu_type_name(port
), port
);
455 if (port
->type
== PORT_VR41XX_DSIU
)
456 vr41xx_enable_dsiuint(DSIUINT_ALL
);
458 siu_write(port
, UART_LCR
, UART_LCR_WLEN8
);
460 spin_lock_irq(&port
->lock
);
461 siu_set_mctrl(port
, port
->mctrl
);
462 spin_unlock_irq(&port
->lock
);
464 siu_write(port
, UART_IER
, UART_IER_RLSI
| UART_IER_RDI
);
466 (void)siu_read(port
, UART_LSR
);
467 (void)siu_read(port
, UART_RX
);
468 (void)siu_read(port
, UART_IIR
);
469 (void)siu_read(port
, UART_MSR
);
474 static void siu_shutdown(struct uart_port
*port
)
479 siu_write(port
, UART_IER
, 0);
481 spin_lock_irqsave(&port
->lock
, flags
);
483 port
->mctrl
&= ~TIOCM_OUT2
;
484 siu_set_mctrl(port
, port
->mctrl
);
486 spin_unlock_irqrestore(&port
->lock
, flags
);
488 lcr
= siu_read(port
, UART_LCR
);
489 lcr
&= ~UART_LCR_SBC
;
490 siu_write(port
, UART_LCR
, lcr
);
492 siu_clear_fifo(port
);
494 (void)siu_read(port
, UART_RX
);
496 if (port
->type
== PORT_VR41XX_DSIU
)
497 vr41xx_disable_dsiuint(DSIUINT_ALL
);
499 free_irq(port
->irq
, port
);
502 static void siu_set_termios(struct uart_port
*port
, struct ktermios
*new,
503 struct ktermios
*old
)
505 tcflag_t c_cflag
, c_iflag
;
506 uint8_t lcr
, fcr
, ier
;
507 unsigned int baud
, quot
;
510 c_cflag
= new->c_cflag
;
511 switch (c_cflag
& CSIZE
) {
513 lcr
= UART_LCR_WLEN5
;
516 lcr
= UART_LCR_WLEN6
;
519 lcr
= UART_LCR_WLEN7
;
522 lcr
= UART_LCR_WLEN8
;
526 if (c_cflag
& CSTOPB
)
527 lcr
|= UART_LCR_STOP
;
528 if (c_cflag
& PARENB
)
529 lcr
|= UART_LCR_PARITY
;
530 if ((c_cflag
& PARODD
) != PARODD
)
531 lcr
|= UART_LCR_EPAR
;
532 if (c_cflag
& CMSPAR
)
533 lcr
|= UART_LCR_SPAR
;
535 baud
= uart_get_baud_rate(port
, new, old
, 0, port
->uartclk
/16);
536 quot
= uart_get_divisor(port
, baud
);
538 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
;
540 spin_lock_irqsave(&port
->lock
, flags
);
542 uart_update_timeout(port
, c_cflag
, baud
);
544 c_iflag
= new->c_iflag
;
546 port
->read_status_mask
= UART_LSR_THRE
| UART_LSR_OE
| UART_LSR_DR
;
548 port
->read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
549 if (c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
550 port
->read_status_mask
|= UART_LSR_BI
;
552 port
->ignore_status_mask
= 0;
553 if (c_iflag
& IGNPAR
)
554 port
->ignore_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
555 if (c_iflag
& IGNBRK
) {
556 port
->ignore_status_mask
|= UART_LSR_BI
;
557 if (c_iflag
& IGNPAR
)
558 port
->ignore_status_mask
|= UART_LSR_OE
;
561 if ((c_cflag
& CREAD
) == 0)
562 port
->ignore_status_mask
|= UART_LSR_DR
;
564 ier
= siu_read(port
, UART_IER
);
565 ier
&= ~UART_IER_MSI
;
566 if (UART_ENABLE_MS(port
, c_cflag
))
568 siu_write(port
, UART_IER
, ier
);
570 siu_write(port
, UART_LCR
, lcr
| UART_LCR_DLAB
);
572 siu_write(port
, UART_DLL
, (uint8_t)quot
);
573 siu_write(port
, UART_DLM
, (uint8_t)(quot
>> 8));
575 siu_write(port
, UART_LCR
, lcr
);
577 siu_write(port
, UART_FCR
, fcr
);
579 siu_set_mctrl(port
, port
->mctrl
);
581 spin_unlock_irqrestore(&port
->lock
, flags
);
584 static void siu_pm(struct uart_port
*port
, unsigned int state
, unsigned int oldstate
)
588 switch (port
->type
) {
589 case PORT_VR41XX_SIU
:
590 vr41xx_supply_clock(SIU_CLOCK
);
592 case PORT_VR41XX_DSIU
:
593 vr41xx_supply_clock(DSIU_CLOCK
);
598 switch (port
->type
) {
599 case PORT_VR41XX_SIU
:
600 vr41xx_mask_clock(SIU_CLOCK
);
602 case PORT_VR41XX_DSIU
:
603 vr41xx_mask_clock(DSIU_CLOCK
);
610 static const char *siu_type(struct uart_port
*port
)
612 return siu_type_name(port
);
615 static void siu_release_port(struct uart_port
*port
)
619 if (port
->flags
& UPF_IOREMAP
) {
620 iounmap(port
->membase
);
621 port
->membase
= NULL
;
624 size
= siu_port_size(port
);
625 release_mem_region(port
->mapbase
, size
);
628 static int siu_request_port(struct uart_port
*port
)
631 struct resource
*res
;
633 size
= siu_port_size(port
);
634 res
= request_mem_region(port
->mapbase
, size
, siu_type_name(port
));
638 if (port
->flags
& UPF_IOREMAP
) {
639 port
->membase
= ioremap(port
->mapbase
, size
);
640 if (port
->membase
== NULL
) {
641 release_resource(res
);
649 static void siu_config_port(struct uart_port
*port
, int flags
)
651 if (flags
& UART_CONFIG_TYPE
) {
652 port
->type
= siu_check_type(port
);
653 (void)siu_request_port(port
);
657 static int siu_verify_port(struct uart_port
*port
, struct serial_struct
*serial
)
659 if (port
->type
!= PORT_VR41XX_SIU
&& port
->type
!= PORT_VR41XX_DSIU
)
661 if (port
->irq
!= serial
->irq
)
663 if (port
->iotype
!= serial
->io_type
)
665 if (port
->mapbase
!= (unsigned long)serial
->iomem_base
)
671 static const struct uart_ops siu_uart_ops
= {
672 .tx_empty
= siu_tx_empty
,
673 .set_mctrl
= siu_set_mctrl
,
674 .get_mctrl
= siu_get_mctrl
,
675 .stop_tx
= siu_stop_tx
,
676 .start_tx
= siu_start_tx
,
677 .stop_rx
= siu_stop_rx
,
678 .enable_ms
= siu_enable_ms
,
679 .break_ctl
= siu_break_ctl
,
680 .startup
= siu_startup
,
681 .shutdown
= siu_shutdown
,
682 .set_termios
= siu_set_termios
,
685 .release_port
= siu_release_port
,
686 .request_port
= siu_request_port
,
687 .config_port
= siu_config_port
,
688 .verify_port
= siu_verify_port
,
691 static int siu_init_ports(struct platform_device
*pdev
)
693 struct uart_port
*port
;
694 struct resource
*res
;
695 int *type
= dev_get_platdata(&pdev
->dev
);
701 port
= siu_uart_ports
;
702 for (i
= 0; i
< SIU_PORTS_MAX
; i
++) {
703 port
->type
= type
[i
];
704 if (port
->type
== PORT_UNKNOWN
)
706 port
->irq
= platform_get_irq(pdev
, i
);
707 port
->uartclk
= SIU_BAUD_BASE
* 16;
710 port
->iotype
= UPIO_MEM
;
711 port
->flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
;
713 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, i
);
714 port
->mapbase
= res
->start
;
721 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
723 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
725 static void wait_for_xmitr(struct uart_port
*port
)
731 lsr
= siu_read(port
, UART_LSR
);
732 if (lsr
& UART_LSR_BI
)
733 lsr_break_flag
[port
->line
] = UART_LSR_BI
;
735 if ((lsr
& BOTH_EMPTY
) == BOTH_EMPTY
)
737 } while (timeout
-- > 0);
739 if (port
->flags
& UPF_CONS_FLOW
) {
743 msr
= siu_read(port
, UART_MSR
);
744 if ((msr
& UART_MSR_CTS
) != 0)
746 } while (timeout
-- > 0);
750 static void siu_console_putchar(struct uart_port
*port
, int ch
)
752 wait_for_xmitr(port
);
753 siu_write(port
, UART_TX
, ch
);
756 static void siu_console_write(struct console
*con
, const char *s
, unsigned count
)
758 struct uart_port
*port
;
761 port
= &siu_uart_ports
[con
->index
];
763 ier
= siu_read(port
, UART_IER
);
764 siu_write(port
, UART_IER
, 0);
766 uart_console_write(port
, s
, count
, siu_console_putchar
);
768 wait_for_xmitr(port
);
769 siu_write(port
, UART_IER
, ier
);
772 static int __init
siu_console_setup(struct console
*con
, char *options
)
774 struct uart_port
*port
;
780 if (con
->index
>= SIU_PORTS_MAX
)
783 port
= &siu_uart_ports
[con
->index
];
784 if (port
->membase
== NULL
) {
785 if (port
->mapbase
== 0)
787 port
->membase
= ioremap(port
->mapbase
, siu_port_size(port
));
790 if (port
->type
== PORT_VR41XX_SIU
)
791 vr41xx_select_siu_interface(SIU_INTERFACE_RS232C
);
794 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
796 return uart_set_options(port
, con
, baud
, parity
, bits
, flow
);
799 static struct uart_driver siu_uart_driver
;
801 static struct console siu_console
= {
803 .write
= siu_console_write
,
804 .device
= uart_console_device
,
805 .setup
= siu_console_setup
,
806 .flags
= CON_PRINTBUFFER
,
808 .data
= &siu_uart_driver
,
811 static int siu_console_init(void)
813 struct uart_port
*port
;
816 for (i
= 0; i
< SIU_PORTS_MAX
; i
++) {
817 port
= &siu_uart_ports
[i
];
818 port
->ops
= &siu_uart_ops
;
821 register_console(&siu_console
);
826 console_initcall(siu_console_init
);
828 void __init
vr41xx_siu_early_setup(struct uart_port
*port
)
830 if (port
->type
== PORT_UNKNOWN
)
833 siu_uart_ports
[port
->line
].line
= port
->line
;
834 siu_uart_ports
[port
->line
].type
= port
->type
;
835 siu_uart_ports
[port
->line
].uartclk
= SIU_BAUD_BASE
* 16;
836 siu_uart_ports
[port
->line
].mapbase
= port
->mapbase
;
837 siu_uart_ports
[port
->line
].ops
= &siu_uart_ops
;
840 #define SERIAL_VR41XX_CONSOLE &siu_console
842 #define SERIAL_VR41XX_CONSOLE NULL
845 static struct uart_driver siu_uart_driver
= {
846 .owner
= THIS_MODULE
,
847 .driver_name
= "SIU",
850 .minor
= SIU_MINOR_BASE
,
851 .cons
= SERIAL_VR41XX_CONSOLE
,
854 static int siu_probe(struct platform_device
*dev
)
856 struct uart_port
*port
;
859 num
= siu_init_ports(dev
);
863 siu_uart_driver
.nr
= num
;
864 retval
= uart_register_driver(&siu_uart_driver
);
868 for (i
= 0; i
< num
; i
++) {
869 port
= &siu_uart_ports
[i
];
870 port
->ops
= &siu_uart_ops
;
871 port
->dev
= &dev
->dev
;
873 retval
= uart_add_one_port(&siu_uart_driver
, port
);
880 if (i
== 0 && retval
< 0) {
881 uart_unregister_driver(&siu_uart_driver
);
888 static int siu_remove(struct platform_device
*dev
)
890 struct uart_port
*port
;
893 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
894 port
= &siu_uart_ports
[i
];
895 if (port
->dev
== &dev
->dev
) {
896 uart_remove_one_port(&siu_uart_driver
, port
);
901 uart_unregister_driver(&siu_uart_driver
);
906 static int siu_suspend(struct platform_device
*dev
, pm_message_t state
)
908 struct uart_port
*port
;
911 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
912 port
= &siu_uart_ports
[i
];
913 if ((port
->type
== PORT_VR41XX_SIU
||
914 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
915 uart_suspend_port(&siu_uart_driver
, port
);
922 static int siu_resume(struct platform_device
*dev
)
924 struct uart_port
*port
;
927 for (i
= 0; i
< siu_uart_driver
.nr
; i
++) {
928 port
= &siu_uart_ports
[i
];
929 if ((port
->type
== PORT_VR41XX_SIU
||
930 port
->type
== PORT_VR41XX_DSIU
) && port
->dev
== &dev
->dev
)
931 uart_resume_port(&siu_uart_driver
, port
);
937 static struct platform_driver siu_device_driver
= {
939 .remove
= siu_remove
,
940 .suspend
= siu_suspend
,
941 .resume
= siu_resume
,
947 module_platform_driver(siu_device_driver
);
949 MODULE_LICENSE("GPL");
950 MODULE_ALIAS("platform:SIU");