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mfd: wm8350-i2c: Make sure the i2c regmap functions are compiled
[linux/fpc-iii.git] / drivers / scsi / hpsa.c
blobf69a87b06c88758083adf251d5addd502cc085fc
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/kthread.h>
52 #include <linux/jiffies.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "3.4.0-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59 #define HPSA "hpsa"
60
61 /* How long to wait (in milliseconds) for board to go into simple mode */
62 #define MAX_CONFIG_WAIT 30000
63 #define MAX_IOCTL_CONFIG_WAIT 1000
64
65 /*define how many times we will try a command because of bus resets */
66 #define MAX_CMD_RETRIES 3
67
68 /* Embedded module documentation macros - see modules.h */
69 MODULE_AUTHOR("Hewlett-Packard Company");
70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73 MODULE_VERSION(HPSA_DRIVER_VERSION);
74 MODULE_LICENSE("GPL");
75
76 static int hpsa_allow_any;
77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78 MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
80 static int hpsa_simple_mode;
81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
84
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id hpsa_pci_device_id[] = {
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334D},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
123 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
124 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
125 {0,}
126 };
127
128 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
129
130 /* board_id = Subsystem Device ID & Vendor ID
131 * product = Marketing Name for the board
132 * access = Address of the struct of function pointers
133 */
134 static struct board_type products[] = {
135 {0x3241103C, "Smart Array P212", &SA5_access},
136 {0x3243103C, "Smart Array P410", &SA5_access},
137 {0x3245103C, "Smart Array P410i", &SA5_access},
138 {0x3247103C, "Smart Array P411", &SA5_access},
139 {0x3249103C, "Smart Array P812", &SA5_access},
140 {0x324A103C, "Smart Array P712m", &SA5_access},
141 {0x324B103C, "Smart Array P711m", &SA5_access},
142 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
143 {0x3350103C, "Smart Array P222", &SA5_access},
144 {0x3351103C, "Smart Array P420", &SA5_access},
145 {0x3352103C, "Smart Array P421", &SA5_access},
146 {0x3353103C, "Smart Array P822", &SA5_access},
147 {0x334D103C, "Smart Array P822se", &SA5_access},
148 {0x3354103C, "Smart Array P420i", &SA5_access},
149 {0x3355103C, "Smart Array P220i", &SA5_access},
150 {0x3356103C, "Smart Array P721m", &SA5_access},
151 {0x1921103C, "Smart Array P830i", &SA5_access},
152 {0x1922103C, "Smart Array P430", &SA5_access},
153 {0x1923103C, "Smart Array P431", &SA5_access},
154 {0x1924103C, "Smart Array P830", &SA5_access},
155 {0x1926103C, "Smart Array P731m", &SA5_access},
156 {0x1928103C, "Smart Array P230i", &SA5_access},
157 {0x1929103C, "Smart Array P530", &SA5_access},
158 {0x21BD103C, "Smart Array", &SA5_access},
159 {0x21BE103C, "Smart Array", &SA5_access},
160 {0x21BF103C, "Smart Array", &SA5_access},
161 {0x21C0103C, "Smart Array", &SA5_access},
162 {0x21C1103C, "Smart Array", &SA5_access},
163 {0x21C2103C, "Smart Array", &SA5_access},
164 {0x21C3103C, "Smart Array", &SA5_access},
165 {0x21C4103C, "Smart Array", &SA5_access},
166 {0x21C5103C, "Smart Array", &SA5_access},
167 {0x21C7103C, "Smart Array", &SA5_access},
168 {0x21C8103C, "Smart Array", &SA5_access},
169 {0x21C9103C, "Smart Array", &SA5_access},
170 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
171 };
172
173 static int number_of_controllers;
174
175 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
176 static spinlock_t lockup_detector_lock;
177 static struct task_struct *hpsa_lockup_detector;
178
179 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
180 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
181 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
182 static void start_io(struct ctlr_info *h);
183
184 #ifdef CONFIG_COMPAT
185 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
186 #endif
187
188 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
189 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
190 static struct CommandList *cmd_alloc(struct ctlr_info *h);
191 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
192 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
193 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
194 int cmd_type);
195
196 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
197 static void hpsa_scan_start(struct Scsi_Host *);
198 static int hpsa_scan_finished(struct Scsi_Host *sh,
199 unsigned long elapsed_time);
200 static int hpsa_change_queue_depth(struct scsi_device *sdev,
201 int qdepth, int reason);
202
203 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
204 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
205 static int hpsa_slave_alloc(struct scsi_device *sdev);
206 static void hpsa_slave_destroy(struct scsi_device *sdev);
207
208 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
209 static int check_for_unit_attention(struct ctlr_info *h,
210 struct CommandList *c);
211 static void check_ioctl_unit_attention(struct ctlr_info *h,
212 struct CommandList *c);
213 /* performant mode helper functions */
214 static void calc_bucket_map(int *bucket, int num_buckets,
215 int nsgs, int *bucket_map);
216 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
217 static inline u32 next_command(struct ctlr_info *h, u8 q);
218 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
219 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
220 u64 *cfg_offset);
221 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
222 unsigned long *memory_bar);
223 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
224 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
225 int wait_for_ready);
226 static inline void finish_cmd(struct CommandList *c);
227 #define BOARD_NOT_READY 0
228 #define BOARD_READY 1
229
230 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
231 {
232 unsigned long *priv = shost_priv(sdev->host);
233 return (struct ctlr_info *) *priv;
234 }
235
236 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
237 {
238 unsigned long *priv = shost_priv(sh);
239 return (struct ctlr_info *) *priv;
240 }
241
242 static int check_for_unit_attention(struct ctlr_info *h,
243 struct CommandList *c)
244 {
245 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
246 return 0;
247
248 switch (c->err_info->SenseInfo[12]) {
249 case STATE_CHANGED:
250 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
251 "detected, command retried\n", h->ctlr);
252 break;
253 case LUN_FAILED:
254 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
255 "detected, action required\n", h->ctlr);
256 break;
257 case REPORT_LUNS_CHANGED:
258 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
259 "changed, action required\n", h->ctlr);
260 /*
261 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
262 * target (array) devices.
263 */
264 break;
265 case POWER_OR_RESET:
266 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
267 "or device reset detected\n", h->ctlr);
268 break;
269 case UNIT_ATTENTION_CLEARED:
270 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
271 "cleared by another initiator\n", h->ctlr);
272 break;
273 default:
274 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
275 "unit attention detected\n", h->ctlr);
276 break;
277 }
278 return 1;
279 }
280
281 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
282 {
283 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
284 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
285 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
286 return 0;
287 dev_warn(&h->pdev->dev, HPSA "device busy");
288 return 1;
289 }
290
291 static ssize_t host_store_rescan(struct device *dev,
292 struct device_attribute *attr,
293 const char *buf, size_t count)
294 {
295 struct ctlr_info *h;
296 struct Scsi_Host *shost = class_to_shost(dev);
297 h = shost_to_hba(shost);
298 hpsa_scan_start(h->scsi_host);
299 return count;
300 }
301
302 static ssize_t host_show_firmware_revision(struct device *dev,
303 struct device_attribute *attr, char *buf)
304 {
305 struct ctlr_info *h;
306 struct Scsi_Host *shost = class_to_shost(dev);
307 unsigned char *fwrev;
308
309 h = shost_to_hba(shost);
310 if (!h->hba_inquiry_data)
311 return 0;
312 fwrev = &h->hba_inquiry_data[32];
313 return snprintf(buf, 20, "%c%c%c%c\n",
314 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
315 }
316
317 static ssize_t host_show_commands_outstanding(struct device *dev,
318 struct device_attribute *attr, char *buf)
319 {
320 struct Scsi_Host *shost = class_to_shost(dev);
321 struct ctlr_info *h = shost_to_hba(shost);
322
323 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
324 }
325
326 static ssize_t host_show_transport_mode(struct device *dev,
327 struct device_attribute *attr, char *buf)
328 {
329 struct ctlr_info *h;
330 struct Scsi_Host *shost = class_to_shost(dev);
331
332 h = shost_to_hba(shost);
333 return snprintf(buf, 20, "%s\n",
334 h->transMethod & CFGTBL_Trans_Performant ?
335 "performant" : "simple");
336 }
337
338 /* List of controllers which cannot be hard reset on kexec with reset_devices */
339 static u32 unresettable_controller[] = {
340 0x324a103C, /* Smart Array P712m */
341 0x324b103C, /* SmartArray P711m */
342 0x3223103C, /* Smart Array P800 */
343 0x3234103C, /* Smart Array P400 */
344 0x3235103C, /* Smart Array P400i */
345 0x3211103C, /* Smart Array E200i */
346 0x3212103C, /* Smart Array E200 */
347 0x3213103C, /* Smart Array E200i */
348 0x3214103C, /* Smart Array E200i */
349 0x3215103C, /* Smart Array E200i */
350 0x3237103C, /* Smart Array E500 */
351 0x323D103C, /* Smart Array P700m */
352 0x40800E11, /* Smart Array 5i */
353 0x409C0E11, /* Smart Array 6400 */
354 0x409D0E11, /* Smart Array 6400 EM */
355 0x40700E11, /* Smart Array 5300 */
356 0x40820E11, /* Smart Array 532 */
357 0x40830E11, /* Smart Array 5312 */
358 0x409A0E11, /* Smart Array 641 */
359 0x409B0E11, /* Smart Array 642 */
360 0x40910E11, /* Smart Array 6i */
361 };
362
363 /* List of controllers which cannot even be soft reset */
364 static u32 soft_unresettable_controller[] = {
365 0x40800E11, /* Smart Array 5i */
366 0x40700E11, /* Smart Array 5300 */
367 0x40820E11, /* Smart Array 532 */
368 0x40830E11, /* Smart Array 5312 */
369 0x409A0E11, /* Smart Array 641 */
370 0x409B0E11, /* Smart Array 642 */
371 0x40910E11, /* Smart Array 6i */
372 /* Exclude 640x boards. These are two pci devices in one slot
373 * which share a battery backed cache module. One controls the
374 * cache, the other accesses the cache through the one that controls
375 * it. If we reset the one controlling the cache, the other will
376 * likely not be happy. Just forbid resetting this conjoined mess.
377 * The 640x isn't really supported by hpsa anyway.
378 */
379 0x409C0E11, /* Smart Array 6400 */
380 0x409D0E11, /* Smart Array 6400 EM */
381 };
382
383 static int ctlr_is_hard_resettable(u32 board_id)
384 {
385 int i;
386
387 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
388 if (unresettable_controller[i] == board_id)
389 return 0;
390 return 1;
391 }
392
393 static int ctlr_is_soft_resettable(u32 board_id)
394 {
395 int i;
396
397 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
398 if (soft_unresettable_controller[i] == board_id)
399 return 0;
400 return 1;
401 }
402
403 static int ctlr_is_resettable(u32 board_id)
404 {
405 return ctlr_is_hard_resettable(board_id) ||
406 ctlr_is_soft_resettable(board_id);
407 }
408
409 static ssize_t host_show_resettable(struct device *dev,
410 struct device_attribute *attr, char *buf)
411 {
412 struct ctlr_info *h;
413 struct Scsi_Host *shost = class_to_shost(dev);
414
415 h = shost_to_hba(shost);
416 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
417 }
418
419 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
420 {
421 return (scsi3addr[3] & 0xC0) == 0x40;
422 }
423
424 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
425 "1(ADM)", "UNKNOWN"
426 };
427 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
428
429 static ssize_t raid_level_show(struct device *dev,
430 struct device_attribute *attr, char *buf)
431 {
432 ssize_t l = 0;
433 unsigned char rlevel;
434 struct ctlr_info *h;
435 struct scsi_device *sdev;
436 struct hpsa_scsi_dev_t *hdev;
437 unsigned long flags;
438
439 sdev = to_scsi_device(dev);
440 h = sdev_to_hba(sdev);
441 spin_lock_irqsave(&h->lock, flags);
442 hdev = sdev->hostdata;
443 if (!hdev) {
444 spin_unlock_irqrestore(&h->lock, flags);
445 return -ENODEV;
446 }
447
448 /* Is this even a logical drive? */
449 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
450 spin_unlock_irqrestore(&h->lock, flags);
451 l = snprintf(buf, PAGE_SIZE, "N/A\n");
452 return l;
453 }
454
455 rlevel = hdev->raid_level;
456 spin_unlock_irqrestore(&h->lock, flags);
457 if (rlevel > RAID_UNKNOWN)
458 rlevel = RAID_UNKNOWN;
459 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
460 return l;
461 }
462
463 static ssize_t lunid_show(struct device *dev,
464 struct device_attribute *attr, char *buf)
465 {
466 struct ctlr_info *h;
467 struct scsi_device *sdev;
468 struct hpsa_scsi_dev_t *hdev;
469 unsigned long flags;
470 unsigned char lunid[8];
471
472 sdev = to_scsi_device(dev);
473 h = sdev_to_hba(sdev);
474 spin_lock_irqsave(&h->lock, flags);
475 hdev = sdev->hostdata;
476 if (!hdev) {
477 spin_unlock_irqrestore(&h->lock, flags);
478 return -ENODEV;
479 }
480 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
481 spin_unlock_irqrestore(&h->lock, flags);
482 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
483 lunid[0], lunid[1], lunid[2], lunid[3],
484 lunid[4], lunid[5], lunid[6], lunid[7]);
485 }
486
487 static ssize_t unique_id_show(struct device *dev,
488 struct device_attribute *attr, char *buf)
489 {
490 struct ctlr_info *h;
491 struct scsi_device *sdev;
492 struct hpsa_scsi_dev_t *hdev;
493 unsigned long flags;
494 unsigned char sn[16];
495
496 sdev = to_scsi_device(dev);
497 h = sdev_to_hba(sdev);
498 spin_lock_irqsave(&h->lock, flags);
499 hdev = sdev->hostdata;
500 if (!hdev) {
501 spin_unlock_irqrestore(&h->lock, flags);
502 return -ENODEV;
503 }
504 memcpy(sn, hdev->device_id, sizeof(sn));
505 spin_unlock_irqrestore(&h->lock, flags);
506 return snprintf(buf, 16 * 2 + 2,
507 "%02X%02X%02X%02X%02X%02X%02X%02X"
508 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
509 sn[0], sn[1], sn[2], sn[3],
510 sn[4], sn[5], sn[6], sn[7],
511 sn[8], sn[9], sn[10], sn[11],
512 sn[12], sn[13], sn[14], sn[15]);
513 }
514
515 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
516 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
517 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
518 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
519 static DEVICE_ATTR(firmware_revision, S_IRUGO,
520 host_show_firmware_revision, NULL);
521 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
522 host_show_commands_outstanding, NULL);
523 static DEVICE_ATTR(transport_mode, S_IRUGO,
524 host_show_transport_mode, NULL);
525 static DEVICE_ATTR(resettable, S_IRUGO,
526 host_show_resettable, NULL);
527
528 static struct device_attribute *hpsa_sdev_attrs[] = {
529 &dev_attr_raid_level,
530 &dev_attr_lunid,
531 &dev_attr_unique_id,
532 NULL,
533 };
534
535 static struct device_attribute *hpsa_shost_attrs[] = {
536 &dev_attr_rescan,
537 &dev_attr_firmware_revision,
538 &dev_attr_commands_outstanding,
539 &dev_attr_transport_mode,
540 &dev_attr_resettable,
541 NULL,
542 };
543
544 static struct scsi_host_template hpsa_driver_template = {
545 .module = THIS_MODULE,
546 .name = HPSA,
547 .proc_name = HPSA,
548 .queuecommand = hpsa_scsi_queue_command,
549 .scan_start = hpsa_scan_start,
550 .scan_finished = hpsa_scan_finished,
551 .change_queue_depth = hpsa_change_queue_depth,
552 .this_id = -1,
553 .use_clustering = ENABLE_CLUSTERING,
554 .eh_abort_handler = hpsa_eh_abort_handler,
555 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
556 .ioctl = hpsa_ioctl,
557 .slave_alloc = hpsa_slave_alloc,
558 .slave_destroy = hpsa_slave_destroy,
559 #ifdef CONFIG_COMPAT
560 .compat_ioctl = hpsa_compat_ioctl,
561 #endif
562 .sdev_attrs = hpsa_sdev_attrs,
563 .shost_attrs = hpsa_shost_attrs,
564 .max_sectors = 8192,
565 .no_write_same = 1,
566 };
567
568
569 /* Enqueuing and dequeuing functions for cmdlists. */
570 static inline void addQ(struct list_head *list, struct CommandList *c)
571 {
572 list_add_tail(&c->list, list);
573 }
574
575 static inline u32 next_command(struct ctlr_info *h, u8 q)
576 {
577 u32 a;
578 struct reply_pool *rq = &h->reply_queue[q];
579 unsigned long flags;
580
581 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
582 return h->access.command_completed(h, q);
583
584 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
585 a = rq->head[rq->current_entry];
586 rq->current_entry++;
587 spin_lock_irqsave(&h->lock, flags);
588 h->commands_outstanding--;
589 spin_unlock_irqrestore(&h->lock, flags);
590 } else {
591 a = FIFO_EMPTY;
592 }
593 /* Check for wraparound */
594 if (rq->current_entry == h->max_commands) {
595 rq->current_entry = 0;
596 rq->wraparound ^= 1;
597 }
598 return a;
599 }
600
601 /* set_performant_mode: Modify the tag for cciss performant
602 * set bit 0 for pull model, bits 3-1 for block fetch
603 * register number
604 */
605 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
606 {
607 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
608 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
609 if (likely(h->msix_vector))
610 c->Header.ReplyQueue =
611 raw_smp_processor_id() % h->nreply_queues;
612 }
613 }
614
615 static int is_firmware_flash_cmd(u8 *cdb)
616 {
617 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
618 }
619
620 /*
621 * During firmware flash, the heartbeat register may not update as frequently
622 * as it should. So we dial down lockup detection during firmware flash. and
623 * dial it back up when firmware flash completes.
624 */
625 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
626 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
627 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
628 struct CommandList *c)
629 {
630 if (!is_firmware_flash_cmd(c->Request.CDB))
631 return;
632 atomic_inc(&h->firmware_flash_in_progress);
633 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
634 }
635
636 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
637 struct CommandList *c)
638 {
639 if (is_firmware_flash_cmd(c->Request.CDB) &&
640 atomic_dec_and_test(&h->firmware_flash_in_progress))
641 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
642 }
643
644 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
645 struct CommandList *c)
646 {
647 unsigned long flags;
648
649 set_performant_mode(h, c);
650 dial_down_lockup_detection_during_fw_flash(h, c);
651 spin_lock_irqsave(&h->lock, flags);
652 addQ(&h->reqQ, c);
653 h->Qdepth++;
654 spin_unlock_irqrestore(&h->lock, flags);
655 start_io(h);
656 }
657
658 static inline void removeQ(struct CommandList *c)
659 {
660 if (WARN_ON(list_empty(&c->list)))
661 return;
662 list_del_init(&c->list);
663 }
664
665 static inline int is_hba_lunid(unsigned char scsi3addr[])
666 {
667 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
668 }
669
670 static inline int is_scsi_rev_5(struct ctlr_info *h)
671 {
672 if (!h->hba_inquiry_data)
673 return 0;
674 if ((h->hba_inquiry_data[2] & 0x07) == 5)
675 return 1;
676 return 0;
677 }
678
679 static int hpsa_find_target_lun(struct ctlr_info *h,
680 unsigned char scsi3addr[], int bus, int *target, int *lun)
681 {
682 /* finds an unused bus, target, lun for a new physical device
683 * assumes h->devlock is held
684 */
685 int i, found = 0;
686 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
687
688 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
689
690 for (i = 0; i < h->ndevices; i++) {
691 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
692 __set_bit(h->dev[i]->target, lun_taken);
693 }
694
695 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
696 if (i < HPSA_MAX_DEVICES) {
697 /* *bus = 1; */
698 *target = i;
699 *lun = 0;
700 found = 1;
701 }
702 return !found;
703 }
704
705 /* Add an entry into h->dev[] array. */
706 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
707 struct hpsa_scsi_dev_t *device,
708 struct hpsa_scsi_dev_t *added[], int *nadded)
709 {
710 /* assumes h->devlock is held */
711 int n = h->ndevices;
712 int i;
713 unsigned char addr1[8], addr2[8];
714 struct hpsa_scsi_dev_t *sd;
715
716 if (n >= HPSA_MAX_DEVICES) {
717 dev_err(&h->pdev->dev, "too many devices, some will be "
718 "inaccessible.\n");
719 return -1;
720 }
721
722 /* physical devices do not have lun or target assigned until now. */
723 if (device->lun != -1)
724 /* Logical device, lun is already assigned. */
725 goto lun_assigned;
726
727 /* If this device a non-zero lun of a multi-lun device
728 * byte 4 of the 8-byte LUN addr will contain the logical
729 * unit no, zero otherise.
730 */
731 if (device->scsi3addr[4] == 0) {
732 /* This is not a non-zero lun of a multi-lun device */
733 if (hpsa_find_target_lun(h, device->scsi3addr,
734 device->bus, &device->target, &device->lun) != 0)
735 return -1;
736 goto lun_assigned;
737 }
738
739 /* This is a non-zero lun of a multi-lun device.
740 * Search through our list and find the device which
741 * has the same 8 byte LUN address, excepting byte 4.
742 * Assign the same bus and target for this new LUN.
743 * Use the logical unit number from the firmware.
744 */
745 memcpy(addr1, device->scsi3addr, 8);
746 addr1[4] = 0;
747 for (i = 0; i < n; i++) {
748 sd = h->dev[i];
749 memcpy(addr2, sd->scsi3addr, 8);
750 addr2[4] = 0;
751 /* differ only in byte 4? */
752 if (memcmp(addr1, addr2, 8) == 0) {
753 device->bus = sd->bus;
754 device->target = sd->target;
755 device->lun = device->scsi3addr[4];
756 break;
757 }
758 }
759 if (device->lun == -1) {
760 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
761 " suspect firmware bug or unsupported hardware "
762 "configuration.\n");
763 return -1;
764 }
765
766 lun_assigned:
767
768 h->dev[n] = device;
769 h->ndevices++;
770 added[*nadded] = device;
771 (*nadded)++;
772
773 /* initially, (before registering with scsi layer) we don't
774 * know our hostno and we don't want to print anything first
775 * time anyway (the scsi layer's inquiries will show that info)
776 */
777 /* if (hostno != -1) */
778 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
779 scsi_device_type(device->devtype), hostno,
780 device->bus, device->target, device->lun);
781 return 0;
782 }
783
784 /* Update an entry in h->dev[] array. */
785 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
786 int entry, struct hpsa_scsi_dev_t *new_entry)
787 {
788 /* assumes h->devlock is held */
789 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
790
791 /* Raid level changed. */
792 h->dev[entry]->raid_level = new_entry->raid_level;
793 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
794 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
795 new_entry->target, new_entry->lun);
796 }
797
798 /* Replace an entry from h->dev[] array. */
799 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
800 int entry, struct hpsa_scsi_dev_t *new_entry,
801 struct hpsa_scsi_dev_t *added[], int *nadded,
802 struct hpsa_scsi_dev_t *removed[], int *nremoved)
803 {
804 /* assumes h->devlock is held */
805 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
806 removed[*nremoved] = h->dev[entry];
807 (*nremoved)++;
808
809 /*
810 * New physical devices won't have target/lun assigned yet
811 * so we need to preserve the values in the slot we are replacing.
812 */
813 if (new_entry->target == -1) {
814 new_entry->target = h->dev[entry]->target;
815 new_entry->lun = h->dev[entry]->lun;
816 }
817
818 h->dev[entry] = new_entry;
819 added[*nadded] = new_entry;
820 (*nadded)++;
821 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
822 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
823 new_entry->target, new_entry->lun);
824 }
825
826 /* Remove an entry from h->dev[] array. */
827 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
828 struct hpsa_scsi_dev_t *removed[], int *nremoved)
829 {
830 /* assumes h->devlock is held */
831 int i;
832 struct hpsa_scsi_dev_t *sd;
833
834 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
835
836 sd = h->dev[entry];
837 removed[*nremoved] = h->dev[entry];
838 (*nremoved)++;
839
840 for (i = entry; i < h->ndevices-1; i++)
841 h->dev[i] = h->dev[i+1];
842 h->ndevices--;
843 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
844 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
845 sd->lun);
846 }
847
848 #define SCSI3ADDR_EQ(a, b) ( \
849 (a)[7] == (b)[7] && \
850 (a)[6] == (b)[6] && \
851 (a)[5] == (b)[5] && \
852 (a)[4] == (b)[4] && \
853 (a)[3] == (b)[3] && \
854 (a)[2] == (b)[2] && \
855 (a)[1] == (b)[1] && \
856 (a)[0] == (b)[0])
857
858 static void fixup_botched_add(struct ctlr_info *h,
859 struct hpsa_scsi_dev_t *added)
860 {
861 /* called when scsi_add_device fails in order to re-adjust
862 * h->dev[] to match the mid layer's view.
863 */
864 unsigned long flags;
865 int i, j;
866
867 spin_lock_irqsave(&h->lock, flags);
868 for (i = 0; i < h->ndevices; i++) {
869 if (h->dev[i] == added) {
870 for (j = i; j < h->ndevices-1; j++)
871 h->dev[j] = h->dev[j+1];
872 h->ndevices--;
873 break;
874 }
875 }
876 spin_unlock_irqrestore(&h->lock, flags);
877 kfree(added);
878 }
879
880 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
881 struct hpsa_scsi_dev_t *dev2)
882 {
883 /* we compare everything except lun and target as these
884 * are not yet assigned. Compare parts likely
885 * to differ first
886 */
887 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
888 sizeof(dev1->scsi3addr)) != 0)
889 return 0;
890 if (memcmp(dev1->device_id, dev2->device_id,
891 sizeof(dev1->device_id)) != 0)
892 return 0;
893 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
894 return 0;
895 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
896 return 0;
897 if (dev1->devtype != dev2->devtype)
898 return 0;
899 if (dev1->bus != dev2->bus)
900 return 0;
901 return 1;
902 }
903
904 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
905 struct hpsa_scsi_dev_t *dev2)
906 {
907 /* Device attributes that can change, but don't mean
908 * that the device is a different device, nor that the OS
909 * needs to be told anything about the change.
910 */
911 if (dev1->raid_level != dev2->raid_level)
912 return 1;
913 return 0;
914 }
915
916 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
917 * and return needle location in *index. If scsi3addr matches, but not
918 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
919 * location in *index.
920 * In the case of a minor device attribute change, such as RAID level, just
921 * return DEVICE_UPDATED, along with the updated device's location in index.
922 * If needle not found, return DEVICE_NOT_FOUND.
923 */
924 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
925 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
926 int *index)
927 {
928 int i;
929 #define DEVICE_NOT_FOUND 0
930 #define DEVICE_CHANGED 1
931 #define DEVICE_SAME 2
932 #define DEVICE_UPDATED 3
933 for (i = 0; i < haystack_size; i++) {
934 if (haystack[i] == NULL) /* previously removed. */
935 continue;
936 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
937 *index = i;
938 if (device_is_the_same(needle, haystack[i])) {
939 if (device_updated(needle, haystack[i]))
940 return DEVICE_UPDATED;
941 return DEVICE_SAME;
942 } else {
943 return DEVICE_CHANGED;
944 }
945 }
946 }
947 *index = -1;
948 return DEVICE_NOT_FOUND;
949 }
950
951 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
952 struct hpsa_scsi_dev_t *sd[], int nsds)
953 {
954 /* sd contains scsi3 addresses and devtypes, and inquiry
955 * data. This function takes what's in sd to be the current
956 * reality and updates h->dev[] to reflect that reality.
957 */
958 int i, entry, device_change, changes = 0;
959 struct hpsa_scsi_dev_t *csd;
960 unsigned long flags;
961 struct hpsa_scsi_dev_t **added, **removed;
962 int nadded, nremoved;
963 struct Scsi_Host *sh = NULL;
964
965 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
966 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
967
968 if (!added || !removed) {
969 dev_warn(&h->pdev->dev, "out of memory in "
970 "adjust_hpsa_scsi_table\n");
971 goto free_and_out;
972 }
973
974 spin_lock_irqsave(&h->devlock, flags);
975
976 /* find any devices in h->dev[] that are not in
977 * sd[] and remove them from h->dev[], and for any
978 * devices which have changed, remove the old device
979 * info and add the new device info.
980 * If minor device attributes change, just update
981 * the existing device structure.
982 */
983 i = 0;
984 nremoved = 0;
985 nadded = 0;
986 while (i < h->ndevices) {
987 csd = h->dev[i];
988 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
989 if (device_change == DEVICE_NOT_FOUND) {
990 changes++;
991 hpsa_scsi_remove_entry(h, hostno, i,
992 removed, &nremoved);
993 continue; /* remove ^^^, hence i not incremented */
994 } else if (device_change == DEVICE_CHANGED) {
995 changes++;
996 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
997 added, &nadded, removed, &nremoved);
998 /* Set it to NULL to prevent it from being freed
999 * at the bottom of hpsa_update_scsi_devices()
1000 */
1001 sd[entry] = NULL;
1002 } else if (device_change == DEVICE_UPDATED) {
1003 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1004 }
1005 i++;
1006 }
1007
1008 /* Now, make sure every device listed in sd[] is also
1009 * listed in h->dev[], adding them if they aren't found
1010 */
1011
1012 for (i = 0; i < nsds; i++) {
1013 if (!sd[i]) /* if already added above. */
1014 continue;
1015 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1016 h->ndevices, &entry);
1017 if (device_change == DEVICE_NOT_FOUND) {
1018 changes++;
1019 if (hpsa_scsi_add_entry(h, hostno, sd[i],
1020 added, &nadded) != 0)
1021 break;
1022 sd[i] = NULL; /* prevent from being freed later. */
1023 } else if (device_change == DEVICE_CHANGED) {
1024 /* should never happen... */
1025 changes++;
1026 dev_warn(&h->pdev->dev,
1027 "device unexpectedly changed.\n");
1028 /* but if it does happen, we just ignore that device */
1029 }
1030 }
1031 spin_unlock_irqrestore(&h->devlock, flags);
1032
1033 /* Don't notify scsi mid layer of any changes the first time through
1034 * (or if there are no changes) scsi_scan_host will do it later the
1035 * first time through.
1036 */
1037 if (hostno == -1 || !changes)
1038 goto free_and_out;
1039
1040 sh = h->scsi_host;
1041 /* Notify scsi mid layer of any removed devices */
1042 for (i = 0; i < nremoved; i++) {
1043 struct scsi_device *sdev =
1044 scsi_device_lookup(sh, removed[i]->bus,
1045 removed[i]->target, removed[i]->lun);
1046 if (sdev != NULL) {
1047 scsi_remove_device(sdev);
1048 scsi_device_put(sdev);
1049 } else {
1050 /* We don't expect to get here.
1051 * future cmds to this device will get selection
1052 * timeout as if the device was gone.
1053 */
1054 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1055 " for removal.", hostno, removed[i]->bus,
1056 removed[i]->target, removed[i]->lun);
1057 }
1058 kfree(removed[i]);
1059 removed[i] = NULL;
1060 }
1061
1062 /* Notify scsi mid layer of any added devices */
1063 for (i = 0; i < nadded; i++) {
1064 if (scsi_add_device(sh, added[i]->bus,
1065 added[i]->target, added[i]->lun) == 0)
1066 continue;
1067 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1068 "device not added.\n", hostno, added[i]->bus,
1069 added[i]->target, added[i]->lun);
1070 /* now we have to remove it from h->dev,
1071 * since it didn't get added to scsi mid layer
1072 */
1073 fixup_botched_add(h, added[i]);
1074 }
1075
1076 free_and_out:
1077 kfree(added);
1078 kfree(removed);
1079 }
1080
1081 /*
1082 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1083 * Assume's h->devlock is held.
1084 */
1085 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1086 int bus, int target, int lun)
1087 {
1088 int i;
1089 struct hpsa_scsi_dev_t *sd;
1090
1091 for (i = 0; i < h->ndevices; i++) {
1092 sd = h->dev[i];
1093 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1094 return sd;
1095 }
1096 return NULL;
1097 }
1098
1099 /* link sdev->hostdata to our per-device structure. */
1100 static int hpsa_slave_alloc(struct scsi_device *sdev)
1101 {
1102 struct hpsa_scsi_dev_t *sd;
1103 unsigned long flags;
1104 struct ctlr_info *h;
1105
1106 h = sdev_to_hba(sdev);
1107 spin_lock_irqsave(&h->devlock, flags);
1108 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1109 sdev_id(sdev), sdev->lun);
1110 if (sd != NULL)
1111 sdev->hostdata = sd;
1112 spin_unlock_irqrestore(&h->devlock, flags);
1113 return 0;
1114 }
1115
1116 static void hpsa_slave_destroy(struct scsi_device *sdev)
1117 {
1118 /* nothing to do. */
1119 }
1120
1121 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1122 {
1123 int i;
1124
1125 if (!h->cmd_sg_list)
1126 return;
1127 for (i = 0; i < h->nr_cmds; i++) {
1128 kfree(h->cmd_sg_list[i]);
1129 h->cmd_sg_list[i] = NULL;
1130 }
1131 kfree(h->cmd_sg_list);
1132 h->cmd_sg_list = NULL;
1133 }
1134
1135 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1136 {
1137 int i;
1138
1139 if (h->chainsize <= 0)
1140 return 0;
1141
1142 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1143 GFP_KERNEL);
1144 if (!h->cmd_sg_list)
1145 return -ENOMEM;
1146 for (i = 0; i < h->nr_cmds; i++) {
1147 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1148 h->chainsize, GFP_KERNEL);
1149 if (!h->cmd_sg_list[i])
1150 goto clean;
1151 }
1152 return 0;
1153
1154 clean:
1155 hpsa_free_sg_chain_blocks(h);
1156 return -ENOMEM;
1157 }
1158
1159 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1160 struct CommandList *c)
1161 {
1162 struct SGDescriptor *chain_sg, *chain_block;
1163 u64 temp64;
1164
1165 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1166 chain_block = h->cmd_sg_list[c->cmdindex];
1167 chain_sg->Ext = HPSA_SG_CHAIN;
1168 chain_sg->Len = sizeof(*chain_sg) *
1169 (c->Header.SGTotal - h->max_cmd_sg_entries);
1170 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1171 PCI_DMA_TODEVICE);
1172 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1173 /* prevent subsequent unmapping */
1174 chain_sg->Addr.lower = 0;
1175 chain_sg->Addr.upper = 0;
1176 return -1;
1177 }
1178 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1179 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1180 return 0;
1181 }
1182
1183 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1184 struct CommandList *c)
1185 {
1186 struct SGDescriptor *chain_sg;
1187 union u64bit temp64;
1188
1189 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1190 return;
1191
1192 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1193 temp64.val32.lower = chain_sg->Addr.lower;
1194 temp64.val32.upper = chain_sg->Addr.upper;
1195 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1196 }
1197
1198 static void complete_scsi_command(struct CommandList *cp)
1199 {
1200 struct scsi_cmnd *cmd;
1201 struct ctlr_info *h;
1202 struct ErrorInfo *ei;
1203
1204 unsigned char sense_key;
1205 unsigned char asc; /* additional sense code */
1206 unsigned char ascq; /* additional sense code qualifier */
1207 unsigned long sense_data_size;
1208
1209 ei = cp->err_info;
1210 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1211 h = cp->h;
1212
1213 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1214 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1215 hpsa_unmap_sg_chain_block(h, cp);
1216
1217 cmd->result = (DID_OK << 16); /* host byte */
1218 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1219 cmd->result |= ei->ScsiStatus;
1220
1221 /* copy the sense data whether we need to or not. */
1222 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1223 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1224 else
1225 sense_data_size = sizeof(ei->SenseInfo);
1226 if (ei->SenseLen < sense_data_size)
1227 sense_data_size = ei->SenseLen;
1228
1229 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1230 scsi_set_resid(cmd, ei->ResidualCnt);
1231
1232 if (ei->CommandStatus == 0) {
1233 cmd_free(h, cp);
1234 cmd->scsi_done(cmd);
1235 return;
1236 }
1237
1238 /* an error has occurred */
1239 switch (ei->CommandStatus) {
1240
1241 case CMD_TARGET_STATUS:
1242 if (ei->ScsiStatus) {
1243 /* Get sense key */
1244 sense_key = 0xf & ei->SenseInfo[2];
1245 /* Get additional sense code */
1246 asc = ei->SenseInfo[12];
1247 /* Get addition sense code qualifier */
1248 ascq = ei->SenseInfo[13];
1249 }
1250
1251 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1252 if (check_for_unit_attention(h, cp)) {
1253 cmd->result = DID_SOFT_ERROR << 16;
1254 break;
1255 }
1256 if (sense_key == ILLEGAL_REQUEST) {
1257 /*
1258 * SCSI REPORT_LUNS is commonly unsupported on
1259 * Smart Array. Suppress noisy complaint.
1260 */
1261 if (cp->Request.CDB[0] == REPORT_LUNS)
1262 break;
1263
1264 /* If ASC/ASCQ indicate Logical Unit
1265 * Not Supported condition,
1266 */
1267 if ((asc == 0x25) && (ascq == 0x0)) {
1268 dev_warn(&h->pdev->dev, "cp %p "
1269 "has check condition\n", cp);
1270 break;
1271 }
1272 }
1273
1274 if (sense_key == NOT_READY) {
1275 /* If Sense is Not Ready, Logical Unit
1276 * Not ready, Manual Intervention
1277 * required
1278 */
1279 if ((asc == 0x04) && (ascq == 0x03)) {
1280 dev_warn(&h->pdev->dev, "cp %p "
1281 "has check condition: unit "
1282 "not ready, manual "
1283 "intervention required\n", cp);
1284 break;
1285 }
1286 }
1287 if (sense_key == ABORTED_COMMAND) {
1288 /* Aborted command is retryable */
1289 dev_warn(&h->pdev->dev, "cp %p "
1290 "has check condition: aborted command: "
1291 "ASC: 0x%x, ASCQ: 0x%x\n",
1292 cp, asc, ascq);
1293 cmd->result |= DID_SOFT_ERROR << 16;
1294 break;
1295 }
1296 /* Must be some other type of check condition */
1297 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1298 "unknown type: "
1299 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1300 "Returning result: 0x%x, "
1301 "cmd=[%02x %02x %02x %02x %02x "
1302 "%02x %02x %02x %02x %02x %02x "
1303 "%02x %02x %02x %02x %02x]\n",
1304 cp, sense_key, asc, ascq,
1305 cmd->result,
1306 cmd->cmnd[0], cmd->cmnd[1],
1307 cmd->cmnd[2], cmd->cmnd[3],
1308 cmd->cmnd[4], cmd->cmnd[5],
1309 cmd->cmnd[6], cmd->cmnd[7],
1310 cmd->cmnd[8], cmd->cmnd[9],
1311 cmd->cmnd[10], cmd->cmnd[11],
1312 cmd->cmnd[12], cmd->cmnd[13],
1313 cmd->cmnd[14], cmd->cmnd[15]);
1314 break;
1315 }
1316
1317
1318 /* Problem was not a check condition
1319 * Pass it up to the upper layers...
1320 */
1321 if (ei->ScsiStatus) {
1322 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1323 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1324 "Returning result: 0x%x\n",
1325 cp, ei->ScsiStatus,
1326 sense_key, asc, ascq,
1327 cmd->result);
1328 } else { /* scsi status is zero??? How??? */
1329 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1330 "Returning no connection.\n", cp),
1331
1332 /* Ordinarily, this case should never happen,
1333 * but there is a bug in some released firmware
1334 * revisions that allows it to happen if, for
1335 * example, a 4100 backplane loses power and
1336 * the tape drive is in it. We assume that
1337 * it's a fatal error of some kind because we
1338 * can't show that it wasn't. We will make it
1339 * look like selection timeout since that is
1340 * the most common reason for this to occur,
1341 * and it's severe enough.
1342 */
1343
1344 cmd->result = DID_NO_CONNECT << 16;
1345 }
1346 break;
1347
1348 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1349 break;
1350 case CMD_DATA_OVERRUN:
1351 dev_warn(&h->pdev->dev, "cp %p has"
1352 " completed with data overrun "
1353 "reported\n", cp);
1354 break;
1355 case CMD_INVALID: {
1356 /* print_bytes(cp, sizeof(*cp), 1, 0);
1357 print_cmd(cp); */
1358 /* We get CMD_INVALID if you address a non-existent device
1359 * instead of a selection timeout (no response). You will
1360 * see this if you yank out a drive, then try to access it.
1361 * This is kind of a shame because it means that any other
1362 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1363 * missing target. */
1364 cmd->result = DID_NO_CONNECT << 16;
1365 }
1366 break;
1367 case CMD_PROTOCOL_ERR:
1368 cmd->result = DID_ERROR << 16;
1369 dev_warn(&h->pdev->dev, "cp %p has "
1370 "protocol error\n", cp);
1371 break;
1372 case CMD_HARDWARE_ERR:
1373 cmd->result = DID_ERROR << 16;
1374 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1375 break;
1376 case CMD_CONNECTION_LOST:
1377 cmd->result = DID_ERROR << 16;
1378 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1379 break;
1380 case CMD_ABORTED:
1381 cmd->result = DID_ABORT << 16;
1382 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1383 cp, ei->ScsiStatus);
1384 break;
1385 case CMD_ABORT_FAILED:
1386 cmd->result = DID_ERROR << 16;
1387 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1388 break;
1389 case CMD_UNSOLICITED_ABORT:
1390 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1391 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1392 "abort\n", cp);
1393 break;
1394 case CMD_TIMEOUT:
1395 cmd->result = DID_TIME_OUT << 16;
1396 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1397 break;
1398 case CMD_UNABORTABLE:
1399 cmd->result = DID_ERROR << 16;
1400 dev_warn(&h->pdev->dev, "Command unabortable\n");
1401 break;
1402 default:
1403 cmd->result = DID_ERROR << 16;
1404 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1405 cp, ei->CommandStatus);
1406 }
1407 cmd_free(h, cp);
1408 cmd->scsi_done(cmd);
1409 }
1410
1411 static void hpsa_pci_unmap(struct pci_dev *pdev,
1412 struct CommandList *c, int sg_used, int data_direction)
1413 {
1414 int i;
1415 union u64bit addr64;
1416
1417 for (i = 0; i < sg_used; i++) {
1418 addr64.val32.lower = c->SG[i].Addr.lower;
1419 addr64.val32.upper = c->SG[i].Addr.upper;
1420 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1421 data_direction);
1422 }
1423 }
1424
1425 static int hpsa_map_one(struct pci_dev *pdev,
1426 struct CommandList *cp,
1427 unsigned char *buf,
1428 size_t buflen,
1429 int data_direction)
1430 {
1431 u64 addr64;
1432
1433 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1434 cp->Header.SGList = 0;
1435 cp->Header.SGTotal = 0;
1436 return 0;
1437 }
1438
1439 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1440 if (dma_mapping_error(&pdev->dev, addr64)) {
1441 /* Prevent subsequent unmap of something never mapped */
1442 cp->Header.SGList = 0;
1443 cp->Header.SGTotal = 0;
1444 return -1;
1445 }
1446 cp->SG[0].Addr.lower =
1447 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1448 cp->SG[0].Addr.upper =
1449 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1450 cp->SG[0].Len = buflen;
1451 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1452 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1453 return 0;
1454 }
1455
1456 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1457 struct CommandList *c)
1458 {
1459 DECLARE_COMPLETION_ONSTACK(wait);
1460
1461 c->waiting = &wait;
1462 enqueue_cmd_and_start_io(h, c);
1463 wait_for_completion(&wait);
1464 }
1465
1466 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1467 struct CommandList *c)
1468 {
1469 unsigned long flags;
1470
1471 /* If controller lockup detected, fake a hardware error. */
1472 spin_lock_irqsave(&h->lock, flags);
1473 if (unlikely(h->lockup_detected)) {
1474 spin_unlock_irqrestore(&h->lock, flags);
1475 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1476 } else {
1477 spin_unlock_irqrestore(&h->lock, flags);
1478 hpsa_scsi_do_simple_cmd_core(h, c);
1479 }
1480 }
1481
1482 #define MAX_DRIVER_CMD_RETRIES 25
1483 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1484 struct CommandList *c, int data_direction)
1485 {
1486 int backoff_time = 10, retry_count = 0;
1487
1488 do {
1489 memset(c->err_info, 0, sizeof(*c->err_info));
1490 hpsa_scsi_do_simple_cmd_core(h, c);
1491 retry_count++;
1492 if (retry_count > 3) {
1493 msleep(backoff_time);
1494 if (backoff_time < 1000)
1495 backoff_time *= 2;
1496 }
1497 } while ((check_for_unit_attention(h, c) ||
1498 check_for_busy(h, c)) &&
1499 retry_count <= MAX_DRIVER_CMD_RETRIES);
1500 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1501 }
1502
1503 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1504 {
1505 struct ErrorInfo *ei;
1506 struct device *d = &cp->h->pdev->dev;
1507
1508 ei = cp->err_info;
1509 switch (ei->CommandStatus) {
1510 case CMD_TARGET_STATUS:
1511 dev_warn(d, "cmd %p has completed with errors\n", cp);
1512 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1513 ei->ScsiStatus);
1514 if (ei->ScsiStatus == 0)
1515 dev_warn(d, "SCSI status is abnormally zero. "
1516 "(probably indicates selection timeout "
1517 "reported incorrectly due to a known "
1518 "firmware bug, circa July, 2001.)\n");
1519 break;
1520 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1521 dev_info(d, "UNDERRUN\n");
1522 break;
1523 case CMD_DATA_OVERRUN:
1524 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1525 break;
1526 case CMD_INVALID: {
1527 /* controller unfortunately reports SCSI passthru's
1528 * to non-existent targets as invalid commands.
1529 */
1530 dev_warn(d, "cp %p is reported invalid (probably means "
1531 "target device no longer present)\n", cp);
1532 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1533 print_cmd(cp); */
1534 }
1535 break;
1536 case CMD_PROTOCOL_ERR:
1537 dev_warn(d, "cp %p has protocol error \n", cp);
1538 break;
1539 case CMD_HARDWARE_ERR:
1540 /* cmd->result = DID_ERROR << 16; */
1541 dev_warn(d, "cp %p had hardware error\n", cp);
1542 break;
1543 case CMD_CONNECTION_LOST:
1544 dev_warn(d, "cp %p had connection lost\n", cp);
1545 break;
1546 case CMD_ABORTED:
1547 dev_warn(d, "cp %p was aborted\n", cp);
1548 break;
1549 case CMD_ABORT_FAILED:
1550 dev_warn(d, "cp %p reports abort failed\n", cp);
1551 break;
1552 case CMD_UNSOLICITED_ABORT:
1553 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1554 break;
1555 case CMD_TIMEOUT:
1556 dev_warn(d, "cp %p timed out\n", cp);
1557 break;
1558 case CMD_UNABORTABLE:
1559 dev_warn(d, "Command unabortable\n");
1560 break;
1561 default:
1562 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1563 ei->CommandStatus);
1564 }
1565 }
1566
1567 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1568 unsigned char page, unsigned char *buf,
1569 unsigned char bufsize)
1570 {
1571 int rc = IO_OK;
1572 struct CommandList *c;
1573 struct ErrorInfo *ei;
1574
1575 c = cmd_special_alloc(h);
1576
1577 if (c == NULL) { /* trouble... */
1578 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1579 return -ENOMEM;
1580 }
1581
1582 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1583 page, scsi3addr, TYPE_CMD)) {
1584 rc = -1;
1585 goto out;
1586 }
1587 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1588 ei = c->err_info;
1589 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1590 hpsa_scsi_interpret_error(c);
1591 rc = -1;
1592 }
1593 out:
1594 cmd_special_free(h, c);
1595 return rc;
1596 }
1597
1598 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1599 {
1600 int rc = IO_OK;
1601 struct CommandList *c;
1602 struct ErrorInfo *ei;
1603
1604 c = cmd_special_alloc(h);
1605
1606 if (c == NULL) { /* trouble... */
1607 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1608 return -ENOMEM;
1609 }
1610
1611 /* fill_cmd can't fail here, no data buffer to map. */
1612 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1613 NULL, 0, 0, scsi3addr, TYPE_MSG);
1614 hpsa_scsi_do_simple_cmd_core(h, c);
1615 /* no unmap needed here because no data xfer. */
1616
1617 ei = c->err_info;
1618 if (ei->CommandStatus != 0) {
1619 hpsa_scsi_interpret_error(c);
1620 rc = -1;
1621 }
1622 cmd_special_free(h, c);
1623 return rc;
1624 }
1625
1626 static void hpsa_get_raid_level(struct ctlr_info *h,
1627 unsigned char *scsi3addr, unsigned char *raid_level)
1628 {
1629 int rc;
1630 unsigned char *buf;
1631
1632 *raid_level = RAID_UNKNOWN;
1633 buf = kzalloc(64, GFP_KERNEL);
1634 if (!buf)
1635 return;
1636 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1637 if (rc == 0)
1638 *raid_level = buf[8];
1639 if (*raid_level > RAID_UNKNOWN)
1640 *raid_level = RAID_UNKNOWN;
1641 kfree(buf);
1642 return;
1643 }
1644
1645 /* Get the device id from inquiry page 0x83 */
1646 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1647 unsigned char *device_id, int buflen)
1648 {
1649 int rc;
1650 unsigned char *buf;
1651
1652 if (buflen > 16)
1653 buflen = 16;
1654 buf = kzalloc(64, GFP_KERNEL);
1655 if (!buf)
1656 return -1;
1657 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1658 if (rc == 0)
1659 memcpy(device_id, &buf[8], buflen);
1660 kfree(buf);
1661 return rc != 0;
1662 }
1663
1664 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1665 struct ReportLUNdata *buf, int bufsize,
1666 int extended_response)
1667 {
1668 int rc = IO_OK;
1669 struct CommandList *c;
1670 unsigned char scsi3addr[8];
1671 struct ErrorInfo *ei;
1672
1673 c = cmd_special_alloc(h);
1674 if (c == NULL) { /* trouble... */
1675 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1676 return -1;
1677 }
1678 /* address the controller */
1679 memset(scsi3addr, 0, sizeof(scsi3addr));
1680 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1681 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1682 rc = -1;
1683 goto out;
1684 }
1685 if (extended_response)
1686 c->Request.CDB[1] = extended_response;
1687 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1688 ei = c->err_info;
1689 if (ei->CommandStatus != 0 &&
1690 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1691 hpsa_scsi_interpret_error(c);
1692 rc = -1;
1693 }
1694 out:
1695 cmd_special_free(h, c);
1696 return rc;
1697 }
1698
1699 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1700 struct ReportLUNdata *buf,
1701 int bufsize, int extended_response)
1702 {
1703 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1704 }
1705
1706 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1707 struct ReportLUNdata *buf, int bufsize)
1708 {
1709 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1710 }
1711
1712 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1713 int bus, int target, int lun)
1714 {
1715 device->bus = bus;
1716 device->target = target;
1717 device->lun = lun;
1718 }
1719
1720 static int hpsa_update_device_info(struct ctlr_info *h,
1721 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1722 unsigned char *is_OBDR_device)
1723 {
1724
1725 #define OBDR_SIG_OFFSET 43
1726 #define OBDR_TAPE_SIG "$DR-10"
1727 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1728 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1729
1730 unsigned char *inq_buff;
1731 unsigned char *obdr_sig;
1732
1733 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1734 if (!inq_buff)
1735 goto bail_out;
1736
1737 /* Do an inquiry to the device to see what it is. */
1738 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1739 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1740 /* Inquiry failed (msg printed already) */
1741 dev_err(&h->pdev->dev,
1742 "hpsa_update_device_info: inquiry failed\n");
1743 goto bail_out;
1744 }
1745
1746 this_device->devtype = (inq_buff[0] & 0x1f);
1747 memcpy(this_device->scsi3addr, scsi3addr, 8);
1748 memcpy(this_device->vendor, &inq_buff[8],
1749 sizeof(this_device->vendor));
1750 memcpy(this_device->model, &inq_buff[16],
1751 sizeof(this_device->model));
1752 memset(this_device->device_id, 0,
1753 sizeof(this_device->device_id));
1754 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1755 sizeof(this_device->device_id));
1756
1757 if (this_device->devtype == TYPE_DISK &&
1758 is_logical_dev_addr_mode(scsi3addr))
1759 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1760 else
1761 this_device->raid_level = RAID_UNKNOWN;
1762
1763 if (is_OBDR_device) {
1764 /* See if this is a One-Button-Disaster-Recovery device
1765 * by looking for "$DR-10" at offset 43 in inquiry data.
1766 */
1767 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1768 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1769 strncmp(obdr_sig, OBDR_TAPE_SIG,
1770 OBDR_SIG_LEN) == 0);
1771 }
1772
1773 kfree(inq_buff);
1774 return 0;
1775
1776 bail_out:
1777 kfree(inq_buff);
1778 return 1;
1779 }
1780
1781 static unsigned char *ext_target_model[] = {
1782 "MSA2012",
1783 "MSA2024",
1784 "MSA2312",
1785 "MSA2324",
1786 "P2000 G3 SAS",
1787 NULL,
1788 };
1789
1790 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1791 {
1792 int i;
1793
1794 for (i = 0; ext_target_model[i]; i++)
1795 if (strncmp(device->model, ext_target_model[i],
1796 strlen(ext_target_model[i])) == 0)
1797 return 1;
1798 return 0;
1799 }
1800
1801 /* Helper function to assign bus, target, lun mapping of devices.
1802 * Puts non-external target logical volumes on bus 0, external target logical
1803 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1804 * Logical drive target and lun are assigned at this time, but
1805 * physical device lun and target assignment are deferred (assigned
1806 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1807 */
1808 static void figure_bus_target_lun(struct ctlr_info *h,
1809 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
1810 {
1811 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1812
1813 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1814 /* physical device, target and lun filled in later */
1815 if (is_hba_lunid(lunaddrbytes))
1816 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
1817 else
1818 /* defer target, lun assignment for physical devices */
1819 hpsa_set_bus_target_lun(device, 2, -1, -1);
1820 return;
1821 }
1822 /* It's a logical device */
1823 if (is_ext_target(h, device)) {
1824 /* external target way, put logicals on bus 1
1825 * and match target/lun numbers box
1826 * reports, other smart array, bus 0, target 0, match lunid
1827 */
1828 hpsa_set_bus_target_lun(device,
1829 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1830 return;
1831 }
1832 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
1833 }
1834
1835 /*
1836 * If there is no lun 0 on a target, linux won't find any devices.
1837 * For the external targets (arrays), we have to manually detect the enclosure
1838 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1839 * it for some reason. *tmpdevice is the target we're adding,
1840 * this_device is a pointer into the current element of currentsd[]
1841 * that we're building up in update_scsi_devices(), below.
1842 * lunzerobits is a bitmap that tracks which targets already have a
1843 * lun 0 assigned.
1844 * Returns 1 if an enclosure was added, 0 if not.
1845 */
1846 static int add_ext_target_dev(struct ctlr_info *h,
1847 struct hpsa_scsi_dev_t *tmpdevice,
1848 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1849 unsigned long lunzerobits[], int *n_ext_target_devs)
1850 {
1851 unsigned char scsi3addr[8];
1852
1853 if (test_bit(tmpdevice->target, lunzerobits))
1854 return 0; /* There is already a lun 0 on this target. */
1855
1856 if (!is_logical_dev_addr_mode(lunaddrbytes))
1857 return 0; /* It's the logical targets that may lack lun 0. */
1858
1859 if (!is_ext_target(h, tmpdevice))
1860 return 0; /* Only external target devices have this problem. */
1861
1862 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
1863 return 0;
1864
1865 memset(scsi3addr, 0, 8);
1866 scsi3addr[3] = tmpdevice->target;
1867 if (is_hba_lunid(scsi3addr))
1868 return 0; /* Don't add the RAID controller here. */
1869
1870 if (is_scsi_rev_5(h))
1871 return 0; /* p1210m doesn't need to do this. */
1872
1873 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
1874 dev_warn(&h->pdev->dev, "Maximum number of external "
1875 "target devices exceeded. Check your hardware "
1876 "configuration.");
1877 return 0;
1878 }
1879
1880 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1881 return 0;
1882 (*n_ext_target_devs)++;
1883 hpsa_set_bus_target_lun(this_device,
1884 tmpdevice->bus, tmpdevice->target, 0);
1885 set_bit(tmpdevice->target, lunzerobits);
1886 return 1;
1887 }
1888
1889 /*
1890 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1891 * logdev. The number of luns in physdev and logdev are returned in
1892 * *nphysicals and *nlogicals, respectively.
1893 * Returns 0 on success, -1 otherwise.
1894 */
1895 static int hpsa_gather_lun_info(struct ctlr_info *h,
1896 int reportlunsize,
1897 struct ReportLUNdata *physdev, u32 *nphysicals,
1898 struct ReportLUNdata *logdev, u32 *nlogicals)
1899 {
1900 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1901 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1902 return -1;
1903 }
1904 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1905 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1906 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1907 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1908 *nphysicals - HPSA_MAX_PHYS_LUN);
1909 *nphysicals = HPSA_MAX_PHYS_LUN;
1910 }
1911 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1912 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1913 return -1;
1914 }
1915 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1916 /* Reject Logicals in excess of our max capability. */
1917 if (*nlogicals > HPSA_MAX_LUN) {
1918 dev_warn(&h->pdev->dev,
1919 "maximum logical LUNs (%d) exceeded. "
1920 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1921 *nlogicals - HPSA_MAX_LUN);
1922 *nlogicals = HPSA_MAX_LUN;
1923 }
1924 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1925 dev_warn(&h->pdev->dev,
1926 "maximum logical + physical LUNs (%d) exceeded. "
1927 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1928 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1929 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1930 }
1931 return 0;
1932 }
1933
1934 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1935 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1936 struct ReportLUNdata *logdev_list)
1937 {
1938 /* Helper function, figure out where the LUN ID info is coming from
1939 * given index i, lists of physical and logical devices, where in
1940 * the list the raid controller is supposed to appear (first or last)
1941 */
1942
1943 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1944 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1945
1946 if (i == raid_ctlr_position)
1947 return RAID_CTLR_LUNID;
1948
1949 if (i < logicals_start)
1950 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1951
1952 if (i < last_device)
1953 return &logdev_list->LUN[i - nphysicals -
1954 (raid_ctlr_position == 0)][0];
1955 BUG();
1956 return NULL;
1957 }
1958
1959 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1960 {
1961 /* the idea here is we could get notified
1962 * that some devices have changed, so we do a report
1963 * physical luns and report logical luns cmd, and adjust
1964 * our list of devices accordingly.
1965 *
1966 * The scsi3addr's of devices won't change so long as the
1967 * adapter is not reset. That means we can rescan and
1968 * tell which devices we already know about, vs. new
1969 * devices, vs. disappearing devices.
1970 */
1971 struct ReportLUNdata *physdev_list = NULL;
1972 struct ReportLUNdata *logdev_list = NULL;
1973 u32 nphysicals = 0;
1974 u32 nlogicals = 0;
1975 u32 ndev_allocated = 0;
1976 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1977 int ncurrent = 0;
1978 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1979 int i, n_ext_target_devs, ndevs_to_allocate;
1980 int raid_ctlr_position;
1981 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
1982
1983 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1984 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1985 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1986 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1987
1988 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1989 dev_err(&h->pdev->dev, "out of memory\n");
1990 goto out;
1991 }
1992 memset(lunzerobits, 0, sizeof(lunzerobits));
1993
1994 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1995 logdev_list, &nlogicals))
1996 goto out;
1997
1998 /* We might see up to the maximum number of logical and physical disks
1999 * plus external target devices, and a device for the local RAID
2000 * controller.
2001 */
2002 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
2003
2004 /* Allocate the per device structures */
2005 for (i = 0; i < ndevs_to_allocate; i++) {
2006 if (i >= HPSA_MAX_DEVICES) {
2007 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
2008 " %d devices ignored.\n", HPSA_MAX_DEVICES,
2009 ndevs_to_allocate - HPSA_MAX_DEVICES);
2010 break;
2011 }
2012
2013 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
2014 if (!currentsd[i]) {
2015 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
2016 __FILE__, __LINE__);
2017 goto out;
2018 }
2019 ndev_allocated++;
2020 }
2021
2022 if (unlikely(is_scsi_rev_5(h)))
2023 raid_ctlr_position = 0;
2024 else
2025 raid_ctlr_position = nphysicals + nlogicals;
2026
2027 /* adjust our table of devices */
2028 n_ext_target_devs = 0;
2029 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
2030 u8 *lunaddrbytes, is_OBDR = 0;
2031
2032 /* Figure out where the LUN ID info is coming from */
2033 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2034 i, nphysicals, nlogicals, physdev_list, logdev_list);
2035 /* skip masked physical devices. */
2036 if (lunaddrbytes[3] & 0xC0 &&
2037 i < nphysicals + (raid_ctlr_position == 0))
2038 continue;
2039
2040 /* Get device type, vendor, model, device id */
2041 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2042 &is_OBDR))
2043 continue; /* skip it if we can't talk to it. */
2044 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
2045 this_device = currentsd[ncurrent];
2046
2047 /*
2048 * For external target devices, we have to insert a LUN 0 which
2049 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2050 * is nonetheless an enclosure device there. We have to
2051 * present that otherwise linux won't find anything if
2052 * there is no lun 0.
2053 */
2054 if (add_ext_target_dev(h, tmpdevice, this_device,
2055 lunaddrbytes, lunzerobits,
2056 &n_ext_target_devs)) {
2057 ncurrent++;
2058 this_device = currentsd[ncurrent];
2059 }
2060
2061 *this_device = *tmpdevice;
2062
2063 switch (this_device->devtype) {
2064 case TYPE_ROM:
2065 /* We don't *really* support actual CD-ROM devices,
2066 * just "One Button Disaster Recovery" tape drive
2067 * which temporarily pretends to be a CD-ROM drive.
2068 * So we check that the device is really an OBDR tape
2069 * device by checking for "$DR-10" in bytes 43-48 of
2070 * the inquiry data.
2071 */
2072 if (is_OBDR)
2073 ncurrent++;
2074 break;
2075 case TYPE_DISK:
2076 if (i < nphysicals)
2077 break;
2078 ncurrent++;
2079 break;
2080 case TYPE_TAPE:
2081 case TYPE_MEDIUM_CHANGER:
2082 ncurrent++;
2083 break;
2084 case TYPE_RAID:
2085 /* Only present the Smartarray HBA as a RAID controller.
2086 * If it's a RAID controller other than the HBA itself
2087 * (an external RAID controller, MSA500 or similar)
2088 * don't present it.
2089 */
2090 if (!is_hba_lunid(lunaddrbytes))
2091 break;
2092 ncurrent++;
2093 break;
2094 default:
2095 break;
2096 }
2097 if (ncurrent >= HPSA_MAX_DEVICES)
2098 break;
2099 }
2100 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2101 out:
2102 kfree(tmpdevice);
2103 for (i = 0; i < ndev_allocated; i++)
2104 kfree(currentsd[i]);
2105 kfree(currentsd);
2106 kfree(physdev_list);
2107 kfree(logdev_list);
2108 }
2109
2110 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2111 * dma mapping and fills in the scatter gather entries of the
2112 * hpsa command, cp.
2113 */
2114 static int hpsa_scatter_gather(struct ctlr_info *h,
2115 struct CommandList *cp,
2116 struct scsi_cmnd *cmd)
2117 {
2118 unsigned int len;
2119 struct scatterlist *sg;
2120 u64 addr64;
2121 int use_sg, i, sg_index, chained;
2122 struct SGDescriptor *curr_sg;
2123
2124 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2125
2126 use_sg = scsi_dma_map(cmd);
2127 if (use_sg < 0)
2128 return use_sg;
2129
2130 if (!use_sg)
2131 goto sglist_finished;
2132
2133 curr_sg = cp->SG;
2134 chained = 0;
2135 sg_index = 0;
2136 scsi_for_each_sg(cmd, sg, use_sg, i) {
2137 if (i == h->max_cmd_sg_entries - 1 &&
2138 use_sg > h->max_cmd_sg_entries) {
2139 chained = 1;
2140 curr_sg = h->cmd_sg_list[cp->cmdindex];
2141 sg_index = 0;
2142 }
2143 addr64 = (u64) sg_dma_address(sg);
2144 len = sg_dma_len(sg);
2145 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2146 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2147 curr_sg->Len = len;
2148 curr_sg->Ext = 0; /* we are not chaining */
2149 curr_sg++;
2150 }
2151
2152 if (use_sg + chained > h->maxSG)
2153 h->maxSG = use_sg + chained;
2154
2155 if (chained) {
2156 cp->Header.SGList = h->max_cmd_sg_entries;
2157 cp->Header.SGTotal = (u16) (use_sg + 1);
2158 if (hpsa_map_sg_chain_block(h, cp)) {
2159 scsi_dma_unmap(cmd);
2160 return -1;
2161 }
2162 return 0;
2163 }
2164
2165 sglist_finished:
2166
2167 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2168 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2169 return 0;
2170 }
2171
2172
2173 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2174 void (*done)(struct scsi_cmnd *))
2175 {
2176 struct ctlr_info *h;
2177 struct hpsa_scsi_dev_t *dev;
2178 unsigned char scsi3addr[8];
2179 struct CommandList *c;
2180 unsigned long flags;
2181
2182 /* Get the ptr to our adapter structure out of cmd->host. */
2183 h = sdev_to_hba(cmd->device);
2184 dev = cmd->device->hostdata;
2185 if (!dev) {
2186 cmd->result = DID_NO_CONNECT << 16;
2187 done(cmd);
2188 return 0;
2189 }
2190 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2191
2192 spin_lock_irqsave(&h->lock, flags);
2193 if (unlikely(h->lockup_detected)) {
2194 spin_unlock_irqrestore(&h->lock, flags);
2195 cmd->result = DID_ERROR << 16;
2196 done(cmd);
2197 return 0;
2198 }
2199 spin_unlock_irqrestore(&h->lock, flags);
2200 c = cmd_alloc(h);
2201 if (c == NULL) { /* trouble... */
2202 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2203 return SCSI_MLQUEUE_HOST_BUSY;
2204 }
2205
2206 /* Fill in the command list header */
2207
2208 cmd->scsi_done = done; /* save this for use by completion code */
2209
2210 /* save c in case we have to abort it */
2211 cmd->host_scribble = (unsigned char *) c;
2212
2213 c->cmd_type = CMD_SCSI;
2214 c->scsi_cmd = cmd;
2215 c->Header.ReplyQueue = 0; /* unused in simple mode */
2216 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2217 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2218 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2219
2220 /* Fill in the request block... */
2221
2222 c->Request.Timeout = 0;
2223 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2224 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2225 c->Request.CDBLen = cmd->cmd_len;
2226 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2227 c->Request.Type.Type = TYPE_CMD;
2228 c->Request.Type.Attribute = ATTR_SIMPLE;
2229 switch (cmd->sc_data_direction) {
2230 case DMA_TO_DEVICE:
2231 c->Request.Type.Direction = XFER_WRITE;
2232 break;
2233 case DMA_FROM_DEVICE:
2234 c->Request.Type.Direction = XFER_READ;
2235 break;
2236 case DMA_NONE:
2237 c->Request.Type.Direction = XFER_NONE;
2238 break;
2239 case DMA_BIDIRECTIONAL:
2240 /* This can happen if a buggy application does a scsi passthru
2241 * and sets both inlen and outlen to non-zero. ( see
2242 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2243 */
2244
2245 c->Request.Type.Direction = XFER_RSVD;
2246 /* This is technically wrong, and hpsa controllers should
2247 * reject it with CMD_INVALID, which is the most correct
2248 * response, but non-fibre backends appear to let it
2249 * slide by, and give the same results as if this field
2250 * were set correctly. Either way is acceptable for
2251 * our purposes here.
2252 */
2253
2254 break;
2255
2256 default:
2257 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2258 cmd->sc_data_direction);
2259 BUG();
2260 break;
2261 }
2262
2263 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2264 cmd_free(h, c);
2265 return SCSI_MLQUEUE_HOST_BUSY;
2266 }
2267 enqueue_cmd_and_start_io(h, c);
2268 /* the cmd'll come back via intr handler in complete_scsi_command() */
2269 return 0;
2270 }
2271
2272 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2273
2274 static void hpsa_scan_start(struct Scsi_Host *sh)
2275 {
2276 struct ctlr_info *h = shost_to_hba(sh);
2277 unsigned long flags;
2278
2279 /* wait until any scan already in progress is finished. */
2280 while (1) {
2281 spin_lock_irqsave(&h->scan_lock, flags);
2282 if (h->scan_finished)
2283 break;
2284 spin_unlock_irqrestore(&h->scan_lock, flags);
2285 wait_event(h->scan_wait_queue, h->scan_finished);
2286 /* Note: We don't need to worry about a race between this
2287 * thread and driver unload because the midlayer will
2288 * have incremented the reference count, so unload won't
2289 * happen if we're in here.
2290 */
2291 }
2292 h->scan_finished = 0; /* mark scan as in progress */
2293 spin_unlock_irqrestore(&h->scan_lock, flags);
2294
2295 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2296
2297 spin_lock_irqsave(&h->scan_lock, flags);
2298 h->scan_finished = 1; /* mark scan as finished. */
2299 wake_up_all(&h->scan_wait_queue);
2300 spin_unlock_irqrestore(&h->scan_lock, flags);
2301 }
2302
2303 static int hpsa_scan_finished(struct Scsi_Host *sh,
2304 unsigned long elapsed_time)
2305 {
2306 struct ctlr_info *h = shost_to_hba(sh);
2307 unsigned long flags;
2308 int finished;
2309
2310 spin_lock_irqsave(&h->scan_lock, flags);
2311 finished = h->scan_finished;
2312 spin_unlock_irqrestore(&h->scan_lock, flags);
2313 return finished;
2314 }
2315
2316 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2317 int qdepth, int reason)
2318 {
2319 struct ctlr_info *h = sdev_to_hba(sdev);
2320
2321 if (reason != SCSI_QDEPTH_DEFAULT)
2322 return -ENOTSUPP;
2323
2324 if (qdepth < 1)
2325 qdepth = 1;
2326 else
2327 if (qdepth > h->nr_cmds)
2328 qdepth = h->nr_cmds;
2329 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2330 return sdev->queue_depth;
2331 }
2332
2333 static void hpsa_unregister_scsi(struct ctlr_info *h)
2334 {
2335 /* we are being forcibly unloaded, and may not refuse. */
2336 scsi_remove_host(h->scsi_host);
2337 scsi_host_put(h->scsi_host);
2338 h->scsi_host = NULL;
2339 }
2340
2341 static int hpsa_register_scsi(struct ctlr_info *h)
2342 {
2343 struct Scsi_Host *sh;
2344 int error;
2345
2346 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2347 if (sh == NULL)
2348 goto fail;
2349
2350 sh->io_port = 0;
2351 sh->n_io_port = 0;
2352 sh->this_id = -1;
2353 sh->max_channel = 3;
2354 sh->max_cmd_len = MAX_COMMAND_SIZE;
2355 sh->max_lun = HPSA_MAX_LUN;
2356 sh->max_id = HPSA_MAX_LUN;
2357 sh->can_queue = h->nr_cmds;
2358 sh->cmd_per_lun = h->nr_cmds;
2359 sh->sg_tablesize = h->maxsgentries;
2360 h->scsi_host = sh;
2361 sh->hostdata[0] = (unsigned long) h;
2362 sh->irq = h->intr[h->intr_mode];
2363 sh->unique_id = sh->irq;
2364 error = scsi_add_host(sh, &h->pdev->dev);
2365 if (error)
2366 goto fail_host_put;
2367 scsi_scan_host(sh);
2368 return 0;
2369
2370 fail_host_put:
2371 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2372 " failed for controller %d\n", __func__, h->ctlr);
2373 scsi_host_put(sh);
2374 return error;
2375 fail:
2376 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2377 " failed for controller %d\n", __func__, h->ctlr);
2378 return -ENOMEM;
2379 }
2380
2381 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2382 unsigned char lunaddr[])
2383 {
2384 int rc = 0;
2385 int count = 0;
2386 int waittime = 1; /* seconds */
2387 struct CommandList *c;
2388
2389 c = cmd_special_alloc(h);
2390 if (!c) {
2391 dev_warn(&h->pdev->dev, "out of memory in "
2392 "wait_for_device_to_become_ready.\n");
2393 return IO_ERROR;
2394 }
2395
2396 /* Send test unit ready until device ready, or give up. */
2397 while (count < HPSA_TUR_RETRY_LIMIT) {
2398
2399 /* Wait for a bit. do this first, because if we send
2400 * the TUR right away, the reset will just abort it.
2401 */
2402 msleep(1000 * waittime);
2403 count++;
2404
2405 /* Increase wait time with each try, up to a point. */
2406 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2407 waittime = waittime * 2;
2408
2409 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2410 (void) fill_cmd(c, TEST_UNIT_READY, h,
2411 NULL, 0, 0, lunaddr, TYPE_CMD);
2412 hpsa_scsi_do_simple_cmd_core(h, c);
2413 /* no unmap needed here because no data xfer. */
2414
2415 if (c->err_info->CommandStatus == CMD_SUCCESS)
2416 break;
2417
2418 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2419 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2420 (c->err_info->SenseInfo[2] == NO_SENSE ||
2421 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2422 break;
2423
2424 dev_warn(&h->pdev->dev, "waiting %d secs "
2425 "for device to become ready.\n", waittime);
2426 rc = 1; /* device not ready. */
2427 }
2428
2429 if (rc)
2430 dev_warn(&h->pdev->dev, "giving up on device.\n");
2431 else
2432 dev_warn(&h->pdev->dev, "device is ready.\n");
2433
2434 cmd_special_free(h, c);
2435 return rc;
2436 }
2437
2438 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2439 * complaining. Doing a host- or bus-reset can't do anything good here.
2440 */
2441 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2442 {
2443 int rc;
2444 struct ctlr_info *h;
2445 struct hpsa_scsi_dev_t *dev;
2446
2447 /* find the controller to which the command to be aborted was sent */
2448 h = sdev_to_hba(scsicmd->device);
2449 if (h == NULL) /* paranoia */
2450 return FAILED;
2451 dev = scsicmd->device->hostdata;
2452 if (!dev) {
2453 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2454 "device lookup failed.\n");
2455 return FAILED;
2456 }
2457 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2458 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2459 /* send a reset to the SCSI LUN which the command was sent to */
2460 rc = hpsa_send_reset(h, dev->scsi3addr);
2461 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2462 return SUCCESS;
2463
2464 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2465 return FAILED;
2466 }
2467
2468 static void swizzle_abort_tag(u8 *tag)
2469 {
2470 u8 original_tag[8];
2471
2472 memcpy(original_tag, tag, 8);
2473 tag[0] = original_tag[3];
2474 tag[1] = original_tag[2];
2475 tag[2] = original_tag[1];
2476 tag[3] = original_tag[0];
2477 tag[4] = original_tag[7];
2478 tag[5] = original_tag[6];
2479 tag[6] = original_tag[5];
2480 tag[7] = original_tag[4];
2481 }
2482
2483 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
2484 struct CommandList *abort, int swizzle)
2485 {
2486 int rc = IO_OK;
2487 struct CommandList *c;
2488 struct ErrorInfo *ei;
2489
2490 c = cmd_special_alloc(h);
2491 if (c == NULL) { /* trouble... */
2492 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2493 return -ENOMEM;
2494 }
2495
2496 /* fill_cmd can't fail here, no buffer to map */
2497 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2498 0, 0, scsi3addr, TYPE_MSG);
2499 if (swizzle)
2500 swizzle_abort_tag(&c->Request.CDB[4]);
2501 hpsa_scsi_do_simple_cmd_core(h, c);
2502 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2503 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2504 /* no unmap needed here because no data xfer. */
2505
2506 ei = c->err_info;
2507 switch (ei->CommandStatus) {
2508 case CMD_SUCCESS:
2509 break;
2510 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2511 rc = -1;
2512 break;
2513 default:
2514 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2515 __func__, abort->Header.Tag.upper,
2516 abort->Header.Tag.lower);
2517 hpsa_scsi_interpret_error(c);
2518 rc = -1;
2519 break;
2520 }
2521 cmd_special_free(h, c);
2522 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2523 abort->Header.Tag.upper, abort->Header.Tag.lower);
2524 return rc;
2525 }
2526
2527 /*
2528 * hpsa_find_cmd_in_queue
2529 *
2530 * Used to determine whether a command (find) is still present
2531 * in queue_head. Optionally excludes the last element of queue_head.
2532 *
2533 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2534 * not yet been submitted, and so can be aborted by the driver without
2535 * sending an abort to the hardware.
2536 *
2537 * Returns pointer to command if found in queue, NULL otherwise.
2538 */
2539 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2540 struct scsi_cmnd *find, struct list_head *queue_head)
2541 {
2542 unsigned long flags;
2543 struct CommandList *c = NULL; /* ptr into cmpQ */
2544
2545 if (!find)
2546 return 0;
2547 spin_lock_irqsave(&h->lock, flags);
2548 list_for_each_entry(c, queue_head, list) {
2549 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2550 continue;
2551 if (c->scsi_cmd == find) {
2552 spin_unlock_irqrestore(&h->lock, flags);
2553 return c;
2554 }
2555 }
2556 spin_unlock_irqrestore(&h->lock, flags);
2557 return NULL;
2558 }
2559
2560 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2561 u8 *tag, struct list_head *queue_head)
2562 {
2563 unsigned long flags;
2564 struct CommandList *c;
2565
2566 spin_lock_irqsave(&h->lock, flags);
2567 list_for_each_entry(c, queue_head, list) {
2568 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2569 continue;
2570 spin_unlock_irqrestore(&h->lock, flags);
2571 return c;
2572 }
2573 spin_unlock_irqrestore(&h->lock, flags);
2574 return NULL;
2575 }
2576
2577 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2578 * tell which kind we're dealing with, so we send the abort both ways. There
2579 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2580 * way we construct our tags but we check anyway in case the assumptions which
2581 * make this true someday become false.
2582 */
2583 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2584 unsigned char *scsi3addr, struct CommandList *abort)
2585 {
2586 u8 swizzled_tag[8];
2587 struct CommandList *c;
2588 int rc = 0, rc2 = 0;
2589
2590 /* we do not expect to find the swizzled tag in our queue, but
2591 * check anyway just to be sure the assumptions which make this
2592 * the case haven't become wrong.
2593 */
2594 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2595 swizzle_abort_tag(swizzled_tag);
2596 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2597 if (c != NULL) {
2598 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2599 return hpsa_send_abort(h, scsi3addr, abort, 0);
2600 }
2601 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2602
2603 /* if the command is still in our queue, we can't conclude that it was
2604 * aborted (it might have just completed normally) but in any case
2605 * we don't need to try to abort it another way.
2606 */
2607 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2608 if (c)
2609 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2610 return rc && rc2;
2611 }
2612
2613 /* Send an abort for the specified command.
2614 * If the device and controller support it,
2615 * send a task abort request.
2616 */
2617 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2618 {
2619
2620 int i, rc;
2621 struct ctlr_info *h;
2622 struct hpsa_scsi_dev_t *dev;
2623 struct CommandList *abort; /* pointer to command to be aborted */
2624 struct CommandList *found;
2625 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2626 char msg[256]; /* For debug messaging. */
2627 int ml = 0;
2628
2629 /* Find the controller of the command to be aborted */
2630 h = sdev_to_hba(sc->device);
2631 if (WARN(h == NULL,
2632 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2633 return FAILED;
2634
2635 /* Check that controller supports some kind of task abort */
2636 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2637 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2638 return FAILED;
2639
2640 memset(msg, 0, sizeof(msg));
2641 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2642 h->scsi_host->host_no, sc->device->channel,
2643 sc->device->id, sc->device->lun);
2644
2645 /* Find the device of the command to be aborted */
2646 dev = sc->device->hostdata;
2647 if (!dev) {
2648 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2649 msg);
2650 return FAILED;
2651 }
2652
2653 /* Get SCSI command to be aborted */
2654 abort = (struct CommandList *) sc->host_scribble;
2655 if (abort == NULL) {
2656 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2657 msg);
2658 return FAILED;
2659 }
2660
2661 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2662 abort->Header.Tag.upper, abort->Header.Tag.lower);
2663 as = (struct scsi_cmnd *) abort->scsi_cmd;
2664 if (as != NULL)
2665 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2666 as->cmnd[0], as->serial_number);
2667 dev_dbg(&h->pdev->dev, "%s\n", msg);
2668 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2669 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2670
2671 /* Search reqQ to See if command is queued but not submitted,
2672 * if so, complete the command with aborted status and remove
2673 * it from the reqQ.
2674 */
2675 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2676 if (found) {
2677 found->err_info->CommandStatus = CMD_ABORTED;
2678 finish_cmd(found);
2679 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2680 msg);
2681 return SUCCESS;
2682 }
2683
2684 /* not in reqQ, if also not in cmpQ, must have already completed */
2685 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2686 if (!found) {
2687 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
2688 msg);
2689 return SUCCESS;
2690 }
2691
2692 /*
2693 * Command is in flight, or possibly already completed
2694 * by the firmware (but not to the scsi mid layer) but we can't
2695 * distinguish which. Send the abort down.
2696 */
2697 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
2698 if (rc != 0) {
2699 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2700 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2701 h->scsi_host->host_no,
2702 dev->bus, dev->target, dev->lun);
2703 return FAILED;
2704 }
2705 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2706
2707 /* If the abort(s) above completed and actually aborted the
2708 * command, then the command to be aborted should already be
2709 * completed. If not, wait around a bit more to see if they
2710 * manage to complete normally.
2711 */
2712 #define ABORT_COMPLETE_WAIT_SECS 30
2713 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2714 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2715 if (!found)
2716 return SUCCESS;
2717 msleep(100);
2718 }
2719 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2720 msg, ABORT_COMPLETE_WAIT_SECS);
2721 return FAILED;
2722 }
2723
2724
2725 /*
2726 * For operations that cannot sleep, a command block is allocated at init,
2727 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2728 * which ones are free or in use. Lock must be held when calling this.
2729 * cmd_free() is the complement.
2730 */
2731 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2732 {
2733 struct CommandList *c;
2734 int i;
2735 union u64bit temp64;
2736 dma_addr_t cmd_dma_handle, err_dma_handle;
2737 unsigned long flags;
2738
2739 spin_lock_irqsave(&h->lock, flags);
2740 do {
2741 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2742 if (i == h->nr_cmds) {
2743 spin_unlock_irqrestore(&h->lock, flags);
2744 return NULL;
2745 }
2746 } while (test_and_set_bit
2747 (i & (BITS_PER_LONG - 1),
2748 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2749 spin_unlock_irqrestore(&h->lock, flags);
2750
2751 c = h->cmd_pool + i;
2752 memset(c, 0, sizeof(*c));
2753 cmd_dma_handle = h->cmd_pool_dhandle
2754 + i * sizeof(*c);
2755 c->err_info = h->errinfo_pool + i;
2756 memset(c->err_info, 0, sizeof(*c->err_info));
2757 err_dma_handle = h->errinfo_pool_dhandle
2758 + i * sizeof(*c->err_info);
2759
2760 c->cmdindex = i;
2761
2762 INIT_LIST_HEAD(&c->list);
2763 c->busaddr = (u32) cmd_dma_handle;
2764 temp64.val = (u64) err_dma_handle;
2765 c->ErrDesc.Addr.lower = temp64.val32.lower;
2766 c->ErrDesc.Addr.upper = temp64.val32.upper;
2767 c->ErrDesc.Len = sizeof(*c->err_info);
2768
2769 c->h = h;
2770 return c;
2771 }
2772
2773 /* For operations that can wait for kmalloc to possibly sleep,
2774 * this routine can be called. Lock need not be held to call
2775 * cmd_special_alloc. cmd_special_free() is the complement.
2776 */
2777 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2778 {
2779 struct CommandList *c;
2780 union u64bit temp64;
2781 dma_addr_t cmd_dma_handle, err_dma_handle;
2782
2783 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2784 if (c == NULL)
2785 return NULL;
2786 memset(c, 0, sizeof(*c));
2787
2788 c->cmdindex = -1;
2789
2790 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2791 &err_dma_handle);
2792
2793 if (c->err_info == NULL) {
2794 pci_free_consistent(h->pdev,
2795 sizeof(*c), c, cmd_dma_handle);
2796 return NULL;
2797 }
2798 memset(c->err_info, 0, sizeof(*c->err_info));
2799
2800 INIT_LIST_HEAD(&c->list);
2801 c->busaddr = (u32) cmd_dma_handle;
2802 temp64.val = (u64) err_dma_handle;
2803 c->ErrDesc.Addr.lower = temp64.val32.lower;
2804 c->ErrDesc.Addr.upper = temp64.val32.upper;
2805 c->ErrDesc.Len = sizeof(*c->err_info);
2806
2807 c->h = h;
2808 return c;
2809 }
2810
2811 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2812 {
2813 int i;
2814 unsigned long flags;
2815
2816 i = c - h->cmd_pool;
2817 spin_lock_irqsave(&h->lock, flags);
2818 clear_bit(i & (BITS_PER_LONG - 1),
2819 h->cmd_pool_bits + (i / BITS_PER_LONG));
2820 spin_unlock_irqrestore(&h->lock, flags);
2821 }
2822
2823 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2824 {
2825 union u64bit temp64;
2826
2827 temp64.val32.lower = c->ErrDesc.Addr.lower;
2828 temp64.val32.upper = c->ErrDesc.Addr.upper;
2829 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2830 c->err_info, (dma_addr_t) temp64.val);
2831 pci_free_consistent(h->pdev, sizeof(*c),
2832 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2833 }
2834
2835 #ifdef CONFIG_COMPAT
2836
2837 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2838 {
2839 IOCTL32_Command_struct __user *arg32 =
2840 (IOCTL32_Command_struct __user *) arg;
2841 IOCTL_Command_struct arg64;
2842 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2843 int err;
2844 u32 cp;
2845
2846 memset(&arg64, 0, sizeof(arg64));
2847 err = 0;
2848 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2849 sizeof(arg64.LUN_info));
2850 err |= copy_from_user(&arg64.Request, &arg32->Request,
2851 sizeof(arg64.Request));
2852 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2853 sizeof(arg64.error_info));
2854 err |= get_user(arg64.buf_size, &arg32->buf_size);
2855 err |= get_user(cp, &arg32->buf);
2856 arg64.buf = compat_ptr(cp);
2857 err |= copy_to_user(p, &arg64, sizeof(arg64));
2858
2859 if (err)
2860 return -EFAULT;
2861
2862 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2863 if (err)
2864 return err;
2865 err |= copy_in_user(&arg32->error_info, &p->error_info,
2866 sizeof(arg32->error_info));
2867 if (err)
2868 return -EFAULT;
2869 return err;
2870 }
2871
2872 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2873 int cmd, void *arg)
2874 {
2875 BIG_IOCTL32_Command_struct __user *arg32 =
2876 (BIG_IOCTL32_Command_struct __user *) arg;
2877 BIG_IOCTL_Command_struct arg64;
2878 BIG_IOCTL_Command_struct __user *p =
2879 compat_alloc_user_space(sizeof(arg64));
2880 int err;
2881 u32 cp;
2882
2883 memset(&arg64, 0, sizeof(arg64));
2884 err = 0;
2885 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2886 sizeof(arg64.LUN_info));
2887 err |= copy_from_user(&arg64.Request, &arg32->Request,
2888 sizeof(arg64.Request));
2889 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2890 sizeof(arg64.error_info));
2891 err |= get_user(arg64.buf_size, &arg32->buf_size);
2892 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2893 err |= get_user(cp, &arg32->buf);
2894 arg64.buf = compat_ptr(cp);
2895 err |= copy_to_user(p, &arg64, sizeof(arg64));
2896
2897 if (err)
2898 return -EFAULT;
2899
2900 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2901 if (err)
2902 return err;
2903 err |= copy_in_user(&arg32->error_info, &p->error_info,
2904 sizeof(arg32->error_info));
2905 if (err)
2906 return -EFAULT;
2907 return err;
2908 }
2909
2910 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2911 {
2912 switch (cmd) {
2913 case CCISS_GETPCIINFO:
2914 case CCISS_GETINTINFO:
2915 case CCISS_SETINTINFO:
2916 case CCISS_GETNODENAME:
2917 case CCISS_SETNODENAME:
2918 case CCISS_GETHEARTBEAT:
2919 case CCISS_GETBUSTYPES:
2920 case CCISS_GETFIRMVER:
2921 case CCISS_GETDRIVVER:
2922 case CCISS_REVALIDVOLS:
2923 case CCISS_DEREGDISK:
2924 case CCISS_REGNEWDISK:
2925 case CCISS_REGNEWD:
2926 case CCISS_RESCANDISK:
2927 case CCISS_GETLUNINFO:
2928 return hpsa_ioctl(dev, cmd, arg);
2929
2930 case CCISS_PASSTHRU32:
2931 return hpsa_ioctl32_passthru(dev, cmd, arg);
2932 case CCISS_BIG_PASSTHRU32:
2933 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2934
2935 default:
2936 return -ENOIOCTLCMD;
2937 }
2938 }
2939 #endif
2940
2941 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2942 {
2943 struct hpsa_pci_info pciinfo;
2944
2945 if (!argp)
2946 return -EINVAL;
2947 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2948 pciinfo.bus = h->pdev->bus->number;
2949 pciinfo.dev_fn = h->pdev->devfn;
2950 pciinfo.board_id = h->board_id;
2951 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2952 return -EFAULT;
2953 return 0;
2954 }
2955
2956 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2957 {
2958 DriverVer_type DriverVer;
2959 unsigned char vmaj, vmin, vsubmin;
2960 int rc;
2961
2962 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2963 &vmaj, &vmin, &vsubmin);
2964 if (rc != 3) {
2965 dev_info(&h->pdev->dev, "driver version string '%s' "
2966 "unrecognized.", HPSA_DRIVER_VERSION);
2967 vmaj = 0;
2968 vmin = 0;
2969 vsubmin = 0;
2970 }
2971 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2972 if (!argp)
2973 return -EINVAL;
2974 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2975 return -EFAULT;
2976 return 0;
2977 }
2978
2979 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2980 {
2981 IOCTL_Command_struct iocommand;
2982 struct CommandList *c;
2983 char *buff = NULL;
2984 union u64bit temp64;
2985 int rc = 0;
2986
2987 if (!argp)
2988 return -EINVAL;
2989 if (!capable(CAP_SYS_RAWIO))
2990 return -EPERM;
2991 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2992 return -EFAULT;
2993 if ((iocommand.buf_size < 1) &&
2994 (iocommand.Request.Type.Direction != XFER_NONE)) {
2995 return -EINVAL;
2996 }
2997 if (iocommand.buf_size > 0) {
2998 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2999 if (buff == NULL)
3000 return -EFAULT;
3001 if (iocommand.Request.Type.Direction == XFER_WRITE) {
3002 /* Copy the data into the buffer we created */
3003 if (copy_from_user(buff, iocommand.buf,
3004 iocommand.buf_size)) {
3005 rc = -EFAULT;
3006 goto out_kfree;
3007 }
3008 } else {
3009 memset(buff, 0, iocommand.buf_size);
3010 }
3011 }
3012 c = cmd_special_alloc(h);
3013 if (c == NULL) {
3014 rc = -ENOMEM;
3015 goto out_kfree;
3016 }
3017 /* Fill in the command type */
3018 c->cmd_type = CMD_IOCTL_PEND;
3019 /* Fill in Command Header */
3020 c->Header.ReplyQueue = 0; /* unused in simple mode */
3021 if (iocommand.buf_size > 0) { /* buffer to fill */
3022 c->Header.SGList = 1;
3023 c->Header.SGTotal = 1;
3024 } else { /* no buffers to fill */
3025 c->Header.SGList = 0;
3026 c->Header.SGTotal = 0;
3027 }
3028 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3029 /* use the kernel address the cmd block for tag */
3030 c->Header.Tag.lower = c->busaddr;
3031
3032 /* Fill in Request block */
3033 memcpy(&c->Request, &iocommand.Request,
3034 sizeof(c->Request));
3035
3036 /* Fill in the scatter gather information */
3037 if (iocommand.buf_size > 0) {
3038 temp64.val = pci_map_single(h->pdev, buff,
3039 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
3040 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3041 c->SG[0].Addr.lower = 0;
3042 c->SG[0].Addr.upper = 0;
3043 c->SG[0].Len = 0;
3044 rc = -ENOMEM;
3045 goto out;
3046 }
3047 c->SG[0].Addr.lower = temp64.val32.lower;
3048 c->SG[0].Addr.upper = temp64.val32.upper;
3049 c->SG[0].Len = iocommand.buf_size;
3050 c->SG[0].Ext = 0; /* we are not chaining*/
3051 }
3052 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
3053 if (iocommand.buf_size > 0)
3054 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
3055 check_ioctl_unit_attention(h, c);
3056
3057 /* Copy the error information out */
3058 memcpy(&iocommand.error_info, c->err_info,
3059 sizeof(iocommand.error_info));
3060 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
3061 rc = -EFAULT;
3062 goto out;
3063 }
3064 if (iocommand.Request.Type.Direction == XFER_READ &&
3065 iocommand.buf_size > 0) {
3066 /* Copy the data out of the buffer we created */
3067 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
3068 rc = -EFAULT;
3069 goto out;
3070 }
3071 }
3072 out:
3073 cmd_special_free(h, c);
3074 out_kfree:
3075 kfree(buff);
3076 return rc;
3077 }
3078
3079 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3080 {
3081 BIG_IOCTL_Command_struct *ioc;
3082 struct CommandList *c;
3083 unsigned char **buff = NULL;
3084 int *buff_size = NULL;
3085 union u64bit temp64;
3086 BYTE sg_used = 0;
3087 int status = 0;
3088 int i;
3089 u32 left;
3090 u32 sz;
3091 BYTE __user *data_ptr;
3092
3093 if (!argp)
3094 return -EINVAL;
3095 if (!capable(CAP_SYS_RAWIO))
3096 return -EPERM;
3097 ioc = (BIG_IOCTL_Command_struct *)
3098 kmalloc(sizeof(*ioc), GFP_KERNEL);
3099 if (!ioc) {
3100 status = -ENOMEM;
3101 goto cleanup1;
3102 }
3103 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3104 status = -EFAULT;
3105 goto cleanup1;
3106 }
3107 if ((ioc->buf_size < 1) &&
3108 (ioc->Request.Type.Direction != XFER_NONE)) {
3109 status = -EINVAL;
3110 goto cleanup1;
3111 }
3112 /* Check kmalloc limits using all SGs */
3113 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3114 status = -EINVAL;
3115 goto cleanup1;
3116 }
3117 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
3118 status = -EINVAL;
3119 goto cleanup1;
3120 }
3121 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
3122 if (!buff) {
3123 status = -ENOMEM;
3124 goto cleanup1;
3125 }
3126 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
3127 if (!buff_size) {
3128 status = -ENOMEM;
3129 goto cleanup1;
3130 }
3131 left = ioc->buf_size;
3132 data_ptr = ioc->buf;
3133 while (left) {
3134 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3135 buff_size[sg_used] = sz;
3136 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3137 if (buff[sg_used] == NULL) {
3138 status = -ENOMEM;
3139 goto cleanup1;
3140 }
3141 if (ioc->Request.Type.Direction == XFER_WRITE) {
3142 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3143 status = -EFAULT;
3144 goto cleanup1;
3145 }
3146 } else
3147 memset(buff[sg_used], 0, sz);
3148 left -= sz;
3149 data_ptr += sz;
3150 sg_used++;
3151 }
3152 c = cmd_special_alloc(h);
3153 if (c == NULL) {
3154 status = -ENOMEM;
3155 goto cleanup1;
3156 }
3157 c->cmd_type = CMD_IOCTL_PEND;
3158 c->Header.ReplyQueue = 0;
3159 c->Header.SGList = c->Header.SGTotal = sg_used;
3160 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3161 c->Header.Tag.lower = c->busaddr;
3162 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3163 if (ioc->buf_size > 0) {
3164 int i;
3165 for (i = 0; i < sg_used; i++) {
3166 temp64.val = pci_map_single(h->pdev, buff[i],
3167 buff_size[i], PCI_DMA_BIDIRECTIONAL);
3168 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3169 c->SG[i].Addr.lower = 0;
3170 c->SG[i].Addr.upper = 0;
3171 c->SG[i].Len = 0;
3172 hpsa_pci_unmap(h->pdev, c, i,
3173 PCI_DMA_BIDIRECTIONAL);
3174 status = -ENOMEM;
3175 goto cleanup1;
3176 }
3177 c->SG[i].Addr.lower = temp64.val32.lower;
3178 c->SG[i].Addr.upper = temp64.val32.upper;
3179 c->SG[i].Len = buff_size[i];
3180 /* we are not chaining */
3181 c->SG[i].Ext = 0;
3182 }
3183 }
3184 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
3185 if (sg_used)
3186 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
3187 check_ioctl_unit_attention(h, c);
3188 /* Copy the error information out */
3189 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3190 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3191 cmd_special_free(h, c);
3192 status = -EFAULT;
3193 goto cleanup1;
3194 }
3195 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
3196 /* Copy the data out of the buffer we created */
3197 BYTE __user *ptr = ioc->buf;
3198 for (i = 0; i < sg_used; i++) {
3199 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3200 cmd_special_free(h, c);
3201 status = -EFAULT;
3202 goto cleanup1;
3203 }
3204 ptr += buff_size[i];
3205 }
3206 }
3207 cmd_special_free(h, c);
3208 status = 0;
3209 cleanup1:
3210 if (buff) {
3211 for (i = 0; i < sg_used; i++)
3212 kfree(buff[i]);
3213 kfree(buff);
3214 }
3215 kfree(buff_size);
3216 kfree(ioc);
3217 return status;
3218 }
3219
3220 static void check_ioctl_unit_attention(struct ctlr_info *h,
3221 struct CommandList *c)
3222 {
3223 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3224 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3225 (void) check_for_unit_attention(h, c);
3226 }
3227 /*
3228 * ioctl
3229 */
3230 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3231 {
3232 struct ctlr_info *h;
3233 void __user *argp = (void __user *)arg;
3234
3235 h = sdev_to_hba(dev);
3236
3237 switch (cmd) {
3238 case CCISS_DEREGDISK:
3239 case CCISS_REGNEWDISK:
3240 case CCISS_REGNEWD:
3241 hpsa_scan_start(h->scsi_host);
3242 return 0;
3243 case CCISS_GETPCIINFO:
3244 return hpsa_getpciinfo_ioctl(h, argp);
3245 case CCISS_GETDRIVVER:
3246 return hpsa_getdrivver_ioctl(h, argp);
3247 case CCISS_PASSTHRU:
3248 return hpsa_passthru_ioctl(h, argp);
3249 case CCISS_BIG_PASSTHRU:
3250 return hpsa_big_passthru_ioctl(h, argp);
3251 default:
3252 return -ENOTTY;
3253 }
3254 }
3255
3256 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3257 u8 reset_type)
3258 {
3259 struct CommandList *c;
3260
3261 c = cmd_alloc(h);
3262 if (!c)
3263 return -ENOMEM;
3264 /* fill_cmd can't fail here, no data buffer to map */
3265 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
3266 RAID_CTLR_LUNID, TYPE_MSG);
3267 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3268 c->waiting = NULL;
3269 enqueue_cmd_and_start_io(h, c);
3270 /* Don't wait for completion, the reset won't complete. Don't free
3271 * the command either. This is the last command we will send before
3272 * re-initializing everything, so it doesn't matter and won't leak.
3273 */
3274 return 0;
3275 }
3276
3277 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
3278 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
3279 int cmd_type)
3280 {
3281 int pci_dir = XFER_NONE;
3282 struct CommandList *a; /* for commands to be aborted */
3283
3284 c->cmd_type = CMD_IOCTL_PEND;
3285 c->Header.ReplyQueue = 0;
3286 if (buff != NULL && size > 0) {
3287 c->Header.SGList = 1;
3288 c->Header.SGTotal = 1;
3289 } else {
3290 c->Header.SGList = 0;
3291 c->Header.SGTotal = 0;
3292 }
3293 c->Header.Tag.lower = c->busaddr;
3294 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3295
3296 c->Request.Type.Type = cmd_type;
3297 if (cmd_type == TYPE_CMD) {
3298 switch (cmd) {
3299 case HPSA_INQUIRY:
3300 /* are we trying to read a vital product page */
3301 if (page_code != 0) {
3302 c->Request.CDB[1] = 0x01;
3303 c->Request.CDB[2] = page_code;
3304 }
3305 c->Request.CDBLen = 6;
3306 c->Request.Type.Attribute = ATTR_SIMPLE;
3307 c->Request.Type.Direction = XFER_READ;
3308 c->Request.Timeout = 0;
3309 c->Request.CDB[0] = HPSA_INQUIRY;
3310 c->Request.CDB[4] = size & 0xFF;
3311 break;
3312 case HPSA_REPORT_LOG:
3313 case HPSA_REPORT_PHYS:
3314 /* Talking to controller so It's a physical command
3315 mode = 00 target = 0. Nothing to write.
3316 */
3317 c->Request.CDBLen = 12;
3318 c->Request.Type.Attribute = ATTR_SIMPLE;
3319 c->Request.Type.Direction = XFER_READ;
3320 c->Request.Timeout = 0;
3321 c->Request.CDB[0] = cmd;
3322 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3323 c->Request.CDB[7] = (size >> 16) & 0xFF;
3324 c->Request.CDB[8] = (size >> 8) & 0xFF;
3325 c->Request.CDB[9] = size & 0xFF;
3326 break;
3327 case HPSA_CACHE_FLUSH:
3328 c->Request.CDBLen = 12;
3329 c->Request.Type.Attribute = ATTR_SIMPLE;
3330 c->Request.Type.Direction = XFER_WRITE;
3331 c->Request.Timeout = 0;
3332 c->Request.CDB[0] = BMIC_WRITE;
3333 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
3334 c->Request.CDB[7] = (size >> 8) & 0xFF;
3335 c->Request.CDB[8] = size & 0xFF;
3336 break;
3337 case TEST_UNIT_READY:
3338 c->Request.CDBLen = 6;
3339 c->Request.Type.Attribute = ATTR_SIMPLE;
3340 c->Request.Type.Direction = XFER_NONE;
3341 c->Request.Timeout = 0;
3342 break;
3343 default:
3344 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3345 BUG();
3346 return -1;
3347 }
3348 } else if (cmd_type == TYPE_MSG) {
3349 switch (cmd) {
3350
3351 case HPSA_DEVICE_RESET_MSG:
3352 c->Request.CDBLen = 16;
3353 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3354 c->Request.Type.Attribute = ATTR_SIMPLE;
3355 c->Request.Type.Direction = XFER_NONE;
3356 c->Request.Timeout = 0; /* Don't time out */
3357 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3358 c->Request.CDB[0] = cmd;
3359 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
3360 /* If bytes 4-7 are zero, it means reset the */
3361 /* LunID device */
3362 c->Request.CDB[4] = 0x00;
3363 c->Request.CDB[5] = 0x00;
3364 c->Request.CDB[6] = 0x00;
3365 c->Request.CDB[7] = 0x00;
3366 break;
3367 case HPSA_ABORT_MSG:
3368 a = buff; /* point to command to be aborted */
3369 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3370 a->Header.Tag.upper, a->Header.Tag.lower,
3371 c->Header.Tag.upper, c->Header.Tag.lower);
3372 c->Request.CDBLen = 16;
3373 c->Request.Type.Type = TYPE_MSG;
3374 c->Request.Type.Attribute = ATTR_SIMPLE;
3375 c->Request.Type.Direction = XFER_WRITE;
3376 c->Request.Timeout = 0; /* Don't time out */
3377 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3378 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3379 c->Request.CDB[2] = 0x00; /* reserved */
3380 c->Request.CDB[3] = 0x00; /* reserved */
3381 /* Tag to abort goes in CDB[4]-CDB[11] */
3382 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3383 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3384 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3385 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3386 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3387 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3388 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3389 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3390 c->Request.CDB[12] = 0x00; /* reserved */
3391 c->Request.CDB[13] = 0x00; /* reserved */
3392 c->Request.CDB[14] = 0x00; /* reserved */
3393 c->Request.CDB[15] = 0x00; /* reserved */
3394 break;
3395 default:
3396 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3397 cmd);
3398 BUG();
3399 }
3400 } else {
3401 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3402 BUG();
3403 }
3404
3405 switch (c->Request.Type.Direction) {
3406 case XFER_READ:
3407 pci_dir = PCI_DMA_FROMDEVICE;
3408 break;
3409 case XFER_WRITE:
3410 pci_dir = PCI_DMA_TODEVICE;
3411 break;
3412 case XFER_NONE:
3413 pci_dir = PCI_DMA_NONE;
3414 break;
3415 default:
3416 pci_dir = PCI_DMA_BIDIRECTIONAL;
3417 }
3418 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3419 return -1;
3420 return 0;
3421 }
3422
3423 /*
3424 * Map (physical) PCI mem into (virtual) kernel space
3425 */
3426 static void __iomem *remap_pci_mem(ulong base, ulong size)
3427 {
3428 ulong page_base = ((ulong) base) & PAGE_MASK;
3429 ulong page_offs = ((ulong) base) - page_base;
3430 void __iomem *page_remapped = ioremap_nocache(page_base,
3431 page_offs + size);
3432
3433 return page_remapped ? (page_remapped + page_offs) : NULL;
3434 }
3435
3436 /* Takes cmds off the submission queue and sends them to the hardware,
3437 * then puts them on the queue of cmds waiting for completion.
3438 */
3439 static void start_io(struct ctlr_info *h)
3440 {
3441 struct CommandList *c;
3442 unsigned long flags;
3443
3444 spin_lock_irqsave(&h->lock, flags);
3445 while (!list_empty(&h->reqQ)) {
3446 c = list_entry(h->reqQ.next, struct CommandList, list);
3447 /* can't do anything if fifo is full */
3448 if ((h->access.fifo_full(h))) {
3449 dev_warn(&h->pdev->dev, "fifo full\n");
3450 break;
3451 }
3452
3453 /* Get the first entry from the Request Q */
3454 removeQ(c);
3455 h->Qdepth--;
3456
3457 /* Put job onto the completed Q */
3458 addQ(&h->cmpQ, c);
3459
3460 /* Must increment commands_outstanding before unlocking
3461 * and submitting to avoid race checking for fifo full
3462 * condition.
3463 */
3464 h->commands_outstanding++;
3465 if (h->commands_outstanding > h->max_outstanding)
3466 h->max_outstanding = h->commands_outstanding;
3467
3468 /* Tell the controller execute command */
3469 spin_unlock_irqrestore(&h->lock, flags);
3470 h->access.submit_command(h, c);
3471 spin_lock_irqsave(&h->lock, flags);
3472 }
3473 spin_unlock_irqrestore(&h->lock, flags);
3474 }
3475
3476 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
3477 {
3478 return h->access.command_completed(h, q);
3479 }
3480
3481 static inline bool interrupt_pending(struct ctlr_info *h)
3482 {
3483 return h->access.intr_pending(h);
3484 }
3485
3486 static inline long interrupt_not_for_us(struct ctlr_info *h)
3487 {
3488 return (h->access.intr_pending(h) == 0) ||
3489 (h->interrupts_enabled == 0);
3490 }
3491
3492 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3493 u32 raw_tag)
3494 {
3495 if (unlikely(tag_index >= h->nr_cmds)) {
3496 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3497 return 1;
3498 }
3499 return 0;
3500 }
3501
3502 static inline void finish_cmd(struct CommandList *c)
3503 {
3504 unsigned long flags;
3505
3506 spin_lock_irqsave(&c->h->lock, flags);
3507 removeQ(c);
3508 spin_unlock_irqrestore(&c->h->lock, flags);
3509 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
3510 if (likely(c->cmd_type == CMD_SCSI))
3511 complete_scsi_command(c);
3512 else if (c->cmd_type == CMD_IOCTL_PEND)
3513 complete(c->waiting);
3514 }
3515
3516 static inline u32 hpsa_tag_contains_index(u32 tag)
3517 {
3518 return tag & DIRECT_LOOKUP_BIT;
3519 }
3520
3521 static inline u32 hpsa_tag_to_index(u32 tag)
3522 {
3523 return tag >> DIRECT_LOOKUP_SHIFT;
3524 }
3525
3526
3527 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3528 {
3529 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3530 #define HPSA_SIMPLE_ERROR_BITS 0x03
3531 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3532 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3533 return tag & ~HPSA_PERF_ERROR_BITS;
3534 }
3535
3536 /* process completion of an indexed ("direct lookup") command */
3537 static inline void process_indexed_cmd(struct ctlr_info *h,
3538 u32 raw_tag)
3539 {
3540 u32 tag_index;
3541 struct CommandList *c;
3542
3543 tag_index = hpsa_tag_to_index(raw_tag);
3544 if (!bad_tag(h, tag_index, raw_tag)) {
3545 c = h->cmd_pool + tag_index;
3546 finish_cmd(c);
3547 }
3548 }
3549
3550 /* process completion of a non-indexed command */
3551 static inline void process_nonindexed_cmd(struct ctlr_info *h,
3552 u32 raw_tag)
3553 {
3554 u32 tag;
3555 struct CommandList *c = NULL;
3556 unsigned long flags;
3557
3558 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3559 spin_lock_irqsave(&h->lock, flags);
3560 list_for_each_entry(c, &h->cmpQ, list) {
3561 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3562 spin_unlock_irqrestore(&h->lock, flags);
3563 finish_cmd(c);
3564 return;
3565 }
3566 }
3567 spin_unlock_irqrestore(&h->lock, flags);
3568 bad_tag(h, h->nr_cmds + 1, raw_tag);
3569 }
3570
3571 /* Some controllers, like p400, will give us one interrupt
3572 * after a soft reset, even if we turned interrupts off.
3573 * Only need to check for this in the hpsa_xxx_discard_completions
3574 * functions.
3575 */
3576 static int ignore_bogus_interrupt(struct ctlr_info *h)
3577 {
3578 if (likely(!reset_devices))
3579 return 0;
3580
3581 if (likely(h->interrupts_enabled))
3582 return 0;
3583
3584 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3585 "(known firmware bug.) Ignoring.\n");
3586
3587 return 1;
3588 }
3589
3590 /*
3591 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3592 * Relies on (h-q[x] == x) being true for x such that
3593 * 0 <= x < MAX_REPLY_QUEUES.
3594 */
3595 static struct ctlr_info *queue_to_hba(u8 *queue)
3596 {
3597 return container_of((queue - *queue), struct ctlr_info, q[0]);
3598 }
3599
3600 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3601 {
3602 struct ctlr_info *h = queue_to_hba(queue);
3603 u8 q = *(u8 *) queue;
3604 u32 raw_tag;
3605
3606 if (ignore_bogus_interrupt(h))
3607 return IRQ_NONE;
3608
3609 if (interrupt_not_for_us(h))
3610 return IRQ_NONE;
3611 h->last_intr_timestamp = get_jiffies_64();
3612 while (interrupt_pending(h)) {
3613 raw_tag = get_next_completion(h, q);
3614 while (raw_tag != FIFO_EMPTY)
3615 raw_tag = next_command(h, q);
3616 }
3617 return IRQ_HANDLED;
3618 }
3619
3620 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
3621 {
3622 struct ctlr_info *h = queue_to_hba(queue);
3623 u32 raw_tag;
3624 u8 q = *(u8 *) queue;
3625
3626 if (ignore_bogus_interrupt(h))
3627 return IRQ_NONE;
3628
3629 h->last_intr_timestamp = get_jiffies_64();
3630 raw_tag = get_next_completion(h, q);
3631 while (raw_tag != FIFO_EMPTY)
3632 raw_tag = next_command(h, q);
3633 return IRQ_HANDLED;
3634 }
3635
3636 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
3637 {
3638 struct ctlr_info *h = queue_to_hba((u8 *) queue);
3639 u32 raw_tag;
3640 u8 q = *(u8 *) queue;
3641
3642 if (interrupt_not_for_us(h))
3643 return IRQ_NONE;
3644 h->last_intr_timestamp = get_jiffies_64();
3645 while (interrupt_pending(h)) {
3646 raw_tag = get_next_completion(h, q);
3647 while (raw_tag != FIFO_EMPTY) {
3648 if (likely(hpsa_tag_contains_index(raw_tag)))
3649 process_indexed_cmd(h, raw_tag);
3650 else
3651 process_nonindexed_cmd(h, raw_tag);
3652 raw_tag = next_command(h, q);
3653 }
3654 }
3655 return IRQ_HANDLED;
3656 }
3657
3658 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
3659 {
3660 struct ctlr_info *h = queue_to_hba(queue);
3661 u32 raw_tag;
3662 u8 q = *(u8 *) queue;
3663
3664 h->last_intr_timestamp = get_jiffies_64();
3665 raw_tag = get_next_completion(h, q);
3666 while (raw_tag != FIFO_EMPTY) {
3667 if (likely(hpsa_tag_contains_index(raw_tag)))
3668 process_indexed_cmd(h, raw_tag);
3669 else
3670 process_nonindexed_cmd(h, raw_tag);
3671 raw_tag = next_command(h, q);
3672 }
3673 return IRQ_HANDLED;
3674 }
3675
3676 /* Send a message CDB to the firmware. Careful, this only works
3677 * in simple mode, not performant mode due to the tag lookup.
3678 * We only ever use this immediately after a controller reset.
3679 */
3680 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3681 unsigned char type)
3682 {
3683 struct Command {
3684 struct CommandListHeader CommandHeader;
3685 struct RequestBlock Request;
3686 struct ErrDescriptor ErrorDescriptor;
3687 };
3688 struct Command *cmd;
3689 static const size_t cmd_sz = sizeof(*cmd) +
3690 sizeof(cmd->ErrorDescriptor);
3691 dma_addr_t paddr64;
3692 uint32_t paddr32, tag;
3693 void __iomem *vaddr;
3694 int i, err;
3695
3696 vaddr = pci_ioremap_bar(pdev, 0);
3697 if (vaddr == NULL)
3698 return -ENOMEM;
3699
3700 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3701 * CCISS commands, so they must be allocated from the lower 4GiB of
3702 * memory.
3703 */
3704 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3705 if (err) {
3706 iounmap(vaddr);
3707 return -ENOMEM;
3708 }
3709
3710 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3711 if (cmd == NULL) {
3712 iounmap(vaddr);
3713 return -ENOMEM;
3714 }
3715
3716 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3717 * although there's no guarantee, we assume that the address is at
3718 * least 4-byte aligned (most likely, it's page-aligned).
3719 */
3720 paddr32 = paddr64;
3721
3722 cmd->CommandHeader.ReplyQueue = 0;
3723 cmd->CommandHeader.SGList = 0;
3724 cmd->CommandHeader.SGTotal = 0;
3725 cmd->CommandHeader.Tag.lower = paddr32;
3726 cmd->CommandHeader.Tag.upper = 0;
3727 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3728
3729 cmd->Request.CDBLen = 16;
3730 cmd->Request.Type.Type = TYPE_MSG;
3731 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3732 cmd->Request.Type.Direction = XFER_NONE;
3733 cmd->Request.Timeout = 0; /* Don't time out */
3734 cmd->Request.CDB[0] = opcode;
3735 cmd->Request.CDB[1] = type;
3736 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3737 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3738 cmd->ErrorDescriptor.Addr.upper = 0;
3739 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3740
3741 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3742
3743 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3744 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3745 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3746 break;
3747 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3748 }
3749
3750 iounmap(vaddr);
3751
3752 /* we leak the DMA buffer here ... no choice since the controller could
3753 * still complete the command.
3754 */
3755 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3756 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3757 opcode, type);
3758 return -ETIMEDOUT;
3759 }
3760
3761 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3762
3763 if (tag & HPSA_ERROR_BIT) {
3764 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3765 opcode, type);
3766 return -EIO;
3767 }
3768
3769 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3770 opcode, type);
3771 return 0;
3772 }
3773
3774 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3775
3776 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3777 void * __iomem vaddr, u32 use_doorbell)
3778 {
3779 u16 pmcsr;
3780 int pos;
3781
3782 if (use_doorbell) {
3783 /* For everything after the P600, the PCI power state method
3784 * of resetting the controller doesn't work, so we have this
3785 * other way using the doorbell register.
3786 */
3787 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3788 writel(use_doorbell, vaddr + SA5_DOORBELL);
3789 } else { /* Try to do it the PCI power state way */
3790
3791 /* Quoting from the Open CISS Specification: "The Power
3792 * Management Control/Status Register (CSR) controls the power
3793 * state of the device. The normal operating state is D0,
3794 * CSR=00h. The software off state is D3, CSR=03h. To reset
3795 * the controller, place the interface device in D3 then to D0,
3796 * this causes a secondary PCI reset which will reset the
3797 * controller." */
3798
3799 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3800 if (pos == 0) {
3801 dev_err(&pdev->dev,
3802 "hpsa_reset_controller: "
3803 "PCI PM not supported\n");
3804 return -ENODEV;
3805 }
3806 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3807 /* enter the D3hot power management state */
3808 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3809 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3810 pmcsr |= PCI_D3hot;
3811 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3812
3813 msleep(500);
3814
3815 /* enter the D0 power management state */
3816 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3817 pmcsr |= PCI_D0;
3818 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3819
3820 /*
3821 * The P600 requires a small delay when changing states.
3822 * Otherwise we may think the board did not reset and we bail.
3823 * This for kdump only and is particular to the P600.
3824 */
3825 msleep(500);
3826 }
3827 return 0;
3828 }
3829
3830 static void init_driver_version(char *driver_version, int len)
3831 {
3832 memset(driver_version, 0, len);
3833 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
3834 }
3835
3836 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
3837 {
3838 char *driver_version;
3839 int i, size = sizeof(cfgtable->driver_version);
3840
3841 driver_version = kmalloc(size, GFP_KERNEL);
3842 if (!driver_version)
3843 return -ENOMEM;
3844
3845 init_driver_version(driver_version, size);
3846 for (i = 0; i < size; i++)
3847 writeb(driver_version[i], &cfgtable->driver_version[i]);
3848 kfree(driver_version);
3849 return 0;
3850 }
3851
3852 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3853 unsigned char *driver_ver)
3854 {
3855 int i;
3856
3857 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3858 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3859 }
3860
3861 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
3862 {
3863
3864 char *driver_ver, *old_driver_ver;
3865 int rc, size = sizeof(cfgtable->driver_version);
3866
3867 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3868 if (!old_driver_ver)
3869 return -ENOMEM;
3870 driver_ver = old_driver_ver + size;
3871
3872 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3873 * should have been changed, otherwise we know the reset failed.
3874 */
3875 init_driver_version(old_driver_ver, size);
3876 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3877 rc = !memcmp(driver_ver, old_driver_ver, size);
3878 kfree(old_driver_ver);
3879 return rc;
3880 }
3881 /* This does a hard reset of the controller using PCI power management
3882 * states or the using the doorbell register.
3883 */
3884 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3885 {
3886 u64 cfg_offset;
3887 u32 cfg_base_addr;
3888 u64 cfg_base_addr_index;
3889 void __iomem *vaddr;
3890 unsigned long paddr;
3891 u32 misc_fw_support;
3892 int rc;
3893 struct CfgTable __iomem *cfgtable;
3894 u32 use_doorbell;
3895 u32 board_id;
3896 u16 command_register;
3897
3898 /* For controllers as old as the P600, this is very nearly
3899 * the same thing as
3900 *
3901 * pci_save_state(pci_dev);
3902 * pci_set_power_state(pci_dev, PCI_D3hot);
3903 * pci_set_power_state(pci_dev, PCI_D0);
3904 * pci_restore_state(pci_dev);
3905 *
3906 * For controllers newer than the P600, the pci power state
3907 * method of resetting doesn't work so we have another way
3908 * using the doorbell register.
3909 */
3910
3911 rc = hpsa_lookup_board_id(pdev, &board_id);
3912 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3913 dev_warn(&pdev->dev, "Not resetting device.\n");
3914 return -ENODEV;
3915 }
3916
3917 /* if controller is soft- but not hard resettable... */
3918 if (!ctlr_is_hard_resettable(board_id))
3919 return -ENOTSUPP; /* try soft reset later. */
3920
3921 /* Save the PCI command register */
3922 pci_read_config_word(pdev, 4, &command_register);
3923 pci_save_state(pdev);
3924
3925 /* find the first memory BAR, so we can find the cfg table */
3926 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3927 if (rc)
3928 return rc;
3929 vaddr = remap_pci_mem(paddr, 0x250);
3930 if (!vaddr)
3931 return -ENOMEM;
3932
3933 /* find cfgtable in order to check if reset via doorbell is supported */
3934 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3935 &cfg_base_addr_index, &cfg_offset);
3936 if (rc)
3937 goto unmap_vaddr;
3938 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3939 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3940 if (!cfgtable) {
3941 rc = -ENOMEM;
3942 goto unmap_vaddr;
3943 }
3944 rc = write_driver_ver_to_cfgtable(cfgtable);
3945 if (rc)
3946 goto unmap_vaddr;
3947
3948 /* If reset via doorbell register is supported, use that.
3949 * There are two such methods. Favor the newest method.
3950 */
3951 misc_fw_support = readl(&cfgtable->misc_fw_support);
3952 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3953 if (use_doorbell) {
3954 use_doorbell = DOORBELL_CTLR_RESET2;
3955 } else {
3956 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3957 if (use_doorbell) {
3958 dev_warn(&pdev->dev, "Soft reset not supported. "
3959 "Firmware update is required.\n");
3960 rc = -ENOTSUPP; /* try soft reset */
3961 goto unmap_cfgtable;
3962 }
3963 }
3964
3965 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3966 if (rc)
3967 goto unmap_cfgtable;
3968
3969 pci_restore_state(pdev);
3970 pci_write_config_word(pdev, 4, command_register);
3971
3972 /* Some devices (notably the HP Smart Array 5i Controller)
3973 need a little pause here */
3974 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3975
3976 /* Wait for board to become not ready, then ready. */
3977 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3978 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3979 if (rc) {
3980 dev_warn(&pdev->dev,
3981 "failed waiting for board to reset."
3982 " Will try soft reset.\n");
3983 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3984 goto unmap_cfgtable;
3985 }
3986 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3987 if (rc) {
3988 dev_warn(&pdev->dev,
3989 "failed waiting for board to become ready "
3990 "after hard reset\n");
3991 goto unmap_cfgtable;
3992 }
3993
3994 rc = controller_reset_failed(vaddr);
3995 if (rc < 0)
3996 goto unmap_cfgtable;
3997 if (rc) {
3998 dev_warn(&pdev->dev, "Unable to successfully reset "
3999 "controller. Will try soft reset.\n");
4000 rc = -ENOTSUPP;
4001 } else {
4002 dev_info(&pdev->dev, "board ready after hard reset.\n");
4003 }
4004
4005 unmap_cfgtable:
4006 iounmap(cfgtable);
4007
4008 unmap_vaddr:
4009 iounmap(vaddr);
4010 return rc;
4011 }
4012
4013 /*
4014 * We cannot read the structure directly, for portability we must use
4015 * the io functions.
4016 * This is for debug only.
4017 */
4018 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4019 {
4020 #ifdef HPSA_DEBUG
4021 int i;
4022 char temp_name[17];
4023
4024 dev_info(dev, "Controller Configuration information\n");
4025 dev_info(dev, "------------------------------------\n");
4026 for (i = 0; i < 4; i++)
4027 temp_name[i] = readb(&(tb->Signature[i]));
4028 temp_name[4] = '\0';
4029 dev_info(dev, " Signature = %s\n", temp_name);
4030 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4031 dev_info(dev, " Transport methods supported = 0x%x\n",
4032 readl(&(tb->TransportSupport)));
4033 dev_info(dev, " Transport methods active = 0x%x\n",
4034 readl(&(tb->TransportActive)));
4035 dev_info(dev, " Requested transport Method = 0x%x\n",
4036 readl(&(tb->HostWrite.TransportRequest)));
4037 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4038 readl(&(tb->HostWrite.CoalIntDelay)));
4039 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4040 readl(&(tb->HostWrite.CoalIntCount)));
4041 dev_info(dev, " Max outstanding commands = 0x%d\n",
4042 readl(&(tb->CmdsOutMax)));
4043 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4044 for (i = 0; i < 16; i++)
4045 temp_name[i] = readb(&(tb->ServerName[i]));
4046 temp_name[16] = '\0';
4047 dev_info(dev, " Server Name = %s\n", temp_name);
4048 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4049 readl(&(tb->HeartBeat)));
4050 #endif /* HPSA_DEBUG */
4051 }
4052
4053 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4054 {
4055 int i, offset, mem_type, bar_type;
4056
4057 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4058 return 0;
4059 offset = 0;
4060 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4061 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4062 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4063 offset += 4;
4064 else {
4065 mem_type = pci_resource_flags(pdev, i) &
4066 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4067 switch (mem_type) {
4068 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4069 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4070 offset += 4; /* 32 bit */
4071 break;
4072 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4073 offset += 8;
4074 break;
4075 default: /* reserved in PCI 2.2 */
4076 dev_warn(&pdev->dev,
4077 "base address is invalid\n");
4078 return -1;
4079 break;
4080 }
4081 }
4082 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4083 return i + 1;
4084 }
4085 return -1;
4086 }
4087
4088 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4089 * controllers that are capable. If not, we use IO-APIC mode.
4090 */
4091
4092 static void hpsa_interrupt_mode(struct ctlr_info *h)
4093 {
4094 #ifdef CONFIG_PCI_MSI
4095 int err, i;
4096 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4097
4098 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4099 hpsa_msix_entries[i].vector = 0;
4100 hpsa_msix_entries[i].entry = i;
4101 }
4102
4103 /* Some boards advertise MSI but don't really support it */
4104 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4105 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4106 goto default_int_mode;
4107 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4108 dev_info(&h->pdev->dev, "MSIX\n");
4109 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4110 MAX_REPLY_QUEUES);
4111 if (!err) {
4112 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4113 h->intr[i] = hpsa_msix_entries[i].vector;
4114 h->msix_vector = 1;
4115 return;
4116 }
4117 if (err > 0) {
4118 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
4119 "available\n", err);
4120 goto default_int_mode;
4121 } else {
4122 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
4123 err);
4124 goto default_int_mode;
4125 }
4126 }
4127 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4128 dev_info(&h->pdev->dev, "MSI\n");
4129 if (!pci_enable_msi(h->pdev))
4130 h->msi_vector = 1;
4131 else
4132 dev_warn(&h->pdev->dev, "MSI init failed\n");
4133 }
4134 default_int_mode:
4135 #endif /* CONFIG_PCI_MSI */
4136 /* if we get here we're going to use the default interrupt mode */
4137 h->intr[h->intr_mode] = h->pdev->irq;
4138 }
4139
4140 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4141 {
4142 int i;
4143 u32 subsystem_vendor_id, subsystem_device_id;
4144
4145 subsystem_vendor_id = pdev->subsystem_vendor;
4146 subsystem_device_id = pdev->subsystem_device;
4147 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4148 subsystem_vendor_id;
4149
4150 for (i = 0; i < ARRAY_SIZE(products); i++)
4151 if (*board_id == products[i].board_id)
4152 return i;
4153
4154 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4155 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4156 !hpsa_allow_any) {
4157 dev_warn(&pdev->dev, "unrecognized board ID: "
4158 "0x%08x, ignoring.\n", *board_id);
4159 return -ENODEV;
4160 }
4161 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4162 }
4163
4164 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4165 unsigned long *memory_bar)
4166 {
4167 int i;
4168
4169 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4170 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4171 /* addressing mode bits already removed */
4172 *memory_bar = pci_resource_start(pdev, i);
4173 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4174 *memory_bar);
4175 return 0;
4176 }
4177 dev_warn(&pdev->dev, "no memory BAR found\n");
4178 return -ENODEV;
4179 }
4180
4181 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4182 int wait_for_ready)
4183 {
4184 int i, iterations;
4185 u32 scratchpad;
4186 if (wait_for_ready)
4187 iterations = HPSA_BOARD_READY_ITERATIONS;
4188 else
4189 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
4190
4191 for (i = 0; i < iterations; i++) {
4192 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4193 if (wait_for_ready) {
4194 if (scratchpad == HPSA_FIRMWARE_READY)
4195 return 0;
4196 } else {
4197 if (scratchpad != HPSA_FIRMWARE_READY)
4198 return 0;
4199 }
4200 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4201 }
4202 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4203 return -ENODEV;
4204 }
4205
4206 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4207 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4208 u64 *cfg_offset)
4209 {
4210 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4211 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4212 *cfg_base_addr &= (u32) 0x0000ffff;
4213 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4214 if (*cfg_base_addr_index == -1) {
4215 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4216 return -ENODEV;
4217 }
4218 return 0;
4219 }
4220
4221 static int hpsa_find_cfgtables(struct ctlr_info *h)
4222 {
4223 u64 cfg_offset;
4224 u32 cfg_base_addr;
4225 u64 cfg_base_addr_index;
4226 u32 trans_offset;
4227 int rc;
4228
4229 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4230 &cfg_base_addr_index, &cfg_offset);
4231 if (rc)
4232 return rc;
4233 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4234 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4235 if (!h->cfgtable)
4236 return -ENOMEM;
4237 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4238 if (rc)
4239 return rc;
4240 /* Find performant mode table. */
4241 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4242 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4243 cfg_base_addr_index)+cfg_offset+trans_offset,
4244 sizeof(*h->transtable));
4245 if (!h->transtable)
4246 return -ENOMEM;
4247 return 0;
4248 }
4249
4250 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
4251 {
4252 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4253
4254 /* Limit commands in memory limited kdump scenario. */
4255 if (reset_devices && h->max_commands > 32)
4256 h->max_commands = 32;
4257
4258 if (h->max_commands < 16) {
4259 dev_warn(&h->pdev->dev, "Controller reports "
4260 "max supported commands of %d, an obvious lie. "
4261 "Using 16. Ensure that firmware is up to date.\n",
4262 h->max_commands);
4263 h->max_commands = 16;
4264 }
4265 }
4266
4267 /* Interrogate the hardware for some limits:
4268 * max commands, max SG elements without chaining, and with chaining,
4269 * SG chain block size, etc.
4270 */
4271 static void hpsa_find_board_params(struct ctlr_info *h)
4272 {
4273 hpsa_get_max_perf_mode_cmds(h);
4274 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4275 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4276 /*
4277 * Limit in-command s/g elements to 32 save dma'able memory.
4278 * Howvever spec says if 0, use 31
4279 */
4280 h->max_cmd_sg_entries = 31;
4281 if (h->maxsgentries > 512) {
4282 h->max_cmd_sg_entries = 32;
4283 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4284 h->maxsgentries--; /* save one for chain pointer */
4285 } else {
4286 h->maxsgentries = 31; /* default to traditional values */
4287 h->chainsize = 0;
4288 }
4289
4290 /* Find out what task management functions are supported and cache */
4291 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
4292 }
4293
4294 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4295 {
4296 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4297 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4298 return false;
4299 }
4300 return true;
4301 }
4302
4303 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4304 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4305 {
4306 #ifdef CONFIG_X86
4307 u32 prefetch;
4308
4309 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4310 prefetch |= 0x100;
4311 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4312 #endif
4313 }
4314
4315 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4316 * in a prefetch beyond physical memory.
4317 */
4318 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4319 {
4320 u32 dma_prefetch;
4321
4322 if (h->board_id != 0x3225103C)
4323 return;
4324 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4325 dma_prefetch |= 0x8000;
4326 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4327 }
4328
4329 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
4330 {
4331 int i;
4332 u32 doorbell_value;
4333 unsigned long flags;
4334
4335 /* under certain very rare conditions, this can take awhile.
4336 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4337 * as we enter this code.)
4338 */
4339 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
4340 spin_lock_irqsave(&h->lock, flags);
4341 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4342 spin_unlock_irqrestore(&h->lock, flags);
4343 if (!(doorbell_value & CFGTBL_ChangeReq))
4344 break;
4345 /* delay and try again */
4346 usleep_range(10000, 20000);
4347 }
4348 }
4349
4350 static int hpsa_enter_simple_mode(struct ctlr_info *h)
4351 {
4352 u32 trans_support;
4353
4354 trans_support = readl(&(h->cfgtable->TransportSupport));
4355 if (!(trans_support & SIMPLE_MODE))
4356 return -ENOTSUPP;
4357
4358 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4359 /* Update the field, and then ring the doorbell */
4360 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4361 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4362 hpsa_wait_for_mode_change_ack(h);
4363 print_cfg_table(&h->pdev->dev, h->cfgtable);
4364 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4365 dev_warn(&h->pdev->dev,
4366 "unable to get board into simple mode\n");
4367 return -ENODEV;
4368 }
4369 h->transMethod = CFGTBL_Trans_Simple;
4370 return 0;
4371 }
4372
4373 static int hpsa_pci_init(struct ctlr_info *h)
4374 {
4375 int prod_index, err;
4376
4377 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4378 if (prod_index < 0)
4379 return -ENODEV;
4380 h->product_name = products[prod_index].product_name;
4381 h->access = *(products[prod_index].access);
4382
4383 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4384 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4385
4386 err = pci_enable_device(h->pdev);
4387 if (err) {
4388 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
4389 return err;
4390 }
4391
4392 /* Enable bus mastering (pci_disable_device may disable this) */
4393 pci_set_master(h->pdev);
4394
4395 err = pci_request_regions(h->pdev, HPSA);
4396 if (err) {
4397 dev_err(&h->pdev->dev,
4398 "cannot obtain PCI resources, aborting\n");
4399 return err;
4400 }
4401 hpsa_interrupt_mode(h);
4402 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
4403 if (err)
4404 goto err_out_free_res;
4405 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4406 if (!h->vaddr) {
4407 err = -ENOMEM;
4408 goto err_out_free_res;
4409 }
4410 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4411 if (err)
4412 goto err_out_free_res;
4413 err = hpsa_find_cfgtables(h);
4414 if (err)
4415 goto err_out_free_res;
4416 hpsa_find_board_params(h);
4417
4418 if (!hpsa_CISS_signature_present(h)) {
4419 err = -ENODEV;
4420 goto err_out_free_res;
4421 }
4422 hpsa_enable_scsi_prefetch(h);
4423 hpsa_p600_dma_prefetch_quirk(h);
4424 err = hpsa_enter_simple_mode(h);
4425 if (err)
4426 goto err_out_free_res;
4427 return 0;
4428
4429 err_out_free_res:
4430 if (h->transtable)
4431 iounmap(h->transtable);
4432 if (h->cfgtable)
4433 iounmap(h->cfgtable);
4434 if (h->vaddr)
4435 iounmap(h->vaddr);
4436 pci_disable_device(h->pdev);
4437 pci_release_regions(h->pdev);
4438 return err;
4439 }
4440
4441 static void hpsa_hba_inquiry(struct ctlr_info *h)
4442 {
4443 int rc;
4444
4445 #define HBA_INQUIRY_BYTE_COUNT 64
4446 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4447 if (!h->hba_inquiry_data)
4448 return;
4449 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4450 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4451 if (rc != 0) {
4452 kfree(h->hba_inquiry_data);
4453 h->hba_inquiry_data = NULL;
4454 }
4455 }
4456
4457 static int hpsa_init_reset_devices(struct pci_dev *pdev)
4458 {
4459 int rc, i;
4460 void __iomem *vaddr;
4461
4462 if (!reset_devices)
4463 return 0;
4464
4465 /* kdump kernel is loading, we don't know in which state is
4466 * the pci interface. The dev->enable_cnt is equal zero
4467 * so we call enable+disable, wait a while and switch it on.
4468 */
4469 rc = pci_enable_device(pdev);
4470 if (rc) {
4471 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
4472 return -ENODEV;
4473 }
4474 pci_disable_device(pdev);
4475 msleep(260); /* a randomly chosen number */
4476 rc = pci_enable_device(pdev);
4477 if (rc) {
4478 dev_warn(&pdev->dev, "failed to enable device.\n");
4479 return -ENODEV;
4480 }
4481 pci_set_master(pdev);
4482
4483 vaddr = pci_ioremap_bar(pdev, 0);
4484 if (vaddr == NULL) {
4485 rc = -ENOMEM;
4486 goto out_disable;
4487 }
4488 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
4489 iounmap(vaddr);
4490
4491 /* Reset the controller with a PCI power-cycle or via doorbell */
4492 rc = hpsa_kdump_hard_reset_controller(pdev);
4493
4494 /* -ENOTSUPP here means we cannot reset the controller
4495 * but it's already (and still) up and running in
4496 * "performant mode". Or, it might be 640x, which can't reset
4497 * due to concerns about shared bbwc between 6402/6404 pair.
4498 */
4499 if (rc) {
4500 if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */
4501 rc = -ENODEV;
4502 goto out_disable;
4503 }
4504
4505 /* Now try to get the controller to respond to a no-op */
4506 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4507 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4508 if (hpsa_noop(pdev) == 0)
4509 break;
4510 else
4511 dev_warn(&pdev->dev, "no-op failed%s\n",
4512 (i < 11 ? "; re-trying" : ""));
4513 }
4514
4515 out_disable:
4516
4517 pci_disable_device(pdev);
4518 return rc;
4519 }
4520
4521 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4522 {
4523 h->cmd_pool_bits = kzalloc(
4524 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4525 sizeof(unsigned long), GFP_KERNEL);
4526 h->cmd_pool = pci_alloc_consistent(h->pdev,
4527 h->nr_cmds * sizeof(*h->cmd_pool),
4528 &(h->cmd_pool_dhandle));
4529 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4530 h->nr_cmds * sizeof(*h->errinfo_pool),
4531 &(h->errinfo_pool_dhandle));
4532 if ((h->cmd_pool_bits == NULL)
4533 || (h->cmd_pool == NULL)
4534 || (h->errinfo_pool == NULL)) {
4535 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4536 return -ENOMEM;
4537 }
4538 return 0;
4539 }
4540
4541 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4542 {
4543 kfree(h->cmd_pool_bits);
4544 if (h->cmd_pool)
4545 pci_free_consistent(h->pdev,
4546 h->nr_cmds * sizeof(struct CommandList),
4547 h->cmd_pool, h->cmd_pool_dhandle);
4548 if (h->errinfo_pool)
4549 pci_free_consistent(h->pdev,
4550 h->nr_cmds * sizeof(struct ErrorInfo),
4551 h->errinfo_pool,
4552 h->errinfo_pool_dhandle);
4553 }
4554
4555 static int hpsa_request_irq(struct ctlr_info *h,
4556 irqreturn_t (*msixhandler)(int, void *),
4557 irqreturn_t (*intxhandler)(int, void *))
4558 {
4559 int rc, i;
4560
4561 /*
4562 * initialize h->q[x] = x so that interrupt handlers know which
4563 * queue to process.
4564 */
4565 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4566 h->q[i] = (u8) i;
4567
4568 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4569 /* If performant mode and MSI-X, use multiple reply queues */
4570 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4571 rc = request_irq(h->intr[i], msixhandler,
4572 0, h->devname,
4573 &h->q[i]);
4574 } else {
4575 /* Use single reply pool */
4576 if (h->msix_vector || h->msi_vector) {
4577 rc = request_irq(h->intr[h->intr_mode],
4578 msixhandler, 0, h->devname,
4579 &h->q[h->intr_mode]);
4580 } else {
4581 rc = request_irq(h->intr[h->intr_mode],
4582 intxhandler, IRQF_SHARED, h->devname,
4583 &h->q[h->intr_mode]);
4584 }
4585 }
4586 if (rc) {
4587 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4588 h->intr[h->intr_mode], h->devname);
4589 return -ENODEV;
4590 }
4591 return 0;
4592 }
4593
4594 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
4595 {
4596 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4597 HPSA_RESET_TYPE_CONTROLLER)) {
4598 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4599 return -EIO;
4600 }
4601
4602 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4603 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4604 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4605 return -1;
4606 }
4607
4608 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4609 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4610 dev_warn(&h->pdev->dev, "Board failed to become ready "
4611 "after soft reset.\n");
4612 return -1;
4613 }
4614
4615 return 0;
4616 }
4617
4618 static void free_irqs(struct ctlr_info *h)
4619 {
4620 int i;
4621
4622 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4623 /* Single reply queue, only one irq to free */
4624 i = h->intr_mode;
4625 free_irq(h->intr[i], &h->q[i]);
4626 return;
4627 }
4628
4629 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4630 free_irq(h->intr[i], &h->q[i]);
4631 }
4632
4633 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
4634 {
4635 free_irqs(h);
4636 #ifdef CONFIG_PCI_MSI
4637 if (h->msix_vector) {
4638 if (h->pdev->msix_enabled)
4639 pci_disable_msix(h->pdev);
4640 } else if (h->msi_vector) {
4641 if (h->pdev->msi_enabled)
4642 pci_disable_msi(h->pdev);
4643 }
4644 #endif /* CONFIG_PCI_MSI */
4645 }
4646
4647 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4648 {
4649 hpsa_free_irqs_and_disable_msix(h);
4650 hpsa_free_sg_chain_blocks(h);
4651 hpsa_free_cmd_pool(h);
4652 kfree(h->blockFetchTable);
4653 pci_free_consistent(h->pdev, h->reply_pool_size,
4654 h->reply_pool, h->reply_pool_dhandle);
4655 if (h->vaddr)
4656 iounmap(h->vaddr);
4657 if (h->transtable)
4658 iounmap(h->transtable);
4659 if (h->cfgtable)
4660 iounmap(h->cfgtable);
4661 pci_disable_device(h->pdev);
4662 pci_release_regions(h->pdev);
4663 kfree(h);
4664 }
4665
4666 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4667 {
4668 assert_spin_locked(&lockup_detector_lock);
4669 if (!hpsa_lockup_detector)
4670 return;
4671 if (h->lockup_detected)
4672 return; /* already stopped the lockup detector */
4673 list_del(&h->lockup_list);
4674 }
4675
4676 /* Called when controller lockup detected. */
4677 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4678 {
4679 struct CommandList *c = NULL;
4680
4681 assert_spin_locked(&h->lock);
4682 /* Mark all outstanding commands as failed and complete them. */
4683 while (!list_empty(list)) {
4684 c = list_entry(list->next, struct CommandList, list);
4685 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4686 finish_cmd(c);
4687 }
4688 }
4689
4690 static void controller_lockup_detected(struct ctlr_info *h)
4691 {
4692 unsigned long flags;
4693
4694 assert_spin_locked(&lockup_detector_lock);
4695 remove_ctlr_from_lockup_detector_list(h);
4696 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4697 spin_lock_irqsave(&h->lock, flags);
4698 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4699 spin_unlock_irqrestore(&h->lock, flags);
4700 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4701 h->lockup_detected);
4702 pci_disable_device(h->pdev);
4703 spin_lock_irqsave(&h->lock, flags);
4704 fail_all_cmds_on_list(h, &h->cmpQ);
4705 fail_all_cmds_on_list(h, &h->reqQ);
4706 spin_unlock_irqrestore(&h->lock, flags);
4707 }
4708
4709 static void detect_controller_lockup(struct ctlr_info *h)
4710 {
4711 u64 now;
4712 u32 heartbeat;
4713 unsigned long flags;
4714
4715 assert_spin_locked(&lockup_detector_lock);
4716 now = get_jiffies_64();
4717 /* If we've received an interrupt recently, we're ok. */
4718 if (time_after64(h->last_intr_timestamp +
4719 (h->heartbeat_sample_interval), now))
4720 return;
4721
4722 /*
4723 * If we've already checked the heartbeat recently, we're ok.
4724 * This could happen if someone sends us a signal. We
4725 * otherwise don't care about signals in this thread.
4726 */
4727 if (time_after64(h->last_heartbeat_timestamp +
4728 (h->heartbeat_sample_interval), now))
4729 return;
4730
4731 /* If heartbeat has not changed since we last looked, we're not ok. */
4732 spin_lock_irqsave(&h->lock, flags);
4733 heartbeat = readl(&h->cfgtable->HeartBeat);
4734 spin_unlock_irqrestore(&h->lock, flags);
4735 if (h->last_heartbeat == heartbeat) {
4736 controller_lockup_detected(h);
4737 return;
4738 }
4739
4740 /* We're ok. */
4741 h->last_heartbeat = heartbeat;
4742 h->last_heartbeat_timestamp = now;
4743 }
4744
4745 static int detect_controller_lockup_thread(void *notused)
4746 {
4747 struct ctlr_info *h;
4748 unsigned long flags;
4749
4750 while (1) {
4751 struct list_head *this, *tmp;
4752
4753 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4754 if (kthread_should_stop())
4755 break;
4756 spin_lock_irqsave(&lockup_detector_lock, flags);
4757 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4758 h = list_entry(this, struct ctlr_info, lockup_list);
4759 detect_controller_lockup(h);
4760 }
4761 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4762 }
4763 return 0;
4764 }
4765
4766 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4767 {
4768 unsigned long flags;
4769
4770 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4771 spin_lock_irqsave(&lockup_detector_lock, flags);
4772 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4773 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4774 }
4775
4776 static void start_controller_lockup_detector(struct ctlr_info *h)
4777 {
4778 /* Start the lockup detector thread if not already started */
4779 if (!hpsa_lockup_detector) {
4780 spin_lock_init(&lockup_detector_lock);
4781 hpsa_lockup_detector =
4782 kthread_run(detect_controller_lockup_thread,
4783 NULL, HPSA);
4784 }
4785 if (!hpsa_lockup_detector) {
4786 dev_warn(&h->pdev->dev,
4787 "Could not start lockup detector thread\n");
4788 return;
4789 }
4790 add_ctlr_to_lockup_detector_list(h);
4791 }
4792
4793 static void stop_controller_lockup_detector(struct ctlr_info *h)
4794 {
4795 unsigned long flags;
4796
4797 spin_lock_irqsave(&lockup_detector_lock, flags);
4798 remove_ctlr_from_lockup_detector_list(h);
4799 /* If the list of ctlr's to monitor is empty, stop the thread */
4800 if (list_empty(&hpsa_ctlr_list)) {
4801 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4802 kthread_stop(hpsa_lockup_detector);
4803 spin_lock_irqsave(&lockup_detector_lock, flags);
4804 hpsa_lockup_detector = NULL;
4805 }
4806 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4807 }
4808
4809 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4810 {
4811 int dac, rc;
4812 struct ctlr_info *h;
4813 int try_soft_reset = 0;
4814 unsigned long flags;
4815
4816 if (number_of_controllers == 0)
4817 printk(KERN_INFO DRIVER_NAME "\n");
4818
4819 rc = hpsa_init_reset_devices(pdev);
4820 if (rc) {
4821 if (rc != -ENOTSUPP)
4822 return rc;
4823 /* If the reset fails in a particular way (it has no way to do
4824 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4825 * a soft reset once we get the controller configured up to the
4826 * point that it can accept a command.
4827 */
4828 try_soft_reset = 1;
4829 rc = 0;
4830 }
4831
4832 reinit_after_soft_reset:
4833
4834 /* Command structures must be aligned on a 32-byte boundary because
4835 * the 5 lower bits of the address are used by the hardware. and by
4836 * the driver. See comments in hpsa.h for more info.
4837 */
4838 #define COMMANDLIST_ALIGNMENT 32
4839 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4840 h = kzalloc(sizeof(*h), GFP_KERNEL);
4841 if (!h)
4842 return -ENOMEM;
4843
4844 h->pdev = pdev;
4845 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4846 INIT_LIST_HEAD(&h->cmpQ);
4847 INIT_LIST_HEAD(&h->reqQ);
4848 spin_lock_init(&h->lock);
4849 spin_lock_init(&h->scan_lock);
4850 rc = hpsa_pci_init(h);
4851 if (rc != 0)
4852 goto clean1;
4853
4854 sprintf(h->devname, HPSA "%d", number_of_controllers);
4855 h->ctlr = number_of_controllers;
4856 number_of_controllers++;
4857
4858 /* configure PCI DMA stuff */
4859 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4860 if (rc == 0) {
4861 dac = 1;
4862 } else {
4863 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4864 if (rc == 0) {
4865 dac = 0;
4866 } else {
4867 dev_err(&pdev->dev, "no suitable DMA available\n");
4868 goto clean1;
4869 }
4870 }
4871
4872 /* make sure the board interrupts are off */
4873 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4874
4875 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4876 goto clean2;
4877 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4878 h->devname, pdev->device,
4879 h->intr[h->intr_mode], dac ? "" : " not");
4880 if (hpsa_allocate_cmd_pool(h))
4881 goto clean4;
4882 if (hpsa_allocate_sg_chain_blocks(h))
4883 goto clean4;
4884 init_waitqueue_head(&h->scan_wait_queue);
4885 h->scan_finished = 1; /* no scan currently in progress */
4886
4887 pci_set_drvdata(pdev, h);
4888 h->ndevices = 0;
4889 h->scsi_host = NULL;
4890 spin_lock_init(&h->devlock);
4891 hpsa_put_ctlr_into_performant_mode(h);
4892
4893 /* At this point, the controller is ready to take commands.
4894 * Now, if reset_devices and the hard reset didn't work, try
4895 * the soft reset and see if that works.
4896 */
4897 if (try_soft_reset) {
4898
4899 /* This is kind of gross. We may or may not get a completion
4900 * from the soft reset command, and if we do, then the value
4901 * from the fifo may or may not be valid. So, we wait 10 secs
4902 * after the reset throwing away any completions we get during
4903 * that time. Unregister the interrupt handler and register
4904 * fake ones to scoop up any residual completions.
4905 */
4906 spin_lock_irqsave(&h->lock, flags);
4907 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4908 spin_unlock_irqrestore(&h->lock, flags);
4909 free_irqs(h);
4910 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4911 hpsa_intx_discard_completions);
4912 if (rc) {
4913 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4914 "soft reset.\n");
4915 goto clean4;
4916 }
4917
4918 rc = hpsa_kdump_soft_reset(h);
4919 if (rc)
4920 /* Neither hard nor soft reset worked, we're hosed. */
4921 goto clean4;
4922
4923 dev_info(&h->pdev->dev, "Board READY.\n");
4924 dev_info(&h->pdev->dev,
4925 "Waiting for stale completions to drain.\n");
4926 h->access.set_intr_mask(h, HPSA_INTR_ON);
4927 msleep(10000);
4928 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4929
4930 rc = controller_reset_failed(h->cfgtable);
4931 if (rc)
4932 dev_info(&h->pdev->dev,
4933 "Soft reset appears to have failed.\n");
4934
4935 /* since the controller's reset, we have to go back and re-init
4936 * everything. Easiest to just forget what we've done and do it
4937 * all over again.
4938 */
4939 hpsa_undo_allocations_after_kdump_soft_reset(h);
4940 try_soft_reset = 0;
4941 if (rc)
4942 /* don't go to clean4, we already unallocated */
4943 return -ENODEV;
4944
4945 goto reinit_after_soft_reset;
4946 }
4947
4948 /* Turn the interrupts on so we can service requests */
4949 h->access.set_intr_mask(h, HPSA_INTR_ON);
4950
4951 hpsa_hba_inquiry(h);
4952 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4953 start_controller_lockup_detector(h);
4954 return 0;
4955
4956 clean4:
4957 hpsa_free_sg_chain_blocks(h);
4958 hpsa_free_cmd_pool(h);
4959 free_irqs(h);
4960 clean2:
4961 clean1:
4962 kfree(h);
4963 return rc;
4964 }
4965
4966 static void hpsa_flush_cache(struct ctlr_info *h)
4967 {
4968 char *flush_buf;
4969 struct CommandList *c;
4970
4971 flush_buf = kzalloc(4, GFP_KERNEL);
4972 if (!flush_buf)
4973 return;
4974
4975 c = cmd_special_alloc(h);
4976 if (!c) {
4977 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4978 goto out_of_memory;
4979 }
4980 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4981 RAID_CTLR_LUNID, TYPE_CMD)) {
4982 goto out;
4983 }
4984 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4985 if (c->err_info->CommandStatus != 0)
4986 out:
4987 dev_warn(&h->pdev->dev,
4988 "error flushing cache on controller\n");
4989 cmd_special_free(h, c);
4990 out_of_memory:
4991 kfree(flush_buf);
4992 }
4993
4994 static void hpsa_shutdown(struct pci_dev *pdev)
4995 {
4996 struct ctlr_info *h;
4997
4998 h = pci_get_drvdata(pdev);
4999 /* Turn board interrupts off and send the flush cache command
5000 * sendcmd will turn off interrupt, and send the flush...
5001 * To write all data in the battery backed cache to disks
5002 */
5003 hpsa_flush_cache(h);
5004 h->access.set_intr_mask(h, HPSA_INTR_OFF);
5005 hpsa_free_irqs_and_disable_msix(h);
5006 }
5007
5008 static void hpsa_free_device_info(struct ctlr_info *h)
5009 {
5010 int i;
5011
5012 for (i = 0; i < h->ndevices; i++)
5013 kfree(h->dev[i]);
5014 }
5015
5016 static void hpsa_remove_one(struct pci_dev *pdev)
5017 {
5018 struct ctlr_info *h;
5019
5020 if (pci_get_drvdata(pdev) == NULL) {
5021 dev_err(&pdev->dev, "unable to remove device\n");
5022 return;
5023 }
5024 h = pci_get_drvdata(pdev);
5025 stop_controller_lockup_detector(h);
5026 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
5027 hpsa_shutdown(pdev);
5028 iounmap(h->vaddr);
5029 iounmap(h->transtable);
5030 iounmap(h->cfgtable);
5031 hpsa_free_device_info(h);
5032 hpsa_free_sg_chain_blocks(h);
5033 pci_free_consistent(h->pdev,
5034 h->nr_cmds * sizeof(struct CommandList),
5035 h->cmd_pool, h->cmd_pool_dhandle);
5036 pci_free_consistent(h->pdev,
5037 h->nr_cmds * sizeof(struct ErrorInfo),
5038 h->errinfo_pool, h->errinfo_pool_dhandle);
5039 pci_free_consistent(h->pdev, h->reply_pool_size,
5040 h->reply_pool, h->reply_pool_dhandle);
5041 kfree(h->cmd_pool_bits);
5042 kfree(h->blockFetchTable);
5043 kfree(h->hba_inquiry_data);
5044 pci_disable_device(pdev);
5045 pci_release_regions(pdev);
5046 pci_set_drvdata(pdev, NULL);
5047 kfree(h);
5048 }
5049
5050 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5051 __attribute__((unused)) pm_message_t state)
5052 {
5053 return -ENOSYS;
5054 }
5055
5056 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5057 {
5058 return -ENOSYS;
5059 }
5060
5061 static struct pci_driver hpsa_pci_driver = {
5062 .name = HPSA,
5063 .probe = hpsa_init_one,
5064 .remove = hpsa_remove_one,
5065 .id_table = hpsa_pci_device_id, /* id_table */
5066 .shutdown = hpsa_shutdown,
5067 .suspend = hpsa_suspend,
5068 .resume = hpsa_resume,
5069 };
5070
5071 /* Fill in bucket_map[], given nsgs (the max number of
5072 * scatter gather elements supported) and bucket[],
5073 * which is an array of 8 integers. The bucket[] array
5074 * contains 8 different DMA transfer sizes (in 16
5075 * byte increments) which the controller uses to fetch
5076 * commands. This function fills in bucket_map[], which
5077 * maps a given number of scatter gather elements to one of
5078 * the 8 DMA transfer sizes. The point of it is to allow the
5079 * controller to only do as much DMA as needed to fetch the
5080 * command, with the DMA transfer size encoded in the lower
5081 * bits of the command address.
5082 */
5083 static void calc_bucket_map(int bucket[], int num_buckets,
5084 int nsgs, int *bucket_map)
5085 {
5086 int i, j, b, size;
5087
5088 /* even a command with 0 SGs requires 4 blocks */
5089 #define MINIMUM_TRANSFER_BLOCKS 4
5090 #define NUM_BUCKETS 8
5091 /* Note, bucket_map must have nsgs+1 entries. */
5092 for (i = 0; i <= nsgs; i++) {
5093 /* Compute size of a command with i SG entries */
5094 size = i + MINIMUM_TRANSFER_BLOCKS;
5095 b = num_buckets; /* Assume the biggest bucket */
5096 /* Find the bucket that is just big enough */
5097 for (j = 0; j < 8; j++) {
5098 if (bucket[j] >= size) {
5099 b = j;
5100 break;
5101 }
5102 }
5103 /* for a command with i SG entries, use bucket b. */
5104 bucket_map[i] = b;
5105 }
5106 }
5107
5108 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
5109 {
5110 int i;
5111 unsigned long register_value;
5112
5113 /* This is a bit complicated. There are 8 registers on
5114 * the controller which we write to to tell it 8 different
5115 * sizes of commands which there may be. It's a way of
5116 * reducing the DMA done to fetch each command. Encoded into
5117 * each command's tag are 3 bits which communicate to the controller
5118 * which of the eight sizes that command fits within. The size of
5119 * each command depends on how many scatter gather entries there are.
5120 * Each SG entry requires 16 bytes. The eight registers are programmed
5121 * with the number of 16-byte blocks a command of that size requires.
5122 * The smallest command possible requires 5 such 16 byte blocks.
5123 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
5124 * blocks. Note, this only extends to the SG entries contained
5125 * within the command block, and does not extend to chained blocks
5126 * of SG elements. bft[] contains the eight values we write to
5127 * the registers. They are not evenly distributed, but have more
5128 * sizes for small commands, and fewer sizes for larger commands.
5129 */
5130 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5131 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
5132 /* 5 = 1 s/g entry or 4k
5133 * 6 = 2 s/g entry or 8k
5134 * 8 = 4 s/g entry or 16k
5135 * 10 = 6 s/g entry or 24k
5136 */
5137
5138 /* Controller spec: zero out this buffer. */
5139 memset(h->reply_pool, 0, h->reply_pool_size);
5140
5141 bft[7] = SG_ENTRIES_IN_CMD + 4;
5142 calc_bucket_map(bft, ARRAY_SIZE(bft),
5143 SG_ENTRIES_IN_CMD, h->blockFetchTable);
5144 for (i = 0; i < 8; i++)
5145 writel(bft[i], &h->transtable->BlockFetch[i]);
5146
5147 /* size of controller ring buffer */
5148 writel(h->max_commands, &h->transtable->RepQSize);
5149 writel(h->nreply_queues, &h->transtable->RepQCount);
5150 writel(0, &h->transtable->RepQCtrAddrLow32);
5151 writel(0, &h->transtable->RepQCtrAddrHigh32);
5152
5153 for (i = 0; i < h->nreply_queues; i++) {
5154 writel(0, &h->transtable->RepQAddr[i].upper);
5155 writel(h->reply_pool_dhandle +
5156 (h->max_commands * sizeof(u64) * i),
5157 &h->transtable->RepQAddr[i].lower);
5158 }
5159
5160 writel(CFGTBL_Trans_Performant | use_short_tags |
5161 CFGTBL_Trans_enable_directed_msix,
5162 &(h->cfgtable->HostWrite.TransportRequest));
5163 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5164 hpsa_wait_for_mode_change_ack(h);
5165 register_value = readl(&(h->cfgtable->TransportActive));
5166 if (!(register_value & CFGTBL_Trans_Performant)) {
5167 dev_warn(&h->pdev->dev, "unable to get board into"
5168 " performant mode\n");
5169 return;
5170 }
5171 /* Change the access methods to the performant access methods */
5172 h->access = SA5_performant_access;
5173 h->transMethod = CFGTBL_Trans_Performant;
5174 }
5175
5176 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
5177 {
5178 u32 trans_support;
5179 int i;
5180
5181 if (hpsa_simple_mode)
5182 return;
5183
5184 trans_support = readl(&(h->cfgtable->TransportSupport));
5185 if (!(trans_support & PERFORMANT_MODE))
5186 return;
5187
5188 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
5189 hpsa_get_max_perf_mode_cmds(h);
5190 /* Performant mode ring buffer and supporting data structures */
5191 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
5192 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5193 &(h->reply_pool_dhandle));
5194
5195 for (i = 0; i < h->nreply_queues; i++) {
5196 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5197 h->reply_queue[i].size = h->max_commands;
5198 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5199 h->reply_queue[i].current_entry = 0;
5200 }
5201
5202 /* Need a block fetch table for performant mode */
5203 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
5204 sizeof(u32)), GFP_KERNEL);
5205
5206 if ((h->reply_pool == NULL)
5207 || (h->blockFetchTable == NULL))
5208 goto clean_up;
5209
5210 hpsa_enter_performant_mode(h,
5211 trans_support & CFGTBL_Trans_use_short_tags);
5212
5213 return;
5214
5215 clean_up:
5216 if (h->reply_pool)
5217 pci_free_consistent(h->pdev, h->reply_pool_size,
5218 h->reply_pool, h->reply_pool_dhandle);
5219 kfree(h->blockFetchTable);
5220 }
5221
5222 /*
5223 * This is it. Register the PCI driver information for the cards we control
5224 * the OS will call our registered routines when it finds one of our cards.
5225 */
5226 static int __init hpsa_init(void)
5227 {
5228 return pci_register_driver(&hpsa_pci_driver);
5229 }
5230
5231 static void __exit hpsa_cleanup(void)
5232 {
5233 pci_unregister_driver(&hpsa_pci_driver);
5234 }
5235
5236 module_init(hpsa_init);
5237 module_exit(hpsa_cleanup);
Linux with added FPC-III support