| blob | 3b58b94b53c91bc829655890339449a28bba9c3e |
1 /*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
16 / {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 model = "Atmel AT91SAM9260 family SoC";
20 compatible = "atmel,at91sam9260";
21 interrupt-parent = <&aic>;
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
29 serial5 = &uart0;
30 serial6 = &uart1;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
36 i2c0 = &i2c0;
37 ssc0 = &ssc0;
38 };
39 cpus {
40 #address-cells = <0>;
41 #size-cells = <0>;
43 cpu {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 };
47 };
49 memory {
50 device_type = "memory";
51 reg = <0x20000000 0x04000000>;
52 };
54 clocks {
55 slow_xtal: slow_xtal {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
61 main_xtal: main_xtal {
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <0>;
65 };
67 adc_op_clk: adc_op_clk{
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <5000000>;
71 };
72 };
74 sram0: sram@2ff000 {
75 compatible = "mmio-sram";
76 reg = <0x002ff000 0x2000>;
77 };
79 ahb {
80 compatible = "simple-bus";
81 #address-cells = <1>;
82 #size-cells = <1>;
83 ranges;
85 apb {
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges;
91 aic: interrupt-controller@fffff000 {
92 #interrupt-cells = <3>;
93 compatible = "atmel,at91rm9200-aic";
94 interrupt-controller;
95 reg = <0xfffff000 0x200>;
96 atmel,external-irqs = <29 30 31>;
97 };
99 ramc0: ramc@ffffea00 {
100 compatible = "atmel,at91sam9260-sdramc";
101 reg = <0xffffea00 0x200>;
102 };
104 smc: smc@ffffec00 {
105 compatible = "atmel,at91sam9260-smc", "syscon";
106 reg = <0xffffec00 0x200>;
107 };
109 matrix: matrix@ffffee00 {
110 compatible = "atmel,at91sam9260-matrix", "syscon";
111 reg = <0xffffee00 0x200>;
112 };
114 pmc: pmc@fffffc00 {
115 compatible = "atmel,at91sam9260-pmc", "syscon";
116 reg = <0xfffffc00 0x100>;
117 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
118 #clock-cells = <2>;
119 clocks = <&slow_xtal>, <&main_xtal>;
120 clock-names = "slow_xtal", "main_xtal";
121 };
123 rstc@fffffd00 {
124 compatible = "atmel,at91sam9260-rstc";
125 reg = <0xfffffd00 0x10>;
126 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
127 };
129 shdwc@fffffd10 {
130 compatible = "atmel,at91sam9260-shdwc";
131 reg = <0xfffffd10 0x10>;
132 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
133 };
135 pit: timer@fffffd30 {
136 compatible = "atmel,at91sam9260-pit";
137 reg = <0xfffffd30 0xf>;
138 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
139 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
140 };
142 tcb0: timer@fffa0000 {
143 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
144 #address-cells = <1>;
145 #size-cells = <0>;
146 reg = <0xfffa0000 0x100>;
147 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
148 18 IRQ_TYPE_LEVEL_HIGH 0
149 19 IRQ_TYPE_LEVEL_HIGH 0>;
150 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
151 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
152 };
154 tcb1: timer@fffdc000 {
155 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
156 #address-cells = <1>;
157 #size-cells = <0>;
158 reg = <0xfffdc000 0x100>;
159 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
160 27 IRQ_TYPE_LEVEL_HIGH 0
161 28 IRQ_TYPE_LEVEL_HIGH 0>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
163 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
164 };
166 pinctrl@fffff400 {
167 #address-cells = <1>;
168 #size-cells = <1>;
169 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
170 ranges = <0xfffff400 0xfffff400 0x600>;
172 atmel,mux-mask = <
173 /* A B */
174 0xffffffff 0xffc00c3b /* pioA */
175 0xffffffff 0x7fff3ccf /* pioB */
176 0xffffffff 0x007fffff /* pioC */
177 >;
179 /* shared pinctrl settings */
180 dbgu {
181 pinctrl_dbgu: dbgu-0 {
182 atmel,pins =
183 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
184 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
185 };
186 };
188 usart0 {
189 pinctrl_usart0: usart0-0 {
190 atmel,pins =
191 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
192 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
193 };
195 pinctrl_usart0_rts: usart0_rts-0 {
196 atmel,pins =
197 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
198 };
200 pinctrl_usart0_cts: usart0_cts-0 {
201 atmel,pins =
202 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
203 };
205 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
206 atmel,pins =
207 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
208 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
209 };
211 pinctrl_usart0_dcd: usart0_dcd-0 {
212 atmel,pins =
213 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
214 };
216 pinctrl_usart0_ri: usart0_ri-0 {
217 atmel,pins =
218 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
219 };
220 };
222 usart1 {
223 pinctrl_usart1: usart1-0 {
224 atmel,pins =
225 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE
226 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
227 };
229 pinctrl_usart1_rts: usart1_rts-0 {
230 atmel,pins =
231 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
232 };
234 pinctrl_usart1_cts: usart1_cts-0 {
235 atmel,pins =
236 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
237 };
238 };
240 usart2 {
241 pinctrl_usart2: usart2-0 {
242 atmel,pins =
243 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE
244 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
245 };
247 pinctrl_usart2_rts: usart2_rts-0 {
248 atmel,pins =
249 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
250 };
252 pinctrl_usart2_cts: usart2_cts-0 {
253 atmel,pins =
254 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
255 };
256 };
258 usart3 {
259 pinctrl_usart3: usart3-0 {
260 atmel,pins =
261 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE
262 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
263 };
265 pinctrl_usart3_rts: usart3_rts-0 {
266 atmel,pins =
267 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
268 };
270 pinctrl_usart3_cts: usart3_cts-0 {
271 atmel,pins =
272 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
273 };
274 };
276 uart0 {
277 pinctrl_uart0: uart0-0 {
278 atmel,pins =
279 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE
280 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
281 };
282 };
284 uart1 {
285 pinctrl_uart1: uart1-0 {
286 atmel,pins =
287 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE
288 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
289 };
290 };
292 nand {
293 pinctrl_nand_rb: nand-rb-0 {
294 atmel,pins =
295 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
296 };
298 pinctrl_nand_cs: nand-cs-0 {
299 atmel,pins =
300 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
301 };
302 };
304 macb {
305 pinctrl_macb_rmii: macb_rmii-0 {
306 atmel,pins =
307 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
308 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
309 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
310 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
311 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
312 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
313 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
314 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
315 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
316 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
317 };
319 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
320 atmel,pins =
321 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
322 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
323 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
324 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
325 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
326 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
327 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
328 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
329 };
331 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
332 atmel,pins =
333 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
334 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
335 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
336 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
337 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
338 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
339 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
340 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
341 };
342 };
344 mmc0 {
345 pinctrl_mmc0_clk: mmc0_clk-0 {
346 atmel,pins =
347 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
348 };
350 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
351 atmel,pins =
352 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
353 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
354 };
356 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
357 atmel,pins =
358 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
359 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
360 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
361 };
363 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
364 atmel,pins =
365 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
366 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
367 };
369 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
370 atmel,pins =
371 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
372 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
373 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
374 };
375 };
377 ssc0 {
378 pinctrl_ssc0_tx: ssc0_tx-0 {
379 atmel,pins =
380 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
381 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
382 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
383 };
385 pinctrl_ssc0_rx: ssc0_rx-0 {
386 atmel,pins =
387 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
388 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
389 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
390 };
391 };
393 spi0 {
394 pinctrl_spi0: spi0-0 {
395 atmel,pins =
396 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
397 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
398 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
399 };
400 };
402 spi1 {
403 pinctrl_spi1: spi1-0 {
404 atmel,pins =
405 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
406 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
407 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
408 };
409 };
411 i2c_gpio0 {
412 pinctrl_i2c_gpio0: i2c_gpio0-0 {
413 atmel,pins =
414 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
415 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
416 };
417 };
419 tcb0 {
420 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
421 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422 };
424 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
425 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
426 };
428 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
429 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
430 };
432 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
433 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
434 };
436 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
437 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 };
440 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
441 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
442 };
444 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
445 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 };
448 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
449 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
450 };
452 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
453 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455 };
457 tcb1 {
458 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
459 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
460 };
462 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
463 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
466 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
467 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 };
470 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
471 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 };
474 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
475 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 };
478 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
479 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 };
482 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
483 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 };
486 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
487 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 };
490 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
491 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 };
493 };
495 pioA: gpio@fffff400 {
496 compatible = "atmel,at91rm9200-gpio";
497 reg = <0xfffff400 0x200>;
498 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
499 #gpio-cells = <2>;
500 gpio-controller;
501 interrupt-controller;
502 #interrupt-cells = <2>;
503 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
504 };
506 pioB: gpio@fffff600 {
507 compatible = "atmel,at91rm9200-gpio";
508 reg = <0xfffff600 0x200>;
509 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
510 #gpio-cells = <2>;
511 gpio-controller;
512 interrupt-controller;
513 #interrupt-cells = <2>;
514 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
515 };
517 pioC: gpio@fffff800 {
518 compatible = "atmel,at91rm9200-gpio";
519 reg = <0xfffff800 0x200>;
520 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
521 #gpio-cells = <2>;
522 gpio-controller;
523 interrupt-controller;
524 #interrupt-cells = <2>;
525 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
526 };
527 };
529 dbgu: serial@fffff200 {
530 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
531 reg = <0xfffff200 0x200>;
532 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
533 pinctrl-names = "default";
534 pinctrl-0 = <&pinctrl_dbgu>;
535 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
536 clock-names = "usart";
537 status = "disabled";
538 };
540 usart0: serial@fffb0000 {
541 compatible = "atmel,at91sam9260-usart";
542 reg = <0xfffb0000 0x200>;
543 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
544 atmel,use-dma-rx;
545 atmel,use-dma-tx;
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_usart0>;
548 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
549 clock-names = "usart";
550 status = "disabled";
551 };
553 usart1: serial@fffb4000 {
554 compatible = "atmel,at91sam9260-usart";
555 reg = <0xfffb4000 0x200>;
556 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
557 atmel,use-dma-rx;
558 atmel,use-dma-tx;
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_usart1>;
561 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
562 clock-names = "usart";
563 status = "disabled";
564 };
566 usart2: serial@fffb8000 {
567 compatible = "atmel,at91sam9260-usart";
568 reg = <0xfffb8000 0x200>;
569 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
570 atmel,use-dma-rx;
571 atmel,use-dma-tx;
572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_usart2>;
574 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
575 clock-names = "usart";
576 status = "disabled";
577 };
579 usart3: serial@fffd0000 {
580 compatible = "atmel,at91sam9260-usart";
581 reg = <0xfffd0000 0x200>;
582 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
583 atmel,use-dma-rx;
584 atmel,use-dma-tx;
585 pinctrl-names = "default";
586 pinctrl-0 = <&pinctrl_usart3>;
587 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
588 clock-names = "usart";
589 status = "disabled";
590 };
592 uart0: serial@fffd4000 {
593 compatible = "atmel,at91sam9260-usart";
594 reg = <0xfffd4000 0x200>;
595 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
596 atmel,use-dma-rx;
597 atmel,use-dma-tx;
598 pinctrl-names = "default";
599 pinctrl-0 = <&pinctrl_uart0>;
600 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
601 clock-names = "usart";
602 status = "disabled";
603 };
605 uart1: serial@fffd8000 {
606 compatible = "atmel,at91sam9260-usart";
607 reg = <0xfffd8000 0x200>;
608 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
609 atmel,use-dma-rx;
610 atmel,use-dma-tx;
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_uart1>;
613 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
614 clock-names = "usart";
615 status = "disabled";
616 };
618 macb0: ethernet@fffc4000 {
619 compatible = "cdns,at91sam9260-macb", "cdns,macb";
620 reg = <0xfffc4000 0x100>;
621 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
622 pinctrl-names = "default";
623 pinctrl-0 = <&pinctrl_macb_rmii>;
624 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
625 clock-names = "hclk", "pclk";
626 status = "disabled";
627 };
629 usb1: gadget@fffa4000 {
630 compatible = "atmel,at91sam9260-udc";
631 reg = <0xfffa4000 0x4000>;
632 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
633 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
634 clock-names = "pclk", "hclk";
635 status = "disabled";
636 };
638 i2c0: i2c@fffac000 {
639 compatible = "atmel,at91sam9260-i2c";
640 reg = <0xfffac000 0x100>;
641 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
642 #address-cells = <1>;
643 #size-cells = <0>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
645 status = "disabled";
646 };
648 mmc0: mmc@fffa8000 {
649 compatible = "atmel,hsmci";
650 reg = <0xfffa8000 0x600>;
651 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
652 #address-cells = <1>;
653 #size-cells = <0>;
654 pinctrl-names = "default";
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
656 clock-names = "mci_clk";
657 status = "disabled";
658 };
660 ssc0: ssc@fffbc000 {
661 compatible = "atmel,at91rm9200-ssc";
662 reg = <0xfffbc000 0x4000>;
663 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
664 pinctrl-names = "default";
665 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
666 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
667 clock-names = "pclk";
668 status = "disabled";
669 };
671 spi0: spi@fffc8000 {
672 #address-cells = <1>;
673 #size-cells = <0>;
674 compatible = "atmel,at91rm9200-spi";
675 reg = <0xfffc8000 0x200>;
676 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&pinctrl_spi0>;
679 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
680 clock-names = "spi_clk";
681 status = "disabled";
682 };
684 spi1: spi@fffcc000 {
685 #address-cells = <1>;
686 #size-cells = <0>;
687 compatible = "atmel,at91rm9200-spi";
688 reg = <0xfffcc000 0x200>;
689 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_spi1>;
692 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
693 clock-names = "spi_clk";
694 status = "disabled";
695 };
697 adc0: adc@fffe0000 {
698 #address-cells = <1>;
699 #size-cells = <0>;
700 compatible = "atmel,at91sam9260-adc";
701 reg = <0xfffe0000 0x100>;
702 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
703 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
704 clock-names = "adc_clk", "adc_op_clk";
705 atmel,adc-use-external-triggers;
706 atmel,adc-channels-used = <0xf>;
707 atmel,adc-vref = <3300>;
708 atmel,adc-startup-time = <15>;
709 atmel,adc-res = <8 10>;
710 atmel,adc-res-names = "lowres", "highres";
711 atmel,adc-use-res = "highres";
713 trigger0 {
714 trigger-name = "timer-counter-0";
715 trigger-value = <0x1>;
716 };
717 trigger1 {
718 trigger-name = "timer-counter-1";
719 trigger-value = <0x3>;
720 };
722 trigger2 {
723 trigger-name = "timer-counter-2";
724 trigger-value = <0x5>;
725 };
727 trigger3 {
728 trigger-name = "external";
729 trigger-value = <0xd>;
730 trigger-external;
731 };
732 };
734 rtc@fffffd20 {
735 compatible = "atmel,at91sam9260-rtt";
736 reg = <0xfffffd20 0x10>;
737 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
738 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
739 status = "disabled";
740 };
742 watchdog@fffffd40 {
743 compatible = "atmel,at91sam9260-wdt";
744 reg = <0xfffffd40 0x10>;
745 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
746 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
747 atmel,watchdog-type = "hardware";
748 atmel,reset-type = "all";
749 atmel,dbg-halt;
750 status = "disabled";
751 };
753 gpbr: syscon@fffffd50 {
754 compatible = "atmel,at91sam9260-gpbr", "syscon";
755 reg = <0xfffffd50 0x10>;
756 status = "disabled";
757 };
758 };
760 usb0: ohci@500000 {
761 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
762 reg = <0x00500000 0x100000>;
763 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
764 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
765 clock-names = "ohci_clk", "hclk", "uhpck";
766 status = "disabled";
767 };
769 ebi: ebi@10000000 {
770 compatible = "atmel,at91sam9260-ebi";
771 #address-cells = <2>;
772 #size-cells = <1>;
773 atmel,smc = <&smc>;
774 atmel,matrix = <&matrix>;
775 reg = <0x10000000 0x80000000>;
776 ranges = <0x0 0x0 0x10000000 0x10000000
777 0x1 0x0 0x20000000 0x10000000
778 0x2 0x0 0x30000000 0x10000000
779 0x3 0x0 0x40000000 0x10000000
780 0x4 0x0 0x50000000 0x10000000
781 0x5 0x0 0x60000000 0x10000000
782 0x6 0x0 0x70000000 0x10000000
783 0x7 0x0 0x80000000 0x10000000>;
784 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
785 status = "disabled";
787 nand_controller: nand-controller {
788 compatible = "atmel,at91sam9260-nand-controller";
789 #address-cells = <2>;
790 #size-cells = <1>;
791 ranges;
792 status = "disabled";
793 };
794 };
795 };
797 i2c-gpio-0 {
798 compatible = "i2c-gpio";
799 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
800 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
801 >;
802 i2c-gpio,sda-open-drain;
803 i2c-gpio,scl-open-drain;
804 i2c-gpio,delay-us = <2>; /* ~100 kHz */
805 #address-cells = <1>;
806 #size-cells = <0>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_i2c_gpio0>;
809 status = "disabled";
810 };
811 };